CN116302617B - Method for sharing memory, communication method, embedded system and electronic equipment - Google Patents

Method for sharing memory, communication method, embedded system and electronic equipment Download PDF

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Publication number
CN116302617B
CN116302617B CN202310536667.2A CN202310536667A CN116302617B CN 116302617 B CN116302617 B CN 116302617B CN 202310536667 A CN202310536667 A CN 202310536667A CN 116302617 B CN116302617 B CN 116302617B
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memory
target
processor
storage area
operating system
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CN116302617A (en
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马斌
马文凯
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/544Buffers; Shared memory; Pipes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5022Mechanisms to release resources
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

The embodiment of the application provides a memory sharing method, a communication method, an embedded system and electronic equipment, wherein the method comprises the following steps: receiving a memory application instruction and executing locking operation on a memory of a processor, wherein the memory application instruction is used for applying for using the memory of the processor; under the condition that the memory is successfully locked, the occupied state of the memory is read, and whether an idle target memory space exists in the memory or not is judged according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction; and under the condition that the target memory space exists in the memory, feeding back the address information of the target memory space to a transmitting end of the memory application instruction, updating the occupied state of the memory, and releasing the locking of the memory. By the method and the device, the problems of low use efficiency, poor flexibility and excessive dependence on an operating system of a shared memory among a plurality of kernels are solved.

Description

Method for sharing memory, communication method, embedded system and electronic equipment
Technical Field
The embodiment of the application relates to the field of computers, in particular to a memory sharing method, a communication method, an embedded system and electronic equipment.
Background
With the rapid development of the semiconductor industry and the continuous progress of the integration process, processors selected in the fields of cloud computing, big data, artificial intelligence, industrial internet and the like gradually evolve from single core to multi-core, and the used operating system also gradually evolves from one operating system to a plurality of operating systems.
And the multi-core multi-operation systems need to provide inter-core communication modes to realize synchronization and interaction of data, and meanwhile, the real-time performance of communication is ensured.
In the related art, the inter-core communication has the problems of poor flexibility and low use efficiency when the shared memory is allocated, and the implementation of the algorithm depends on an operating system.
Aiming at the problems of low use efficiency, poor flexibility and excessive dependence on an operating system of the shared memory among a plurality of cores in the related art, no effective solution has been proposed at present.
Disclosure of Invention
The embodiment of the application provides a memory sharing method, a communication method, an embedded system and electronic equipment, which are used for at least solving the problems of low use efficiency, poor flexibility and excessively dependent operation systems of a plurality of cores in the related technology.
According to one embodiment of the present application, there is provided a method for sharing a memory, including: receiving a memory application instruction and executing locking operation on a memory of a processor, wherein the memory application instruction is used for applying for using the memory of the processor; under the condition that the memory is successfully locked, the occupied state of the memory is read, and whether an idle target memory space exists in the memory or not is judged according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction; and under the condition that the target memory space exists in the memory, feeding back the address information of the target memory space to a transmitting end of the memory application instruction, updating the occupied state of the memory, and releasing the locking of the memory.
In an exemplary embodiment, the memory includes a metadata storage area and a data storage area, the data storage area is used for storing service data, the metadata storage area is stored with a mapping table, the mapping table is used for recording occupied states of the data storage area, reading occupied states of the memory, and judging whether an idle target memory space exists in the memory according to the occupied states of the memory includes: and reading the record in the mapping table from the metadata storage area, and judging whether the target memory space exists in the data storage area according to the record in the mapping table.
In an exemplary embodiment, the data storage area is formed by a plurality of memory pages, the mapping table includes a plurality of records, each record is used for recording an occupied state of one memory page, reading the record in the mapping table from the metadata storage area, and determining whether the target memory space exists in the data storage area according to the record in the mapping table includes: determining the preset number of memory pages of a memory application instruction application; scanning each record from the initial position of the mapping table in turn; and under the condition that a continuous preset number of target records are scanned, determining that a target memory space exists in the memory, wherein the target records indicate that a memory page is in an idle state.
In one exemplary embodiment, after scanning each record sequentially from the initial position of the mapping table, the method further comprises: and under the condition that all records in the mapping table are scanned and no continuous target records with preset number exist, determining that no target memory space exists in the memory.
In an exemplary embodiment, the number of scanned target records is recorded by a counter, and in the process of scanning each record from the initial position of the mapping table in turn, the counter is controlled to be incremented by one when the target record is currently scanned, and the counter is controlled to be cleared when the non-target record is currently scanned, wherein the non-target record indicates that the memory page is in an occupied state.
In an exemplary embodiment, in the case that the initial position is the last position in the mapping table, feeding back the address information of the target memory space to the sending end of the memory application instruction includes: and determining the last scanned target record in the continuous preset number of target records, and feeding back the head address of the memory page indicated by the last scanned target record to the transmitting end.
In an exemplary embodiment, the initial position is a first position in the mapping table, and feeding back address information of the target memory space to the sending end of the memory application instruction includes: and determining the first scanned target record in the continuous preset number of target records, and feeding back the first address of the memory page indicated by the first scanned target record to the transmitting end.
In one exemplary embodiment, in sequentially scanning each record from the initial position of the mapping table, a first target record of the scanned consecutive target records is stored by a preset variable.
In one exemplary embodiment, before performing the locking operation on the memory of the processor, the method further comprises: judging whether the memory is in a locked state currently, wherein the locked state represents that the memory is in a state of being applied for use; and executing locking operation on the memory under the condition that the memory is not in the locked state currently.
In one exemplary embodiment, after determining whether the memory is currently in the locked state, the method further comprises: under the condition that the memory is in a locked state currently, determining that the memory is failed to be locked; under the condition that the locking of the memory fails, the memory of the processor is applied to be locked again after the preset time period until the memory is successfully locked, or until the number of times of applying the locking is larger than the preset number of times.
In an exemplary embodiment, after reading the occupied state of the memory and determining whether there is an idle target memory space in the memory according to the occupied state of the memory, the method further includes: and releasing the locking of the memory under the condition that no idle target memory space exists in the memory.
In an exemplary embodiment, the memory includes a metadata storage area and a data storage area, the data storage area is used for storing service data, the metadata storage area stores memory management information, and determining whether the memory is currently in a locked state includes: reading memory management information stored in a metadata storage area, and judging whether the memory management information contains preset information, wherein the preset information represents that the memory is in a locked state; under the condition that the memory management information contains preset information, determining that the memory is not in a locked state currently; and under the condition that the memory management information does not contain preset information, determining that the memory is currently in a locked state.
In an exemplary embodiment, the memory management information includes first field information and second field information, the first field information is used for describing whether the memory is in a locked state, the second field is used for describing whether the initialization of the memory is completed, and before receiving the memory application instruction, the method further includes: the first field information and the second field information stored in the data storage area are initialized.
In one exemplary embodiment, updating the occupied state of the memory includes: and changing the state of the memory page corresponding to the target memory space recorded in the mapping table into an occupied state.
According to another embodiment of the present application, there is provided a communication method including: receiving a memory application instruction of a first operating system, and executing locking operation on a memory of a processor, wherein the memory application instruction is used for applying for using the memory of the processor; under the condition that the memory is successfully locked, the occupied state of the memory is read, and whether an idle target memory space exists in the memory or not is judged according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction; under the condition that a target memory space exists in the memory, address information of the target memory space is fed back to the first operating system, the occupied state of the memory is updated, and locking of the memory is released; responding to the storage operation of the first operating system, storing target data into a target memory space, and sending the address information of the target memory space to the second operating system; and receiving an acquisition instruction sent by the second operating system based on the address information, and sending the target data stored in the target memory space to the second operating system.
In one exemplary embodiment, in the case that the first operating system performs data read and write operations using physical addresses and the second operating system performs data read and write operations using virtual addresses, the second operating system converts address information of the target memory space into virtual addresses, accesses the memory using the virtual addresses, and reads the target data from the target memory space.
In an exemplary embodiment, the memory includes a metadata storage area and a data storage area, the data storage area is formed by a plurality of memory pages, each memory page is used for storing service data, the metadata storage area stores a mapping table, the mapping table includes a plurality of records, each record is used for recording an occupied state of one memory page, reading the occupied state of the memory, and determining whether an idle target memory space exists in the memory according to the occupied state of the memory includes: determining the preset number of memory pages of a memory application instruction application; scanning each record from the initial position of the mapping table in turn; and under the condition that a continuous preset number of target records are scanned, determining that a target memory space exists in the memory, wherein the target records indicate that a memory page is in an idle state.
In an exemplary embodiment, in a case that the initial location is the last location in the mapping table, feeding back the address information of the target memory space to the first operating system includes: and determining the last scanned target record in the continuous preset number of target records, and feeding back the head address of the memory page indicated by the last scanned target record to the first operating system.
According to another embodiment of the present application, there is provided an embedded system including: the chip comprises a processor, wherein a metadata storage area and a data storage area are arranged in a memory of the processor, the data storage area is used for storing service data, and the metadata storage area is used for recording the occupied state and the locked state of the data storage area; and the operating systems are operated on the processor and use the memory of the processor by the memory sharing method.
In an exemplary embodiment, the data storage area is formed by a plurality of memory pages, the memory pages are used for storing service data, the metadata storage area stores a mapping table and memory management information, the mapping table has a plurality of records, each record is used for recording occupied states of one memory page, and the management information is used for describing whether the memory is in a locked state or not.
According to another embodiment of the present application, there is provided an apparatus for sharing a memory, including: the first receiving unit is used for receiving a memory application instruction and executing locking operation on a memory of the processor, wherein the memory application instruction is used for applying for using the memory of the processor; the first reading unit is used for reading the occupied state of the memory under the condition that the memory is successfully locked, and judging whether an idle target memory space exists in the memory according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction; the first feedback unit is used for feeding back the address information of the target memory space to the sending end of the memory application instruction under the condition that the target memory space exists in the memory, updating the occupied state of the memory and releasing the locking of the memory.
According to another embodiment of the present application, there is provided a communication apparatus including: the second receiving unit is used for receiving a memory application instruction of the first operating system and executing locking operation on a memory of the processor, wherein the memory application instruction is used for applying for using the memory of the processor; the second reading unit is used for reading the occupied state of the memory under the condition that the memory is successfully locked, and judging whether an idle target memory space exists in the memory according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction; the second feedback unit is used for feeding back the address information of the target memory space to the first operating system under the condition that the target memory space exists in the memory, updating the occupied state of the memory and releasing the locking of the memory; the response unit is used for responding to the storage operation of the first operating system, storing target data into a target memory space and sending the address information of the target memory space to the second operating system; and the third receiving unit is used for receiving an acquisition instruction sent by the second operating system based on the address information and sending the target data stored in the target memory space to the second operating system.
According to a further embodiment of the present application, there is also provided a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
According to a further embodiment of the present application, there is also provided an electronic device comprising a memory, in which a computer program is stored, and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
According to yet another embodiment of the present application, there is also provided a chip, wherein the chip comprises at least one of programmable logic circuits and executable instructions, the chip being run in an electronic device for implementing the steps in any of the method embodiments described above.
According to still another embodiment of the present application, there is further provided a BMC chip, including: the device comprises a storage unit and a processing unit connected with the storage unit, wherein the storage unit is used for storing a program, and the processing unit is used for running the program so as to execute the steps in any method embodiment.
According to still another embodiment of the present application, there is also provided a motherboard, including: at least one processor; at least one memory for storing at least one program; when the at least one program is executed by the at least one processor, the at least one processor is caused to implement the steps of any of the method embodiments described above.
According to yet another embodiment of the present application, there is also provided a server, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory complete communication with each other through the communication bus; a memory for storing a computer program; and the processor is used for realizing the steps in any method embodiment when executing the program stored in the memory.
According to the method and the device for locking the memory, the operating system applies for locking the memory when the memory of the processor is required to be used, reads the occupied state of the memory after the locking is successful, dynamically determines the target memory space required by use according to the occupied state of the memory, and releases the target memory space after the use is completed, so that the problems that the use efficiency of the shared memory among a plurality of cores is low, the flexibility is poor and the operating system is excessively dependent can be solved, the effects of improving the flexibility and the use efficiency of the shared memory and reducing the dependence on the operating system are achieved.
Drawings
Fig. 1 is a hardware block diagram of a mobile terminal according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an embedded system according to an embodiment of the present application;
FIG. 3 is a schematic diagram I of an alternative embedded system according to an embodiment of the present application;
FIG. 4 is a schematic diagram II of an alternative embedded system according to an embodiment of the present application;
FIG. 5 is a flow chart of a method of sharing memory according to an embodiment of the present application;
FIG. 6 is a diagram illustrating a relationship between a mapping table and memory pages in a method for sharing memory according to an embodiment of the present application;
FIG. 7 is a flow chart of a communication method according to an embodiment of the present application;
FIG. 8 is a schematic diagram of an alternative method of sharing memory according to an embodiment of the present application;
FIG. 9 is a schematic diagram of an apparatus for sharing memory according to an embodiment of the present application;
fig. 10 is a schematic diagram of a communication device according to an embodiment of the present application.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.
It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
The method embodiments provided in the embodiments of the present application may be performed in a mobile terminal, a computer terminal or similar computing device. Taking the operation on a mobile terminal as an example, fig. 1 is a block diagram of a hardware structure of a mobile terminal according to an embodiment of the present application. As shown in fig. 1, a mobile terminal may include one or more (only one is shown in fig. 1) processors 102 (the processor 102 may include, but is not limited to, a microprocessor MCU or a processing device such as a programmable logic device FPGA) and a memory 104 for storing data, wherein the mobile terminal may also include a transmission device 106 for communication functions and an input-output device 108. It will be appreciated by those skilled in the art that the structure shown in fig. 1 is merely illustrative and not limiting of the structure of the mobile terminal described above. For example, the mobile terminal may also include more or fewer components than shown in fig. 1, or have a different configuration than shown in fig. 1.
The memory 104 may be used to store computer programs, such as software programs and modules of application software, such as a method for sharing a memory and a computer program corresponding to a communication method in the embodiments of the present application, and the processor 102 executes the computer programs stored in the memory 104, thereby performing various functional applications and data processing, that is, implementing the methods described above. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located relative to the processor 102, which may be connected to the mobile terminal via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device 106 is used to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the mobile terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, simply referred to as NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module, which is configured to communicate with the internet wirelessly.
In this embodiment, an embedded system is provided, which may be operated on the mobile terminal, and fig. 2 is a schematic diagram of the embedded system in this embodiment, as shown in fig. 2, where the embedded system may include:
a chip and at least two operating systems, wherein the chip comprises a processor 1102, a hardware controller 1104, a first bus 1106 and a second bus 1108, wherein the bandwidth of the first bus 1106 is higher than the bandwidth of the second bus 1108, and the first bus 1106 is configured in a multi-master multi-slave mode and the second bus 1108 is configured in a master multi-slave mode; at least two operating systems run based on the processor 1102; at least two operating systems communicate over a first bus 1106; at least two operating systems implement control of the hardware controller via a second bus 1108.
Wherein, the chip can be a BMC chip; the processor may be a multi-core processor, and the hardware controller may be configured to control an external device connected to a corresponding external interface.
And the BMC chip realizes interconnection among the on-chip ARM core, the storage unit and the controller hardware resource through the first bus and the second bus. The ARM core is interconnected with each controller through a second bus, so that interaction between the core and each controller is realized. Meanwhile, ARM cores are connected to a first bus (for example, the ARM cores can be connected through an AXI (Advanced eXtensible Interface) Bridge), and communication between the cores is realized through the first bus.
The first bus is configured in a multi-master multi-slave mode, which may be a bus used for communication among a plurality of processor cores of a processor, for example, an AHB (Advanced High Performance Bus, advanced high-performance bus), and the second bus is configured in a one-master multi-slave mode, which may be a bus used for control between a processor and a hardware controller, for example, an APB (Advanced Peripheral Bus, peripheral bus), the bandwidth of the first bus being higher than the bandwidth of the second bus.
In one exemplary embodiment, the AHB is configured in a multi-Master (Master) multi-slave (slave) mode, the Master will first send a burst request to the arbiter, the arbiter decides the right to get the Master access to the bus properly, the Master will send data and control signals to the arbiter after getting the right, the arbiter will determine the corresponding slave path through address resolution, and then send the request to the corresponding destination. The data of the same response is parsed by the Decoder and then returned to the corresponding master. Many-to-many access is achieved through this multiplexed mechanism.
In an exemplary embodiment, the APB is configured in a master-multiple slave mode, the APB is suspended under the AHB bus system, and transactions are converted between the AHB bus systems by the AHB-APB Bridge, where Bridge is the master of the APB, and other peripheral devices are slave. The data request can only be sent to slave by Master, and the slave returns corresponding response data to Master after receiving the request, and the process can realize one-to-many access, and the access does not involve arbitration and Decoder parsing operation in AHB bus.
The embedded system may include at least two operating systems, the at least two operating systems being based on the processor running, and processing resources of the processor being dynamically allocated to the at least two operating systems, the processing resources of the processor including a processor core, the at least two operating systems communicating over a first bus, the at least two operating systems implementing control of the hardware controller over a second bus.
The first operating system may be an operating system with explicitly fixed time constraints, within which all processing (task scheduling) needs to be done, otherwise the system may be in error, which may be a real-time operating system (Real Time Operating System, RTOS for short), for example FreeRTOS, RTLinux, etc., or in other embedded systems. The second operating system does not have the feature, and the second operating system generally adopts a fair task scheduling algorithm, when the number of threads/processes increases, the CPU time needs to be shared, task debugging has uncertainty, and can be called as a non-real-time operating system, for example, contiki, heliOS, linux (collectively called GNU/Linux, a set of freely-transmissible Unix-like operating systems) or the like, and can also be a non-real-time operating system in other embedded systems, wherein the Linux system is a multi-user, multi-task and multi-CPU supporting operating system based on POSIX (Portable Operating System Interface ).
In one exemplary embodiment, the hardware controller may include one or more of a corresponding controller of a chip peripheral device that may include, but is not limited to, at least one of: I2C, USB (Universal Serial Bus ), UART, ADC (Analog to Digital Converter, analog to digital converter), JTAG (Joint Test Action Group, joint test working group), RTC (real_time Clock), GPIO (General Purpose Input/Output, universal input/Output), WDT (Watch Dog Timer), virtual UART (Virtual UART), super I/O (Super I/O), SGPIO (Serial General Purpose Input/Output, serial universal input/Output), PWM (Pulse Width Modulation ), fanTach (fan speed), timer (Clock), PECI (Platform Environment Control Interface ), mailBox (MailBox), and other types of controllers may also be included. The external interface may include one or more, and may include, but is not limited to, an external interface corresponding to any of the controllers described above.
Through the embedded system, the first operating system and the second operating system run based on the processor, and communication among the operating systems and control of the hardware controller are realized through buses with different functions. Because the first operating system and the second operating system are operated based on the same processor, the increase and the deployment of hardware devices are avoided, the system cost is reduced, and the operation between the processor resource support systems is reasonably utilized, so that the technical problem of lower operation efficiency of the operating systems can be solved, and the technical effect of improving the operation efficiency of the operating systems is achieved.
According to another aspect of the embodiments of the present application, there is further provided an embedded system, where the embedded system may be running on the BMC chip, and fig. 3 is a schematic diagram of an alternative embedded system of the present embodiment, as shown in fig. 3, where the embedded system may include:
the first operating system and the second operating system are operated on the processor, and the response speed of the first operating system is higher than that of the second operating system;
the service management module is used for distributing a group of services to be distributed to the corresponding operating systems according to a resource dynamic distribution rule, wherein the resource dynamic distribution rule comprises resource dynamic distribution according to at least one of the following: service response speed, service resource occupancy rate;
the resource dynamic allocation module is used for determining a resource allocation result corresponding to a group of services to be allocated, wherein the resource allocation result is used for indicating processing resources corresponding to each service to be allocated in the group of services to be allocated in processing resources of the processor, and the processing resources of the processor comprise a processor core;
and the resource self-adaptive scheduling module is used for distributing the processing resources of the processor to the first operating system and the second operating system according to the operating system corresponding to each service to be distributed and the resource distribution result.
In this embodiment, the first operating system and the second operating system may be similar to those in the foregoing embodiments, which are not described herein in detail, and the service management module, the resource dynamic allocation module, and the resource adaptive scheduling module may be software modules running under the first operating system or the second operating system.
Through the above-mentioned embedded system, this embedded system includes: the first operating system and the second operating system are operated on the processor, and the response speed of the first operating system is higher than that of the second operating system; the service management module is used for distributing a group of services to be distributed to the corresponding operating systems according to a resource dynamic distribution rule, wherein the resource dynamic distribution rule comprises resource dynamic distribution according to at least one of the following: service response speed, service resource occupancy rate; the resource dynamic allocation module is used for determining a resource allocation result corresponding to a group of services to be allocated, wherein the resource allocation result is used for indicating processing resources corresponding to each service to be allocated in the group of services to be allocated in processing resources of the processor, and the processing resources of the processor comprise a processor core; the resource self-adaptive scheduling module is used for distributing the processing resources of the processor to the first operating system and the second operating system according to the operating system corresponding to each service to be distributed and the resource distribution result, so that the problem that the overall utilization rate of core resources is low due to the fact that most of the processing resources of the multi-core processor are in an idle state in the related technology is solved, and the utilization rate of the processing resources is improved.
It should be noted that, during the running process of the embedded system, the operating system may be started first, and then different operating systems perform interaction of service data.
In one exemplary embodiment, where the operating system includes a first operating system and a second operating system, the first operating system and the second operating system may be started in the following manner, but is not limited to: the first operating system is guided to start; and guiding the second operating system to start.
Optionally, in this embodiment, the first operating system and the second operating system may be started sequentially, the first operating system may be started faster than the second operating system, the first operating system may be started simpler than the second operating system, and the first operating system may be started first and then may run a service capable of meeting the conditions required by the second operating system or accelerating the start of the second operating system, so that the multiple systems may start and run the service more efficiently and rapidly.
Such as: after the first operating system is guided to start, the first operating system can run the service (such as fan running, parameter control and other services) capable of controlling the environmental parameters of the chip to meet the starting requirement of the second operating system, so that the environmental parameters of the chip can rapidly reach the environment of the starting operation of the second operating system, and the starting efficiency and the operating efficiency of the operating system are improved.
Alternatively, in this embodiment, the first operating system may be, but is not limited to being, booted by a boot program of the first operating system, and the second operating system may be, but is not limited to being, booted by a boot program of the second operating system. Alternatively, both may be booted by the same boot program.
In one exemplary embodiment, the first operating system may be booted up, but is not limited to, in the following manner: the chip is started to be electrified, and a first processor core distributed for the first operating system in the processor is awakened by the processor; and executing a bootstrap program of the first operating system through the first processor core to guide the first operating system to start.
In one exemplary embodiment, the interaction process may be implemented by, but is not limited to, adopting a mode of combining a storage space and an interrupt request to transmit, transmitting data between operating systems through the storage space, and notifying instructions between each other through the interrupt request. Such as: acquiring service data generated in the process of the first operating system running based on the processor; storing the business data to a storage space on a processor; and sending an interrupt request to the second operating system, wherein the interrupt request is used for requesting the second operating system to read the service data from the storage space, and the second operating system is used for responding to the interrupt request to read the service data from the storage space.
Optionally, in this embodiment, the first operating system is stored in a storage space on the processor based on service data generated during the running process of the processor, and the second operating system is notified by the interrupt request, and the second operating system reads the service data from the storage space, so as to implement interaction of the service data.
Alternatively, in this embodiment, the service data interacted between the operating systems may be, but is not limited to, any data that needs to be transmitted between the systems during the operation of the operating system to run the operation service. Such as: process data for the business, result data for the business, etc.
Alternatively, in this embodiment, a storage space on the processor may be, but is not limited to, a storage location dedicated to the interaction process between the operating systems, which may be referred to as a shared memory. The information (such as a storage address) of the shared memory corresponding to the first operating system may be carried in an interrupt request for requesting the second operating system to read the service data from the storage space, where the second operating system responds to the interrupt request and reads the service data from the shared memory indicated by the interrupt request.
In this embodiment, the interrupt requests may be transmitted between systems by means of a software protocol, or may be transferred through a hardware module. Taking the form of hardware module mailbox to transmit interrupt request as an example, a mailbox channel can be established between the first operating system and the second operating system, service data is read and written through the storage space, and interrupt request is transmitted through the mailbox channel.
The first operating system generates service data during operation and determines whether the service data is required by the second operating system or needs to be sent to the second operating system. At this time, the first operating system stores the service data in the storage space, and sends an interrupt request to the second operating system, and the second operating system reads the service data from the storage space in response to the interrupt request, and performs subsequent processing.
In this embodiment, an optional embedded system is provided, and fig. 4 is a schematic diagram of a second optional embedded system according to an embodiment of the present application, as shown in fig. 4, where the system includes:
the chip comprises a processor 401, wherein a metadata storage area and a data storage area are arranged in a memory of the processor 401, the data storage area is used for storing service data, and the metadata storage area is used for recording the occupied state and the locked state of the data storage area.
In the embedded system provided in the embodiment of the present application, the data storage area is formed by a plurality of memory pages, the memory pages are used for storing service data, the metadata storage area stores a mapping table and memory management information, the mapping table has a plurality of records, each record is used for recording an occupied state of one memory page, and the management information is used for describing whether the memory is in a locked state.
A plurality of operating systems 402 run on the processor 401, and use the memory of the processor 401 by sharing the memory.
Specifically, the processor 401 is provided with a plurality of operating systems 402, where the operating systems 402 may include a real-time operating system and a non-real-time operating system, when the plurality of operating systems 402 need to cooperate with each other to perform certain functions, the processing tasks need to be implemented through inter-core communication, and the inter-core communication needs to occupy a memory space in the processor 401, and the processor 401 provides the memory space for the operating systems 402.
Specifically, when the inter-core communication is performed by the plurality of operating systems 402, data needs to be transferred, and then the memory space in the processor 401 needs to be used for performing operations of storing data and acquiring data, when the inter-core communication is performed, the operating system for transmitting data reads the memory management information of the metadata storage area in the memory first, and when the memory management information indicates that the memory is locked, the memory is subjected to locking operation, and the memory management information is updated. In an exemplary embodiment, when the mapping table of the metadata storage area of the processor 401 is scanned, if there are multiple continuous idle memory pages, the operating system 402 stores data to be sent into the continuous idle memory pages, updates the record of the continuous idle memory pages in the mapping table, updates the state of the corresponding memory pages to the occupied state, and releases the locking.
It should be noted that, when applying for the memory, the locking process cannot be interrupted, if the same system has a plurality of tasks to apply for the memory at the same time, the task with high priority will preferentially obtain the right to apply for the memory, if the same system applies for the locking at the same time between different tasks, the right to apply for the memory is obtained according to the sequence.
Through the above-mentioned embedded system, this embedded system includes: the chip comprises a processor 401, wherein a metadata storage area and a data storage area are arranged in a memory of the processor 401, the data storage area is used for storing service data, and the metadata storage area is used for recording an occupied state and a locked state of the data storage area; the multiple operating systems 402 run on the processor 401, and the memory of the processor 401 is used by a memory sharing method, so that the problems of low use efficiency, poor flexibility and excessive dependence on the operating system 402 of the shared memory among the multiple cores are solved, and the effects of improving the flexibility and the use efficiency of the shared memory and reducing the dependence on the operating system 402 are achieved.
In this embodiment, a method for sharing a memory running in an embedded system is provided, and fig. 5 is a flowchart of a method for sharing a memory according to an embodiment of the present application, as shown in fig. 5, where the method includes the following steps:
Step S501, a memory application instruction is received and a locking operation is performed on a memory of the processor, where the memory application instruction is used for applying for using the memory of the processor.
Specifically, the memory application instruction is an instruction sent by an operating system running on a processor to apply for using the memory of the processor, and it should be noted that, in order to prevent the application conflict when multiple operating systems apply for using the memory of the processor at the same time, when the operating system sends the memory application instruction, a locking operation is performed on the memory of the processor, the memory can be applied for use after the locking is successful, the locking operation refers to an exclusive operation of the memory application, and after the locking of the current operating system is successful, if the locking is not released, other servers do not apply for using the authority of the memory of the processor.
In the method for sharing a memory provided in the embodiments of the present application, before performing a locking operation on a memory of a processor, the method further includes: judging whether the memory is in a locked state currently, wherein the locked state represents that the memory is in a state of being applied for use; and executing locking operation on the memory under the condition that the memory is not in the locked state currently.
Specifically, since multiple systems or multiple tasks can cause application conflicts when applying for using the memory at the same time, the memory of the processor can only be locked by one system or task within the same time period, and therefore, the current operating system can only execute the locking operation on the memory under the condition that the current memory is detected not to be in the locked state.
Specifically, whether the memory is in a locked state is judged by judging whether a preset variable stored in the memory is a preset value, if the preset variable is not a preset parameter number, the memory is indicated not to be in the locked state, and no other systems or tasks are in the memory space application, and the locking is successful; otherwise, if the preset variable is a preset parameter, the memory is in a locked state at the current moment, and if other systems or tasks except the operating system are in the application memory space, the locking fails.
In the method for sharing a memory provided in the embodiment of the present application, after determining whether the memory is currently in a locked state, the method further includes: under the condition that the memory is in a locked state currently, determining that the memory is failed to be locked; under the condition that the locking of the memory fails, the memory of the processor is applied to be locked again after the preset time period until the memory is successfully locked, or until the number of times of applying the locking is larger than the preset number of times.
Specifically, if there is a failure in locking the memory, the memory is applied again after waiting for a preset time period until the memory is successfully locked, for example, the preset time period may be 100 microseconds.
In an exemplary embodiment, if the application fails to lock and the number of repeated applications exceeds the preset number, indicating that the memory in the processor is in a non-allocable state in the current duration, stopping the application operation. For example, the preset number of times may be 3, and in the case where the number of times of locking is greater than 3, a message that the current memory is unavailable may be returned to the operating system that sends the application.
Step S502, under the condition that the memory is successfully locked, the occupied state of the memory is read, and whether an idle target memory space exists in the memory or not is judged according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction.
After the application and locking are successful, the operating system applies for the memory in the processor, specifically scans the information for recording the occupied state of the memory, judges whether a target memory space exists, namely judges whether a continuous memory space which is in an unoccupied state and can meet the memory use requirement exists in the processor, and the meeting of the memory use requirement refers to that the size of the memory space is larger than or equal to the size of the memory applied by the operating system.
It should be noted that, when applying for the memory, a discontinuous memory space may be used, a pointer may be added at the back of the non-minimum memory block to point to the minimum memory block obtained by the next application, and at the same time, when reading and writing data, the data reading and writing of the data across the data blocks are realized according to the storage address and the pointer. The present embodiment does not limit the form of the target memory space.
In step S503, when the target memory space exists in the memory, the address information of the target memory space is fed back to the sending end of the memory application instruction, the occupied state of the memory is updated, and the locking of the memory is released.
The transmitting end refers to an operating system for transmitting a memory application instruction, and it should be noted that, when the operating system communicates between cores, the operating system uses a shared memory to transmit and receive data, and uses an address returned by an applied memory to access the data in the process of transmitting and receiving the data, so that address information of an applied memory space needs to be determined.
Specifically, after a target memory space available for an operating system exists in a memory space of a processor, address information of the target continuous space is sent to the operating system, and the operating system stores data to be transmitted into the corresponding memory space according to the address information.
In one exemplary embodiment, the occupied state of the memory space of the processor is updated according to the data writing situation of the operating system, that is, the target memory space is changed from the unoccupied state to the occupied state, and the locking operation before the memory is dynamically applied is released, so that other operating systems can apply for using the memory space of the processor.
Through the steps: receiving a memory application instruction and executing locking operation on a memory of a processor, wherein the memory application instruction is used for applying for using the memory of the processor; under the condition that the memory is successfully locked, the occupied state of the memory is read, and whether an idle target memory space exists in the memory or not is judged according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction; under the condition that a target memory space exists in the memory, address information of the target memory space is fed back to a sending end of a memory application instruction, the occupied state of the memory is updated, and locking of the memory is released, so that the problems of low use efficiency, poor flexibility and excessive dependence on an operating system of a plurality of cores are solved, and the effects of improving the flexibility and the use efficiency of the shared memory and reducing the dependence on the operating system are achieved.
In the method for sharing a memory provided in the embodiment of the present application, the memory includes a metadata storage area and a data storage area, the data storage area is used for storing service data, the metadata storage area is stored with a mapping table, the mapping table is used for recording an occupied state of the data storage area, reading the occupied state of the memory, and determining whether an idle target memory space exists in the memory according to the occupied state of the memory includes: and reading the record in the mapping table from the metadata storage area, and judging whether the target memory space exists in the data storage area according to the record in the mapping table.
Inquiring the occupied state of the memory by inquiring the record in the mapping table, specifically, acquiring a metadata storage area stored in the processor, identifying the mapping table in the metadata storage area, reading the occupied state of the data storage area by traversing the record in the mapping table, and judging whether a continuous memory space which is in an idle state and meets the use requirement of the memory exists in the data storage area.
In the method for sharing memory provided in the embodiment of the present application, the data storage area is formed by a plurality of memory pages, the mapping table includes a plurality of records, each record is used for recording an occupied state of one memory page, reading the record in the mapping table from the metadata storage area, and determining whether a target memory space exists in the data storage area according to the record in the mapping table includes: determining the preset number of memory pages of a memory application instruction application; scanning each record from the initial position of the mapping table in turn; and under the condition that a continuous preset number of target records are scanned, determining that a target memory space exists in the memory, wherein the target records indicate that a memory page is in an idle state.
It should be noted that, the data storage area is divided into a plurality of allocation units according to the same memory size, each allocation unit is recorded as a memory page, for example, the memory space of the data storage area is a byte, the divided allocation units are B bytes, and then the data storage area contains a/B memory pages in total, a record in the mapping table, that is, a memory page record, each memory page record is used for recording the occupied state of one memory page, and the number of memory page records in the mapping table is the same as the number of memory pages in the data storage area.
Fig. 6 is a schematic diagram of a relationship between a mapping table and memory pages in a method for sharing a memory according to an embodiment of the present application, as shown in fig. 6, where a data storage area is a dynamically allocated memory block area, and a metadata storage area includes a dynamically allocated memory mapping table area, where the mapping table area divides the number of memory pages into the same number of records according to the number of memory pages divided by the data storage area, and records the same number of records as memory page records, and combines all memory page records into a mapping table, where all memory page records in the mapping table have a one-to-one correspondence with all memory pages in the data storage area, and each memory page record indicates an allocation status of a corresponding memory page, that is, whether the memory page is occupied or not.
Specifically, since the operation system needs to occupy continuous memory pages in the processor for coordinated service data, the preset number of memory pages in the memory application instruction needs to be determined first, and since the memory space of each memory page is the same, the preset number of the required continuous memory pages can be calculated through the space size of the required memory and is recorded as a number.
In an exemplary embodiment, after the mapping table in the metadata storage area of the processor is obtained, the memory page record is traversed from the index position in the mapping table, where the index position may be the start position of the mapping table, and each memory page record of the mapping table is sequentially queried from the start position of the mapping table, to determine whether there is a memory page record with a number greater than or equal to a number of consecutive free memory pages, and if there is a memory page record meeting the above condition, to determine that there is a target memory space in the processor through the corresponding relationship between the memory page record and the memory page.
In the method for sharing a memory provided in the embodiments of the present application, after each record is scanned sequentially from an initial position of a mapping table, the method further includes: and under the condition that all records in the mapping table are scanned and no continuous target records with preset number exist, determining that no target memory space exists in the memory.
Specifically, starting from the starting position of the mapping table, inquiring the memory page record of the mapping table to determine whether a continuous space with the number of memory pages being greater than or equal to the number exists, and if the continuous space with the preset number of free memory pages still does not exist after the whole mapping table is scanned, indicating that the target memory space does not exist.
In the method for sharing the memory provided in the embodiment of the present application, the number of scanned target records is recorded by a counter, and in the process of scanning each record sequentially from the initial position of the mapping table, the counter is controlled to be incremented when the target record is currently scanned, and the counter is controlled to be cleared when the non-target record is currently scanned, wherein the non-target record indicates that the memory page is in an occupied state.
Specifically, judging whether a continuous preset number of target records exist or not by utilizing the size relation between the numerical value of the counter and the number of the required memory pages, namely whether a target memory space exists or not, specifically, recording the count of the counter as cntr, if the scanned memory page is empty, adding 1 to the cntr, if the scanned memory page is not empty, resetting the accumulated number cntr of the memory pages in continuous and idle states, and continuously searching for continuous empty memory pages from the address position behind the memory page; until cntr equals number, indicating that a continuous, idle state memory page has been found that meets memory requirements; if cntr is smaller than number in the process of scanning the complete mapping table, it indicates that the dynamic application of the memory fails and there is no target memory space.
In the method for sharing a memory provided in the embodiment of the present application, when the initial position is the last position in the mapping table, feeding back the address information of the target memory space to the sending end of the memory application instruction includes: and determining the last scanned target record in the continuous preset number of target records, and feeding back the head address of the memory page indicated by the last scanned target record to the transmitting end.
Specifically, when the mapping table is scanned, the scanning mode may be selected to scan from the first position of the mapping table or scan from the last position of the mapping table, when the scanning mode is scanning from the last position of the mapping table, when the numerical value cntr displayed by the counter is greater than or equal to the preset number, the scanned first address of the memory page corresponding to the last memory page record is set, the state of the memory pages is set to be non-empty in the memory page record, and the first address is used as the first address of the whole continuous memory page of the current memory application instruction.
In one exemplary embodiment, the address is fed back to the operating system that issued the memory application instruction, and the operating system performs a data writing operation on the memory according to the address information.
In the method for sharing a memory provided in the embodiment of the present application, the initial position is the first position in the mapping table, and feeding back address information of the target memory space to the sending end of the memory application instruction includes: and determining the first scanned target record in the continuous preset number of target records, and feeding back the first address of the memory page indicated by the first scanned target record to the transmitting end.
Specifically, when the scanning mode is scanning from the first position of the mapping table, under the condition that the numerical value cntr displayed by the counter is greater than or equal to the preset number, the address recorded by the scanned first memory page is used as the first address, the first address is sent to the operating system sending the memory application instruction, and the operating system performs data writing operation on the memory according to the address information.
In the method for sharing the memory provided in the embodiment of the present application, during the process of scanning each record sequentially from the initial position of the mapping table, the first target record in the scanned continuous target records is stored through a preset variable.
Specifically, the preset variable is a variable in the mapping table for storing address information of an initial position, and is recorded as an offset, and when an idle and continuous memory page is scanned, a value cntr displayed by the counter is added with 1, and when the value cntr displayed by the counter is greater than or equal to a preset number, the address information currently stored by the offset is used as the address of the first target record.
In the method for sharing a memory provided in the embodiment of the present application, after reading an occupied state of a memory and determining whether an idle target memory space exists in the memory according to the occupied state of the memory, the method further includes: and releasing the locking of the memory under the condition that no idle target memory space exists in the memory.
Specifically, after the memory page record in the mapping table is scanned. When the fact that the memory page does not contain the preset number of continuous and idle memory pages, namely the target memory space is not contained, the fact that the memory page with enough space is not available in the memory of the processor for the operating system is detected, the dynamic application of the memory fails, and locking of the memory is released.
In the method for sharing a memory provided in the embodiment of the present application, the memory includes a metadata storage area and a data storage area, the data storage area is used for storing service data, the metadata storage area stores memory management information, and determining whether the memory is currently in a locked state includes: reading memory management information stored in a metadata storage area, and judging whether the memory management information contains preset information, wherein the preset information represents that the memory is in a locked state; under the condition that the memory management information contains preset information, determining that the memory is not in a locked state currently; and under the condition that the memory management information does not contain preset information, determining that the memory is currently in a locked state.
Judging whether the memory of the processor is in a locked state or not by using memory management information in the metadata storage area, and specifically, judging whether the memory management information of the metadata storage area contains preset information or not by using the method according to the judgment of whether the memory management information is in the locked state or not when the memory management information of the metadata storage area is acquired, wherein the preset information is used for representing whether the memory is in the locked state or not; if the memory management information does not contain preset information, the current memory is in an unlocked state, otherwise, the current memory is in a locked state.
In the method for sharing a memory provided in the embodiment of the present application, the memory management information includes first field information and second field information, where the first field information is used to describe whether the memory is in a locked state, and the second field is used to describe whether the memory is initialized to be completed, and before receiving the memory application instruction, the method further includes: the first field information and the second field information stored in the data storage area are initialized.
Before the embedded system operates, the metadata storage area and the data storage area in the processor need to be initialized, specifically, the memory page record stored in the mapping table in the metadata storage area is initialized, and the memory management information is initialized.
Specifically, the memory management information is composed of first field information and second field information, that is, whether the first field information represents that the memory management information is locked or not, and the second field information is used for representing whether initialization is completed or not, and before the memory application operation is performed, the following configuration is performed on the memory management information:
typedef struct {
uint32_t MemReady;
uint32_t MemLock;
}MallocMemInfo_T;
the member variable MemLock (second field information) of the structural body malloc meminfo_t indicates whether the shared memory is initialized, and the member variable MemReady (first field information) of the structural body malloc meminfo_t indicates whether the shared memory is locked, wherein the variable MemLock is 0, which indicates that no system or task is in the application memory, that is, the shared memory is not locked, and the MemLock is 0xA5A5, which indicates that a system or task is in the application memory, and other systems or tasks are applied after the application is completed; the variable MemReady is 0xA5A5A5A5, which indicates that the initialization operation is completed, and the memory can be normally and dynamically applied and released.
In the method for sharing a memory provided in the embodiment of the present application, updating the occupied state of the memory includes: and changing the state of the memory page corresponding to the target memory space recorded in the mapping table into an occupied state.
Specifically, under the condition that the operating system needs to occupy the target memory space, the memory page records of the mapping table area of the metadata storage area are updated from the unoccupied state to the occupied state according to the corresponding relation between the memory pages and the memory page records by identifying the address information of a plurality of memory pages of the target memory space.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk), comprising several instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method described in the embodiments of the present application.
Also provided in this embodiment is a communication method, and fig. 7 is a flowchart of an alternative communication method according to an embodiment of the present application, as shown in fig. 7, where the method includes:
step S701, receiving a memory application instruction of a first operating system, and executing locking operation on a memory of a processor, wherein the memory application instruction is used for applying for using the memory of the processor;
it should be noted that, in order to prevent a plurality of operating systems from simultaneously applying for the memory space of the processor and causing application failure, when the first operating system sends a memory application instruction, a locking operation is applied to the memory of the processor, and when the application is successful, the memory can be applied.
Specifically, whether the locking is successful is determined by judging whether a preset variable stored in the memory is a preset value, if the preset variable is not a preset parameter number, the fact that no other system or task is in the memory space application is indicated, and the locking is successful; otherwise, if the preset variable is a preset parameter, it indicates that at the current moment, other systems or tasks except the operating system are in the application memory space, and locking fails.
Step S702, under the condition that the memory is successfully locked, reading the occupied state of the memory, and judging whether an idle target memory space exists in the memory according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction;
specifically, when the application for locking is successful, according to the memory application instruction sent by the operating system, the information for recording the occupied state of the memory is scanned to determine whether a target memory space exists, that is, whether a continuous memory space in an unoccupied state exists in the processor, and in an exemplary embodiment, whether the size of the continuous memory space in the unoccupied state is larger than or equal to the size of the memory applied by the operating system is determined, so as to obtain a determination result.
Step S703, when there is a target memory space in the memory, feeding back the address information of the target memory space to the first operating system, updating the occupied state of the memory, and releasing the locking of the memory;
specifically, after the judging result indicates that a target memory space available for the operating system exists in the memory space of the processor, address information of the target continuous space is sent to the operating system, and the operating system stores data to be transmitted into the corresponding memory space according to the address information.
Further, the occupied state of the memory space of the processor is updated according to the data writing condition of the operating system, namely, the target memory space is changed from the unoccupied state to the occupied state, and the locking operation before the memory is dynamically applied is released.
Step S704, in response to the storage operation of the first operating system, storing the target data into the target memory space, and transmitting the address information of the target memory space to the second operating system;
specifically, after the memory application is successful, the first operating system stores the target memory space applied for the value of the target data to be transferred, and sends address information of the target memory space to the second operating system cooperated with the first operating system to inform the second operating system of data acquisition.
Step S705, receiving an acquisition instruction sent by the second operating system based on the address information, and sending the target data stored in the target memory space to the second operating system.
Specifically, after the second operating system receives the address information of the target memory space, it sends out a data acquisition instruction, and the embedded system receives the instruction and sends the target data stored in the target memory space to the second operating system.
Through the steps: receiving a memory application instruction of a first operating system, and executing locking operation on a memory of a processor, wherein the memory application instruction is used for applying for using the memory of the processor; under the condition that the memory is successfully locked, the occupied state of the memory is read, and whether an idle target memory space exists in the memory or not is judged according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction; under the condition that a target memory space exists in the memory, address information of the target memory space is fed back to a sending end of a memory application instruction, the occupied state of the memory is updated, and locking of the memory is released; responding to the storage operation of the first operating system, storing target data into a target memory space, and sending the address information of the target memory space to the second operating system; the method comprises the steps of receiving an acquisition instruction sent by a second operating system based on address information, and sending target data stored in a target memory space to the second operating system, so that the problems of low use efficiency, poor flexibility and excessive dependence on the operating system of a plurality of cores are solved, and the effects of improving the flexibility and the use efficiency of the shared memory and reducing the dependence on the operating system are achieved.
In one exemplary embodiment, in the case that the first operating system performs data read and write operations using physical addresses and the second operating system performs data read and write operations using virtual addresses, the second operating system converts address information of the target memory space into virtual addresses, accesses the memory using the virtual addresses, and reads the target data from the target memory space.
Because the shared memory is used for inter-core communication to send and receive data, the address returned by the dynamic application memory is used, but the address systems used by different systems may be different, for example, the real-time operating system is a first operating system, the non-real-time operating system is a second operating system, the shared memory can be directly accessed by using a physical address in the real-time operating system, the shared memory cannot be directly accessed by using the physical address in the non-real-time operating system, a mapped virtual address is needed, after the second operating system receives the address information of the target memory space, the address information is converted through the address information offset, the virtual address is mapped, and the operation is performed according to the virtual address. Specifically, the virtual base address vBase of the shared memory (the real physical address of the shared memory is assumed to be 0x 96000000) under the non-real-time operating system; the physical base address pBase (i.e., 0x 96000000) of the memory is shared under the real-time operating system.
The address returned by the dynamic applied memory in the non-real-time operating system is also a virtual address vData, and in the non-real-time operating system, offset=vData-vBase; the data transmission is transmitted from the non-real-time operating system to the real-time operating system, and the real-time operating system accesses the shared memory pdata=pbase+offset of the dynamic application using the address pData.
The address returned by the dynamic applied memory in the real-time operating system is the physical address pData, and the offset=pData-pBase in the real-time operating system; the data transmission is transmitted from the real-time operating system to the non-real-time operating system, and the non-real-time operating system uses the address vData to access the shared memory vData=vBase+Offset of the dynamic application.
In an exemplary embodiment, the memory includes a metadata storage area and a data storage area, the data storage area is formed by a plurality of memory pages, each memory page is used for storing service data, the metadata storage area stores a mapping table, the mapping table includes a plurality of records, each record is used for recording an occupied state of one memory page, reading the occupied state of the memory, and determining whether an idle target memory space exists in the memory according to the occupied state of the memory includes: determining the preset number of memory pages of a memory application instruction application; scanning each record from the initial position of the mapping table in turn; and under the condition that a continuous preset number of target records are scanned, determining that a target memory space exists in the memory, wherein the target records indicate that a memory page is in an idle state.
Specifically, a metadata storage area stored in a processor is obtained, a mapping table in the metadata storage area is identified, each memory page record is traversed from an index position in the mapping table, each memory page record of the mapping table is sequentially queried, whether memory page records with the number larger than or equal to a preset number of continuous idle memory pages exist or not is determined, under the condition that the memory page records meeting the conditions exist, the existence of a target memory space in the processor is determined through the corresponding relation between the memory page records and the memory pages, and the existence of the target memory space in the processor is determined through the corresponding relation between the memory page records and the memory pages.
In an exemplary embodiment, in the case that the initial position is the last position in the mapping table, feeding back the address information of the target memory space to the sending end of the memory application instruction includes: and determining the last scanned target record in the continuous preset number of target records, and feeding back the head address of the memory page indicated by the last scanned target record to the transmitting end.
Specifically, when the mapping table is scanned, the scanning mode may select to scan from the first position of the mapping table or start to scan from the last position of the mapping table, and when the scanning mode is to scan from the last position of the mapping table, the first address of the memory page corresponding to the scanned last memory page record is set to be non-empty, and the first address is used as the first address of the whole continuous memory page of the current memory application instruction. In one exemplary embodiment, the address is fed back to the operating system that issued the memory application instruction, and the operating system performs a data writing operation on the memory according to the address information.
In this embodiment, a method for sharing a memory is also provided, and fig. 8 is a schematic diagram of an alternative method for sharing a memory according to an embodiment of the present application, as shown in fig. 8, where the method includes:
before the operating system sends out the memory application instruction, in order to prevent the application conflict caused by the simultaneous application of a plurality of operating systems to the memory space of the processor, the locking operation needs to be applied, and whether the locking is successful is judged; under the condition that the judgment result shows that the dynamic application memory locking is successful, calculating the number of pages of the continuous memory pages to be allocated according to the memory size in the issued memory application instruction, and marking as nmemb; if the judging result shows that the application fails to lock, the application is reissued after waiting for a period of time (which may be 100 microseconds) until the application is successful, and if the number of times of the application failure to lock is greater than the preset number of times (which may be three times), the memory application is exited.
In an exemplary embodiment, after the lock is applied successfully, initializing a metadata storage area of a processor, marking the last position of a mapping table as offset, calculating the number of required continuous memory pages according to the space size of a required memory in an applied memory instruction, marking the number of memory pages as nmemb, setting a counter for recording the number of memory pages as cmemb, acquiring the mapping table of the metadata storage area in the processor, scanning the whole mapping table from the offset position of the mapping table, searching for continuous empty memory pages through the corresponding relation between the memory page record stored in the mapping table and the memory page in the data storage area, if the scanned current memory page is in an occupied state, performing offset=offset-cmemb, resetting the accumulated data emb of the continuous empty memory pages in the counter, and continuously searching for continuous empty memory pages from the new offset position; if the scanned memory page is empty, i.e. in an idle state, the value cmemb of the counter is increased by 1, and the offset=offset-1, the next memory page is continuously judged until cmemb is equal to nmemb, i.e. when the size of the counter data is equal to the size of the space of the required memory, the continuous memory page meeting the requirement is scanned.
In an exemplary embodiment, the memory page meeting the requirement is marked as an occupied state in the corresponding mapping table, the first address of the last found memory page is used as the first address of the whole continuous memory page of the dynamic application, the lock of the dynamic application memory is released, and the dynamic application memory is successful.
If the value of offset is smaller than 0 in the process of scanning the whole mapping table, the fact that no memory page meeting the requirements is provided for the operating system is indicated, the lock of the dynamic application memory is released, and the dynamic application memory fails.
In addition, the size can be dynamically adjusted when the space is found to be insufficient after the space is dynamically applied, specifically, an updated memory application instruction can be issued again, locking operation is executed on the memory, under the condition that locking is successful, if the memory space required to be applied by the updated memory application instruction is increased, whether the required memory space exists after the applied target continuous memory is judged, under the condition that the memory space required to be applied by the updated memory application instruction is reduced, the memory space is released.
According to the embodiment, the index position is utilized to dynamically apply according to the size of the space which is actually needed by dividing the plurality of storage areas, the space is released after the use is completed, the size can be dynamically adjusted when the space is found to be insufficient after the space is dynamically applied, and the effects of improving the flexibility and the use efficiency of the shared memory can be achieved.
The embodiment also provides a device for sharing the memory, which is used for implementing the above embodiment and the preferred implementation, and is not described in detail. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.
Fig. 9 is a schematic diagram of an apparatus for sharing a memory according to an embodiment of the present application, as shown in fig. 9, the apparatus includes: a first receiving unit 90, a first reading unit 91, a first feedback unit 92, wherein:
the first receiving unit 90 is configured to receive a memory application instruction, and perform a locking operation on a memory of the processor, where the memory application instruction is used to apply for using the memory of the processor;
the first reading unit 91 is configured to read an occupied state of the memory and determine whether an idle target memory space exists in the memory according to the occupied state of the memory, where the size of the target memory space is greater than or equal to the size of the memory applied by the memory application instruction;
The first feedback unit 92 is configured to, when a target memory space exists in the memory, feed back address information of the target memory space to a sending end of the memory application instruction, update an occupied state of the memory, and release locking of the memory.
In the apparatus for sharing a memory provided in the embodiment of the present application, the first reading unit 91 includes: the first reading module is used for reading the record in the mapping table from the metadata storage area and judging whether the target memory space exists in the data storage area according to the record in the mapping table.
In the apparatus for sharing a memory provided in the embodiment of the present application, the first reading unit 91 includes: the first determining module is used for determining the preset number of memory pages applied by the memory application instruction; the scanning module is used for scanning each record from the initial position of the mapping table in turn; and the second determining module is used for determining that a target memory space exists in the memory under the condition that a continuous preset number of target records are scanned, wherein the target records indicate that the memory pages are in an idle state.
In the apparatus for sharing a memory provided in the embodiments of the present application, the apparatus further includes: the first determining unit is used for determining that no target memory space exists in the memory under the condition that all records in the mapping table are scanned after each record is scanned from the initial position of the mapping table in sequence and no continuous target records with preset number exist.
In the apparatus for sharing a memory provided in this embodiment of the present application, a recording unit is configured to record, by using a counter, the number of scanned target records, and in a process of scanning each record sequentially from an initial position of a mapping table, control the counter to increment by one in a case of currently scanning a target record, and control the counter to clear in a case of currently scanning a non-target record, where the non-target record indicates that a memory page is in an occupied state.
In the apparatus for sharing a memory provided in the embodiment of the present application, the first feedback unit 92 includes: and the third determining module is used for determining the last scanned target record in the continuous preset number of target records and feeding back the head address of the memory page indicated by the last scanned target record to the transmitting end.
In the apparatus for sharing a memory provided in the embodiment of the present application, the first feedback unit 92 includes: and the fourth determining module is used for determining the first scanned target record in the continuous preset number of target records and feeding back the first address of the memory page indicated by the first scanned target record to the transmitting end.
In the memory sharing device provided in the embodiment of the present application, the storage unit is configured to store, in a process of scanning each record sequentially from an initial position of the mapping table, a first target record in the scanned continuous target records through a preset variable.
In the apparatus for sharing a memory provided in the embodiments of the present application, the apparatus further includes: the judging unit is used for judging whether the memory is in a locked state currently before locking operation is carried out on the memory of the processor, wherein the locked state represents that the memory is in a state of being applied for use; and the execution unit is used for executing locking operation on the memory under the condition that the memory is not in the locked state currently.
In the apparatus for sharing a memory provided in the embodiments of the present application, the apparatus further includes: the second determining unit is used for determining whether the memory is in a locked state or not at present and determining that the memory is failed to be locked under the condition that the memory is in the locked state at present; and the application unit is used for applying for locking the memory of the processor again after the preset time length under the condition that the locking of the memory fails until the memory is successfully locked or until the number of times of applying for locking is greater than the preset number of times.
In the apparatus for sharing a memory provided in the embodiments of the present application, the apparatus further includes: the releasing unit is used for releasing the locking of the memory under the condition that the free target memory space does not exist in the memory after the occupied state of the memory is read and whether the free target memory space exists in the memory is judged according to the occupied state of the memory.
In the apparatus for sharing a memory provided in the embodiment of the present application, the first receiving unit 90 includes: the second reading module is used for reading the memory management information stored in the metadata storage area and judging whether the memory management information contains preset information, wherein the preset information represents that the memory is in a locked state; a fifth determining module, configured to determine that the memory is not currently in a locked state when the memory management information includes preset information; and the sixth determining module is used for determining that the memory is in the locked state currently under the condition that the memory management information does not contain preset information.
In the apparatus for sharing a memory provided in the embodiments of the present application, the apparatus further includes: the zero clearing unit is used for the memory management information to comprise first field information and second field information, wherein the first field information is used for describing whether the memory is in a locked state or not, the second field is used for describing whether the memory is initialized to be completed or not, and the first field information and the second field information stored in the data storage area are initialized before the memory application instruction is received.
In the apparatus for sharing a memory provided in the embodiment of the present application, the first reading unit 91 includes: and the change module is used for changing the state of the memory page corresponding to the target memory space recorded in the mapping table into an occupied state.
According to another embodiment of the present application, there is provided a communication apparatus, fig. 10 is a schematic diagram of the communication apparatus according to the embodiment of the present application, as shown in fig. 10, including: a second receiving unit 1000, a second reading unit 1001, a second feedback unit 1002, a response unit 1003, a third receiving unit 1004, wherein,
the second receiving unit 1000 is configured to receive a memory application instruction of the first operating system, and perform a locking operation on a memory of the processor, where the memory application instruction is used for applying for using the memory of the processor;
the second reading unit 1001 is configured to read an occupied state of the memory and determine whether an idle target memory space exists in the memory according to the occupied state of the memory, where a size of the target memory space is greater than or equal to a size of the memory to which the memory application instruction applies;
the second feedback unit 1002 is configured to, when a target memory space exists in the memory, feed back address information of the target memory space to the first operating system, update an occupied state of the memory, and release locking of the memory;
a response unit 1003, configured to respond to a storage operation of the first operating system, store the target data into the target memory space, and send address information of the target memory space to the second operating system;
The third receiving unit 1004 is configured to receive an acquisition instruction sent by the second operating system based on the address information, and send the target data stored in the target memory space to the second operating system.
In the communication device provided in the embodiment of the present application, when the first operating system uses a physical address to perform data read/write operation and the second operating system uses a virtual address to perform data read/write operation, the second operating system converts address information of the target memory space into the virtual address, accesses the memory using the virtual address, and reads the target data from the target memory space.
In the communication apparatus provided in the embodiment of the present application, the second reading unit 1001 includes: a seventh determining module, configured to determine a preset number of memory pages applied by the memory application instruction; the second scanning module is used for scanning each record from the initial position of the mapping table in turn; and an eighth determining module, configured to determine that a target memory space exists in the memory when a continuous preset number of target records are scanned, where the target records indicate that the memory page is in an idle state.
In the communication device provided in the embodiment of the present application, the second feedback unit 1002 includes: and the ninth determining module is used for determining the last scanned target record in the continuous preset number of target records and feeding back the head address of the memory page indicated by the last scanned target record to the first operating system.
It should be noted that each of the above modules may be implemented by software or hardware, and for the latter, it may be implemented by, but not limited to: the modules are all located in the same processor; alternatively, the above modules may be located in different processors in any combination.
Embodiments of the present application also provide a chip, where the chip includes at least one of programmable logic circuits and executable instructions, and the chip is run in an electronic device, for implementing the steps in any of the method embodiments described above.
The embodiment of the application also provides a BMC chip, wherein the BMC chip can comprise: and the storage unit and the processing unit is connected with the storage unit. The storage unit is adapted to store a program and the processing unit is adapted to run the program to perform the steps of any of the method embodiments described above.
The embodiment of the application also provides a motherboard, wherein the motherboard comprises: at least one processor; at least one memory for storing at least one program; the at least one program, when executed by the at least one processor, causes the at least one processor to perform the steps of any of the method embodiments described above.
The embodiment of the application also provides a server, which comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus, and the memory is used for storing a computer program; and the processor is used for realizing the steps in any method embodiment when executing the program stored in the memory so as to achieve the same technical effects.
The communication bus of the server may be a PCI (Peripheral Component Interconnect, peripheral component interconnect standard) bus, an EISA (Extended Industry Standard Architecture ) bus, or the like. The communication bus may be classified as an address bus, a data bus, a control bus, or the like. The communication interface is used for communication between the server and other devices.
The Memory may include RAM (Random Access Memory ) or NVM (Non-Volatile Memory), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the aforementioned processor. The processor may be a general-purpose processor, including a CPU (Central Processing Unit ), NP (Network Processor, network processor), etc.; but also DSP (Digital Signal Processing, digital signal processor), ASIC (Application Specific Integrated Circuit ), FPGA (Field Programmable Gate Array, field programmable gate array) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components.
For the server, the server has at least the characteristics of high expandability and high stability, and the expandability comprises the expandability of software besides the expandability of hardware.
In addition, since the server needs to process a large amount of data to support continuous operation of the service, the server has an important feature of high stability, and if the data transmission of the server cannot stably operate, the server can have a great influence on service development.
According to the scheme, the characteristic of high expandability of the server is utilized, a plurality of operating systems are introduced, the operating systems need to communicate in the running process, and because the memory space which can be dynamically applied is arranged in the processor memory of the server and the occupied state of the memory space is recorded, the operating systems can dynamically apply for the idle memory space in a locking mode, data reading and writing are performed on the idle memory space, and communication is achieved. For example, the first operating system applies for performing locking operation on the memory of the processor to obtain an idle target memory space enough to store data, writes data based on address information of the target memory space under the condition that the application is successful, updates the occupied state of the memory, and releases the locking of the memory, and the second operating system can obtain the data stored by the first operating system from the target memory space under the condition that the notification is received, so that data interaction is realized. Meanwhile, the server has the characteristic of high stability, so that the operating system can dynamically apply for free memory space and read and write data to the memory space, and the stability of communication among a plurality of operating systems can be ensured. In summary, the solution of the present application utilizes the specific characteristics of high scalability and high stability of the server, so that the problem that the use efficiency of the shared memory among multiple cores is low, the flexibility is poor, and the operating system is too dependent can be solved, thereby achieving the effects of improving the flexibility and the use efficiency of the shared memory, and reducing the dependence on the operating system.
Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
In one exemplary embodiment, the computer readable storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.
Embodiments of the present application also provide an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
In an exemplary embodiment, the electronic device may further include a transmission device connected to the processor, and an input/output device connected to the processor.
Specific examples in this embodiment may refer to the examples described in the foregoing embodiments and the exemplary implementation, and this embodiment is not described herein.
It will be appreciated by those skilled in the art that the modules or steps of the application described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may be implemented in program code executable by computing devices, so that they may be stored in a storage device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps of them may be fabricated into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application should be included in the protection scope of the present application.

Claims (23)

1. A method for sharing memory, comprising:
Receiving a memory application instruction and executing locking operation on a memory of a processor, wherein the memory application instruction is used for applying for using the memory of the processor;
under the condition that the memory is successfully locked, reading the occupied state of the memory, and judging whether an idle target memory space exists in the memory according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction;
under the condition that the target memory space exists in the memory, address information of the target memory space is fed back to a sending end of the memory application instruction, the occupied state of the memory is updated, and locking of the memory is released;
the memory comprises a metadata storage area and a data storage area, the data storage area is used for storing service data, the metadata storage area is stored with a mapping table, the mapping table is used for recording the occupied state of the data storage area, reading the occupied state of the memory, and judging whether an idle target memory space exists in the memory according to the occupied state of the memory comprises the following steps:
Reading the record in the mapping table from the metadata storage area, and judging whether the target memory space exists in the data storage area according to the record in the mapping table;
the data storage area is formed by a plurality of memory pages, the mapping table comprises a plurality of records, each record is used for recording the occupied state of one memory page, the records in the mapping table are read from the metadata storage area, and judging whether the target memory space exists in the data storage area according to the records in the mapping table comprises the following steps:
determining the preset number of memory pages of the memory application instruction application;
scanning each record from the initial position of the mapping table in turn;
and under the condition that the continuous target records with the preset number are scanned, determining that the target memory space exists in the memory, wherein the target records indicate that a memory page is in an idle state.
2. The method of claim 1, wherein after scanning each record sequentially from an initial position of the mapping table, the method further comprises:
and under the condition that all records in the mapping table are scanned and no continuous target records with the preset number exist, determining that the target memory space does not exist in the memory.
3. A method according to claim 1 or 2, characterized in that the number of target records scanned is recorded by a counter, the counter being controlled to be incremented in the case of a current scan of the target records and to be cleared in the case of a current scan of non-target records, wherein the non-target records indicate that a memory page is in an occupied state, during the sequential scanning of each record from the initial position of the mapping table.
4. The method according to claim 1, wherein feeding back the address information of the target memory space to the sender of the memory application instruction if the initial position is the last position in the mapping table comprises:
and determining the last scanned target record in the continuous target records with the preset number, and feeding back the head address of the memory page indicated by the last scanned target record to the transmitting end.
5. The method of claim 1, wherein the initial position is a first position in the mapping table, and feeding back address information of the target memory space to the sending end of the memory application command includes:
And determining a first scanned target record in the continuous target records with the preset number, and feeding back a first address of a memory page indicated by the first scanned target record to the transmitting end.
6. The method of claim 5, wherein a first target record of the scanned consecutive target records is stored by a preset variable during scanning each record sequentially from an initial position of the mapping table.
7. The method of claim 1, wherein prior to performing the locking operation on the memory of the processor, the method further comprises:
judging whether the memory is in a locked state currently, wherein the locked state represents that the memory is in a state of being applied for use;
and executing locking operation on the memory under the condition that the memory is not in the locked state currently.
8. The method of claim 7, wherein after determining whether the memory is currently in a locked state, the method further comprises:
determining that the memory is failed to be locked under the condition that the memory is currently in a locked state;
and under the condition that the locking of the memory fails, applying for locking the memory of the processor again after a preset time period until the memory is successfully locked, or until the number of times of applying for locking is greater than the preset number of times.
9. The method of claim 1, wherein after reading the occupied state of the memory and determining whether there is a free target memory space in the memory based on the occupied state of the memory, the method further comprises:
and releasing the locking of the memory under the condition that the idle target memory space does not exist in the memory.
10. The method of claim 7, wherein the memory includes a metadata storage area and a data storage area, the data storage area is used for storing service data, the metadata storage area stores memory management information, and determining whether the memory is currently in a locked state includes:
reading the memory management information stored in the metadata storage area, and judging whether the memory management information contains preset information, wherein the preset information represents that the memory is in a locked state;
under the condition that the memory management information contains the preset information, determining that the memory is not in a locked state currently;
and under the condition that the memory management information does not contain the preset information, determining that the memory is currently in a locked state.
11. The method of claim 10, wherein the memory management information includes first field information and second field information, the first field information describing whether the memory is in a locked state and the second field describing whether the memory is initialized complete, the method further comprising, prior to receiving a memory application instruction:
initializing the first field information and the second field information stored in the data storage area.
12. The method of claim 1, wherein updating the occupied state of the memory comprises:
and changing the state of the memory page corresponding to the target memory space recorded in the mapping table into an occupied state.
13. A method of communication, comprising:
receiving a memory application instruction of a first operating system, and executing locking operation on a memory of a processor, wherein the memory application instruction is used for applying for using the memory of the processor;
under the condition that the memory is successfully locked, reading the occupied state of the memory, and judging whether an idle target memory space exists in the memory according to the occupied state of the memory, wherein the size of the target memory space is larger than or equal to the size of the memory applied by the memory application instruction;
Feeding back address information of the target memory space to the first operating system under the condition that the target memory space exists in the memory, updating the occupied state of the memory, and releasing locking of the memory;
responding to the storage operation of the first operating system, storing target data into the target memory space, and sending the address information of the target memory space to a second operating system;
receiving an acquisition instruction sent by the second operating system based on the address information, and sending the target data stored in the target memory space to the second operating system;
the memory comprises a metadata storage area and a data storage area, wherein the data storage area is composed of a plurality of memory pages, each memory page is used for storing business data, the metadata storage area is stored with a mapping table, the mapping table comprises a plurality of records, each record is used for recording the occupied state of one memory page, the occupied state of the memory is read, and whether an idle target memory space exists in the memory or not is judged according to the occupied state of the memory, the method comprises the following steps:
determining the preset number of memory pages of the memory application instruction application;
Scanning each record from the initial position of the mapping table in turn;
and under the condition that the continuous target records with the preset number are scanned, determining that the target memory space exists in the memory, wherein the target records indicate that a memory page is in an idle state.
14. The method according to claim 13, wherein in the case where the first operating system performs data read and write operations using physical addresses and the second operating system performs data read and write operations using virtual addresses, the second operating system converts address information of the target memory space into virtual addresses and accesses the memory using the virtual addresses, the target data is read from the target memory space.
15. The method of claim 14, wherein feeding back the address information of the target memory space to the first operating system if the initial location is the last location in the mapping table comprises:
and determining the last scanned target record in the continuous target records with the preset number, and feeding back the head address of the memory page indicated by the last scanned target record to the first operating system.
16. An embedded system, comprising:
the chip comprises a processor, wherein a metadata storage area and a data storage area are arranged in a memory of the processor, the data storage area is used for storing service data, and the metadata storage area is used for recording the occupied state and the locked state of the data storage area;
a plurality of operating systems running on the processor, the memory of the processor being used by the method of sharing memory according to any one of claims 1 to 12.
17. The embedded system of claim 16, wherein the data storage area is formed of a plurality of memory pages, the memory pages are used for storing service data, the metadata storage area stores a mapping table and memory management information, the mapping table has a plurality of records, each record is used for recording an occupied state of one memory page, and the management information is used for describing whether the memory is in a locked state.
18. A computer readable storage medium, wherein a computer program is stored in the computer readable storage medium, wherein the computer program when executed by a processor implements the method of sharing memory as claimed in any one of claims 1 to 12 or the computer program when executed by a processor implements the method of communication as claimed in any one of claims 13 to 15.
19. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the method of sharing memory as claimed in any one of claims 1 to 12 when executing the computer program or the processor implements the communication method as claimed in any one of claims 13 to 15 when executing the computer program.
20. A chip comprising at least one of programmable logic circuitry and executable instructions, the chip operating in an electronic device for implementing the method of sharing memory as claimed in any one of claims 1 to 12 or for implementing the method of communication as claimed in any one of claims 13 to 15.
21. A BMC chip, comprising: a storage unit for storing a program, and a processing unit connected to the storage unit, the processing unit being configured to execute the program to perform the method of sharing memory as claimed in any one of claims 1 to 12 or to perform the communication method as claimed in any one of claims 13 to 15.
22. A motherboard, comprising:
at least one processor;
at least one memory for storing at least one program;
the at least one program, when executed by the at least one processor, causes the at least one processor to implement the method of sharing memory as claimed in any one of claims 1 to 12 or to implement the method of communicating as claimed in any one of claims 13 to 15.
23. The server is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus;
a memory for storing a computer program;
a processor for implementing a method of sharing memory as claimed in any one of claims 1 to 12 or implementing a method of communicating as claimed in any one of claims 13 to 15 when executing a program stored on a memory.
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