CN116299887A - Optical interconnection device, manufacturing method thereof and computing device - Google Patents
Optical interconnection device, manufacturing method thereof and computing device Download PDFInfo
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Abstract
The invention relates to the technical field of chips, and provides an optical interconnection device, a manufacturing method thereof and a computing device. The optical interconnection device includes: a plurality of digital electrical chips including a first digital electrical chip and a second digital electrical chip; a plurality of analog electrical chips including a first analog electrical chip and a second analog electrical chip; an optical interconnect; the first digital electric chip is in communication connection with the first analog electric chip, the second digital electric chip is in communication connection with the second analog electric chip, and the first analog electric chip and the second analog electric chip are in communication connection through the optical interconnection piece; the information transmission path from the first digital electric chip to the second digital electric chip comprises an optical waveguide, a second analog electric chip and a second digital electric chip, wherein the information passes through the first digital electric chip, the first analog electric chip, the optical interconnection piece. The invention can optimize the interconnection between chips, and independently upgrade/replace the chips with different types, thereby optimizing the package.
Description
Technical Field
The present invention relates to the field of chip technologies, and in particular, to an optical interconnection device, a manufacturing method thereof, and a computing device.
Background
Very large scale integrated circuit technology has become the mainstay supporting the evolution of the information-based society. Various types of chips that are widely used in information systems typically rely on upgrades to the process of the electrical chip to achieve performance improvements and power consumption optimization.
The development of digital electrical chips pursues a more advanced process, emphasizing the speed to cost ratio of operation. While analog electrical chips emphasize high signal-to-noise ratio, low distortion, low power consumption, high reliability and stability, process scaling may instead result in reduced analog circuit performance. The research and development period of the analog electric chip is generally longer than that of the digital electric chip, and the research and development and production cost is wasted when the digital and analog circuits are optimized in the same advanced process.
Disclosure of Invention
The invention provides an optical interconnection device, which not only can optimize the respective performances of a digital electric chip and an analog electric chip in different process steps, but also solves the problem of slow iteration period of the analog electric chip product.
According to an aspect of the present invention, there is provided an optical interconnection device including: a plurality of digital electrical chips including a first digital electrical chip and a second digital electrical chip; a plurality of analog electrical chips including a first analog electrical chip and a second analog electrical chip; and an optical interconnect comprising a photonic integrated circuit, the photonic integrated circuit comprising a plurality of optical waveguides; the first digital electric chip is in communication connection with the first analog electric chip, the second digital electric chip is in communication connection with the second analog electric chip, and the first analog electric chip and the second analog electric chip are in communication connection through the optical interconnection piece; the information transmission path from the first digital electric chip to the second digital electric chip comprises an optical waveguide, the second analog electric chip and the second digital electric chip, wherein the information passes through the first digital electric chip, the first analog electric chip, the optical interconnection piece, and the second digital electric chip in sequence.
In some embodiments, the optical interconnect device further comprises a carrier substrate; the optical interconnect is disposed on the carrier substrate; the plurality of analog electrical chips are disposed on the optical interconnect and the plurality of digital electrical chips are disposed around the optical interconnect.
In some embodiments, the plurality of digital electrical chips are closer to the carrier substrate than the plurality of analog electrical chips.
In some embodiments, the electrical connection path of the first digital electrical chip to the first analog electrical chip passes sequentially through the conductive wiring structure of the carrier substrate, the conductive wiring structure in the optical interconnect.
In some embodiments, the photonic integrated circuit of the optical interconnect further comprises: a first electro-optical conversion unit electrically connected to the first analog electrical chip for carrying information carried by an analog electrical signal of the first analog electrical chip into a first optical signal, the first optical signal being transmitted in an optical waveguide of the optical interconnect; and the first photoelectric conversion unit is electrically connected with the second analog electric chip and is used for converting the received first optical signal into an analog electric signal transmitted to the second analog electric chip.
In some embodiments, the photonic integrated circuit of the optical interconnect further comprises: a second electro-optical conversion unit electrically connected to the second analog electrical chip for carrying information carried by an analog electrical signal of the second analog electrical chip into a second optical signal, the second optical signal being transmitted in an optical waveguide of the optical interconnect; and the second photoelectric conversion unit is electrically connected with the first analog electric chip and is used for converting the received second optical signal into an analog electric signal transmitted to the first analog electric chip.
In some embodiments, each of the first electro-optical conversion unit and the second electro-optical conversion unit includes a plurality of modulators, which are used for modulating information carried by an electrical signal onto optical signals with different wavelengths and transmitting the information in a wavelength division multiplexing manner; the first photoelectric conversion unit and the second photoelectric conversion unit respectively comprise a plurality of photoelectric detectors, and the photoelectric detectors perform wave-division multiplexing on the received optical signals and convert the optical signals into electric signals.
In some embodiments, the modulator comprises a micro-ring modulator; and/or the detector comprises a microring filter detector.
In some embodiments, the photonic integrated circuit of the optical interconnect further comprises: a dielectric layer, a plurality of conductive wiring units; the dielectric layer covers the plurality of optical waveguides, the first electro-optical conversion unit, the first photoelectric conversion unit, the second electro-optical conversion unit, and the second photoelectric conversion unit; the plurality of conductive wiring units are configured to electrically connect the first electro-optical conversion unit, the first photoelectric conversion unit, the second electro-optical conversion unit, the second photoelectric conversion unit and the corresponding analog electrical chip; the plurality of conductive routing cells includes a plurality of electrical connection structures, each of the plurality of electrical connection structures each passing through at least a portion of the dielectric layer.
In some embodiments, one or more of the plurality of digital electrical chips and the plurality of analog electrical chips comprise a chiplet.
In some embodiments, the first digital electrical chip, the second digital electrical chip further comprise an ultra short range serial-parallel interface to communicate with the first analog electrical chip, the second analog electrical chip, respectively.
According to an aspect of the invention, a computing device is provided that includes an optical interconnect device.
According to an aspect of the present invention, there is provided a method of manufacturing an optical interconnection device, comprising: providing a wafer; forming a plurality of photonic integrated circuits on the wafer; wherein each of the plurality of photonic integrated circuits includes a plurality of optical waveguides, and an electro-optical conversion unit, a photoelectric conversion unit; mounting at least one analog electrical chip as required on each of the plurality of photonic integrated circuits; dividing the wafer to obtain a plurality of independent optical interconnects; mounting the optical interconnect on a carrier substrate; a digital electrical chip is mounted on a carrier substrate.
In the embodiment of the invention, a chip (chip) technology is adopted, so that the physical bottleneck of the chip area can be broken through, and the chip is an important way for realizing a chip with higher performance. As the area of each die becomes smaller, the number of dies that can be placed on a single wafer increases, thereby improving yield and reducing cost.
In addition, the invention can flexibly upgrade only part of modules when improving the system performance, thereby accelerating the iteration cycle of system upgrade.
According to an embodiment of the invention, by integrating a series of analog electrical chips on the optical interconnect, the analog electrical chips and a series of digital electrical chips around the optical interconnect are connected by an ultra-short serial to parallel interface. And loading information on different analog electric chips on the optical signals, then enabling the optical signals to shuttle in the optical interconnection piece at high speed to finish information interconnection between the different analog electric chips, and converting the high-speed analog electric signals into low-speed parallel signals processed by the digital chips by utilizing an ultra-short-distance serial-parallel conversion interface on the digital electric chips so that the digital electric chips form an organic whole through photoelectric interconnection. Compared with the electric interconnection, the optical interconnection has the advantages of large bandwidth, low time delay, low power consumption, high integration density and strong electromagnetic interference resistance. And on-chip or inter-chip optical interconnects transmit information that is distance insensitive, allowing more data to be transferred over longer distances, allowing greater flexibility in the design of computer architectures.
In some embodiments, the modulator array employs a high efficiency small area micro-ring modulator array, and the detector array employs a micro-ring filter detector with wavelength division multiplexing. By integrating the modulator array and the detector array in the optical interconnect under different analog electrical chips, a large amount of information transfer between the analog electrical chips can be performed without being limited by power consumption and bandwidth density. By arranging the modulator array, the detector array and the corresponding analog electric chips, a plurality of independent data transmission channels can be realized, each channel is exclusively occupied by two digital electric chips which are mutually communicated, the problem of competition conflict does not exist, the bandwidth of the cross section is large, the signal delay is low, and finally the information processing flux is improved.
The digital electric chips can realize point-to-point full connection on the optical interconnection piece by utilizing a series of analog electric chips, so that the information can be processed in parallel by the series of digital electric chips at the same time, and the chips are tightly connected with each other by the information, thereby better meeting the requirements of an artificial intelligence algorithm on computing capacity and bandwidth. Compared with the existing artificial intelligent products, the optical interconnection device can integrate more computing units and storage units, and can ensure organic information interconnection between the computing units and the storage units by utilizing optical interconnection, thereby providing higher system energy efficiency ratio.
Various aspects, features, advantages, etc. of embodiments of the invention will be described in detail below with reference to the accompanying drawings. The above aspects, features, advantages and the like of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.
Drawings
Fig. 1 is a schematic top view of an optical interconnect device according to an exemplary embodiment of the present invention.
Fig. 2 is a schematic view of an optical waveguide arrangement, an electro-optical conversion unit, a photoelectric conversion unit arrangement of optical interconnections in an optical interconnection device according to an exemplary embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view of an optical interconnect device;
FIG. 4 is a schematic diagram of the structure of an electro-optical conversion unit including a plurality of modulators according to an embodiment of the present invention;
Fig. 5 is a schematic view of the structure when one photoelectric conversion unit includes a plurality of detectors in the embodiment of the present invention.
FIG. 6 is a schematic cross-sectional view of a related structure in the fabrication of a photonic integrated circuit in accordance with an embodiment of the present application.
FIG. 7 is a schematic cross-sectional view of a related structure in the fabrication of a photonic integrated circuit in accordance with an embodiment of the present application.
FIG. 8 is a schematic cross-sectional view of a related structure in the fabrication of a photonic integrated circuit in accordance with an embodiment of the present application.
Detailed Description
In order to facilitate understanding of the various aspects, features and advantages of the technical solution of the present invention, the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the various embodiments described below are for illustration only and are not intended to limit the scope of the present invention.
The term "comprising" as referred to herein is an open-ended term and should be interpreted to mean "including, but not limited to. By "substantially" is meant that within an acceptable error range, a person skilled in the art is able to solve the technical problem within a certain error range, substantially achieving the technical effect.
Furthermore, the term "coupled" as used herein includes any direct or indirect connection. Thus, if a first device couples to a second device, that connection may be through a direct connection, or through an indirect connection via other devices.
The descriptions of "first," "second," and the like herein are used for distinguishing between different devices, modules, structures, etc., and not for describing a sequential order, nor are the descriptions of "first" and "second" different types. Furthermore, in some of the flows described in the specification, claims, and drawings of this application, a plurality of operations occurring in a particular order, which operations may not be performed in the order in which they occur or in parallel. The sequence numbers of operations such as 101, 102, etc. are merely used to distinguish between the various operations, and the sequence numbers themselves do not represent any order of execution. In addition, the flows may include more or fewer operations, and the operations may be performed sequentially or in parallel.
In some embodiments of the invention, the optical interconnect device includes a plurality of digital electrical chips, a plurality of analog electrical chips, and an optical interconnect. The optical interconnection piece can realize the conversion of the electric signal and the optical signal and the information transmission of the optical signal. The plurality of digital electric chips comprise a first digital electric chip and a second digital electric chip, and the plurality of analog electric chips are respectively connected with the first digital electric chip and the second digital electric chip in a communication mode and are called a first analog electric chip and a second analog electric chip. The terms "first" and "second" are used herein to distinguish between different objects and are not intended to order the objects or limit the number of objects. The optical interconnect has a plurality of optical waveguides, for example, which may be implemented using optical interconnects. The first digital electric chip is in communication connection with the first analog electric chip, the second digital electric chip is in communication connection with the second analog electric chip, and the first analog electric chip and the second analog electric chip are in communication connection through the optical interconnection piece. That is, the information transmission path from the first digital electric chip to the second digital electric chip includes information sequentially passing through the first digital electric chip, the first analog electric chip, the optical waveguide of the optical interconnect, the second analog electric chip, and the second digital electric chip. Not limited to the above examples, any two chips of the plurality of digital electric chips may be connected by an analog electric chip, an optical interconnection, or communication, as needed.
In some embodiments, the optical interconnect device further comprises a carrier substrate on which the optical interconnects are disposed. The plurality of analog electrical chips are disposed on the optical interconnect and the plurality of digital electrical chips are disposed around the optical interconnect. Wherein the electrical connection path of the digital electrical chip to the analog electrical chip includes an electrical conduction path that passes sequentially through the conductive wiring structure of the digital electrical chip, the conductive wiring structure of the carrier substrate, the conductive wiring structure in the optical interconnect (e.g., the conductive in-hole structure), and the conductive wiring structure of the analog electrical chip. In some implementations, the ultra-short range serial-parallel interface may be employed for communication between a digital electrical chip and an analog electrical chip.
In some embodiments, the optical interconnect device further comprises a laser module that generates an optical signal. In some embodiments, the optical interconnect includes an optical coupling structure that couples an optical signal from an external optical source (including an optical fiber) into the optical interconnect of the optical interconnect device. The optical coupling structure comprises, for example, a grating coupler or an end-face coupler. In some embodiments, the optical interconnect includes an electro-optical conversion unit coupled with the first analog electrical chip for carrying information carried by an analog electrical signal of the first analog electrical chip into the optical signal; the optical interconnect further includes an optical-to-electrical conversion unit coupled with the second analog electrical chip for converting the received optical signal into an analog electrical signal to be transmitted to the second analog electrical chip. In some embodiments, to achieve bidirectional communication, both an electro-optical conversion unit and a photoelectric conversion unit are integrated in an area corresponding to an analog chip in an optical interconnect. In some embodiments, the electro-optical conversion unit and the photoelectric conversion unit are integrated below the respective analog electrical chips.
According to the embodiment of the invention, when the first digital electric chip sends information to the second digital electric chip, the digital electric signal carrying the information sent by the first digital electric chip can be converted into a high-speed serial electric signal through an ultra-short-distance serial-parallel interface and transmitted to the first analog electric chip, the information carried by the analog electric signal of the analog electric chip is carried into an optical signal through an optical waveguide of an optical interconnection, the optical signal is transmitted to a photoelectric conversion unit below the second analog electric chip, the optical signal is converted into an analog electric signal, namely a high-speed serial electric signal by the photoelectric conversion unit, the second analog electric chip sends the high-speed serial electric signal to an ultra-short-distance serial-parallel interface arranged on the second digital electric chip, and the ultra-short-distance serial-parallel interface converts the high-speed serial electric signal into a low-speed parallel signal carrying the information, namely a digital electric signal and inputs the digital electric signal into the second digital electric chip, so that information transmission between the first digital electric chip and the second digital electric chip is completed. When the second digital electric chip transmits information to the first digital electric chip, the transmission process is the same as the transmission process of transmitting information from the first digital electric chip to the second digital electric chip.
In some embodiments, the electro-optical conversion unit includes an array of modulators that modulate information carried by the analog electrical signal of the first analog electrical chip onto the optical signals at different wavelengths and transmit in a wavelength division multiplexed manner; the photoelectric conversion unit includes a detector array that performs wavelength-division multiplexing on the received optical signal and converts an analog electrical signal transmitted to the second analog electrical chip. In some embodiments, the modulator array comprises a plurality of micro-ring modulators. In some embodiments, the detector array includes a plurality of microring filtered detectors.
The number of chips used in the optical interconnection device is not particularly limited, and the communication process between any two digital electric chips is the same as the communication process between the first digital chip and the second digital chip.
Fig. 1 is a schematic structural view of an optical interconnection device according to an exemplary embodiment of the present invention. In one exemplary embodiment of the present invention, the optical interconnect device includes a carrier substrate 100, an optical interconnect 200, digital electrical chips a-D, and analog electrical chips a-D. The optical interconnect 200 is disposed on the carrier substrate 100, the analog electrical chips a to D are disposed on the optical interconnect 200, and the digital electrical chips a to D are disposed on the carrier substrate 100 and distributed around the optical interconnect 200. In this regard, when the digital electrical chip is updated, it can be easily and independently replaced, while the optical interconnects and analog electrical chip can be kept unchanged, and other electrical wiring structures are not substantially changed.
Wherein the optical interconnect comprises a photonic integrated circuit comprising an optical waveguide unit, a plurality of electro-optical conversion units, and a plurality of photoelectric conversion units, wherein the optical waveguide unit may comprise a plurality of optical waveguides. In some embodiments, the electro-optic conversion unit includes one or more light modulators, which may constitute an array of modulators. The photoelectric conversion unit includes one or more photodetectors, which may constitute a detector array. For example, a modulator may modulate the initial light based on an electrical signal to produce an optical signal bearing information, i.e., to carry information carried by the electrical signal into the optical signal. The optical interconnect has a function of converting an electrical signal and an optical signal, and can use optical interconnect communication instead of electrical signal communication.
Fig. 2 is a schematic diagram of connection of an optical interconnection device according to an exemplary embodiment of the present invention, which shows in perspective an electro-optical conversion unit and a photoelectric conversion unit formed in a region corresponding to an analog electric chip in an optical interconnection. The connection and communication process between components in an optical interconnect device according to an embodiment of the present invention is described below with reference to fig. 2.
The optical interconnect 200 includes a photonic integrated circuit including a plurality of optical waveguides, a plurality of electro-optical conversion units, and a plurality of photoelectric conversion units. In some embodiments, the electro-optic conversion unit includes one or more light modulators, which may constitute an array of modulators. The photoelectric conversion unit includes one or more photodetectors, which may constitute a detector array. For example, a modulator may modulate the initial light based on an electrical signal to produce an optical signal bearing information, i.e., to carry information carried by the electrical signal into the optical signal. The optical interconnect has a function of converting an electrical signal and an optical signal, and can use optical interconnect communication instead of electrical signal communication.
The arrangement areas a 'to d' of the analog electric chips in fig. 2 correspond to the arrangement areas a to d of the analog electric chips in fig. 1, and any two of the analog electric chips a to d communicate with each other through the optical waveguide of the optical interconnect 200. In fig. 2, a plurality of photoelectric conversion units and a plurality of photoelectric conversion units are provided in the optical interconnect 200, and fig. 2 shows that 12 photoelectric conversion units and 12 photoelectric conversion units are provided in the portion of the optical interconnect corresponding to the region a'. In fig. 2, the setting areas a 'to D' of the digital electric chips are correspondingly set, the digital electric chips a to D in fig. 1 are respectively provided with an ultra-short-distance serial-parallel conversion interface, the digital electric chip a is in communication connection with the analog electric chip a, the digital electric chip B is in communication connection with the analog electric chip B, the digital electric chip C is in communication connection with the analog electric chip C, and the digital electric chip D is in communication connection with the analog electric chip D. As shown in fig. 3, the electrical connection path of the digital electrical chip a to the analog electrical chip a includes an electrical conduction path sequentially passing through the conductive wiring structure (not shown) of the digital electrical chip a, the conductive wiring structure 301301 of the carrier substrate 100, the conductive wiring structure in the optical interconnect 200, and the conductive wiring structure (not shown) of the analog electrical chip a. Illustratively, the conductive wiring structure in the optical interconnect 200 may include conductive through silicon vias 201 disposed in and through the silicon substrate of the optical interconnect. Illustratively, other in-hole conductive structures may be included in the optical interconnect, with the in-hole conductive structures passing through at least a portion of the optical interconnect. The electrical connection paths between the other digital chips and the corresponding analog chips are similar to the electrical connection paths of digital electrical chip a to analog electrical chip a. In some embodiments, the electrical connection path from the digital electrical chip a to the analog electrical chip a may also be other connection means suitable in the art.
In an exemplary embodiment, any one of the digital electrical chips can communicate with any other digital electrical chip using the optical waveguides in optical interconnect 200 to form a point-to-point fully connected topology communication connection. The laser module 300 outputs multiple wavelength lasers simultaneously, coupling optical signals into the optical interconnect 200 through an optical coupling structure in the optical interconnect, such as a grating coupler or an end-face coupler, and a beam splitter in the optical interconnect 200 distributes the energy of the light equally to corresponding electro-optical conversion units of different analog electrical chips in the optical interconnect 200. Illustratively, the beam splitter may employ a broadband beam splitter. Taking the digital chip A as an example, the information transmission process from the digital electric chip A to the other digital electric chips B-D comprises the following steps: the digital electrical signal of the digital chip a is converted into a high-speed serial signal through the ultra-short-range serial-parallel conversion interface on the digital electrical chip a, the high-speed serial signal is transmitted to the analog electrical chip a through the conductive wiring structure (e.g., metal wiring) on the carrier substrate 100 and the conductive wiring structure (e.g., conductive through silicon vias and/or other conductive lines) in the optical interconnect 200, and the electrical signal output by the analog electrical chip a is transmitted to the optical interconnect 200 and is input to the electro-optical conversion unit in the optical interconnect 200 after being processed by the analog electrical chip a. The electro-optical conversion unit includes a plurality of modulators, and may be configured as a modulator array by which light is modulated based on the electric signal, and information carried by the electric signal output from the analog electric chip a is loaded on optical signals of different wavelengths and wavelength division multiplexed. And transmitted into the photoelectric conversion unit through the optical waveguide of the optical interconnect 200. The photoelectric conversion unit includes a plurality of photodetectors, and may constitute a detector array that performs wavelength division multiplexing on the modulated optical signal and performs photoelectric conversion to output as an electrical signal. The optical interconnect 200 outputs information-bearing electrical signals to the analog electrical chips b-d, which are processed by the analog electrical chips. The electrical signals output by the analog electrical chips B-D are transmitted to the corresponding digital electrical chips B-D. Communication between the analog electrical chips B-D and the corresponding digital electrical chips B-D may be through an ultra-short range serial to parallel interface.
In an exemplary embodiment, the digital electrical chips a-D are closer to the carrier substrate than the analog electrical chips a-D, shortening the connection distance between the digital electrical chips and the carrier substrate, and simplifying the packaging method. The digital electric chip is arranged around the optical interconnection, and is not required to be arranged on the optical interconnection, so that the area of the optical interconnection can be not occupied. The analog electrical chip is disposed directly on the optical interconnect, optimizing its communication distance with the optical interconnect.
In some embodiments, digital electrical chips A-D and analog electrical chips a-D are each chiplets (chiplets). The four digital electric chips are respectively subjected to digital-to-analog, electro-optical, photoelectric and analog-to-digital conversion through the four analog electric chips and the optical interconnection piece to form point-to-point full connection. The independent data transmission channels are arranged between every two digital electric chips, so that the problem of competition conflict between every two digital electric chips is solved, the signal delay is low, and the information processing flux is high. The structure multiplexes four analog electric chips and four digital electric chips, and reduces the size of the electric chips while improving the energy efficiency ratio of the system, thereby reducing the design and processing cost of the chips and effectively improving the yield of the chips.
In some embodiments, as shown in fig. 4, an electro-optical conversion unit according to an embodiment of the present invention includes a plurality of modulators, where the plurality of modulators form a modulator array, and it should be noted that the term modulator array merely indicates an arrangement according to a certain position, and on the basis of satisfying a functional requirement, the term array does not particularly limit an arrangement form, an arrangement rule, or the like of each modulator, and is not limited to an array in a two-dimensional form. The modulator array is composed of a series of micro-ring modulators 401, and the micro-ring modulators 401 can support high modulation rates based on carrier depletion effect, and the waveguide structures of the type are doped in different areas of the ridge waveguide to form a transverse or longitudinal PN junction structure 402. When reverse bias voltage is applied, the depletion region in the PN junction is increased, the built-in electric field is enhanced, free carriers are not in the depletion region, the refractive index of the corresponding annular waveguide 403 is changed, the resonant wavelength of the annular waveguide is shifted, and the intensity of a specific wavelength near the resonant peak is greatly changed, so that the aim of intensity modulation is fulfilled. The micro-ring modulator has small size, low power consumption and high modulation efficiency. When the electrical data from the electrical chip is modulated, the carrier wave with specific wavelength can be corresponding to the heating electrode 404 on the micro-ring modulator, and the modulated optical signals with different wavelengths independently propagate on the optical waveguide 407, so as to realize the signal transmission of the multichannel wavelength division multiplexing. Wherein, a plurality of micro-rings can correspond to a plurality of different wavelengths. Because of the sensitivity of the micro-ring modulator to temperature, the optical modulation amplitude can be kept maximized during modulation by monitoring the photocurrent generated by the absorption of light by the lateral or longitudinal PN junctions themselves and adjusting the bias point of the micro-ring modulator using feedback control on an analog electrical chip.
In some embodiments, as shown in fig. 5, a photoelectric conversion unit includes a plurality of detectors, where the plurality of detectors form a detector array, and it should be noted that the term detector array only refers to an array according to a certain position, and the term array is not limited to a specific arrangement form, an arrangement rule, or the like of each detector, and is not limited to an array in a two-dimensional form on the basis of satisfying a functional requirement. Illustratively, the detector array is comprised of a series of microring filter detectors 501, the microring filter detectors 501 including heating electrodes 502, annular waveguides 503, signal light detectors 504. The ring waveguide 503 is adjusted by adjusting the heating electrode 502 on the micro-ring filter detector 501, optical signals with specific wavelengths are filtered out from the optical waveguide 507 and downloaded to the signal light detector 504 coupled with the electrical chip, so as to realize the conversion from optical signals to analog electrical signals. Wherein, a plurality of micro-rings can correspond to a plurality of different wavelengths. The residual light energy at the end of the waveguide is absorbed by the waveguide terminal 505 connected to the optical waveguide 507 and the signal detector 504, so that the residual light energy does not affect the signal transmission of the other optical waveguides.
By arranging a proper electro-optical conversion unit, a photoelectric conversion unit and an optical waveguide in the optical interconnection, a large amount of information transmission can be performed between analog electric chips without being limited by power consumption and bandwidth density. The positions of the modulator array, the detector array and the corresponding analog electric chips in the optical interconnection piece can be arranged according to the requirements, a plurality of independent data transmission channels can be realized, each channel is exclusively used by two digital chips which are mutually communicated, the problem of competition conflict does not exist, the bandwidth of the cross section is large, the signal delay is low, and finally the information processing flux is improved.
In some embodiments of the invention, the digital electrical chip may be one or more of a CPU, GPU, and memory chip.
Exemplary embodiments of the present invention provide a method of manufacturing an optical interconnection device, which can be used to manufacture the optical interconnection device in the foregoing embodiments. The method comprises the following steps:
s601, providing a wafer.
S602, forming a plurality of photonic integrated circuits on the wafer.
Wherein each of the plurality of photonic integrated circuits may include a plurality of optical waveguides, and an electro-optical conversion unit, a photoelectric conversion unit, the plurality of optical waveguides may be used to constitute an optical waveguide unit, that is, the optical waveguide unit includes a plurality of optical waveguides. Each of the plurality of photonic integrated circuits may further include a plurality of conductive wiring units that may connect the electro-optical conversion unit and/or the photoelectric conversion unit to a corresponding analog electrical chip to receive an electrical signal to be communicated from the analog electrical chip and/or to transmit an electrical signal for communication to the analog electrical chip. Typically, a plurality of photonic integrated circuits are formed in a plurality of regions on a wafer, and in a subsequent step, the wafer is diced to form individual photonic integrated circuits that are used to form optical interconnects, i.e., the optical interconnects include the photonic integrated circuits.
S603, installing at least one required analog electrical chip on each of the plurality of photonic integrated circuits. The number of analog electric chips may be one or more, for example, a first analog electric chip and a second analog electric chip are provided, the first analog electric chip is electrically connected to the first conductive wiring unit, the second analog electric chip is electrically connected to the second conductive wiring unit, and the first electro-optical conversion unit receives a first electric signal of the first analog electric chip through the first conductive wiring unit and generates a first optical signal in a coded manner; the first photoelectric converter is used for converting a first optical signal into an electric signal and transmitting the electric signal to the second conductive wiring unit.
S604, dividing the wafer to obtain a plurality of independent optical interconnects.
S605, mounting the optical interconnect on a carrier substrate.
S606, mounting the digital electric chip on the bearing substrate.
In some embodiments, a single photonic integrated circuit and the first and second analog electrical chips mounted (disposed) on the photonic integrated circuit are included in a single optical interconnect device. The first analog electric chip and the second analog electric chip can communicate through the first conductive wiring unit, the first electro-optical conversion unit, at least one of the plurality of optical waveguides, the first photoelectric conversion unit and the second conductive wiring unit. The individual optical interconnects comprise in particular one of said photonic integrated circuits.
It should be noted that the numbering of the steps does not represent an order of execution. The optical interconnect may be mounted before the digital electric chip is mounted, and the optical interconnect may be mounted after the digital electric chip is mounted, for example, without particular limitation.
In S601, the wafer includes a semiconductor layer. In one example, the wafer may be a semiconductor-on-insulator wafer, such as: SOI (Silicon-On-Insulator) wafer. As shown in fig. 6, the semiconductor-on-insulator wafer may include: an insulating layer 602, a semiconductor layer 603 formed on the insulating layer 602, and a backing underlayer 601 located below the insulating layer 602.
In S602, the photonic integrated circuit may be formed by patterning, depositing, doping, or the like, on the semiconductor layer 603.
In S603, in an example, the first analog electric chip may be electrically connected to the first conductive wiring unit and the second analog electric chip may be electrically connected to the second conductive wiring unit by bonding or soldering.
In one embodiment, the step S602 of forming a plurality of photonic integrated circuits on the wafer may be implemented by the following steps:
S21, forming an optical waveguide unit, a first electro-optical conversion unit of the first electro-optical conversion unit and the first photoelectric conversion unit on the wafer.
And S22, depositing a dielectric layer on the wafer with the optical waveguide unit, the first electro-optical conversion unit and the first photoelectric conversion unit so as to cover the optical waveguide unit, the first electro-optical conversion unit, the first photoelectric conversion unit and the wafer.
S23, forming a first opening and a second opening in the dielectric layer.
S24, forming a first electric connection structure in the first opening and forming a second electric connection structure in the second opening.
Wherein the first conductive wiring unit includes the first electrical connection structure; the second conductive wiring unit includes the second electrical connection structure.
As shown in fig. 6 and 7, the semiconductor layer 603 of the wafer may be patterned to obtain the regions corresponding to the optical waveguide unit 103, the first electro-optical conversion unit 104, and the first photoelectric conversion unit 105 in S21. In particular, photolithography and etching techniques are used to remove unwanted material for patterning. In some embodiments, the insulating layer may act as an etch stop layer. In some embodiments, the electro-optical conversion unit includes one or more modulators, which may constitute a modulator array. The photoelectric conversion unit includes one or more photodetectors, which may constitute a detector array. For simplicity, only one modulator, one detector, is shown in fig. 7.
In S22 described above, as shown in fig. 8, a dielectric layer 106 is deposited on the wafer on which the optical waveguide unit 103, the first electro-optical conversion unit 104, and the first photoelectric conversion unit 105 are formed so as to cover the optical waveguide unit 103, the first electro-optical conversion unit 104, the first photoelectric conversion unit 105, and the wafer. Specifically, by deposition, the dielectric layer 106 is formed on the optical waveguide unit 103, the first electro-optical conversion unit 104, the first photoelectric conversion unit 105, and the insulating layer 602. The material of the dielectric layer and the material of the insulating layer may be the same.
In S23, as shown in fig. 8, a first opening and a second opening are formed in the dielectric layer 106. The first openings and the second openings can be formed by etching technology, and the number of the first openings and the second openings can be one or more according to the connection requirement.
In some embodiments, the dielectric layer 106 is a multi-layer structure formed by a plurality of sub-dielectric layers, in which multiple conductive layers may be formed, with the conductive layers being connected by conductive material in the openings. For example, a first sub-dielectric layer is formed by deposition, a first conductive layer is formed, a second sub-dielectric layer is formed by deposition, a second conductive layer is formed, a third sub-dielectric layer is formed, a third conductive layer is formed, and a fourth sub-dielectric layer is formed. Among the first to third conductive layers, different conductive layers are interconnected by conductive materials in the openings, and each conductive layer may be a patterned metal material layer.
In S24 described above, as shown in fig. 8, the first electrical connection structure 101a of the first conductive wiring unit 101 may be formed in the first opening and the second electrical connection structure 102a of the second conductive wiring unit 102 may be formed in the second opening by depositing a conductive material. The first electrical connection structure passes through at least a portion of the dielectric layer 106; the first electrical connection structure passes through at least a portion of the dielectric layer 106.
After depositing the conductive material, the excess conductive material may be removed along the mounting surface of the dielectric layer by a planarization process such as chemical mechanical polishing or mechanical lapping so that the first and second electrical connection structures are flush with the mounting surface of the dielectric layer.
Subsequently, a first analog electrical chip and a second analog electrical chip are mounted on each photonic integrated circuit on the wafer, specifically, the first analog electrical chip and the second analog electrical chip are mounted on the dielectric layer 106/the mounting surface of the photonic integrated circuit in the area corresponding to each photonic integrated circuit, that is, the area corresponding to each photonic integrated circuit on the dielectric layer 106/the mounting surface of the photonic integrated circuit, and the first analog electrical chip and the second analog electrical chip are electrically connected with the first electrical connection structure and the second electrical connection structure in the area.
Subsequently, a sealant may also be formed on the dielectric layer 106 to bury or cover the first analog electrical chip and the second analog electrical chip. Thereafter, the encapsulant may be cured and may be planarized.
In some embodiments, a process of thinning the backing substrate 601 may be included.
In some embodiments, S604 may be performed after S603, that is, the first analog electrical chip and the second analog electrical chip may be batch-mounted before the dicing of the photonic integrated circuit wafer, which may be performed by batch-packaging the first analog electrical chip and the second analog electrical chip in a wafer-level process, where only the photonic integrated circuit wafer is required to be manufactured, and the photonic integrated circuit is not required to be formed into a single chip.
In some embodiments, in fabricating photonic integrated circuits, fabricating conductive wiring structures that can be used to connect digital electrical chips, analog electrical chips, such that electrical signal communication can be achieved between the digital electrical chips, analog electrical chips, where the optical interconnects comprise the conductive wiring structures described above, the optical interconnects may serve as an interposer, for example. The conductive wiring structure may include conductive through silicon vias, and may include other conductive lines.
Alternatively, the wafer dicing process may be performed first to form individual photonic integrated circuits/individual optical interconnects containing the photonic integrated circuits, and then the mounting process of the first analog electrical chip and the second analog electrical chip may be performed, i.e., the first analog electrical chip and the second analog electrical chip are mounted on the individual photonic integrated circuits.
Alternatively, a plurality of individual photonic integrated circuits may be packaged to some extent to form a plurality of individual photonic integrated circuit chips (including bare chips) as the chips for optical interconnection, i.e., the optical interconnection may employ the photonic integrated circuit chips. Specifically, the method comprises the following steps:
s1001, providing a wafer.
S1002, forming a plurality of photonic integrated circuits on the wafer.
Wherein each of the plurality of photonic integrated circuits includes a first conductive wiring unit, a second conductive wiring unit, an optical waveguide unit, and a first electro-optical conversion unit and a first photoelectric conversion unit; the first electro-optical conversion unit and the first photoelectric conversion unit are respectively coupled to the optical waveguide unit; the first conductive wiring unit is electrically connected with the first electro-optical conversion unit; the second conductive wiring unit is electrically connected to the first photoelectric conversion unit.
And S1003, dividing the wafer to obtain a plurality of independent photonic integrated circuits.
Wherein the plurality of photonic integrated circuits are segmented into individual photonic integrated circuits such that each of the photonic integrated circuit chips includes an individual photonic integrated circuit therein.
S1004, mounting a first analog electrical chip and a second analog electrical chip on each of the plurality of independent photonic integrated circuit chips such that the first analog electrical chip is electrically connected to the first conductive routing unit, and the second analog electrical chip is electrically connected to the second conductive routing unit.
As one example, S1004 may be performed after step S1003, but is not limited thereto.
The first analog electric chip and the second analog electric chip can communicate through the first conductive wiring unit, the first electro-optical conversion unit, the optical waveguide unit, the first photoelectric conversion unit and the second conductive wiring unit.
The specific implementation of step S1002 may be referred to the corresponding content in each embodiment, which is not described herein.
It will be appreciated by those skilled in the art that the foregoing disclosure is merely illustrative of the present invention and that no limitation on the scope of the invention is intended, as defined by the appended claims.
Claims (13)
1. An optical interconnect device, the optical interconnect device comprising:
a plurality of digital electrical chips including a first digital electrical chip and a second digital electrical chip;
a plurality of analog electrical chips including a first analog electrical chip and a second analog electrical chip; and
an optical interconnect comprising a photonic integrated circuit, the photonic integrated circuit comprising a plurality of optical waveguides;
the first digital electric chip is in communication connection with the first analog electric chip, the second digital electric chip is in communication connection with the second analog electric chip, and the first analog electric chip and the second analog electric chip are in communication connection through the optical interconnection piece;
the information transmission path from the first digital electric chip to the second digital electric chip comprises an optical waveguide, the second analog electric chip and the second digital electric chip, wherein the information passes through the first digital electric chip, the first analog electric chip, the optical interconnection piece, and the second digital electric chip in sequence.
2. The optical interconnect device of claim 1, further comprising a carrier substrate;
the optical interconnect is disposed on the carrier substrate;
The plurality of analog electrical chips are disposed on the optical interconnect and the plurality of digital electrical chips are disposed around the optical interconnect.
3. The optical interconnect device of claim 2, wherein the plurality of digital electrical chips are closer to the carrier substrate than the plurality of analog electrical chips.
4. The optical interconnect device of claim 2 wherein the electrical connection path of the first digital electrical chip to the first analog electrical chip passes sequentially through the conductive wiring structure of the carrier substrate, the conductive wiring structure in the optical interconnect.
5. The optical interconnect device of any of claims 1-4, wherein the photonic integrated circuit of the optical interconnect further comprises:
a first electro-optical conversion unit electrically connected to the first analog electrical chip for carrying information carried by an analog electrical signal of the first analog electrical chip into a first optical signal, the first optical signal being transmitted in an optical waveguide of the optical interconnect;
and the first photoelectric conversion unit is electrically connected with the second analog electric chip and is used for converting the received first optical signal into an analog electric signal transmitted to the second analog electric chip.
6. The optical interconnect device of claim 5, wherein the photonic integrated circuit of the optical interconnect further comprises: a second electro-optical conversion unit electrically connected to the second analog electrical chip for carrying information carried by an analog electrical signal of the second analog electrical chip into a second optical signal, the second optical signal being transmitted in an optical waveguide of the optical interconnect;
and the second photoelectric conversion unit is electrically connected with the first analog electric chip and is used for converting the received second optical signal into an analog electric signal transmitted to the first analog electric chip.
7. The optical interconnect device of claim 6 wherein,
the first electro-optical conversion unit and the second electro-optical conversion unit respectively comprise a plurality of modulators, and the modulators are used for modulating information borne by the electric signals onto optical signals with different wavelengths and transmitting the information in a wavelength division multiplexing mode;
the first photoelectric conversion unit and the second photoelectric conversion unit respectively comprise a plurality of photoelectric detectors, and the photoelectric detectors perform wave-division multiplexing on the received optical signals and convert the optical signals into electric signals.
8. The optical interconnect device of claim 7, wherein the modulator comprises a micro-ring modulator; and/or
The detector comprises a microring filter detector.
9. The optical interconnect device of claim 7, the photonic integrated circuit of the optical interconnect further comprising: a dielectric layer, a plurality of conductive wiring units;
the dielectric layer covers the plurality of optical waveguides, the first electro-optical conversion unit, the first photoelectric conversion unit, the second electro-optical conversion unit, and the second photoelectric conversion unit;
the plurality of conductive wiring units are configured to electrically connect the first electro-optical conversion unit, the first photoelectric conversion unit, the second electro-optical conversion unit, the second photoelectric conversion unit and the corresponding analog electrical chip;
the plurality of conductive routing cells includes a plurality of electrical connection structures, each of the plurality of electrical connection structures each passing through at least a portion of the dielectric layer.
10. The optical interconnect device of claim 8, wherein one or more of the plurality of digital electrical chips and the plurality of analog electrical chips comprise a chiplet.
11. The optical interconnect device of claim 9, wherein the first digital electrical chip and the second digital electrical chip further comprise ultra-short-range serial-parallel interfaces to communicate with the first analog electrical chip and the second analog electrical chip, respectively.
12. A computing device comprising the optical interconnect device of any of claims 1-10.
13. A method of manufacturing an optical interconnect device according to any one of claims 1-10, comprising:
providing a wafer;
forming a plurality of photonic integrated circuits on the wafer;
wherein each of the plurality of photonic integrated circuits includes a plurality of optical waveguides, and an electro-optical conversion unit, a photoelectric conversion unit;
mounting at least one analog electrical chip as required on each of the plurality of photonic integrated circuits;
dividing the wafer to obtain a plurality of independent optical interconnects;
mounting the optical interconnect on a carrier substrate;
a digital electrical chip is mounted on a carrier substrate.
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| CN202111527948.9A CN116299887A (en) | 2021-12-14 | 2021-12-14 | Optical interconnection device, manufacturing method thereof and computing device |
| PCT/CN2022/137593 WO2023109645A1 (en) | 2021-12-14 | 2022-12-08 | Optical interconnection device and manufacturing method therefor, and computing device |
| TW111147877A TWI832609B (en) | 2021-12-14 | 2022-12-13 | Optical interconnection device and manufacturing method thereof and computing device |
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| CN101589319B (en) * | 2006-09-19 | 2011-07-13 | 揖斐电株式会社 | Optical interconnect device and method for manufacturing the same |
| CN101995616B (en) * | 2009-08-19 | 2012-05-23 | 中国科学院半导体研究所 | Multi-channel optical transceiving module totally made of silicon-based material |
| CN101995617B (en) * | 2009-08-19 | 2012-07-18 | 中国科学院半导体研究所 | Optical transmission/reception module made of silicon-based materials |
| US20130230272A1 (en) * | 2012-03-01 | 2013-09-05 | Oracle International Corporation | Chip assembly configuration with densely packed optical interconnects |
| CN103326789B (en) * | 2013-05-03 | 2016-01-06 | 华中科技大学 | A kind of microwave Phase Shifting System of frequency-tunable and method |
| US9391708B2 (en) * | 2014-05-21 | 2016-07-12 | Stmicroelectronics S.R.L. | Multi-substrate electro-optical interconnection system |
| US10725254B2 (en) * | 2017-09-20 | 2020-07-28 | Aayuna Inc. | High density opto-electronic interconnection configuration utilizing passive alignment |
| US11024617B2 (en) * | 2018-10-26 | 2021-06-01 | Micron Technology, Inc. | Semiconductor packages having photon integrated circuit (PIC) chips |
| US10666353B1 (en) * | 2018-11-20 | 2020-05-26 | Juniper Networks, Inc. | Normal incidence photodetector with self-test functionality |
| TWI672480B (en) * | 2018-12-03 | 2019-09-21 | 財團法人工業技術研究院 | Optical measurement apparatus and method |
| CN111326599B (en) * | 2020-03-10 | 2021-09-24 | Nano科技(北京)有限公司 | Silicon-based photoelectric integrated chip device and transmitting system with same |
| CN112992886A (en) * | 2021-02-09 | 2021-06-18 | 中国科学院微电子研究所 | Integrated circuit |
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