CN116245076A - Automatic construction method of DRC test version gallery, DRC method, DRC system and readable storage medium - Google Patents

Automatic construction method of DRC test version gallery, DRC method, DRC system and readable storage medium Download PDF

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CN116245076A
CN116245076A CN202310241119.7A CN202310241119A CN116245076A CN 116245076 A CN116245076 A CN 116245076A CN 202310241119 A CN202310241119 A CN 202310241119A CN 116245076 A CN116245076 A CN 116245076A
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drc
test
layout
gallery
design
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周朱琴
刘坤
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Semiconductor Manufacturing Electronics Shaoxing Corp SMEC
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Semiconductor Manufacturing Electronics Shaoxing Corp SMEC
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/394Routing

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Abstract

The invention provides an automatic construction method of DRC test version gallery, DRC method, system and readable storage medium, which can automatically, comprehensively, accurately and efficiently generate a test parameter list based on a python tool kit, and further automatically generate the DRC test version gallery based on the test parameter list, thereby effectively saving labor and tool permission cost such as EDA. Furthermore, the DRC test version gallery can be automatically subjected to DRC check by multiple processes, and the DRC check result is automatically read, so that the method is accurate and quick and can cover all DRC projects.

Description

Automatic construction method of DRC test version gallery, DRC method, DRC system and readable storage medium
Technical Field
The invention relates to the technical field of chip layout verification, in particular to an automatic construction method of a DRC test version gallery, a DRC method, a DRC system and a readable storage medium.
Background
Before the integrated circuit chip is manufactured in batches, the chip layout is required to be checked (Design Rule Check), and success of the streaming chip can be ensured only through verification of the design rules, which is also called layout verification (Layout Verification). The design rule is a specification of various geometric parameters such as width, space, length and the like in the layout. The design rule check is to check the design rule that various sizes of graphics on each relevant layer in the layout ensure no illegal subscription.
However, the existing DRC method needs to rely on layout tools such as EDA and the like, and is large in workload, long in time consumption and easy to miss.
Disclosure of Invention
The invention aims to provide an automatic construction method of a DRC test version gallery, a DRC method, a DRC system and a readable storage medium, which can comprehensively, accurately and efficiently generate the DRC test version gallery and effectively save labor and the permission cost of a layout design tool.
In order to achieve the above object, the present invention provides an automatic construction method of DRC test version gallery, comprising:
analyzing each design rule by combining keywords used for layout identification by a layout verification tool based on the python tool kit to extract key data, and automatically creating a test parameter list of all the design rules related to the corresponding layout design; the method comprises the steps of,
based on the python toolkit, and according to the test parameter list, a DRC test version gallery is automatically generated.
Optionally, the keywords include related geometric parameters of the same layer of graphics and related geometric parameters between different layers of graphics in the layout design.
Optionally, the test parameter list contains the following information: the method comprises the steps of designing rule names, test layout labels which can be created later, layer names in the layout design, whether special layouts (such as overlapping/single point/diffnet and the like) need to be created later, constraint conditions (constraints) which are specially set for a certain layer in the layout design, and various geometric parameters and corresponding key data.
Optionally, DRC test layouts constructed for each of the design rules based on the python toolkit are divided into two categories: one class is a positive example and a false error test vector, one of which consists of a set of DRC test layouts with correct characteristics meeting the requirements of design rules; the other is a counterexample test vector, one of which consists of a set of DRC test layouts with error features that do not meet the design rule requirements.
Optionally, all design rules that the layout design needs to meet are divided into at least one design rule type, and the automatic construction method further includes: one or more design rule types are selected on a corresponding user GUI interface, each design rule under the selected design rule type is automatically analyzed based on the python tool kit, a test parameter list of different design rule types is generated, and a DRC test version gallery of the design rule type is automatically generated based on the python tool kit and according to the selected test parameter list of the corresponding design rule type.
Based on the same inventive concept, the present invention also provides a DRC method, comprising:
performing DRC checking on each DRC test layout in the DRC test version gallery constructed by the automatic construction method of the DRC test version gallery according to any one of claims 1 to 6 using a layout verification tool;
the results of the DRC check are automatically analyzed and a summary report is given.
Optionally, all DRC check results are automatically analyzed and summary reports are given based on the python kit used in the automatic construction method of DRC test version gallery.
Based on the same inventive concept, the present invention also provides a system comprising a python toolkit and a layout verification tool, wherein:
the python tool kit is used for analyzing each design rule by combining the keywords used for layout identification by the layout verification tool so as to extract key data, automatically creating a test parameter list of all the design rules related to the corresponding layout design, and further automatically generating a DRC test version gallery according to the test parameter list;
the layout verification tool is used for performing DRC checking on each DRC test layout in a DRC test version gallery generated by the python tool package.
Optionally, the python kit is further configured to automatically analyze DRC check results generated by the layout verification tool and to give a summary report.
Based on the same inventive concept, the present invention further provides a readable storage medium having stored thereon a computer program, wherein the computer program, when executed by a processor, implements the automatic construction method of the DRC test version gallery according to the present invention, or implements the DRC method according to the present invention.
Compared with the prior art, the technical scheme of the invention can automatically, comprehensively, accurately and efficiently generate the test parameter list based on the python tool kit, and further automatically generate the DRC test version gallery based on the test parameter list, thereby effectively saving the labor and the tool permission cost of EDA and the like. Furthermore, the DRC test version gallery can be automatically subjected to DRC check by multiple processes, and the DRC check result is automatically read, so that the method is accurate and quick and can cover all DRC projects.
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Those of ordinary skill in the art will appreciate that the figures are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention. Wherein:
fig. 1 is a schematic flow chart of a conventional DRC method and time-consuming conditions of the steps.
FIG. 2 is a schematic diagram of the structure of a graphic template required for a design rule.
Fig. 3 is a schematic flow chart of a DRC method and time-consuming cases of the steps according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of key data extracted by parsing design rules in the DRC method according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a geometric layout library generated by parsing parameter list in DRC method according to an embodiment of the present invention.
Fig. 6 is a diagram of a summary report generated in the DRC method of an embodiment of the invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the invention may be practiced without one or more of these details. In other instances, well-known features have not been described in detail in order to avoid obscuring the invention. It should be understood that the present invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout. It will be understood that when an element is referred to as being "connected to," "coupled to" another element, it can be directly connected to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected to" another element, there are no intervening elements present. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and/or groups. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
Referring to fig. 1, the conventional DRC method generally includes the following steps:
s1.1, manually creating a graphic template of each type of Design Rule (Design Rule) according to the description of a Rule file by relying on the existing layout tools such as EDA and the like, wherein the step takes about 7 times;
s1.2, manually creating a test parameter list (namely manually inputting or defining constraint conditions of a test layout) according to a design rule, wherein the step takes about 4 days;
s1.3, generating a test layout (DRC pattern, also called a test vector) library according to the test parameter list by using the layout tool, wherein the step takes about 2 hours;
s1.4, performing DRC (digital control) inspection on each test layout in a test version gallery by using a layout verification tool (such as Calibre and the like), wherein the step takes about 1 hour;
s1.5, according to the DRC check result of the test layout corresponding to a certain design rule, the accuracy of the design rule is judged manually, and the step takes about 7 days.
The above method has the following disadvantages:
1. in step S1.1, many graphic templates may be required for each type of design rule, as shown in fig. 2, which is heavy in workload, long in time consumption and depends on layout design tools such as EDA, and the graphic templates are easily missed due to manual creation, so that the test layout in the test version gallery created in the subsequent step S1.3 is not full in category.
2. In step S1.2, the constraint conditions of the design rule are very complex, and the probability of errors and omission during manual input is very high and time-consuming.
3. The number of test layouts generated in step S1.3 is large, so that the number of DRC check results obtained in step S1.5 is large, and the manual analysis is time-consuming and easy to miss.
Based on the method, the invention provides a method for automatically constructing the DRC test version gallery based on python and a DRC checking method, which can automatically create a comprehensive and accurate test parameter list according to design rules and combining keywords and threshold values used for layout identification by a layout verification tool, automatically generate the DRC test version gallery based on a python tool kit, effectively save labor and license (license) cost of an EAD layout design tool, and automatically analyze the DRC checking result, thereby being accurate and quick.
The technical scheme provided by the invention is further described in detail below with reference to the attached drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
Referring to fig. 3, an embodiment of the present invention provides an automatic construction method of DRC test board gallery, which includes the following steps:
s2.1, analyzing each design rule to be met by the layout design based on the python tool kit by combining keywords used for layout identification by a layout verification tool so as to extract key data, and automatically creating a test parameter list related to the corresponding layout design;
s2.2, based on the python toolkit, automatically generating DRC test version libraries of all design rules according to the test parameter list.
In step S2.1, the user may directly use the python toolkit to automatically parse each design rule without creating a graphic template, extract keywords (i.e., geometric parameters) and corresponding key data (e.g., may include a minimum value and/or a maximum value of the geometric parameters) in each design rule, and automatically create a required test parameter list. Therefore, the dependence on layout design tools such as EDA can be eliminated, and when the same number of design rules as in the example shown in FIG. 1 are processed, only about 1 hour is required, so that the method is relatively comprehensive, accurate and efficient, and meanwhile, the reliability of analysis of the subsequent DRC inspection results is improved.
It should be appreciated that in step S2.1, the keywords used by the layout verification tool for layout identification are not particularly limited, and are mainly dependent on the respective design rules DR that the corresponding layout design needs to meet, and may include, for example, at least one of the following geometric parameters: the length of the pattern, the width of the pattern, the spacing between the patterns of the same layer, and the spacing between the patterns of different layers; overlap between patterns, pattern area, pattern density, pattern Extension, special constraint of patterns constraint, etc.
As an example, the data structure of the automatically created test parameter list in step S2.1 is shown in fig. 4, where the test parameter list may show a graphical user interface (Graphical User Interface, GUI) operated by a user, for the user to browse, edit, copy or delete corresponding entries in the test parameter list, where the automatically created test parameter list not only displays geometric parameters and key data thereof, but also shows a design Rule name (Rule name) associated with the geometric parameters, a test layout (basic pattern) label (1/2/3/4/5 …) created later, whether a special layout (e.g. an overlay/single point/graphical diffnet belonging to different networks, etc.) needs to be created later, layer names (chemical layer1, chemical layer2 …) in the layout design, constraints (constraint) specifically set for a layer in the layout design, etc.
In step S2.2, the user may continue to automatically read the test parameter list using the python toolkit described above, and draw a corresponding DRC test layout for a corresponding design rule based on information in the test parameter list, thereby generating a DRC test version gallery. Wherein at least more than 6 test vectors can be constructed for each design rule, one test vector refers to a set of DRC test patterns and is used for reflecting whether the test cases violate the design rule, wherein all test vectors constructed for each design rule can be divided into two types: one class is a positive example and a false error test vector, one is composed of a set of DRC test layouts with correct features meeting the requirements of design rules, the other class is a negative example test vector, and one is composed of a set of DRC test layouts with error features not meeting the requirements of the design rules. In addition, the file format of the DRC test layout in the DRC test version gallery is a file format readable by a layout verification tool in a subsequent step, for example, a GDS file readable by a layout verification tool such as Calibre.
In step S2.2, when the same number of design rules as in the example shown in fig. 1 are processed, it takes about 2 hours, and further comparing the test layouts shown in fig. 2 and 5, it can be seen that the DRC test layout created in this step is more comprehensive for the same design rule or the same number of design rules or the same type of design rules.
Further optionally, in step S2.1, all design rules that the corresponding layout design needs to satisfy are divided into at least one design rule type (rule type), which may include one or more of minimum pitch (Min Space), fixed pitch (Fix Space), area (Area), minimum line Width (Min Width), maximum line Width (Max Width), fixed line Width (Fix Width), over-coverage Width (overlay), surrounding size, extension Width Extension, length (Density), notch Width (pitch), and so on. In step S2.1, the user selects one or more design rule types on the user GUI interface thereof, and then automatically analyzes each design rule under the selected design rule type by using the python tool kit to generate a test parameter list of different design rule types; in step S2.2, according to the test parameter list of the corresponding design rule type, a DRC test version library of the design rule type is automatically generated, and after the DRC test version library is used for DRC inspection, those design rules under the design rule type can be accurately inspected, and each DRC test layout (including positive examples and false errors) in the DRC test version library can be inspected, so as to determine whether each design rule under the design rule type is correct.
With continued reference to fig. 3, the present embodiment provides a DRC method, which includes the following steps:
s2.3, performing DRC checking on each DRC test layout in the DRC test version library constructed by the automatic construction method of the DRC test version library of the embodiment by using a layout verification tool (such as Calibre and the like), wherein a plurality of DRC test layouts can be checked in a multi-process synchronous manner, and the total time is about 1 hour when the same number of design rules as in the example shown in FIG. 1 are processed. In this step, when verifying DRC test layouts corresponding to the same design rule, it is necessary to check each DRC test layout of the positive and negative test vectors of the design rule and each DRC test layout of the false error test vector, and there is no error leakage (no checking of layout errors) nor false error (a correct layout is reported as erroneous). If each DRC test layout in the test vectors of the positive example and the false error is checked to have no error, and each DRC test layout of the test vectors of the negative example is checked to have the error of the corresponding design rule, the corresponding design rule is correct, the DRC check passes (pass), otherwise, the corresponding design rule is problematic, and the DRC check fails (fail).
S2.4, based on the python toolkit in the automatic construction method of the DRC test version gallery of the embodiment, all DRC check results are automatically analyzed, and a summary report is given. This step S2.4 takes about 10 minutes in total when dealing with the same number of design rules as in the example shown in fig. 1.
As an example, in step S2.4, all DRC check results corresponding to each design rule (i.e., whether each design rule passes the corresponding DRC check) may be displayed, and as shown in fig. 6, in the summary report, the report generation time is displayed first, then the number of design rules that pass the DRC check and the number of design rules that do not pass the DRC check are displayed, then the list of names and DRC check results (i.e., fail, and fail and give failure reasons) of each design rule that do not pass the DRC check is displayed, and then the list of names and DRC check results (pass) of each design rule that pass the DRC check is displayed. Therefore, the user can intuitively see whether each design rule under the corresponding design rule type is correct based on the summarized result so as to carry out subsequent processing based on the summarized report.
It should be understood that in this embodiment, step S2.3 directly uses the DRC test panel library constructed in the automatic construction method of the DRC test panel library of this embodiment to perform DRC inspection, so if the DRC test panel library is constructed according to the design rule type, in step S2.3, DRC inspection is performed according to the design rule type, that is, the DRC test panel library corresponding to the design rule type is used according to the design rule type selected by the user on the GUI interface to run DRC inspection, so that it is known which design rules under the design rule type can accurately detect all test layouts (including positive examples and false errors) in the DRC test panel library, as shown in fig. 6), and in the summary report generated in step S2.4, it can be shown whether each design rule under the design rule type passes the result summary of DRC inspection, so that the user can intuitively judge whether the corresponding design rule is correct according to the information in the summary report.
In addition, in step S2.4, the python kit in the automatic construction method of the DRC test version gallery of the embodiment may be directly used for automatic analysis, which is relatively more convenient and may save the use cost of other tools. However, the technical solution of the present invention is not limited thereto, and in other embodiments of the present invention, step S2.4 may also be implemented by using any other suitable computer program tool to automatically analyze all DRC check results to give a summary report, and the form of the summary report is not limited to the example shown in fig. 6, and the summary report may also be implemented in any other form as long as the user is convenient to review.
Based on the same inventive concept, the present embodiment also provides a system comprising a python toolkit and a layout verification tool. The python tool kit is used for analyzing each design rule by combining the keywords used for layout identification by the layout verification tool so as to extract key data, automatically creating a test parameter list of all the design rules related to the corresponding layout design, and further automatically generating a DRC test version gallery according to the test parameter list; the layout verification tool is used for performing DRC checking on each DRC test layout in a DRC test version gallery generated by the python tool package. Namely, the python kit in the system is used for realizing the steps S2.1-S2.2, and the layout verification tool is used for realizing the step S2.3. The detailed process is described above, and will not be repeated here.
Further, the python kit in the present system is further used to implement step S2.4, and the detailed process is described above, and is not repeated here.
Based on the same inventive concept, the present embodiment also provides a readable storage medium, on which a computer program is stored, the computer program may include code/computer executable instructions, and the computer program when executed by a processor implements the automatic construction method of DRC test version gallery and any variation thereof, or implements the DRC method and any variation thereof. The readable storage medium may be any medium that can contain, store, communicate, propagate, or transport the instructions. For example, the readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. Specific examples of the readable storage medium include: magnetic storage devices such as magnetic tape or hard disk (HDD); optical storage devices such as compact discs (CD-ROMs); a memory, such as a Random Access Memory (RAM) or a flash memory; and/or a wired/wireless communication link.
In summary, according to the technical scheme of the invention, the test parameter list can be automatically, comprehensively, accurately and efficiently generated based on the python tool kit, and the DRC test version gallery is further automatically generated based on the test parameter list, so that the labor and the tool permission cost such as EDA can be effectively saved. Furthermore, the DRC test version gallery can be automatically subjected to DRC check by multiple processes, and the DRC check result is automatically read, so that the method is accurate and quick and can cover all DRC projects.
The foregoing description is only illustrative of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention in any way, and any changes and modifications made by those skilled in the art in light of the foregoing disclosure will be deemed to fall within the scope and spirit of the present invention.

Claims (10)

1. An automatic construction method of DRC test board gallery, comprising:
analyzing each design rule by combining keywords used for layout identification by a layout verification tool based on the python tool kit to extract key data, and automatically creating a test parameter list of all the design rules related to the corresponding layout design; the method comprises the steps of,
based on the python toolkit, and according to the test parameter list, a DRC test version gallery is automatically generated.
2. The automatic construction method according to claim 1, wherein the keywords include related geometric parameters of the same layer of graphics and related geometric parameters between different layers of graphics in the layout design.
3. The automatic construction method according to claim 1, wherein the test parameter list contains the following information: the method comprises the steps of designing rule names, test layout marks which are created subsequently, whether special layouts need to be created subsequently, layer names in the layout designs, constraint conditions which are specially set for certain layers in the layout designs, and various geometric parameters and corresponding key data of the geometric parameters.
4. The automatic construction method according to claim 2, wherein DRC test layouts constructed for each of the design rules based on the python toolkit are divided into two categories: one class is a positive example and a false error test vector, one of which consists of a set of DRC test layouts with correct characteristics meeting the requirements of design rules; the other is a counterexample test vector, one of which consists of a set of DRC test layouts with error features that do not meet the design rule requirements.
5. The automatic construction method according to any one of claims 1-4, wherein all design rules that the layout design needs to satisfy are divided into at least one design rule type, the automatic construction method further comprising: one or more design rule types are selected on a corresponding user GUI interface, each design rule under the selected design rule type is automatically analyzed based on the python tool kit, a test parameter list of different design rule types is generated, and a DRC test version gallery of the design rule type is automatically generated based on the python tool kit and according to the selected test parameter list of the corresponding design rule type.
6. A DRC method, comprising:
performing DRC checking on each DRC test layout in the DRC test version gallery constructed by the automatic construction method of the DRC test version gallery according to any one of claims 1 to 5 using a layout verification tool;
the results of the DRC check are automatically analyzed and a summary report is given.
7. The DRC method according to claim 6, wherein all DRC check results are automatically analyzed and a summary report is given based on the python kit used in the automatic construction method of DRC test version gallery.
8. A system comprising a python kit and a layout verification tool, wherein:
the python tool kit is used for analyzing each design rule by combining the keywords used for layout identification by the layout verification tool so as to extract key data, automatically creating a test parameter list of all the design rules related to the corresponding layout design, and further automatically generating a DRC test version gallery according to the test parameter list;
the layout verification tool is used for performing DRC checking on each DRC test layout in a DRC test version gallery generated by the python tool package.
9. The system of claim 8, wherein the python toolkit is further configured to automatically analyze DRC check results generated by the layout verification tool and to give a summary report.
10. A readable storage medium having stored thereon a computer program, which when executed by a processor, implements the automatic construction method of DRC test version gallery according to any one of claims 1-5 or implements the DRC method according to claim 6 or 7.
CN202310241119.7A 2023-03-06 2023-03-06 Automatic construction method of DRC test version gallery, DRC method, DRC system and readable storage medium Pending CN116245076A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116738931A (en) * 2023-08-11 2023-09-12 宁波联方电子科技有限公司 Method, system, apparatus and storage medium for automatically generating IC test patterns

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116738931A (en) * 2023-08-11 2023-09-12 宁波联方电子科技有限公司 Method, system, apparatus and storage medium for automatically generating IC test patterns

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