CN116192122A - Control circuit and control method of differential level conversion control circuit - Google Patents
Control circuit and control method of differential level conversion control circuit Download PDFInfo
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- CN116192122A CN116192122A CN202310460577.XA CN202310460577A CN116192122A CN 116192122 A CN116192122 A CN 116192122A CN 202310460577 A CN202310460577 A CN 202310460577A CN 116192122 A CN116192122 A CN 116192122A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018514—Interface arrangements with at least one differential stage
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention provides a differential level conversion control circuit and a control method, wherein the differential level conversion control circuit comprises an input level conversion unit, a differential amplification unit, a reference level unit and a closed-loop current control unit; the input level conversion unit converts the voltage level and inputs the converted voltage to the differential amplification unit, and the differential amplification unit outputs the level in a differential mode after comparing and analyzing the reference voltage output by the reference level unit and the input converted voltage.
Description
Technical Field
The present invention relates to the field of communications, and in particular, to a control circuit and a control method for a differential level shift control circuit.
Background
With the development of microwave radio frequency chip technology and design technology, domestic gallium arsenide-based (GaAs) microwave radio frequency chips enter a rapid channel for technology improvement. In recent ten years, the integration level of the chip and the design index are rapidly improved, and certain fields have overtaken the world advanced level, and in the two fields of military use and civil use, the gallium arsenide microwave radio frequency chip is widely applied. The CMOS process digital circuit is mature in design, but when the CMOS process digital circuit is used in cascade with a GaAs microwave chip, the integration level and the irradiation resistance become constraint factors. Thus, developing digital level conversion circuits that can be integrated with GaAs microwave chips while being mature and reliable is an urgent need.
In a gallium arsenide microwave radio frequency chip, a complementary digital control signal is generally adopted to control a serial switch and a parallel switch to realize on and off of a channel, a level shift circuit and a subsequent two-stage inverter are adopted by a traditional level shift circuit to realize complementary digital output level, in the prior art, 21 GaAs transistors, 6 inverters and 3 resistors are used by the level shift circuit and the two-stage inverter in total, the number of required devices is large, the area and the power consumption are large, and the current is greatly influenced by a process. The number of transistors required is large, and the area and power consumption are large.
Therefore, there is an urgent need to give a more optimal solution to the structure of the existing level shift circuit.
Disclosure of Invention
The present invention solves the above problems: the inventive differential level conversion circuit has the advantages that the level shift and the two-stage inverter structure are realized only by adopting the transistor and the resistor, and meanwhile, the static working current of the circuit is controlled by adopting the closed loop, so that compared with the traditional level conversion circuit, the power consumption and the area are greatly saved, and meanwhile, the high consistency is realized.
In order to achieve the purpose of the invention, the invention provides a differential level conversion control circuit, which comprises an input level conversion unit, a differential amplification unit, a reference level unit and a closed loop current control unit;
the differential amplifying unit comprises a transistor M1, a transistor M2, a transistor M5, a resistor RL1, a resistor RL2 and a resistor RL0;
one end of the input level conversion unit is connected with an input end Vin, the other end of the input level conversion unit is connected with a grid electrode of the transistor M1 in the differential amplification unit, drains of the transistor M1 and the transistor M2 are respectively connected with first ends of the resistor RL1 and the resistor RL2, and sources of the transistor M1 and the transistor M2 are connected with a drain electrode of the transistor M5;
the second ends of the resistor RL1 and the resistor RL2 are connected with the first ends of the reference level unit and the closed-loop current control unit, and the second ends of the reference level unit and the closed-loop current control unit are connected with the first end of the resistor RL0 and then connected to a power supply VEE;
the gate of the transistor M2 is connected to the third terminal of the reference level unit, the source of the transistor M5 and the first terminal of the resistor RL0 are connected to the third terminal of the closed loop current control unit, and the gate of the transistor M5 is connected to the fourth terminal of the closed loop current control unit.
Further, the input level conversion unit includes a resistor RIN1 and a resistor RIN2, wherein one end of the resistor RIN1 is connected to the input terminal Vin, the other end of the resistor RIN1 and one end of the resistor RIN2 are connected to the gate of the transistor M1, and the other end of the resistor RIN2 is connected to the first end of the resistor RL0.
Further, the reference level unit includes a resistor REF1, a resistor REF2, and a resistor REF3 that are sequentially connected, where one end of the resistor REF1 is a first end of the reference level unit, a second end of the resistor REF3 is a second end of the reference level unit, and one end of the resistor REF1 connected with the resistor REF2 is a third end of the reference level unit.
Further, the closed-loop current control unit includes a resistor RL3 and a resistor RL4, which are connected to each other by one end and form a first end of the closed-loop current control unit, and a transistor M3 and a transistor M4, which are connected to a drain electrode by the other end of the resistor RL3 and the other end of the resistor RL4, respectively, and a resistor RL5, one end of which is connected to the source electrodes of the transistor M3 and the transistor M4, wherein the other end of the resistor RL5 is a second end of the closed-loop current control unit, a gate of the transistor M3 is connected to one end, which is connected to the resistor REF2 and the resistor REF3, a gate of the transistor M4 is a third end of the closed-loop current control unit, and a connection end of the drain electrode of the transistor M4 and the resistor RL4 is a fourth end of the closed-loop current control unit.
In order to achieve the object of the invention, the invention also proposes a control method based on a differential level shift control circuit, said method comprising,
the input level conversion unit divides the Vin to generate divided voltage VIN';
the reference level unit outputs a reference level voltage VREF1, when VIN' is greater than VREF1, the transistor M1 is turned on, the transistor M2 is turned off, at this time, the current of the resistor RL0 completely flows through the resistor RL1, the current of the resistor RL2 is zero, the output voltage VOUT2 of the transistor M2 is a high level 0V, and if the resistor RL1 is far greater than the resistor RL0, the output voltage VOUT1 of the transistor M1 is close to a low level-5V; when VIN' is smaller than VREF1, the transistor M1 is turned off, the transistor M2 is turned on, and at this time, the current of the resistor RL0 completely flows through the resistor RL2, the current of the resistor RL1 is zero, the output voltage VOUT1 of the transistor M1 is high level 0V, and if the resistor RL2 is far greater than the resistor RL0, the output voltage VOUT2 of the transistor M2 is close to low level-5V.
Further, after the input level converting unit divides the Vin, the voltage Vin' =vee+vin×rin2/(rin1+rin2).
Further, the reference level unit outputs a reference level voltage VREF1, where VREF 1=vee×ref1/(ref1+ref2+ref3).
Further, the method further includes performing closed loop current control after the closed loop current control unit is connected to the transistor M5, where the quiescent operating current Ic of the differential amplifying unit is controlled to be ic=vee/(ref1+ref2+ref3) × (ref1+ref2)/RL 0.
The technical scheme provided by the invention creatively provides an innovative differential level conversion circuit, which realizes level shift and two-stage inverter structures by adopting fewer transistors and resistors, and simultaneously adopts a closed loop to control the static working current of the circuit.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate and do not limit the invention.
FIG. 1 is a schematic diagram of an improved differential level shift circuit according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail hereinafter with reference to the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be arbitrarily combined with each other.
In order to overcome the defects, the invention creatively provides an innovative differential level conversion circuit which adopts fewer transistors and resistors to realize level shift and two-stage inverter structures, and adopts a closed loop to control the static working current of the circuit.
Fig. 1 is a schematic diagram of an improved differential level conversion circuit according to an embodiment of the present invention, where:
the invention provides a differential level conversion control circuit which only comprises 5 transistors and 11 resistors, wherein the transistors M1 and M2 and the resistors RL1, RL2 and RL0 form a simple differential amplifying unit, RIN1 and RIN2 are input level conversion units, REF1, REF2 and REF3 are reference level units, the transistors M3 and M4 and the resistors RL3, RL4 and RL5 are closed-loop current control units, and closed-loop current control of the circuit is realized after the closed-loop current control units are communicated with the transistor M5.
In the invention, the input level conversion unit comprises a resistor RIN1 and a resistor RIN2, wherein one end of the resistor RIN1 is connected with an input end Vin, the other end of the resistor RIN1 and one end of the resistor RIN2 are connected to the grid electrode of the transistor M1, and the other end of the resistor RIN2 is connected to the first end of the resistor RL0. Under the action of a resistor RIN1 and a resistor RIN2 in the input level conversion unit, dividing Vin to generate divided voltage VIN ', and taking the voltage VIN' as the input voltage of the differential amplification unit.
The differential amplifying unit includes a transistor M1, a transistor M2, a transistor M5, a resistor RL1, a resistor RL2, and a resistor RL0;
one end of the input level conversion unit is connected with an input end Vin, the other end of the input level conversion unit is connected with a grid electrode of the transistor M1 in the differential amplification unit, drains of the transistor M1 and the transistor M2 are respectively connected with first ends of the resistor RL1 and the resistor RL2, and sources of the transistor M1 and the transistor M2 are connected with a drain electrode of the transistor M5;
the second ends of the resistor RL1 and the resistor RL2 are connected with the first ends of the reference level unit and the closed-loop current control unit, and the second ends of the reference level unit and the closed-loop current control unit are connected with the first end of the resistor RL0 and then connected to a power supply VEE;
the gate of the transistor M2 is connected to the third terminal of the reference level unit, the source of the transistor M5 and the first terminal of the resistor RL0 are connected to the third terminal of the closed loop current control unit, and the gate of the transistor M5 is connected to the fourth terminal of the closed loop current control unit.
The reference level unit comprises a resistor REF1, a resistor REF2 and a resistor REF3 which are sequentially connected, wherein one end of the resistor REF1 is a first end of the reference level unit, the second end of the resistor REF3 is a second end of the reference level unit, and one end, connected with the resistor REF1, of the resistor REF2 is a third end of the reference level unit.
The closed loop current control unit comprises a resistor RL3 and a resistor RL4 which are mutually connected by one end and form a first end of the closed loop current control unit, a transistor M3 and a transistor M4, wherein the other ends of the resistor RL3 and the resistor RL4 are respectively connected to a drain electrode, a resistor RL5, one end of which is connected with the source electrodes of the transistor M3 and the transistor M4, the other end of the resistor RL5 is a second end of the closed loop current control unit, the grid electrode of the transistor M3 is connected to one end, which is connected with the resistor REF2 and the resistor REF3, the grid electrode of the transistor M4 is a third end of the closed loop current control unit, and the connection end of the drain electrode of the transistor M4 and the resistor RL4 is a fourth end of the closed loop current control unit.
According to the object of the present invention, the present invention also provides a control method based on a differential level shift control circuit, comprising:
the input level conversion unit divides the Vin to generate a divided voltage Vin ', wherein the voltage Vin' =vee+vin is RIN 2/(rin1+rin2);
the reference level unit of the differential level conversion control circuit outputs a reference level voltage VREF1, VREF1 = VEE 1/(REF 1+ REF2+ REF 3), when VIN' is greater than VREF1, the transistor M1 is turned on, the transistor M2 is turned off, at this time, the current of the resistor RL0 completely flows through the resistor RL1, the current of the resistor RL2 is zero, the output voltage VOUT2 of the transistor M2 is a high level 0V, and if the resistor RL1 is far greater than the resistor RL0, the output voltage VOUT1 of the transistor M1 is close to a low level-5V; when VIN' is smaller than VREF1, the transistor M1 is turned off, the transistor M2 is turned on, and at this time, the current of the resistor RL0 completely flows through the resistor RL2, the current of the resistor RL1 is zero, the output voltage VOUT1 of the transistor M1 is high level 0V, and if the resistor RL2 is far greater than the resistor RL0, the output voltage VOUT2 of the transistor M2 is close to low level-5V.
In the present invention, the transistor M3, the transistor M4, the resistor RL3, the resistor RL4 and the resistor RL5 form a closed loop current control unit, and after the closed loop current control unit is communicated with the transistor M5, the quiescent operating current Ic of the differential amplifying unit is controlled to be ic=vee/(ref1+ref2+ref3) ×ref1+ref2)/RL 0.
Although the embodiments of the present invention are described above, the embodiments are only used for facilitating understanding of the present invention, and are not intended to limit the present invention. Any person skilled in the art to which the present invention pertains will appreciate that alterations and changes in the form and details of the embodiments disclosed herein can be made without departing from the spirit and scope of the invention. Accordingly, the scope of the invention should be determined from the following claims.
Claims (8)
1. A differential level conversion control circuit, which is characterized by comprising an input level conversion unit, a differential amplification unit, a reference level unit and a closed-loop current control unit;
the differential amplifying unit comprises a transistor M1, a transistor M2, a transistor M5, a resistor RL1, a resistor RL2 and a resistor RL0;
one end of the input level conversion unit is connected with an input end Vin, the other end of the input level conversion unit is connected with a grid electrode of the transistor M1 in the differential amplification unit, drains of the transistor M1 and the transistor M2 are respectively connected with first ends of the resistor RL1 and the resistor RL2, and sources of the transistor M1 and the transistor M2 are connected with a drain electrode of the transistor M5;
the second ends of the resistor RL1 and the resistor RL2 are connected with the first ends of the reference level unit and the closed-loop current control unit, and the second ends of the reference level unit and the closed-loop current control unit are connected with the first end of the resistor RL0 and then connected to a power supply VEE;
the gate of the transistor M2 is connected to the third terminal of the reference level unit, the source of the transistor M5 and the first terminal of the resistor RL0 are connected to the third terminal of the closed loop current control unit, and the gate of the transistor M5 is connected to the fourth terminal of the closed loop current control unit.
2. The differential level shift control circuit according to claim 1, wherein the input level shift unit includes a resistor RIN1 and a resistor RIN2, wherein one end of the resistor RIN1 is connected to an input terminal Vin, one end of the resistor RIN1 and one end of the resistor RIN2 are connected to the gate of the transistor M1, and the other end of the resistor RIN2 is connected to the first end of the resistor RL0.
3. The differential level shift control circuit of claim 2, wherein the reference level cell comprises a resistor REF1, a resistor REF2, and a resistor REF3 connected in sequence, wherein one end of the resistor REF1 is a first end of the reference level cell, a second end of the resistor REF3 is a second end of the reference level cell, and an end of the resistor REF1 connected to the resistor REF2 is a third end of the reference level cell.
4. The differential level shift control circuit according to claim 3, characterized in that the closed-loop current control unit includes a resistor RL3 and a resistor RL4 connected to each other by one end and constituting a first end of the closed-loop current control unit, and the other ends of the resistor RL3, the resistor RL4 are connected to a crystal M3 and a transistor M4 of a drain, respectively, and a resistor RL5 having one end connected to a source of the crystal M3 and the transistor M4, wherein the other end of the resistor RL5 is a second end of the closed-loop current control unit, a gate of the transistor M3 is connected to one end connected to the resistor REF2 and the resistor REF3, a gate of the transistor M4 is a third end of the closed-loop current control unit, and a connection end of the drain of the transistor M4 and the resistor RL4 is a fourth end of the closed-loop current control unit.
5. A control method of a differential level shift control circuit according to claim 4, characterized in that the method comprises,
the input level conversion unit divides the Vin to generate divided voltage VIN';
the reference level unit outputs a reference level voltage VREF1, when VIN' is greater than VREF1, the transistor M1 is turned on, the transistor M2 is turned off, at this time, the current of the resistor RL0 completely flows through the resistor RL1, the current of the resistor RL2 is zero, the output voltage VOUT2 of the transistor M2 is a high level 0V, and if the resistor RL1 is far greater than the resistor RL0, the output voltage VOUT1 of the transistor M1 is close to a low level-5V; when VIN' is smaller than VREF1, the transistor M1 is turned off, the transistor M2 is turned on, and at this time, the current of the resistor RL0 completely flows through the resistor RL2, the current of the resistor RL1 is zero, the output voltage VOUT1 of the transistor M1 is high level 0V, and if the resistor RL2 is far greater than the resistor RL0, the output voltage VOUT2 of the transistor M2 is close to low level-5V.
6. The control method according to claim 5, wherein the voltage Vin' =vee+vin×rin2/(rin1+rin2) after the input level converting unit divides the Vin.
7. The control method according to claim 5, wherein the reference level unit outputs a reference level voltage VREF1, and wherein VREF1 = vee×ref1/(ref1+ref2+ref3).
8. The control method according to claim 5, further comprising performing closed loop current control after the closed loop current control unit is connected to the transistor M5, wherein the quiescent operating current Ic of the differential amplifying unit is controlled to be ic=vee/(ref1+ref2+ref3) ×ref1+ref2)/RL 0.
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