CN116155255A - Pin signal processing device and pin signal processing circuit - Google Patents

Pin signal processing device and pin signal processing circuit Download PDF

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Publication number
CN116155255A
CN116155255A CN202111375244.4A CN202111375244A CN116155255A CN 116155255 A CN116155255 A CN 116155255A CN 202111375244 A CN202111375244 A CN 202111375244A CN 116155255 A CN116155255 A CN 116155255A
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CN
China
Prior art keywords
switch
pin
signal processing
voltage
processing circuit
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CN202111375244.4A
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Chinese (zh)
Inventor
马欢
刘润泽
马朔
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Guangzhou Yousheng Automobile Technology Co ltd
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Guangzhou Yousheng Automobile Technology Co ltd
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Priority to CN202111375244.4A priority Critical patent/CN116155255A/en
Publication of CN116155255A publication Critical patent/CN116155255A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017509—Interface arrangements
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

The invention relates to a pin signal processing circuit, which is connected with an interface, and is characterized by comprising: a first wire set including at least one wire for connecting pins in the interface; a first connection portion for transmitting a signal, the first connection portion being connected to each of the wires in the first wire group; the first switch is connected to a first configuration voltage, and the first switch is connected with the second switch; the first connection part is connected with the first switch, and the second switch controls whether the first switch outputs the first configuration voltage to the first connection part. Compared with the prior art, the invention provides the pin signal processing circuit which realizes the on-off control of the configuration voltage and the configuration circuit between the pins of the interface through the cooperation of a plurality of switches.

Description

Pin signal processing device and pin signal processing circuit
Technical Field
The present invention relates to the field of pin monitoring technologies, and in particular, to a pin signal processing circuit and a pin signal processing device.
Background
An on-board automatic diagnosis system (On Board Diagnostics, hereinafter referred to as OBD) is a detection system for monitoring whether an automobile has a fault or an excessive exhaust gas, and the monitoring object of the OBD is a sensor, an actuator and an ECU (electronic control unit) itself, and by monitoring working signals of components related to emission in real time, whether the exhaust gas emission of the automobile exceeds the standard is determined, if some signals have abnormal changes and an emission exceeding phenomenon occurs, the ECU of the OBD system can determine that the components or circuits related to the signals have a fault, and turn on a fault indicator and store corresponding fault information. When overhauling, the OBD system needs to communicate with a pin signal processing device through the 16-pin of the OBD diagnosis seat, and the pin signal processing device needs to configure the input voltage of the pin of the OBD diagnosis seat in diagnosis so as to transmit diagnosis information to the OBD system in diagnosis.
Disclosure of Invention
The invention aims to overcome the defects and shortcomings of the prior art and provide a pin monitoring circuit and a vehicle fault diagnosis device, which are ingenious in structural design and can output specific voltage to pins of a vehicle OBD diagnosis seat.
The invention is realized by the following technical scheme: a pin signal processing circuit, the pin signal processing circuit being connected to an interface, comprising: a first wire set including at least one wire for connecting pins in the interface; a first connection portion for transmitting a signal, the first connection portion being connected to each of the wires in the first wire group; the first switch is connected to a first configuration voltage, and the first switch is connected with the second switch; the first connection part is connected with the first switch, and the second switch controls whether the first switch outputs the first configuration voltage to the first connection part.
Compared with the prior art, the pin signal processing circuit provided by the invention realizes the on-off control of the configuration voltage and the configuration line between the pins of the interface through the cooperation of the plurality of switches, and when the line between the pins of the interface and the configuration voltage is conducted, the pins connected to the interface can output the configuration voltage, so that the plurality of pins of the fault diagnosis seat of the vehicle can be subjected to voltage configuration. The multiple switches matched with control configuration lines are controlled by different control signals, so that the configuration of the input voltage of the pins of the fault diagnosis seat of the vehicle can be controlled by using multiple control conditions.
Further, the method further comprises the following steps: a second wire set including at least one wire; and a second connection portion connected to each of the wires in the second wire group, the second connection portion being connected to the second switch; the second switch Guan Jieru outputs the second configuration voltage to the second connection. By the scheme, the second configuration voltage can be configured for the pins of the traffic fear fault diagnosis seat electrically connected with the second connection part.
Further, the circuit further comprises a third switch, wherein the third switch is connected with the first switch, and the third switch outputs the first configuration voltage to the first switch; the third switch is connected to a plurality of different preset voltages, and the third switch controls the voltage value of the first configuration voltage to be switched to the voltage value of one of the preset voltages. By this scheme, the configuration voltages with different voltage values can be provided for the circuit.
Further, the circuit further comprises a fourth switch, wherein the fourth switch is connected between the first switch and the first connection part, and whether the fourth switch control signal is transmitted between the first switch and the first connection part or not. By this means, an extraneous signal in the connection can be prevented from entering the circuit of the voltage configuration when the voltage configuration is not performed.
Further, the circuit further comprises a fifth switch, wherein the fifth switch is connected with the third switch, and the third switch outputs the first configuration voltage to the fifth switch; the fifth switch is connected with the fourth switch, and the fifth switch controls whether the first configuration voltage is output to the fourth switch or not; the fourth switch controls the first connecting part to be connected with the first switch, or the fourth switch controls the first connecting part to be connected with the fifth switch. By the scheme, the voltage configuration can be carried out on the pins of the fault diagnosis seat of the vehicle.
Further, the method comprises the steps of: and a third wire group including at least one of the wires, the fifth switch being connected to the third wire group, the fifth switch controlling whether to output the first configuration voltage to the wires in the third wire group. By the scheme, the voltage configuration can be carried out on the pins of the fault diagnosis seat of the vehicle.
Further, the method further comprises the following steps: a fourth wire group including at least one of the wires; a third connection portion connected to each of the wires in the fourth wire group; the sixth switch is respectively connected with the third connecting part and the first connecting part, and is also connected with one of the pins; the sixth switch controls whether the pin connected with the sixth switch is connected with the third connection part, and/or the sixth switch controls whether the pin connected with the sixth switch is connected with the first connection part. By this arrangement, one pin of the failure diagnosis seat of the vehicle can be connected to one of the first connection portion or the second connection portion.
Further, the method further comprises the following steps: a fourth wire group including at least one of the wires; a third connection portion connected to each of the wires in the fourth wire group, the fourth switch being further connected to the third connection portion; and the comparator comprises a first comparison unit, one input end of the first comparison unit is connected with the first configuration voltage, the other input end of the first comparison unit is connected with the fourth switch, and whether a fourth switch control signal is transmitted between the third connection part and the comparator or not is judged. The scheme can detect the voltage high-low state of the pins of the fault diagnosis seat of the vehicle.
Further, the comparator comprises a second comparison unit, one input end of the second comparison unit is connected with the first configuration voltage, and the other input end of the second comparison unit is connected with the fourth switch; the fourth switch controls the third connecting part to be connected with the first comparing unit, or the fourth switch controls the third connecting part to be connected with the second comparing unit. The scheme can detect the voltage high-low state of the pins of the fault diagnosis seat of the vehicle.
Further, the method comprises the steps of: a fifth wire set including at least one of the wires; and a seventh switch Guan Jieru, which is connected to each of the wires in the fifth wire group and controls whether or not to output the third configuration voltage to the fifth wire group. By the scheme, the voltage configuration can be carried out on the pins of the fault diagnosis seat of the vehicle.
Further, the method further comprises the following steps: and the pin switch is connected between the pin and the lead, and the pin switch controls whether a signal is transmitted between the pin and the lead. By the scheme, signals in irrelevant pins can be prevented from entering a circuit during voltage configuration and voltage detection of the pins.
Based on the same inventive concept, the invention also provides a pin signal processing device, which is characterized by comprising: an interface; and a pin signal processing circuit, the pin signal processing circuit being any of the above embodiments, the pin signal processing circuit being connected with the interface.
Drawings
Fig. 1 is a schematic configuration diagram of a vehicle failure diagnosis apparatus of the present invention.
Fig. 2 is a circuit block diagram of the pin monitoring circuit of the present invention.
Fig. 3 is an exemplary pin diagram of the first switch Q1 and the second switch Q2 in the embodiment.
Fig. 4 is an exemplary pin diagram of the third switch K1 in the embodiment.
Fig. 5 is an exemplary pin diagram of the fifth switch Q3 in the embodiment.
Fig. 6 is an exemplary pin diagram of the fourth switch K2 in the embodiment.
Fig. 7 is an exemplary pin diagram of the comparator U1 in the embodiment.
Fig. 8 is an exemplary pin diagram of a sixth switch K3 in the embodiment.
The technical scheme of the present invention is described in detail below with reference to the accompanying drawings.
Detailed Description
Referring to fig. 1, a schematic structural diagram of a vehicle fault diagnosis device according to the present invention is shown. The vehicle fault diagnosis device comprises an interface 10, a pin signal processing circuit 20 and a control unit 30, wherein the interface 10 comprises a plurality of pins which are connected with pins of a vehicle OBD diagnosis seat during diagnosis, and the control unit 30 controls the pin signal processing circuit 20 to realize voltage detection and voltage configuration on the pins of the interface 10. In this embodiment the interface 10 is provided with 16 pins (not all shown). The control unit 30 includes, but is not limited to, one or a combination of any of a plurality of MCU, MPU, DPU, CPU and the like.
Specifically, please refer to fig. 2, which is a circuit block diagram of a pin signal processing circuit 20 of the vehicle fault diagnosis device of the present invention, the pin signal processing circuit 20 includes a plurality of pin switches D1, a first wire set, a first connection portion L1, a first switch Q1, a second switch Q2, a third switch K1, a fourth switch K2, and a multiplexer M1 connected with a control unit 30. The first wire set includes at least one wire, and the wires of the first wire set are electrically connected to pins in the interface 10 through the pin switch D1. The first connection portion L1 is a common line for transmitting an electrical signal, and the first connection portion L1 is electrically connected to the wires of the first wire group. In a specific implementation, the pin switch D1 may be an optocoupler, and the first connection portion L1 and the second connection portion L2 may be buses of a circuit.
The first switch Q1 switches between ON and OFF states to control the first configuration voltage V a Whether to the first connection portion L1. In an example of the present embodiment, the first switch Q1 includes an input terminal, an output terminal and a controlled terminal, and the input terminal of the first switch Q1 is connected to the first configuration voltage V a . In a specific implementation, the first switch Q1 may be a controllable electronic switch element such as a triode switch or a MOS switch, and the MOS switch may be any one or more of CMOS, PMOS, NMOS, RCMOS, RPMOS, RNMOSA plurality of kinds. As shown in fig. 3, the input terminal of the first switch Q1 is an S-port (or a source/output/input terminal), the output terminal is a D-port (or a drain/output/input terminal), and the controlled terminal is a G-port (or a gate/controlled terminal).
The second switch Q2 includes a first switching unit that controls the first switch Q1 to switch between on and off states. In an example of the present embodiment, the first switching unit includes a controlled terminal, an input terminal, and an output terminal, the controlled terminal of the first switching unit is connected to the output terminal of the multiplexer M1, the input terminal of the first switching unit is electrically connected to the controlled terminal of the first switch Q1, and the output terminal of the first switching unit is grounded. In an embodiment, the second switch Q2 may be a controllable electronic switch element such as a triode switch or a mos switch, as shown in fig. 3, where the controlled end of the second switch Q2 is a G port (or a gate/controlled end), the input end is a D port (or a drain/output/input end), and the output end is an S port (or a source/output/input end).
The third switch K1 is connected with a plurality of preset voltages V with different voltage values x The output end outputs a first configuration voltage V a The third switch K1 controls the first configuration voltage V according to the signal of the control unit 30 a The voltage value of the third switch K1 is switched to one of the voltage values of the preset voltages, and the output end of the third switch K1 is electrically connected with the input end of the first switch Q1. In a specific implementation, the third switch K1 may be a single pole double throw relay or a double pole double throw relay, as shown in fig. 4, where the input/output terminals of the third switch K1 are 1 port, 2 port, 3 port, 4 port, 5 port, 6 port, 7 port and 8 port. Alternatively, the 3-port and 6-port of the third switch K1 can be simultaneously connected to a voltage of 12V (preset voltage V x ) The 1 port and the 4 port can be simultaneously connected with 5V voltage (preset voltage V x ) The 2-port and the 5-port are used for outputting a first configuration voltage V a . The 7-port and 8-port may be connected to a power signal and/or used to receive a control signal.
The fourth switch K2 is electrically connected to the first connection portion L1 and the output terminal of the first switch Q1, respectively, and whether the fourth switch K2 control signal is transmitted between the first connection portion L1 and the first switch Q1.
Thus, the pin signal processing circuit 20 can output the first configuration voltage V to the pin of the OBD diagnosis seat (i.e., the OBD diagnosis seat pin to which the pin of the interface 10 electrically connected to the first lead set is abutted) in communication with the first connection portion L1 a . At the time of configuring or outputting the first configuration voltage V to the pins a When the voltage V is preset between the output terminal of the third switch K1 and one of the predetermined voltages V, the control unit 30 controls x A first configuration voltage V outputted from the output end of the third switch K1 a Voltage value of (2) and preset voltage V x The voltage values are uniform. The output end of the third switch K1 can supply the first configuration voltage V a The output is sent to the controlled terminal of the first switch Q1, and the controlled terminal of the first switch Q1 is turned on. At the same time, the control unit 30 controls the fourth switch K2 to form a path between the first connection part L1 and the first switch Q1, thereby enabling the first configuration voltage V a Is transmitted to the first connection portion L1 via the first switch Q1. At this time, the pin switch D1 electrically connected with the wires of the first wire set is turned on to enable the first configuration voltage V on the first connection portion L1 a Outputs through pins of interface 10 to corresponding pins on the OBD diagnostic mount.
When the control unit 30 sends a control signal to the controlled end of the first switch unit of the second switch Q2 via the multiplexer M1 to turn on the first switch unit of the second switch Q2, the output end of the third switch K1 outputs a first configuration voltage V a The ground will be accessed via the second switch Q2 and the first switch Q1 will not be accessed. Therefore, the circuit performs the first arrangement voltage V on the pin of the OBD diagnosis seat connected to the first connection part L1 a The first unit of the second switch Q2 is also required to be simultaneously controlled to be in a turned-off, turned-off or turned-off state.
Further, the pin signal processing circuit 20 further includes a second wire set and a second connection portion L2, wherein the second wire set includes at least one wire, and the wires of the second wire set are electrically connected to pins in the interface 10 through the pin switch D1. The second connection portion L2 is a common line for transmitting an electrical signal, and the second connection portion L2 is electrically connected to the wires of the second wire group. The second switch Q2 further comprises a second switch unit controlling oneSecond configuration voltage V b Whether to the second connection portion L2. In an example of this embodiment, the second switching unit includes a controlled terminal, an input terminal and an output terminal, the controlled terminal of the second switching unit is electrically connected with the control unit 30, and the input terminal of the second switching unit is connected to the second configuration voltage V b And is electrically connected with the second connecting part L2, and the output end of the second switch unit is grounded.
Thus, the pin signal processing circuit 20 can perform the second configuration voltage V on the pin of the OBD diagnosis seat communicated with the second connection part L2 (i.e. the OBD diagnosis seat pin abutted by the pin of the interface 10 electrically connected with the second lead set) b That is, outputting a second configuration voltage V to pins of the OBD diagnostic pad in communication with the second connection portion L2 b . At the second configuration voltage V of the run pin b When the configuration is performed, the pin switch D1 electrically connected with the wires of the second wire group is turned on, so as to obtain a second configuration voltage V b Via the second connection L2 and the corresponding pin of the interface 10 to the corresponding pin on the OBD diagnostic socket. When the control unit 30 controls the second switch unit of the second switch Q2 to be turned on, the second configuration voltage V a The second switching unit through the second switch Q2 will enter the ground line but not the second connection portion L2. Thus, the second configuration voltage V is being conducted b The control unit 30 controls the second switching unit of the second switch Q2 to be in an off or cut-off state, thereby making the second configuration voltage V b Can be transferred to the second connection L2.
Further, the pin signal processing circuit 20 further includes a fifth switch Q3, and the fifth switch Q3 includes a third switch unit. The third switch unit controls the first configuration voltage V according to the signal output by the control unit 30 and/or the multiplexer M1 a Whether to the fourth switch K2. In an example of the present embodiment, the third switching unit includes a controlled terminal, an input terminal, and an output terminal, and the controlled terminal of the third switching unit is electrically connected to the multiplexer M1; the input end of the third switch unit is connected with the first configuration voltage V of the third switch K1 a And is electrically connected with the first connection part L1 through the fourth switch K2; the output end of the third switch unit is grounded. In particular toIn implementation, the fifth switch Q3 may be an electronic switching element that can be controlled, such as a triode switch or a mos switch, as shown in fig. 5, where the controlled end of the fifth switch Q3 is a G port (or a gate/controlled end), the input end is a D port (or a drain/output/input end), and the output end is an S port (or a source/output/input end).
Thus, the pin signal processing circuit 20 can perform the first configuration voltage V on the pin of the OBD diagnosis seat communicated with the first connection part L1 (i.e., the OBD diagnosis seat pin abutted by the pin of the interface 10 electrically connected with the first lead group) a That is, outputs a first configuration voltage V to a pin of an OBD diagnosis pad communicated with the first connection part L1 a . In the voltage configuration, the control unit 30 controls the fourth switch K2 to switch the first connection portion L1 to be conductive to the output terminal of the third switch K1, thereby enabling the first configuration voltage V output by the third switch K1 a Can be transmitted to the first connection part L1 via the fourth switch K2, and at this time, the pin switch D1 electrically connected with the wires of the first wire group is turned on to enable the first configuration voltage V a Output to corresponding pins on the OBD diagnostic pad through corresponding pins of interface 10. When the control unit 30 controls the third switch unit of the fifth switch Q3 to be turned on through the multiplexer M1, the first configuration voltage V is output by the third switch K1 a The third switch unit via the fifth switch Q3 will go to ground but not to the fourth switch K2. Therefore, the control unit 30 controls the fourth switch K2 to turn on the first connection portion L1 and the output terminal of the third switch K1, and simultaneously controls the third switch unit of the fifth switch Q3 to be in an off or cut-off state to enable the first configuration voltage V a Is transmitted to the first connection portion L1 via the fourth switch K2.
Further, the pin signal processing circuit 20 further includes a third wire set including at least one wire, the wires of the third wire set being electrically connected to pins in the interface 10 through the pin switch D1. The fifth switch Q3 further comprises a fourth switch unit for controlling the first configuration voltage V according to the signal of the control unit 30 a Whether or not to the conductors of the third conductor set, in one example of this embodiment, a fourth switching unitComprises a controlled end, an input end and an output end, wherein the controlled end of the four switch unit is electrically connected with the control unit 30, and the input end of the fourth switch unit is connected with the first configuration voltage V of the third switch K1 a And is electrically connected with the wires of the third wire group, and the output end of the fourth switch unit is grounded.
Thus, the pin signal processing circuit 20 can perform a first configuration voltage V on the pins of the OBD diagnostic pad docked with the pins in the interface 10 electrically connected with the third wire set a That is to say, the first configuration voltage V can be output to the corresponding pin of the OBD diagnosis seat electrically connected with the third wire set a . When the voltage configuration is performed, the pin switch D1 is turned on to enable the first configuration voltage V output by the third switch K1 a Via the third conductor set, the pin switch D1 to the pin of the interface 10, thereby enabling the first configuration voltage V a Output to corresponding pins of the OBD diagnostic socket via corresponding pins in the interface 10. When the control unit 30 controls the fourth switching unit of the fifth switch Q3 to be turned on, the first configuration voltage V outputted by the third switch K1 a The fourth switch unit through the fifth switch Q3 will go to ground, but not to the wires of the third wire set. Accordingly, a first configuration voltage V is applied to pins of the OBD diagnostic pad to which pins in the interface 10 electrically connected to the third conductor set are connected a The fourth cell of the fifth switch Q3 is required to be in an off or cut-off state.
Further, the pin signal processing circuit 20 further includes a fourth wire set, a third connection part L3, and a comparator U1, wherein the fourth wire set includes at least one wire, and the wire of the fourth wire set is electrically connected to a pin in the interface 10 through the pin switch D1. The third connection portion L3 is a common line for transmitting an electric signal, and the third connection portion L3 is electrically connected to the wires of the fourth wire group. The comparator U1 includes a first comparing unit and a second comparing unit, where one input end of the first comparing unit is electrically connected to the output end of the third switch K1, and the other input end is electrically connected to the third connecting portion L3 through the fourth switch K2. One input end of the second comparison unit is electrically connected with the output end of the third switch K1, and the other input end of the second comparison unit is electrically connected with the third connecting part L3 through the fourth switch K2; the fourth switch K2 switches the third connection part L3 to be electrically connected with the first comparison unit or the second comparison unit according to the signal of the control unit 30; the output ends of the first comparison unit and the second comparison unit of the comparator U1 are electrically connected with the multiplexer M1. In a specific implementation, the third connection portion L3 may be a bus of the circuit.
In a specific implementation, the fourth switch K2 may be a double pole double throw relay or a combination of two single pole single throw relays, as shown in fig. 6, where the input/output terminals of the fourth switch K2 are 1 port, 2 ports, 3 ports, 4 ports, 5 ports, 6 ports, 7 ports and 8 ports. Optionally, the fourth switch K2 has a 1 port connected to the first switch Q1, a 2 port connected to the first connection portion L1, a 3 port connected to the third switch Q3, a 4 port connected to an input terminal of the first comparing unit or the second comparing unit of the comparator U1, a 5 port connected to the third connection portion L3, a 6 port connected to an input terminal of the second comparing unit or the first comparing unit of the comparator U1, and 7 and 8 ports capable of being connected to a power signal and/or for receiving a control signal.
As shown IN fig. 7, two input ends of the first comparing unit of the comparator U1 are an in1+ port and an IN 1-port, and an output end is an OUT1 port; the two input ends of the second comparison unit of the comparator U1 are an In2+ port and an IN 2-port, and the output end is an OUT2 port.
Thus, the pin signal processing circuit 20 can detect the voltage output by the pin of the OBD diagnosis seat (i.e., the OBD diagnosis seat pin to which the pin of the interface 10 electrically connected to the fourth wire group is abutted) in communication with the third connection portion L3, that is, can detect the voltage level state of the pin on the OBD diagnosis seat in communication with the third connection portion L3. When the voltage of the pin is detected, the pin switch D1 electrically connected to the wire of the fourth wire group is turned on, so that the voltage received by the pin of the interface 10 from the pin of the OBD diagnosis seat is transmitted to the third connection part L3, and then enters the first comparison unit or the second comparison unit of the comparator U1 through the fourth switch K2. The first comparing unit of the comparator U1 can output the voltage received by the pin of the interface 10 from the pin of the OBD diagnosis seat and the first configuration voltage V output by the third switch K1 a Comparing, or second comparing unitThe voltage received by the pins of the interface 10 from the pins of the OBD diagnostic pad can be combined with the first configuration voltage V output by the third switch K1 a After comparison, signals from the first and second comparison units may be transmitted to the control unit 30 via the multiplexer M1, which signals indicate the output voltage of the OBD diagnostic housing pin relative to the first configuration voltage V a Is a high-low state of (2).
Further, the pin signal processing circuit 20 further includes a sixth switch K3, where the sixth switch K3 is electrically connected to the first connection portion L1, the third connection portion L3, and at least one pin of the interface 10, and the sixth switch K3 is electrically connected to the first connection portion L1, the switching pin is electrically connected to the third connection portion L3, or the switching pin is simultaneously connected to the first connection portion L1 and the third connection portion L3 according to a signal of the control unit 30 (not limited to the control unit 30). In a specific embodiment, the sixth switch K3 may be a double pole double throw relay, as shown in fig. 8, where the input/output terminals of the sixth switch K3 are 1 port, 2 port, 3 port, 4 port, 5 port and 6 port. Optionally, the 1 port and the 4 port of the sixth switch K3 may be connected to the same pin on the interface 10, the 2 port and the 3 port are connected to the first connection portion L1 and the third connection portion L3, respectively, and the 5 port and the 6 port may be connected to a power signal and/or used for receiving a control signal.
Thus, when the sixth switch K3 controls the pin of the interface 10 to be electrically connected with the first connection part L1, the first configuration voltage V can be applied to the pin of the OBD diagnosis seat that is abutted with the pin of the interface 10 a I.e. can output a first configuration voltage V to a pin of an OBD diagnostic socket which is interfaced with a pin of the interface 10 a 。
When the sixth switch K3 is electrically connected to the third connection portion L3 and the pin of the interface 10, the output voltage can be detected from the pin of the OBD diagnosis seat that is abutted against the pin of the interface 10.
In addition, when the sixth switch K3 is connected to only one pin on the interface 10 and the control unit 30 controls the sixth switch K3 to simultaneously turn on the first connection portion L1 and the third connection portion L3, the first connection portion L1 communicates with the third connection portion L3 through the pin. Thereby connecting with the first linkThe electrical signal of the pin of the connection part L1 can be transmitted to the third connection part L3 through the pin connected with the sixth switch K3, and the third connection part L3 transmits the electrical signal to the first comparison unit or the second comparison unit of the comparator U1 through the fourth switch K2. Thus, the comparator U1 can detect the voltage of the pin on the interface 10 connected to the third connection unit L3, or can detect the voltage of the pin on the interface 10 connected to the first connection unit L1. Likewise, a first configuration voltage V a The pin on the interface 10 connected to the third connection part L3 may be transmitted to the pin on the interface 10 connected to the first connection part L1 through the sixth switch K3 or the pin connected to the sixth switch K3.
Further, the pin signal processing circuit 20 further includes a fifth wire set and a seventh switch Q4 controlled by the control unit 30, wherein the fifth wire set includes at least one wire, and the wire of the fifth wire set is electrically connected to a pin in the interface through the pin switch D1; the input end of the seventh switch Q4 is connected with a third configuration voltage V c The output end of the first and second conductive wire groups is electrically connected with the conductive wires of the fifth conductive wire group. In a specific implementation, the seventh switch Q4 may be selected from controllable electronic switching elements such as a triode switch or a mos switch.
Thus, the pin signal processing circuit 20 can perform a third configuration voltage V on the pins of the OBD diagnostic pad to which the pins of the interface 10 electrically connected to the fifth wire set are docked c That is, a third configuration voltage V can be output to pins of the interface 10 electrically connected with the fifth wire group c . In the voltage configuration, the control unit 30 controls the seventh switch Q4 to be turned on and the pin switch D1 electrically connected with the fifth wire set to be turned on to enable the third configuration voltage V c To the pins of the interface 10 via the seventh switch Q4, the fifth wire set, and the pin switch D1 in order, thereby enabling the third configuration voltage V c To the pin of the OBD diagnostic socket to which the pin of the interface 10 electrically connected to the fifth conductor set is docked.
In fact, when the pin of the control unit 30 is insufficient, the multiplexer M1 in the present embodiment is used as a transfer station between the control unit 30 and other elements in the pin control circuit 20 to transmit the electrical signal, and the electrical signal received by the multiplexer M1 or transmitted to the elements in the pin control circuit 20 can be directly received or transmitted by the control unit 30.
Compared with the prior art, the vehicle fault diagnosis device of the invention can carry out voltage configuration on a plurality of pins of the vehicle OBD diagnosis seat through the pin signal processing circuit 20, and can also detect the high and low states of the output voltage of the pins of the vehicle OBD diagnosis seat.
The pin signal processing circuit of the present invention can be applied to a fault diagnosis device for processing a pin signal of a fault diagnosis seat of a vehicle such as a train or an airplane in the same manner as the vehicle fault diagnosis device of the present embodiment.
The present invention is not limited to the above-described embodiments, but, if various modifications or variations of the present invention are not departing from the spirit and scope of the present invention, the present invention is intended to include such modifications and variations as fall within the scope of the claims and the equivalents thereof.

Claims (12)

1. A pin signal processing circuit, the pin signal processing circuit being connected to an interface, comprising:
a first wire set including at least one wire for connecting pins in the interface;
a first connection portion for transmitting a signal, the first connection portion being connected to each of the wires in the first wire group; and
the first switch is connected to a first configuration voltage, and the first switch is connected with the second switch; the first connection part is connected with the first switch, and the second switch controls whether the first switch outputs the first configuration voltage to the first connection part.
2. The pin signal processing circuit of claim 1, wherein: further comprises:
a second wire set including at least one wire; and
a second connection portion connected to each of the wires in the second wire group, the second connection portion being connected to the second switch; the second switch Guan Jieru outputs the second configuration voltage to the second connection.
3. The pin signal processing circuit of claim 1, wherein: the third switch is connected with the first switch and outputs the first configuration voltage to the first switch; the third switch is connected to a plurality of different preset voltages, and the third switch controls the voltage value of the first configuration voltage to be switched to the voltage value of one of the preset voltages.
4. A pin signal processing circuit according to claim 3, wherein: the switch further comprises a fourth switch, the fourth switch is connected between the first switch and the first connecting part, and whether the fourth switch control signal is transmitted between the first switch and the first connecting part or not.
5. The pin signal processing circuit of claim 4, wherein: the third switch outputs the first configuration voltage to the fifth switch; the fifth switch is connected with the fourth switch, and the fifth switch controls whether the first configuration voltage is output to the fourth switch or not; the fourth switch controls the first connecting part to be connected with the first switch, or the fourth switch controls the first connecting part to be connected with the fifth switch.
6. The pin signal processing circuit of claim 4, comprising: and a third wire group including at least one of the wires, the fifth switch being connected to the third wire group, the fifth switch controlling whether to output the first configuration voltage to the wires in the third wire group.
7. The pin signal processing circuit of claim 4, further comprising:
a fourth wire group including at least one of the wires;
a third connection portion connected to each of the wires in the fourth wire group; and
the sixth switch is respectively connected with the third connecting part and the first connecting part, and is also connected with one of the pins; the sixth switch controls whether the pin connected with the sixth switch is connected with the third connection part, and/or the sixth switch controls whether the pin connected with the sixth switch is connected with the first connection part.
8. The pin signal processing circuit of any one of claims 1-6, further comprising:
a fourth wire group including at least one of the wires;
a third connection portion connected to each of the wires in the fourth wire group, the fourth switch being further connected to the third connection portion; and
the comparator comprises a first comparison unit, one input end of the first comparison unit is connected with the first configuration voltage, the other input end of the first comparison unit is connected with the fourth switch, and whether a fourth switch control signal is transmitted between the third connection part and the comparator or not is judged.
9. The pin signal processing circuit of claim 8, wherein the comparator comprises a second comparing unit, one input terminal of the second comparing unit is connected to the first configuration voltage, and the other input terminal of the second comparing unit is connected to the fourth switch; the fourth switch controls the third connecting part to be connected with the first comparing unit, or the fourth switch controls the third connecting part to be connected with the second comparing unit.
10. The pin signal processing circuit of any one of claims 1-6, comprising:
a fifth wire set including at least one of the wires; and
a seventh switch Guan Jieru, which is connected to each of the wires in the fifth wire group, and which controls whether or not to output the third configuration voltage to the fifth wire group.
11. The pin signal processing circuit of any one of claims 1-6, further comprising: and the pin switch is connected between the pin and the lead, and the pin switch controls whether a signal is transmitted between the pin and the lead.
12. A pin signal processing apparatus, comprising:
an interface; and
a pin signal processing circuit as claimed in any one of claims 1 to 11, the pin signal processing circuit being connected to an interface.
CN202111375244.4A 2021-11-19 2021-11-19 Pin signal processing device and pin signal processing circuit Pending CN116155255A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111375244.4A CN116155255A (en) 2021-11-19 2021-11-19 Pin signal processing device and pin signal processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111375244.4A CN116155255A (en) 2021-11-19 2021-11-19 Pin signal processing device and pin signal processing circuit

Publications (1)

Publication Number Publication Date
CN116155255A true CN116155255A (en) 2023-05-23

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111375244.4A Pending CN116155255A (en) 2021-11-19 2021-11-19 Pin signal processing device and pin signal processing circuit

Country Status (1)

Country Link
CN (1) CN116155255A (en)

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