CN116126757A - SoC system-based serial port transparent transmission device and use method thereof - Google Patents

SoC system-based serial port transparent transmission device and use method thereof Download PDF

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Publication number
CN116126757A
CN116126757A CN202211578016.1A CN202211578016A CN116126757A CN 116126757 A CN116126757 A CN 116126757A CN 202211578016 A CN202211578016 A CN 202211578016A CN 116126757 A CN116126757 A CN 116126757A
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serial port
ethernet
soc chip
channel
gating module
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高培
万毅
田亮
黄超
彭诗翰
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Chongqing Haiyun Jiexun Technology Co ltd
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Chongqing Haiyun Jiexun Technology Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Information Transfer Systems (AREA)

Abstract

The invention discloses a serial port transparent transmission device based on an SoC system and a use method thereof, wherein the method comprises the following steps: establishing communication connection between debugging serial port software on a local computer and an SoC chip; according to the Ethernet access gating module, the Ethernet-to-serial port module and the serial port access gating module, data transmission is carried out between the debugging serial port software and the SoC chip; and according to the Ethernet access gating module and the serial access gating module, data transmission is carried out between the debugging serial software and the SoC chip. According to the invention, under the condition that extra RJ45 interface hardware and Ethernet resources on a remote SoC system are not added, the transparent transmission of remote SoC chip debugging serial port data is realized.

Description

SoC system-based serial port transparent transmission device and use method thereof
Technical Field
The invention relates to the technical field of transparent transmission, in particular to a serial port transparent transmission device based on an SoC system and a use method thereof.
Background
And debugging personnel can debug, test, operate and maintain the whole SoC system according to the information output by the debugging serial port. When the SoC chip is deployed locally, the debugging serial port can be connected to the serial port on the local computer, so that information output by the debugging serial port can be conveniently checked.
When the SoC chip is deployed remotely, the general scheme is to use a serial port-to-ethernet module to convert the debug serial port data into ethernet data (usually in the form of an ethernet UDP packet or a TCP packet), transmit the ethernet data back to the local computer, and then parse and splice the data by using the local computer through the ethernet packet parsing software for viewing.
Transparent transmission, i.e. pass-through, refers to the fact that in communication, no matter what the traffic content is transmitted, it is only responsible for transmitting the content of the transmission from the source address to the destination address without any change to the traffic data content.
SoC systems, which are typically deployed remotely, are often used to perform data acquisition, device control, edge computation, and the like. Most of these SoC devices need to communicate using an ethernet interface to exchange data. The network resources that need to be provided for the SoC system at this time include: one or more network interfaces, one or more IP addresses. At this time, if the debug serial port of the SoC chip needs to be monitored remotely, an ethernet-to-serial port module scheme is generally used to convert the debug serial port data into an ethernet data packet (usually an ethernet UDP packet or a TCP packet). From the aspect of the hardware resource requirement of the SoC system, the scheme needs to use an additional Ethernet interface; from a network resource perspective, this solution requires an additional switch interface and the use of an additional IP address. In case of network resource shortage, such as: with a small number of switch ports, the IP address of the network segment is insufficient, and this solution cannot be implemented. Particularly, under the condition of cluster deployment of SoC devices, network resources are needed to be used by a plurality of SoC systems, and at the moment, if an additional Ethernet interface is added to each SoC device, the needed switch interface and IP address resources are greatly increased, so that project deployment cost is greatly increased.
Disclosure of Invention
In view of the above, the present invention provides a serial port transparent transmission device based on SoC system and a method for using the same, so as to solve the above technical problems.
The invention discloses a serial port transparent transmission device based on an SoC system, which comprises:
the system comprises debugging serial port interaction software running on a local computer, an Ethernet access gating module connected with the debugging serial port interaction software, an Ethernet conversion serial port module connected with the Ethernet access gating module, an SoC chip, a serial port access gating module, a storage device, a reset device and an Ethernet conversion serial port module which are respectively connected with the SoC chip, and the serial port access gating module connected with the Ethernet conversion serial port module.
Further, the Ethernet path gating module is connected with the debugging serial port interactive software through a first Ethernet path, an RJ45 interface of the SoC system, a fourth Ethernet path and an RJ45 interface of the local computer in sequence;
the Ethernet access gating module is connected with the Ethernet-to-serial port module through a third Ethernet access;
the Ethernet path gating module is connected with the SoC chip through a second Ethernet path;
the Ethernet-to-serial port module is connected with the serial port access gating module through a third serial port channel;
the serial port access gating module is connected with a debugging serial port arranged on the SoC chip through a first serial port access;
the serial port access gating module is connected with a common serial port arranged on the SoC chip through a second serial port access.
The invention also discloses a using method of the serial port transparent transmission device based on the SoC system, which comprises the following steps:
step 1: establishing communication connection between debugging serial port software on a local computer and an SoC chip;
step 2: according to the Ethernet access gating module, the Ethernet-to-serial port module and the serial port access gating module, data transmission is carried out between the debugging serial port software and the SoC chip;
step 3: and according to the Ethernet access gating module and the serial access gating module, data transmission is carried out between the debugging serial software and the SoC chip.
Further, the step 1 includes:
the system is restarted after power off, and the serial port access gating module connects the first serial port access with the third serial port access during the period from the power on of the SoC chip to the completion of the start-up of the embedded software; the ethernet path gating module connects the first ethernet path with the third ethernet path.
Further, after the step 1, before the step 2, the method further includes:
after starting the embedded software running on the SoC chip, the serial port access gating module connects the first serial port access with the second serial port access; the ethernet path gating module connects the first ethernet path with the second ethernet path.
Further, the step 2 includes:
the debugging serial port information output by the SoC chip enters an Ethernet serial port conversion module, and after the Ethernet serial port conversion module converts the debugging serial port information into an Ethernet UDP packet, the Ethernet serial port information is transmitted to debugging serial port interaction software running on a local computer through a third Ethernet path, an Ethernet path gating module, a first Ethernet path and a fourth Ethernet path in sequence; and after the serial port interactive software sequences and analyzes the Ethernet UDP packets in sequence, displaying the debugging serial port information on an interface.
Further, in the step 2:
the debugging serial port interactive software packages information input by a user into an Ethernet UDP packet, sequentially passes through a fourth Ethernet channel, a first Ethernet channel, an Ethernet channel gating module and a third Ethernet channel, is transmitted to an Ethernet serial port conversion module on a remote SoC system, and sequentially passes through the third serial port channel, the serial port channel gating module and the first serial port channel after the Ethernet serial port conversion module converts the information into serial port data, and is transmitted to the SoC chip.
Further, the step 3 includes:
the debugging serial port information output by the SoC chip sequentially passes through the first serial port channel, the serial port channel gating module and the second serial port channel, enters the SoC chip, is packaged into an Ethernet UDP packet by the SoC chip, and then passes through the second Ethernet channel, the Ethernet channel gating module, the first Ethernet channel and the fourth Ethernet channel to be transmitted to the debugging serial port interactive software; and after the serial port interactive software sequences and analyzes the Ethernet UDP packets in sequence, displaying the debugging serial port information on an interface.
Further, in the step 3:
the debugging serial port interactive software packages information input by a user into an Ethernet UDP packet, sequentially passes through a fourth Ethernet channel, a first Ethernet channel, an Ethernet channel gating module and a second Ethernet channel, and is transmitted to an SoC chip on a remote SoC system, and after the SoC chip analyzes the Ethernet UDP packet into serial interface data, the serial interface data is output through a common serial port on the SoC chip, and sequentially passes through the second serial port channel, the serial port channel gating module and the first serial port channel, and is transmitted to a debugging serial port of the SoC chip.
Further, in the steps 1 to 3, further including:
if the SoC chip periodically outputs a pulse signal to the reset device through the WDI signal path, the SoC chip is indicated to be in a normal running state;
if the embedded software running on the SoC chip is down, pulse signals cannot be periodically output to the reset device through the WDI signal path; the Reset device judges that the SoC chip is in a downtime state, resets the SoC chip through a Reset signal path, and repeats the steps 1 to 3 after the SoC chip is Reset.
Due to the adoption of the technical scheme, the invention has the following advantages:
1. according to the invention, under the condition that extra RJ45 interface hardware and Ethernet resources on a remote SoC system are not added, the transparent transmission of remote SoC chip debugging serial port data is realized.
2. The invention uses the Ethernet to serial port module, which can turn the information of the debug serial port output in the time period from the power-on of the SoC chip to the completion of the startup of the embedded software into the form of Ethernet package and send the information to the debug serial port interactive software on the local computer. Meanwhile, the Ethernet packet sent by the debugging serial interface interaction software on the local computer can be converted into serial data and sent to the SoC chip.
3. The invention skillfully utilizes the unused common serial port on the SoC chip, and after the embedded software running on the SoC chip is started, the information output by the debugging serial port is input to the common serial port on the SoC chip by adjusting the serial port access gating module. And the SoC chip converts the data into an Ethernet packet and then sends the Ethernet packet to debugging serial port interactive software on a local computer. Meanwhile, the Ethernet packet sent by the debugging serial port interaction software on the local computer can be converted into serial port data, and the serial port data is output to the debugging serial port on the SoC chip through the common serial port.
4. The key point of the invention is that the Ethernet gating module and the serial port access gating module are used, and the RJ45 interface on the remote SoC system can be time-division multiplexed.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments described in the embodiments of the present invention, and other drawings may be obtained according to these drawings for those skilled in the art.
Fig. 1 is a schematic diagram of a serial port transparent transmission device based on an SoC system according to an embodiment of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and examples, wherein it is apparent that the examples described are only some, but not all, of the examples of the present invention. All other embodiments obtained by those skilled in the art are intended to fall within the scope of the embodiments of the present invention.
SoC is an abbreviation of System on Chip, and transliteration is a "System on Chip", often referred to as a "System on Chip", which is a System or product formed by integrating a microprocessor, an analog IP (Intellectual Property) core, a digital IP core, and a memory (or an off-Chip memory control interface) into a single Chip, including a complete hardware System and embedded software carried thereby.
A common SoC system comprises: MCU, MPU, ARM, FPGA, soC FPGA, GPU, DSP, special AI processing chip, etc.
The serial port is a serial interface, also called a serial communication interface or a serial communication interface (generally referred to as COM interface), and is an expansion interface adopting a serial communication method. A Serial Interface (Serial Interface) refers to sequential transfer of data bit by bit. The communication line is simple, and two-way communication can be realized by only a pair of transmission lines (telephone lines can be directly used as the transmission lines), so that the cost is greatly reduced.
The debugging serial port is a serial port used for system debugging, testing, running and maintaining on the SoC system, and is based on embedded software of the SoC, and is usually used for debugging.
Embedded software refers to operating system and development tool software embedded in hardware, and is inseparable from SoC systems. When the embedded software is started, the debugging serial port generally outputs hardware attribute, hardware fault information, initialization information, kernel information, file system information, device information, driver information, system running information and the like.
Referring to fig. 1, the present invention provides an embodiment of a serial port transparent transmission device based on an SoC system, where the whole device is composed of a local computer and a remote SoC system, and the local computer and the remote SoC system both have RJ45 interfaces. The local computer and the remote SoC system are communicated through a fourth Ethernet channel, and can normally receive and transmit UDP/TCP packets. The fourth ethernet path may be a direct connection, a local area network, a metropolitan area network, or a wide area network.
Remote SoC system: the physical form of the SoC system deployed at a remote place is usually a circuit board structure with a housing, and the circuit board is composed of a plurality of circuit modules, and the key modules necessary to be included in the present invention include: the system comprises an SoC chip, a serial port access gate, an Ethernet-to-serial port module, a storage device, a reset device and an Ethernet access gate.
SoC chip: the core chip of the SoC system carries the operation of embedded software, and the SoC chip in the invention can be: MCU, MPU, ARM, FPGA, soC FPGA, GPU, DSP and special AI processing chip.
The SoC chip is connected to the memory device through a memory path, and embedded software necessary for the SoC system is loaded from the memory device through the memory path when the SoC chip is powered on.
The SoC chip is connected with the Reset signal path through the WDI signal path, the WDI signal is output from the GPIO interface on the SoC chip, and the GPIO structure should have the characteristics that: during the period from the power-on of the chip to the completion of the start-up of the embedded software, the chip can be configured to be in a high-resistance state; after the embedded software is started, the GPIO is driven to periodically output pulse signals to the reset device so as to indicate that the SoC is in a normal running state. The Reset signal is used for resetting and restarting the SoC chip by the resetting device.
The SoC chip is connected with the serial port access gating module through the first serial port access and the second serial port access. The first serial port channel is a debugging serial port input/output channel of the SoC chip, and the second serial port channel is a common serial port output/output channel of the SoC chip.
The SoC chip is connected with the Ethernet path gating module through a second Ethernet path.
The access gating signal output by the SoC chip is connected to the Ethernet access gating module and the serial port access gating module, the access gating signal can be driven by a GPIO interface on the SoC chip, and the GPIO structure is characterized in that: the embedded software is configured to be in a high-resistance state during the period from the power-on of the chip to the completion of the start-up of the embedded software, and is pulled up to a high level or pulled down to a low level through an external pull-up resistor, and the embedded software drives the GPIO to be changed to a level opposite to the level in the start-up process after the completion of the start-up of the embedded software.
Serial port access gate: according to the value of the access gating signal, the following two mutually exclusive connection relations are determined:
1. the first serial port passage is connected with the second serial port passage;
2. the first serial port access is connected with the third serial port access.
The method comprises the steps that during the period from the power-on of a chip to the completion of the starting of embedded software, a first serial port access is connected with a third serial port access;
after the embedded software is started, the first serial port access is connected with the second serial port access.
An Ethernet-to-serial port module: serial data may be converted into the form of ethernet packets, which are input/output from the serial interface, and ethernet packets are input/output from the PHY interface. It generally has several modes of operation: TCP CLINET, TCP SERVER, UDP CLIENT, UDP SERVER.
When operating in TCP CLINET or TCP SERVER modes, the ethernet packets are TCP packets.
When working with the UDP CLIENT or UDP SERVER mode, the ethernet packet is an ethernet UDP packet.
The Ethernet-to-serial port module is connected with the SoC chip through a configuration channel, and the signal type of the configuration channel is determined according to the scheme selected by the Ethernet-to-serial port module, and is usually the bus type such as I2C, UART, SPI.
In specific implementation, the module can be realized by constructing a circuit by using a chip such as CH 9121.
The Ethernet-to-serial port module is connected with the Ethernet path gate through a third Ethernet path.
The Ethernet-to-serial port module is connected with the serial port access gating module through a third serial port access.
A storage device: the embedded software is used for storing embedded software required by the operation of the SoC system, and the embedded software usually comprises an operating system and development tool software. When the SoC system is deployed remotely, the whole set of embedded software is usually burned in advance. And then installed onto the SoC system to provide the necessary operating environment for the on-site deployment of the SoC system. The memory device is connected with the SoC chip through a memory path.
Reset device: the Reset device is connected with the SoC chip through a WDI signal path and a Reset signal path, and the SoC chip periodically outputs pulse signals to the Reset device through the WDI signal path so as to indicate that the SoC is in a normal running state. After the SoC chip is down, pulse signals cannot be periodically output to the reset device through the WDI signal path. And the Reset device judges that the SoC chip is in a downtime state, and resets the SoC chip through a Reset signal path.
An Ethernet path gating module: the Ethernet path gating module determines the following two mutually exclusive connection relations according to the value of the path gating signal output by the SoC chip:
1. the first Ethernet path is connected with the second Ethernet path;
2. the first ethernet path is connected to the third ethernet path.
The method comprises the steps that during the period from the power-on of a chip to the completion of the starting of embedded software, a first Ethernet channel is connected with a third Ethernet channel;
after the embedded software is started, the first Ethernet path is connected with the second Ethernet path.
In the implementation, the module can be realized by using a MAX4890 chip building circuit.
Local computer: the system is a local computer and is used for monitoring, debugging, testing and maintaining a remote SoC system. The necessary software mainly comprises debugging serial port interaction software. The network attributes possessed by the local computer include: IP address, subnet mask, gateway address, MAC address of the local computer.
Debugging serial port interaction software: the main functions are as follows:
and monitoring a TCP/UDP communication port, analyzing a serial port information data packet sent by the remote SoC system through the Ethernet, and displaying the analyzed serial port information data packet on a software interface.
And capturing debugging control information input on the local computer and transmitting the information to a remote SoC system in the form of an Ethernet packet for debugging.
Debugging serial interactive software typically has several modes of operation: TCP CLINET, TCP SERVER, UDP CLIENT, UDP SERVER. The working mode of the system is required to correspond to that of a remote SoC system:
when the remote SoC system adopts a TCP CLINET working mode, the debugging serial port interaction software works in a TCP SERVER mode;
when the remote SoC system adopts a TCP SERVER working mode, the debugging serial port interaction software works in a TCP CLIENT mode;
when the remote SoC system adopts a TCP CLINET working mode, the debugging serial port interaction software works in a TCP SERVER mode;
when the remote SoC system adopts a TCP SERVER working mode, the debugging serial port interaction software works in a TCP CLIENT mode.
Other network attributes of the debug serial interface interaction software include: destination IP address, destination port.
The invention also provides an embodiment of a using method of the serial port transparent transmission device based on the SoC system, which specifically comprises the following steps:
s1, firstly determining communication parameters of a local computer and a remote SoC system, wherein the communication parameters comprise the following contents:
the local computer and the SoC system are respectively provided with an IP address, a subnet mask, a gateway address, a DNS address and a MAC address;
the invention relates to an Ethernet communication working mode between a local computer and an SoC system, which is exemplified by a UDP mode: the local computer is determined to be in UDP Server mode, and the SoC system is determined to be in UDP Client mode.
The local computer and the SoC system are respectively provided with UDP communication receiving and transmitting ports.
And determining the baud rate parameter, the data bit parameter, the stop bit parameter and the check bit parameter of the SoC chip debugging serial port.
S2, before remote installation and deployment, the SoC system firstly burns the storage device, the embedded software is burnt into the storage device, network information such as an initial IP address, an MAC address, a subnet mask, a gateway address, a DNS address and the like is also contained in the embedded software, and the embedded software is preset in the burning process.
S3, after remote installation and deployment of the SoC system are completed, the SoC chip is powered on and started normally for the first time, after the SoC chip is powered on and started normally, the Ethernet serial port conversion module is configured through the configuration channel, the same IP address, MAC address, subnet mask, gateway address, DNS address and communication port which are preset in the SoC system are configured, and the baud rate parameter, the data bit parameter, the stop bit parameter and the check bit parameter of the debugging serial port are also configured into the Ethernet serial port conversion module. So far, the configuration phase is completed.
S4, starting up the local computer, running debugging serial port interactive software, and binding the debugging serial port interactive software to the UDP/TCP communication receiving port determined in the S1.
S5, restarting the SoC system after power-off, and connecting the first serial port access with the third serial port access by the serial port access gating module during the period from the power-on of the chip to the completion of the start-up of the embedded software; the ethernet path gating module connects the first ethernet path with the third ethernet path.
S6, the debugging serial port information output by the SoC chip enters an Ethernet-to-serial port module, and after the Ethernet-to-serial port module converts the debugging serial port information into an Ethernet UDP packet, the Ethernet-to-serial port information is transmitted to debugging serial port interactive software running on the local computer through a third Ethernet channel, an Ethernet channel gating module, a first Ethernet channel and a fourth Ethernet channel in sequence. And after the serial port interactive software sequences and analyzes the Ethernet UDP packets in sequence, displaying the debugging serial port information on an interface.
And S7, in the S6 process, the debugging serial port interaction software packages information input by a user into an Ethernet UDP packet, sequentially passes through a fourth Ethernet channel, a first Ethernet channel, an Ethernet channel gating module and a third Ethernet channel, is transmitted to an Ethernet serial port conversion module on a remote SoC system, converts the Ethernet serial port into serial port data, sequentially passes through the third serial port channel, the serial port channel gating module and the first serial port channel, and is transmitted to the SoC chip.
S8, after starting the embedded software running on the SoC chip, connecting the first serial port access with the second serial port access by the serial port access gating module; the ethernet path gating module connects the first ethernet path with the second ethernet path.
And S9, the debugging serial port information output by the SoC chip sequentially passes through the first serial port channel, the serial port channel gating module and the second serial port channel, enters the SoC chip, is packaged into an Ethernet UDP packet by the SoC chip, passes through the second Ethernet channel, the Ethernet channel gating module, the first Ethernet channel, the RJ45 interface and the fourth Ethernet channel, and is transmitted to the debugging serial port interactive software. And after the serial port interactive software sequences and analyzes the Ethernet UDP packets in sequence, displaying the debugging serial port information on an interface.
S10, in the S9 process, the debugging serial port interactive software packages information input by a user into an Ethernet UDP packet, sequentially passes through a fourth Ethernet path, a first Ethernet path, an Ethernet path gating module and a second Ethernet path, and is transmitted to an SoC chip on a remote SoC system, the SoC chip analyzes the Ethernet UDP packet into serial interface data, and then outputs the serial interface data through a common serial port on the SoC chip, sequentially passes through the second serial port path, the serial port path gating module and the first serial port path, and is transmitted to a debugging serial port of the SoC chip.
S11, in the S8-S10 process, the SoC chip periodically outputs pulse signals to the reset device through the WDI signal path to indicate that the SoC chip is in a normal running state. If the embedded software running on the SoC chip is down, pulse signals cannot be periodically output to the reset device through the WDI signal path. And the Reset device judges that the SoC chip is in a downtime state, resets the SoC chip through a Reset signal path, and repeatedly executes S5-S11 after the SoC chip is Reset.
Finally, it should be noted that: the above embodiments are only for illustrating the technical aspects of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the above embodiments, it should be understood by those of ordinary skill in the art that: modifications and equivalents may be made to the specific embodiments of the invention without departing from the spirit and scope of the invention, which is intended to be covered by the claims.

Claims (10)

1. The serial port transparent transmission device based on the SoC system is characterized by comprising:
the system comprises debugging serial port interaction software running on a local computer, an Ethernet access gating module connected with the debugging serial port interaction software, an Ethernet conversion serial port module connected with the Ethernet access gating module, an SoC chip, a serial port access gating module, a storage device, a reset device and an Ethernet conversion serial port module which are respectively connected with the SoC chip, and the serial port access gating module connected with the Ethernet conversion serial port module.
2. The SoC system-based serial port transmission device of claim 1, wherein,
the Ethernet path gating module is connected with the debugging serial port interactive software through a first Ethernet path, an RJ45 interface of the SoC system, a fourth Ethernet path and an RJ45 interface of the local computer in sequence;
the Ethernet access gating module is connected with the Ethernet-to-serial port module through a third Ethernet access;
the Ethernet path gating module is connected with the SoC chip through a second Ethernet path;
the Ethernet-to-serial port module is connected with the serial port access gating module through a third serial port channel;
the serial port access gating module is connected with a debugging serial port arranged on the SoC chip through a first serial port access;
the serial port access gating module is connected with a common serial port arranged on the SoC chip through a second serial port access.
3. The use method of the serial port transparent transmission device based on the SoC system is characterized by comprising the following steps of:
step 1: establishing communication connection between debugging serial port software on a local computer and an SoC chip;
step 2: according to the Ethernet access gating module, the Ethernet-to-serial port module and the serial port access gating module, data transmission is carried out between the debugging serial port software and the SoC chip;
step 3: and according to the Ethernet access gating module and the serial access gating module, data transmission is carried out between the debugging serial software and the SoC chip.
4. A method according to claim 3, wherein step 1 comprises:
the system is restarted after power off, and the serial port access gating module connects the first serial port access with the third serial port access during the period from the power on of the SoC chip to the completion of the start-up of the embedded software; the ethernet path gating module connects the first ethernet path with the third ethernet path.
5. The method according to claim 4, further comprising, after step 1, before step 2:
after starting the embedded software running on the SoC chip, the serial port access gating module connects the first serial port access with the second serial port access; the ethernet path gating module connects the first ethernet path with the second ethernet path.
6. The method according to claim 5, wherein step 2 comprises:
the debugging serial port information output by the SoC chip enters an Ethernet serial port conversion module, and after the Ethernet serial port conversion module converts the debugging serial port information into an Ethernet UDP packet, the Ethernet serial port information is transmitted to debugging serial port interaction software running on a local computer through a third Ethernet path, an Ethernet path gating module, a first Ethernet path and a fourth Ethernet path in sequence; and after the serial port interactive software sequences and analyzes the Ethernet UDP packets in sequence, displaying the debugging serial port information on an interface.
7. The method according to claim 5, wherein in said step 2:
the debugging serial port interactive software packages information input by a user into an Ethernet UDP packet, sequentially passes through a fourth Ethernet channel, a first Ethernet channel, an Ethernet channel gating module and a third Ethernet channel, is transmitted to an Ethernet serial port conversion module on a remote SoC system, and sequentially passes through the third serial port channel, the serial port channel gating module and the first serial port channel after the Ethernet serial port conversion module converts the information into serial port data, and is transmitted to the SoC chip.
8. The method according to claim 6, wherein the step 3 comprises:
the debugging serial port information output by the SoC chip sequentially passes through the first serial port channel, the serial port channel gating module and the second serial port channel, enters the SoC chip, is packaged into an Ethernet UDP packet by the SoC chip, and then passes through the second Ethernet channel, the Ethernet channel gating module, the first Ethernet channel and the fourth Ethernet channel to be transmitted to the debugging serial port interactive software; and after the serial port interactive software sequences and analyzes the Ethernet UDP packets in sequence, displaying the debugging serial port information on an interface.
9. The method according to claim 8, wherein in said step 3:
the debugging serial port interactive software packages information input by a user into an Ethernet UDP packet, sequentially passes through a fourth Ethernet channel, a first Ethernet channel, an Ethernet channel gating module and a second Ethernet channel, and is transmitted to an SoC chip on a remote SoC system, and after the SoC chip analyzes the Ethernet UDP packet into serial interface data, the serial interface data is output through a common serial port on the SoC chip, and sequentially passes through the second serial port channel, the serial port channel gating module and the first serial port channel, and is transmitted to a debugging serial port of the SoC chip.
10. A method according to claim 3, wherein in said steps 1 to 3, further comprising:
if the SoC chip periodically outputs a pulse signal to the reset device through the WDI signal path, the SoC chip is indicated to be in a normal running state;
if the embedded software running on the SoC chip is down, pulse signals cannot be periodically output to the reset device through the WDI signal path; the Reset device judges that the SoC chip is in a downtime state, resets the SoC chip through a Reset signal path, and repeats the steps 1 to 3 after the SoC chip is Reset.
CN202211578016.1A 2022-12-06 2022-12-06 SoC system-based serial port transparent transmission device and use method thereof Pending CN116126757A (en)

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