CN116112104A - FPGA-based spectrum monitoring method and front-end receiver - Google Patents

FPGA-based spectrum monitoring method and front-end receiver Download PDF

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CN116112104A
CN116112104A CN202310084118.6A CN202310084118A CN116112104A CN 116112104 A CN116112104 A CN 116112104A CN 202310084118 A CN202310084118 A CN 202310084118A CN 116112104 A CN116112104 A CN 116112104A
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fast fourier
fourier transform
frequency
signal
receiver
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CN116112104B (en
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王澎
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Dfine Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/30Monitoring; Testing of propagation channels
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

The application provides a frequency spectrum monitoring method based on an FPGA and a front-end receiver, which are applied to the front-end receiver, and are characterized in that firstly, frequency spectrum monitoring parameters issued by a front-end system or a back-end system are received, fast Fourier transform times are obtained by combining the characteristics of the receiver, signals needing to be scanned outside and radio frequency signals corresponding to the frequency spectrum monitoring parameters are mixed to obtain intermediate frequency signals, and then baseband IQ signals are obtained through digital down-conversion processing. And finally, performing fast Fourier transform on the baseband IQ signal according to the fast Fourier transform times, the frequency spectrum monitoring parameters and the receiver characteristics of the front-end receiver to obtain frequency spectrum data. The filter design is carried out by adopting a signal extraction mode in the digital down-conversion, so that the order of the filter is reduced, and the consumption of DSP resources and the power consumption of products in the FPGA are effectively reduced.

Description

FPGA-based spectrum monitoring method and front-end receiver
Technical Field
The application relates to the technical field of digital signal processing, in particular to a frequency spectrum monitoring method based on an FPGA and a front-end receiver.
Background
Spectrum monitoring refers to the detection, search and interception of radio signals in a radio management area, and analysis, identification, monitoring and acquisition of technical parameters, working characteristics, radiation positions and other technical information activities of the radio signals, and is an important means basis for effectively implementing radio management. In an experimental environment, spectrum monitoring of related signals is generally realized by using a spectrum analyzer, and signal parameters such as signal distortion degree, modulation degree, spectrum purity, frequency stability and intermodulation distortion are measured.
However, due to the limitation of the volume and the power consumption of the spectrum analyzer, the spectrum analyzer cannot be effectively applied to some spectrum monitoring systems with the requirements of miniaturization and low power consumption, so how to effectively apply the spectrum analyzer to the spectrum monitoring system becomes one of the problems that have to be considered by those skilled in the art.
Disclosure of Invention
The utility model aims at overcoming the defects of the prior art, and providing a frequency spectrum monitoring method and a front-end receiver based on FPGA, which adopts a signal extraction mode to carry out filter design in digital down-conversion, reduces the filter order, and effectively reduces the DSP resource consumption and the product power consumption in the FPGA. .
The purpose of the application is realized through the following technical scheme:
in a first aspect, the present application proposes a spectrum monitoring method based on FPGA, applied to a front-end receiver, including:
receiving spectrum monitoring parameters issued by a front-end system or a back-end system;
combining the frequency spectrum monitoring parameters with the receiver characteristics of the front-end receiver to obtain fast Fourier transform times;
mixing an external signal to be scanned with a radio frequency signal corresponding to the frequency spectrum monitoring parameter to obtain an intermediate frequency signal;
the intermediate frequency digital signal is processed through digital down conversion to obtain a baseband IQ signal;
and performing fast Fourier transform on the baseband IQ signal according to the fast Fourier transform times to obtain frequency spectrum data.
Optionally, the spectrum monitoring parameter includes a scanning bandwidth, the receiver characteristic includes a local frequency hopping step, and the step of combining the spectrum monitoring parameter with the receiver characteristic of the front-end receiver to obtain the fast fourier transform frequency includes:
performing frequency spectrum splicing on the local oscillator frequency hopping step by step;
and obtaining the fast Fourier transform times according to the frequency hopping stepping and scanning bandwidth of the frequency spectrum spliced.
Optionally, the spectrum monitoring parameter further includes a center frequency, and the step of mixing the signal to be scanned with the radio frequency signal corresponding to the spectrum monitoring parameter to obtain an intermediate frequency signal includes:
obtaining a frequency hopping frequency point according to the center frequency and the scanning bandwidth;
and mixing the signal to be scanned with the radio frequency signal corresponding to the frequency hopping frequency point to obtain an intermediate frequency signal.
Optionally, the receiver feature includes a front-end AD sampling rate, the front-end receiver includes a fast fourier transform IP core, and the step of performing fast fourier transform on the baseband IQ signal according to the number of fast fourier transforms to obtain spectral data includes:
setting a working clock by the fast Fourier transform IP core according to the front-end AD sampling rate;
obtaining the number of the fast Fourier transform points according to the scanning bandwidth by the fast Fourier transform IP core;
and performing fast Fourier transform on the baseband IQ signal by the fast Fourier transform IP core according to a working clock and the fast Fourier transform point number and the fast Fourier transform frequency to obtain frequency spectrum data.
In a second aspect, the present application proposes a front-end receiver comprising:
the parameter receiving module is used for receiving spectrum monitoring parameters issued by the front-end system or the back-end system;
the FPGA processing module combines the frequency spectrum monitoring parameters with the receiver characteristics of the front-end receiver to obtain the fast Fourier transform times;
the frequency mixing module is used for mixing the signal to be scanned with the radio frequency signal corresponding to the frequency spectrum monitoring parameter to obtain an intermediate frequency signal;
the down-conversion module is used for obtaining a baseband IQ signal through digital down-conversion processing of the intermediate frequency digital signal;
and the Fourier transform module is used for carrying out fast Fourier transform on the baseband IQ signal according to the fast Fourier transform times to obtain frequency spectrum data.
Optionally, the receiver characteristic includes a front-end AD sampling rate, and the front-end receiver includes a fast fourier transform IP core for:
setting a working clock according to the front-end AD sampling rate;
obtaining the number of fast Fourier transform points according to the scanning bandwidth;
and performing fast Fourier transform on the baseband IQ signal according to the working clock and the fast Fourier transform point number and the fast Fourier transform times to obtain frequency spectrum data.
In a third aspect, the present application also proposes a computer device comprising a processor and a memory, the memory having stored therein a computer program, the computer program being loaded and executed by the processor to implement the spectrum monitoring method according to any of the first aspects.
In a fourth aspect, the present application also proposes a computer readable storage medium having stored therein a computer program, the computer program being loaded and executed by a processor to implement the spectrum monitoring method according to any of the first aspects.
The main scheme and each further option of the application can be freely combined to form a plurality of schemes, which are all schemes that can be adopted and claimed by the application; and the selection(s) of non-conflicting choices and other choices may be freely combined. Numerous combinations will be apparent to those skilled in the art upon review of the present application, and are not intended to be exhaustive or to be construed as limiting the scope of the invention.
The application provides a frequency spectrum monitoring method based on an FPGA and a front-end receiver, which are applied to the front-end receiver, and are characterized in that firstly, frequency spectrum monitoring parameters issued by a front-end system or a back-end system are received, fast Fourier transform times are obtained by combining the characteristics of the receiver, signals needing to be scanned outside and radio frequency signals corresponding to the frequency spectrum monitoring parameters are mixed to obtain intermediate frequency signals, and then baseband IQ signals are obtained through digital down-conversion processing. And finally, performing fast Fourier transform on the baseband IQ signal according to the fast Fourier transform times, the frequency spectrum monitoring parameters and the receiver characteristics of the front-end receiver to obtain frequency spectrum data. The filter design is carried out by adopting a signal extraction mode in the digital down-conversion, so that the order of the filter is reduced, and the consumption of DSP resources and the power consumption of products in the FPGA are effectively reduced.
Drawings
Fig. 1 shows a schematic flow chart of a spectrum monitoring method according to an embodiment of the present application.
Detailed Description
Other advantages and effects of the present application will become apparent to those skilled in the art from the present disclosure, when the following description of the embodiments is taken in conjunction with the accompanying drawings. The present application may be embodied or carried out in other specific embodiments, and the details of the present application may be modified or changed from various points of view and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
In the prior art, because of the limitation of the volume and the power consumption of the spectrum analyzer, the spectrum analyzer cannot be effectively applied to some spectrum monitoring systems with miniaturization and low power consumption requirements, so how to effectively apply the spectrum analyzer to the spectrum monitoring system becomes one of the problems that the person skilled in the art has to consider.
In order to solve the above-mentioned problems, the present application provides a spectrum monitoring method and a front-end receiver based on an FPGA, which performs filter design by adopting a signal extraction manner in digital down-conversion, reduces the filter order, effectively reduces DSP resource consumption and product power consumption in the FPGA, and further describes the method in detail.
Referring to fig. 1, fig. 1 shows a flowchart of a spectrum monitoring method according to an embodiment of the present application, where the spectrum monitoring method is applied to a front-end receiver, and includes the following steps:
s110, receiving spectrum monitoring parameters sent by a front-end system or a back-end system.
The front-end system comprises an FPGA, and the FPGA acquires spectrum monitoring parameters issued by the front-end system or the back-end system through a related interface (such as an SRIO interface), wherein the spectrum monitoring parameters mainly comprise center frequency, scanning bandwidth and the like.
S120, combining the frequency spectrum monitoring parameters with the receiver characteristics of the front-end receiver to obtain the fast Fourier transform times.
The receiver features include the frequency hopping step, intermediate frequency bandwidth, intermediate frequency signal rate, front-end AD sampling rate and the like.
Optionally, spectrum splicing is performed on the local oscillation frequency hopping step, and the fast Fourier transform times are obtained according to the local oscillation frequency hopping step after spectrum splicing and the scanning bandwidth.
Because the spectrum bandwidth of the external signal to be scanned is far greater than that of the existing front-end receiver, multiple segments of spectrums are required to be received and collected in a segmented mode and then spliced together, the whole broadband spectrum can be formed, and the Fast Fourier Transform (FFT) times are obtained according to the frequency hopping step and the scanning bandwidth of the vibration.
S130, mixing the signal to be scanned with the radio frequency signal corresponding to the frequency spectrum monitoring parameter to obtain an intermediate frequency signal.
Optionally, a frequency hopping frequency point is obtained according to the center frequency and the scanning bandwidth, and the signal to be scanned outside and the radio frequency signal corresponding to the frequency hopping frequency point are mixed to obtain an intermediate frequency signal.
According to the scanning bandwidth and the center frequency, the frequency hopping points which need to be output by the front-end receiver can be obtained, for example, the center frequency is 5Ghz, the scanning bandwidth is 1Ghz, the scanning range is 4.5-5.5 Ghz, the first frequency hopping point is 4.5Ghz, the front-end receiver is controlled to output a radio frequency signal of 4.5Ghz, after finishing Fast Fourier Transform (FFT), the front-end receiver is controlled to output a second frequency hopping point which is the first frequency hopping point plus the frequency hopping step signal, and the third frequency hopping point which is the second frequency hopping point plus the frequency hopping step signal is sequentially reciprocated until the last frequency hopping point reaches 5.5.
S140, the intermediate frequency digital signal is processed through digital down conversion to obtain a baseband IQ signal.
The FPGA of the front-end system stores a digital down-conversion algorithm, and the digital down-conversion algorithm is utilized to down-convert the intermediate frequency digital signal and obtain a baseband IQ signal.
And S150, performing fast Fourier transform on the baseband IQ signal according to the fast Fourier transform times, the frequency spectrum monitoring parameters and the receiver characteristics of the front-end receiver to obtain frequency spectrum data.
The FPGA of the front-end system further comprises an IP core of the fast Fourier transform, a working clock is set through the IP core of the fast Fourier transform according to the AD sampling rate of the front end, the number of fast Fourier transform points is obtained according to the scanning bandwidth, and finally the baseband IQ signal is subjected to the fast Fourier transform according to the working clock, the number of fast Fourier transform points and the number of fast Fourier transform times to obtain frequency spectrum data.
The IP of the fast Fourier transform checks the baseband IQ signal to carry out the fast Fourier transform to obtain corresponding IQ data, calculates the amplitude of each frequency component from the corresponding IQ data, stores the amplitude as frequency spectrum data into the RAM until the fast Fourier transform times are completed, stores the frequency spectrum data obtained each time into the RAM, finally determines whether the signal scanning within the whole bandwidth range is completed, and if the signal scanning within the whole bandwidth range is completed, uploads the data in the RAM into the system through the corresponding interface. The entry into the next fast fourier transform is not completed.
Because the IP core of the fast Fourier transform needs to set the number of fast Fourier transform points and the working clock IP core for the fast Fourier transform to finish the work, the working clock is set according to the AD sampling rate of the front end, the number of fast Fourier transform points is obtained according to the scanning bandwidth, in addition, in order to save the resources of the FPGA, in the digital down-conversion process, the filter is designed in a signal extraction mode to reduce the filter order, so that the DSP resource consumption in the FPGA can be effectively reduced, and the product power consumption is reduced.
For a better explanation of the present application, in one possible embodiment, the receiver of the front-end receiver is characterized by a local oscillator hopping step, an intermediate frequency bandwidth, an intermediate frequency signal rate, and a front-end AD sampling rate. The frequency hopping step is 25Mhz, the intermediate frequency bandwidth is 40Mhz, the intermediate frequency signal rate is 153.6Mhz, the front end AD sampling rate is 204.8Mhz, the center frequency in the frequency spectrum monitoring parameter is 5Ghz, the scanning bandwidth is 1Ghz, the frequency sweep range is 4.5Ghz to 5.5Ghz according to the center frequency and the scanning bandwidth, in order to avoid system spurious emissions, half of the frequency hopping step is selected to carry out frequency spectrum splicing, the fast Fourier transform times are determined to be 41 times according to the scanning bandwidth and the local oscillation frequency hopping step, the extraction multiple is 2, at this time, half of the frequency AD sampling rate of the front end is 102.4Mhz as a working clock, the frequency spectrum scanning in the whole bandwidth can be completed and data are transmitted to the system after the frequency spectrum scanning in the whole bandwidth is completed for 41 times according to the scanning bandwidth 1 Ghz.
A possible implementation manner of the front-end receiver is given below, which is used to perform the steps and corresponding technical effects of the spectrum monitoring method shown in the foregoing embodiments and the possible implementation manners. The front-end receiver includes: the device comprises a parameter receiving module, an FPGA processing module, a frequency mixing module, a down-conversion module and a Fourier transform module;
the parameter receiving module is used for receiving spectrum monitoring parameters issued by the front-end system or the back-end system;
the FPGA processing module combines the frequency spectrum monitoring parameters with the receiver characteristics of the front-end receiver to obtain the fast Fourier transform times;
the frequency mixing module is used for mixing the signal to be scanned from the outside with the radio frequency signal corresponding to the frequency spectrum monitoring parameter to obtain an intermediate frequency signal;
the down-conversion module is used for obtaining a baseband IQ signal through digital down-conversion processing of the intermediate frequency digital signal;
and the Fourier transform module is used for carrying out fast Fourier transform on the baseband IQ signal according to the fast Fourier transform times to obtain frequency spectrum data.
Optionally, the receiver characteristics include a front-end AD sampling rate, and the front-end receiver includes a fast fourier transform IP core for:
setting a working clock according to the AD sampling rate of the front end;
obtaining the number of fast Fourier transform points according to the scanning bandwidth;
and performing fast Fourier transform on the baseband IQ signal according to the working clock and the number of fast Fourier transform points and the number of fast Fourier transform times to obtain frequency spectrum data.
The preferred embodiment provides a computer device, which can implement the steps in any embodiment of the spectrum monitoring method provided in the embodiment of the present application, so that the beneficial effects of the FPGA-based spectrum monitoring method provided in the embodiment of the present application can be achieved, and detailed descriptions of the foregoing embodiments are omitted herein.
Those of ordinary skill in the art will appreciate that all or a portion of the steps of the various methods of the above embodiments may be performed by instructions, or by instructions controlling associated hardware, which may be stored in a computer-readable storage medium and loaded and executed by a processor. To this end, embodiments of the present application provide a storage medium having stored therein a plurality of instructions capable of being loaded by a processor to perform the steps of any of the FPGA-based spectrum monitoring methods provided by embodiments of the present application.
Wherein the storage medium may include: read Only Memory (ROM), random access Memory (RAM, random Access Memory), magnetic or optical disk, and the like.
The steps in any spectrum monitoring method embodiment provided in the embodiment of the present application may be executed by the instructions stored in the storage medium, so that the beneficial effects that any spectrum monitoring method provided in the embodiment of the present application may be achieved, which are detailed in the previous embodiment and are not repeated herein.
The application provides a frequency spectrum monitoring method based on an FPGA and a front-end receiver, which are applied to the front-end receiver, and are characterized in that firstly, frequency spectrum monitoring parameters issued by a front-end system or a back-end system are received, fast Fourier transform times are obtained by combining the characteristics of the receiver, signals needing to be scanned outside and radio frequency signals corresponding to the frequency spectrum monitoring parameters are mixed to obtain intermediate frequency signals, and then baseband IQ signals are obtained through digital down-conversion processing. And finally, performing fast Fourier transform on the baseband IQ signal according to the fast Fourier transform times, the frequency spectrum monitoring parameters and the receiver characteristics of the front-end receiver to obtain frequency spectrum data. The filter design is carried out by adopting a signal extraction mode in the digital down-conversion, so that the order of the filter is reduced, and the consumption of DSP resources and the power consumption of products in the FPGA are effectively reduced.
The foregoing description of the preferred embodiments of the present application is not intended to be limiting, but is intended to cover any and all modifications, equivalents, and alternatives falling within the spirit and principles of the present application.

Claims (8)

1. The utility model provides a frequency spectrum monitoring method based on FPGA, which is characterized in that the method is applied to front-end receiver and comprises the following steps:
receiving spectrum monitoring parameters issued by a front-end system or a back-end system;
combining the frequency spectrum monitoring parameters with the receiver characteristics of the front-end receiver to obtain fast Fourier transform times;
mixing an external signal to be scanned with a radio frequency signal corresponding to the frequency spectrum monitoring parameter to obtain an intermediate frequency signal;
the intermediate frequency digital signal is processed through digital down conversion to obtain a baseband IQ signal;
and performing fast Fourier transform on the baseband IQ signal according to the fast Fourier transform times, the frequency spectrum monitoring parameters and the receiver characteristics of the front-end receiver to obtain frequency spectrum data.
2. The method of spectrum monitoring of claim 1 wherein said spectrum monitoring parameters include a sweep bandwidth, said receiver characteristics include a present frequency hopping step, and the step of combining said spectrum monitoring parameters with said receiver characteristics of said front-end receiver to obtain a number of fast fourier transforms comprises:
performing frequency spectrum splicing on the local oscillator frequency hopping step by step;
and obtaining the fast Fourier transform times according to the frequency hopping stepping and scanning bandwidth of the frequency spectrum spliced.
3. The spectrum monitoring method as set forth in claim 2, wherein the spectrum monitoring parameter further includes a center frequency, and the step of mixing the signal to be scanned with the radio frequency signal corresponding to the spectrum monitoring parameter to obtain the intermediate frequency signal includes:
obtaining a frequency hopping frequency point according to the center frequency and the scanning bandwidth;
and mixing the signal to be scanned with the radio frequency signal corresponding to the frequency hopping frequency point to obtain an intermediate frequency signal.
4. The method for spectrum monitoring according to claim 1, wherein the receiver characteristic includes a front-end AD sampling rate, the front-end receiver includes a fast fourier transform IP core, and the step of performing fast fourier transform on the baseband IQ signal according to the number of fast fourier transforms, the spectrum monitoring parameter, and the receiver characteristic of the front-end receiver to obtain spectrum data includes:
setting a working clock by the fast Fourier transform IP core according to the front-end AD sampling rate;
obtaining the number of the fast Fourier transform points according to the scanning bandwidth by the fast Fourier transform IP core;
and performing fast Fourier transform on the baseband IQ signal by the fast Fourier transform IP core according to a working clock and the fast Fourier transform point number and the fast Fourier transform frequency to obtain frequency spectrum data.
5. A front-end receiver, the front-end receiver comprising:
the parameter receiving module is used for receiving spectrum monitoring parameters issued by the front-end system or the back-end system;
the FPGA processing module combines the frequency spectrum monitoring parameters with the receiver characteristics of the front-end receiver to obtain the fast Fourier transform times;
the frequency mixing module is used for mixing the signal to be scanned with the radio frequency signal corresponding to the frequency spectrum monitoring parameter to obtain an intermediate frequency signal;
the down-conversion module is used for obtaining a baseband IQ signal through digital down-conversion processing of the intermediate frequency digital signal;
and the Fourier transform module is used for carrying out fast Fourier transform on the baseband IQ signal according to the fast Fourier transform times to obtain frequency spectrum data.
6. The front-end receiver of claim 5, wherein the receiver characteristics comprise a front-end AD sampling rate, the front-end receiver comprising a fast fourier transform, IP, core for:
setting a working clock according to the front-end AD sampling rate;
obtaining the number of fast Fourier transform points according to the scanning bandwidth;
and performing fast Fourier transform on the baseband IQ signal according to the working clock and the fast Fourier transform point number and the fast Fourier transform times to obtain frequency spectrum data.
7. A computer device comprising a processor and a memory, the memory having stored therein a computer program that is loaded and executed by the processor to implement the spectrum monitoring method of any of claims 1-4.
8. A computer readable storage medium, characterized in that the storage medium has stored therein a computer program, which is loaded and executed by a processor to implement the spectrum monitoring method according to any of claims 1-4.
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