CN116087759B

CN116087759B - Method for inspecting conductive path of circuit board and circuit system

Info

Publication number: CN116087759B
Application number: CN202310383726.7A
Authority: CN
Inventors: 郭友才; 李久刚
Original assignee: Guangdong Hantang Intelligent Control Co ltd
Current assignee: Guangdong Hantang Intelligent Control Co ltd
Priority date: 2023-04-12
Filing date: 2023-04-12
Publication date: 2023-05-30
Anticipated expiration: 2043-04-12
Also published as: CN116087759A

Abstract

The invention relates to the technical field of measuring electric variables, in particular to a method and a circuit system for testing a conductive path of a circuit board, wherein the method comprises the following steps: acquiring a test electrical parameter sequence corresponding to each preset test point on a conductive path to be tested in a target circuit board through a sensor; carrying out Gaussian anomaly analysis processing, stability analysis processing and anomaly deviation analysis processing on the test electrical parameter sequence corresponding to each preset test point; determining a target abnormal index corresponding to a preset test point; carrying out chaotic abnormal distribution analysis processing on the test electrical parameter sequences corresponding to each preset test point on the conductive path to be tested; determining a path abnormality index corresponding to a conductive path to be inspected; and judging whether the conduction path to be checked is abnormal in conduction. The invention improves the accuracy of the inspection of the conductive path of the circuit board by carrying out electric digital data processing on the test electric parameter sequence, and is applied to the inspection of the conductive path of the circuit board.

Description

Method for inspecting conductive path of circuit board and circuit system

Technical Field

The invention relates to the technical field of measuring electric variables, in particular to a circuit board conductive path inspection method and a circuit system.

Background

Since the conductive path is an important component of the circuit board of the small furniture, whether the conductive path is abnormal or not often affects the use of the circuit board, and therefore, the inspection of the conductive path of the circuit board is important. The small furniture circuit board can be a circuit board installed on small furniture. Currently, when inspecting the conductive paths of a circuit board, the following methods are generally adopted: the circuit board conductive paths are inspected manually.

However, when the circuit board conductive path is inspected manually, whether the circuit board conductive path is abnormal in conduction is often judged by subjective observation of an inspector, and the judgment result is often inaccurate.

Disclosure of Invention

In order to solve the technical problem of low accuracy in checking the conductive paths of the circuit board, the invention provides a method for checking the conductive paths of the circuit board and a circuit system.

In a first aspect, the present invention provides a method for inspecting a conductive path of a circuit board, the method comprising:

Acquiring a test electrical parameter sequence corresponding to each preset test point on a conductive path to be tested in a target circuit board;

carrying out Gaussian anomaly analysis processing on the test electrical parameter sequence corresponding to each preset test point to obtain a preliminary anomaly index corresponding to the preset test point;

performing chaotic abnormal distribution analysis processing on the test electrical parameter sequences corresponding to each preset test point on the conductive path to be tested to obtain a path chaotic index corresponding to the conductive path to be tested;

performing stability analysis processing on the test electrical parameter sequence corresponding to each preset test point to obtain a stability index corresponding to the preset test point;

according to the pre-acquired normal electrical parameter sequences, carrying out abnormal deviation analysis processing on the test electrical parameter sequences corresponding to each preset test point to obtain abnormal deviation indexes corresponding to the preset test points;

determining a target abnormal index corresponding to each preset test point according to the preliminary abnormal index, the stability index and the abnormal deviation index corresponding to each preset test point;

determining a path abnormality index corresponding to the conductive path to be inspected according to the path confusion index and the target abnormality index corresponding to each preset test point on the conductive path to be inspected;

And judging whether the conduction path to be checked is abnormal in conduction according to the path abnormality index.

Further, the performing gaussian anomaly analysis processing on the test electrical parameter sequence corresponding to each preset test point to obtain a preliminary anomaly index corresponding to the preset test point includes:

constructing a Gaussian mixture model corresponding to the preset test point according to the test electric parameter sequence corresponding to the preset test point to obtain a sub-Gaussian model set corresponding to the preset test point;

for each sub-Gaussian model in a sub-Gaussian model set, determining a difference value between each test electric parameter in a test electric parameter sequence and a mean value of the sub-Gaussian model as a first difference value, and obtaining a one-dimensional vector corresponding to the sub-Gaussian model;

determining the product of the transpose of the one-dimensional vector and the one-dimensional vector corresponding to each sub-Gaussian model as a first index corresponding to the sub-Gaussian model;

and determining the preliminary abnormal index corresponding to the preset test point according to the first index and the variance corresponding to each sub-Gaussian model in the sub-Gaussian model set.

Further, the determining, according to the first index and the variance corresponding to each sub-gaussian model in the sub-gaussian model set, the preliminary anomaly index corresponding to the preset test point includes:

Performing negative correlation mapping on the first index corresponding to each sub-Gaussian model to obtain a second index corresponding to the sub-Gaussian model;

performing negative correlation mapping on the variance corresponding to each sub-Gaussian model to obtain a third index corresponding to the sub-Gaussian model;

determining the product of the second index and the third index corresponding to each sub-Gaussian model as a fourth index corresponding to the sub-Gaussian model;

determining the accumulated sum of fourth indexes corresponding to all the sub-Gaussian models in the sub-Gaussian model set as a fifth index;

and carrying out negative correlation mapping on the fifth index to obtain a preliminary abnormal index corresponding to the preset test point.

Further, the performing chaotic anomaly distribution analysis processing on the test electrical parameter sequences corresponding to each preset test point on the to-be-detected conductive path to obtain a path chaotic indicator corresponding to the to-be-detected conductive path, including:

combining the test electric parameters at the same position in the test electric parameter sequence corresponding to each preset test point on the conductive path to be tested into a test electric parameter set to obtain a test electric parameter set;

for each test electric parameter set in the test electric parameter set, based on the sequence of the test electric parameters in the preset test electric parameter set, combining each adjacent preset number of test electric parameters in the test electric parameter set into a sub-test electric parameter set to obtain a sub-test electric parameter set corresponding to the test electric parameter set;

Determining a target frequency corresponding to each sub-test electrical parameter set in the sub-test electrical parameter set corresponding to each test electrical parameter set;

determining a distribution chaotic entropy corresponding to each test electric parameter set according to target frequencies corresponding to various sub-test electric parameter sets in a sub-test electric parameter set corresponding to each test electric parameter set;

and determining the accumulated sum of the distribution chaotic entropies corresponding to each test electric parameter set in the test electric parameter set as a path chaotic index.

Further, the performing stability analysis processing on the test electrical parameter sequence corresponding to each preset test point to obtain a stability index corresponding to the preset test point includes:

for each test electric parameter in the test electric parameter sequence corresponding to the preset test point, squaring the sum of squares of all the test electric parameters in a preset window corresponding to the test electric parameter to obtain an electric parameter representative value corresponding to the test electric parameter;

for each test electric parameter in the test electric parameter sequence corresponding to the preset test point, screening one test electric parameter adjacent to the test electric parameter from the test electric parameter sequence as a reference electric parameter corresponding to the test electric parameter, and determining an electric parameter representative value corresponding to the reference electric parameter as a reference representative value corresponding to the test electric parameter;

Determining an absolute value of a difference value between an electrical parameter representative value corresponding to each test electrical parameter and a reference representative value as a first difference index corresponding to the test electrical parameter;

performing negative correlation mapping on the first difference index corresponding to each test electrical parameter to obtain a first stability index corresponding to the test electrical parameter;

and determining the accumulated sum of the first stability indexes corresponding to the test electric parameters in the test electric parameter sequence corresponding to the preset test point as the stability index corresponding to the preset test point.

Further, according to the pre-acquired normal electrical parameter sequence, performing an abnormal deviation analysis processing on the test electrical parameter sequence corresponding to each preset test point to obtain an abnormal deviation index corresponding to the preset test point, including:

constructing a Gaussian model according to the normal electrical parameter sequence to serve as a normal Gaussian model;

determining probability density of each test electric parameter in the test electric parameter sequence corresponding to the preset test point under the normal Gaussian model, and taking the probability density as normal probability corresponding to the test electric parameter;

performing negative correlation mapping on the normal probability corresponding to each test electrical parameter to obtain a deviation probability factor corresponding to the test electrical parameter;

And determining the accumulated sum of deviation probability factors corresponding to all the test electric parameters in the test electric parameter sequence corresponding to the preset test point as an abnormal deviation index corresponding to the preset test point.

Further, the determining the target abnormality index corresponding to the preset test point according to the preliminary abnormality index, the stability index and the abnormality deviation index corresponding to each preset test point includes:

performing negative correlation mapping on the stability index corresponding to the preset test point to obtain a change degree index corresponding to the preset test point;

and determining the product of the change degree index, the preliminary abnormality index and the abnormality deviation index corresponding to the preset test point as a target abnormality index corresponding to the preset test point.

Further, the determining, according to the path confusion index and the target abnormality index corresponding to each preset test point on the conductive path to be tested, the path abnormality index corresponding to the conductive path to be tested includes:

determining the accumulated sum of target abnormal indexes corresponding to all preset test points on the conductive path to be tested as a first abnormal index;

determining the product of the first abnormal index and the path confusion index as a second abnormal index;

Normalizing the second abnormal index to obtain the path abnormal index.

Further, the determining whether the conductive path to be inspected is abnormal in conductivity according to the path abnormality index includes:

when the path abnormality index is larger than a preset abnormality threshold, judging that the conduction path to be inspected is abnormal in conduction;

and when the path abnormality index is smaller than or equal to the abnormality threshold, judging that the conduction of the conduction path to be tested is normal.

In a second aspect, the present invention provides a circuit board conductive path inspection system comprising a processor and a memory, said processor being configured to process instructions stored in said memory to implement a circuit board conductive path inspection method as described above.

The invention has the following beneficial effects:

according to the method for inspecting the conductive path of the circuit board, provided by the invention, through carrying out electric digital data processing on the test electric parameter sequence, the technical problem that the accuracy of inspecting the conductive path of the circuit board is low is solved, and the accuracy of inspecting the conductive path of the circuit board is improved. Firstly, if the conduction of the conduction path to be tested is abnormal, the change rule of the test electric parameters at the preset test point is often changed, so that the test electric parameter sequence corresponding to the preset test point is obtained, and the change rule of the test electric parameters corresponding to the preset test point can be analyzed conveniently. Then, if the preset test point is abnormal, the conductive path to be tested is often abnormal in conduction, so that preliminary abnormal indexes corresponding to the preset test point are determined, the abnormal condition of the preset test point can be judged in a preliminary mode, and whether the conductive path to be tested is abnormal in conduction can be judged in a convenient mode. Then, because whether the conduction path to be tested is conductive or not is related to each preset test point, the chaotic abnormal distribution analysis processing is carried out on the test electrical parameter sequence corresponding to each preset test point, so that the overall abnormal condition of the conduction path to be tested can be conveniently judged. If the preset test point is normal, the test electrical parameters at the preset test point are stable, so that stability analysis processing is carried out on the test electrical parameter sequence corresponding to the preset test point, and whether the preset test point is abnormal or not can be judged conveniently. Furthermore, if the preset test point is abnormal, the abnormal deviation index corresponding to the preset test point is often larger, so that the abnormal deviation analysis processing is performed on the test electrical parameter sequence corresponding to the preset test point, and the subsequent judgment of whether the preset test point is abnormal can be facilitated. And then, comprehensively considering the preliminary abnormal index, the stability index and the abnormal deviation index corresponding to the preset test point to determine the target abnormal index, so that the accuracy of determining the target abnormal index can be improved. And then, comprehensively considering the path confusion indexes and the target abnormality indexes corresponding to the preset test points to determine the path abnormality indexes, so that the accuracy of determining the path abnormality indexes can be improved. Therefore, the invention realizes the quantification of the path abnormality index corresponding to the conductive path to be detected, so that the subsequent judgment on whether the conductive path to be detected is abnormal in conductivity can be objectively compared according to the path abnormality index. Therefore, compared with the manual way of checking the conductive path of the circuit board, the invention quantifies various indexes related to whether the conductive path to be checked is abnormal in conduction or not, thereby reducing the artificial subjective influence to a certain extent and further improving the accuracy of checking the conductive path to be checked.

Drawings

In order to more clearly illustrate the embodiments of the invention or the technical solutions and advantages of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.

Fig. 1 is a flowchart of a method for inspecting a conductive path of a circuit board according to the present invention.

Detailed Description

In order to further describe the technical means and effects adopted by the present invention to achieve the preset purpose, the following detailed description is given below of the specific implementation, structure, features and effects of the technical solution according to the present invention with reference to the accompanying drawings and preferred embodiments. In the following description, different "one embodiment" or "another embodiment" means that the embodiments are not necessarily the same. Furthermore, the particular features, structures, or characteristics of one or more embodiments may be combined in any suitable manner.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

The invention provides a method for inspecting a conductive path of a circuit board, which comprises the following steps:

carrying out chaotic anomaly distribution analysis processing on the test electrical parameter sequences corresponding to each preset test point on the conductive path to be tested to obtain a path chaotic index corresponding to the conductive path to be tested;

The following detailed development of each step is performed:

referring to fig. 1, a flow of some embodiments of a method of inspecting a conductive path of a circuit board of the present invention is shown. The method for inspecting the conductive path of the circuit board comprises the following steps:

step S1, obtaining a test electrical parameter sequence corresponding to each preset test point on a conductive path to be tested in a target circuit board.

In some embodiments, a sequence of test electrical parameters corresponding to each preset test point on the conductive path to be inspected within the target circuit board may be obtained.

The target circuit board can be a small furniture circuit board for conducting path conducting condition detection. The small furniture circuit board may be a circuit board mounted on a small furniture. The conductive path to be inspected may be a conductive path within the target circuit board to be inspected for electrical conductivity. The conduction condition may be a condition of whether or not conduction is abnormal. The preset test point may be a position point preset on the conductive path to be inspected for collecting the test electrical parameter. For example, if there is a component on the conductive path to be inspected, the position of the component may be determined as the position of the preset test point. The test electrical parameter may be collected by a test electrical parameter sensor. The test electrical parameter sensor may be a sensor mounted at a predetermined test point for collecting test electrical parameters at the predetermined test point. For example, if the test electrical parameter is current, the test electrical parameter sensor may be a current sensor. The number of preset test points on the conductive path to be inspected may be a preset number. For example, the number of predetermined test points on the conductive path to be inspected may be greater than 2. The test electrical parameter may be a relatively stable electrical parameter, i.e. if the conductive path to be inspected is normally conductive, the test electrical parameter may remain relatively stable. For example, if there are elements on the conductive path to be inspected and the individual elements present are connected in series, the test electrical parameter may be current. If there are elements on the conductive path to be inspected and the individual elements present are connected in parallel, the test electrical parameter may be voltage. If no element is present on the conductive path to be inspected, the test electrical parameter may be voltage or current. The test electrical parameters in the test electrical parameter sequence corresponding to the preset test point may be test electrical parameters at different moments collected at the preset test point. The time interval between any two adjacent test electrical parameters in the sequence of test electrical parameters may be the same.

It should be noted that, if the conduction of the conductive path to be inspected is abnormal, the change rule of the test electrical parameter at the preset test point is often changed, so that the test electrical parameter sequence corresponding to the preset test point is obtained, which is convenient for subsequent analysis of the change rule of the test electrical parameter corresponding to the preset test point. Secondly, since the test electrical parameter is a selected relatively stable electrical parameter, if the conduction path to be tested is normal, the degree of change of the test electrical parameter at the preset test point is often small.

As an example, if the test electrical parameter is a current, a current may be collected by a current sensor installed at a preset test point at intervals of a preset time period, and the collected preset number of currents form a current sequence, where the formed current sequence is the test electrical parameter sequence corresponding to the preset test point. The preset duration may be a preset duration. For example, the preset time period may be 0.5 seconds. The preset number may be a preset number. For example, the preset number may be 600.

And S2, carrying out Gaussian anomaly analysis processing on the test electrical parameter sequences corresponding to each preset test point to obtain a preliminary anomaly index corresponding to the preset test point.

In some embodiments, a gaussian anomaly analysis process may be performed on the test electrical parameter sequence corresponding to each preset test point, so as to obtain a preliminary anomaly index corresponding to the preset test point.

The preliminary abnormality index can represent an abnormality of a preset test point.

It should be noted that if the preset test point is abnormal, the conductive path to be tested is often abnormal in conduction, so that the preliminary abnormal index corresponding to the preset test point is determined, the abnormal condition of the preset test point can be judged in a preliminary manner, and whether the conductive path to be tested is abnormal in conduction can be judged in a convenient manner.

As an example, this step may include the steps of:

firstly, constructing a Gaussian mixture model corresponding to the preset test point according to the test electrical parameter sequence corresponding to the preset test point, and obtaining a sub-Gaussian model set corresponding to the preset test point.

The sub-gaussian model in the sub-gaussian model set may be a sub-gaussian model in a gaussian mixture model.

For example, a gaussian mixture model may be constructed according to the test electrical parameters in the test electrical parameter sequence corresponding to the preset test point, and the gaussian mixture model is determined as the gaussian mixture model corresponding to the preset test point.

And secondly, for each sub-Gaussian model in the sub-Gaussian model set, determining a difference value between each test electric parameter in the test electric parameter sequence and the mean value of the sub-Gaussian model as a first difference value, and obtaining a one-dimensional vector corresponding to the sub-Gaussian model.

Wherein the one-dimensional vector may be a row vector. The first difference in the one-dimensional vector may correspond one-to-one with the test electrical parameter in the sequence of test electrical parameters.

And thirdly, determining the product of the transpose of the one-dimensional vector and the one-dimensional vector corresponding to each sub-Gaussian model as a first index corresponding to the sub-Gaussian model.

And fourthly, determining the preliminary abnormal index corresponding to the preset test point according to the first index and the variance corresponding to each sub-Gaussian model in the sub-Gaussian model set.

For example, according to the first index and variance corresponding to each sub-gaussian model in the sub-gaussian model set, determining the preliminary anomaly index corresponding to the preset test point may include the following sub-steps:

and a first sub-step of determining the product of the first index and the variance corresponding to each sub-Gaussian model as a sixth index corresponding to the sub-Gaussian model.

And a second substep, namely determining the accumulated sum of the sixth indexes corresponding to all the sub-Gaussian models in the sub-Gaussian model set as the preliminary abnormal indexes corresponding to the preset test points.

For another example, according to the first index and variance corresponding to each sub-gaussian model in the sub-gaussian model set, determining the preliminary anomaly index corresponding to the preset test point may include the following sub-steps:

and a first sub-step of carrying out negative correlation mapping on the first index corresponding to each sub-Gaussian model to obtain a second index corresponding to the sub-Gaussian model.

And a second sub-step of carrying out negative correlation mapping on the variance corresponding to each sub-Gaussian model to obtain a third index corresponding to the sub-Gaussian model.

And a third sub-step of determining the product of the second index and the third index corresponding to each sub-Gaussian model as a fourth index corresponding to the sub-Gaussian model.

And a fourth substep, namely determining the accumulated sum of the fourth indexes corresponding to all the sub-Gaussian models in the sub-Gaussian model set as a fifth index.

And a fifth sub-step, performing negative correlation mapping on the fifth index to obtain a preliminary abnormal index corresponding to the preset test point.

For example, the formula corresponding to the preliminary abnormality index corresponding to the preset test point may be determined as follows:

wherein, the liquid crystal display device comprises a liquid crystal display device,

is a preliminary abnormal index corresponding to the ith preset test point on the conductive path to be tested.

Is the t-th test electrical parameter in the test electrical parameter sequence corresponding to the i-th preset test point.

Is the mean value of the v th sub-Gaussian model in the sub-Gaussian model set corresponding to the i-th preset test point.

Is the first difference between the 1 st test electric parameter and the v sub-Gaussian model mean value in the test electric parameter sequence corresponding to the i preset test point.

Is the first difference between the 2 nd test electric parameter and the v sub-Gaussian model mean value in the test electric parameter sequence corresponding to the i preset test point.

Is the first difference between the t test electric parameter corresponding to the i preset test point and the mean value of the v sub-Gaussian model.

Is the ith in the test electrical parameter sequence corresponding to the ith preset test point

A first difference between the test electrical parameter and the mean of the v-th sub-gaussian model.

Is the number of the test electrical parameters in the test electrical parameter sequence corresponding to the i-th preset test point.

Is a one-dimensional vector corresponding to the v th sub-Gaussian model in the sub-Gaussian model set corresponding to the i preset test point.

Is the transpose of the one-dimensional vector corresponding to the v th sub-Gaussian model in the sub-Gaussian model set corresponding to the i-th preset test point.

Is a first index corresponding to the v th sub-Gaussian model in the sub-Gaussian model set corresponding to the i-th preset test point.

Is the number of sub-Gaussian models in the sub-Gaussian model set corresponding to the i-th preset test point.

Is the circumference, i.e. the arc of 180 °.

Is the variance of the v th sub-Gaussian model in the sub-Gaussian model set corresponding to the i th preset test point.

Is to prevent the denominator from being 0, and a value greater than 0 is preset, such as

May be 0.05.

Is of natural constant

To the power.

Is a second index corresponding to the v th sub-Gaussian model in the sub-Gaussian model set corresponding to the i-th preset test point.

Can realize the pair of

Is a negative correlation mapping of (1).

Is a third index corresponding to the v th sub-Gaussian model in the sub-Gaussian model set corresponding to the i-th preset test point.

Can realize the pair of

Is a negative correlation mapping of (1).

Is based on natural constant

Logarithmic (log).

Is a fourth index corresponding to the v th sub-Gaussian model in the sub-Gaussian model set corresponding to the i preset test point.

Is a fifth index corresponding to a v-th sub-Gaussian model in the sub-Gaussian model set corresponding to the i-th preset test point.

Can realize the pair of

Is a negative correlation mapping of (1). i is the serial number of the preset test point on the conductive path to be tested. t is the serial number of the test electric parameter in the test electric parameter sequence corresponding to the ith preset test point. v is the ith preset measurement And the sequence numbers of the sub-Gaussian models in the sub-Gaussian model set corresponding to the test points.

It should be noted that, when the v th sub-Gaussian model corresponds to the first index

The smaller the test parameters, the more consistent the test electrical parameters in the test electrical parameter sequence corresponding to the ith preset test point are, and the more likely the ith preset test point is not abnormal. And because the first index corresponding to the v th sub-Gaussian model is equal to the product of the transpose of the one-dimensional vector corresponding to the v th sub-Gaussian model and the one-dimensional vector, the first index corresponding to the v th sub-Gaussian model

The change of the test electric parameters in the test electric parameter sequence corresponding to the ith preset test point can be amplified, so that the accuracy of judging whether the ith preset test point is abnormal or not can be improved. Variance of the sub-Gaussian model when v

When the test electric parameter sequence is larger, the change of the test electric parameter in the test electric parameter sequence corresponding to the ith preset test point is larger, and the ith preset test point is more likely to be abnormal. Thus, the preliminary abnormality index corresponding to the ith preset test point

The larger the i-th preset test point is, the more likely the abnormality occurs in the time period corresponding to the test electric parameter sequence.

And S3, carrying out chaotic abnormal distribution analysis processing on the test electrical parameter sequences corresponding to each preset test point on the conductive path to be tested, and obtaining a path chaotic index corresponding to the conductive path to be tested.

In some embodiments, the electrical parameter sequence corresponding to each preset test point on the conductive path to be tested may be subjected to chaotic abnormal distribution analysis processing, so as to obtain a path chaotic indicator corresponding to the conductive path to be tested.

It should be noted that, because whether the conduction path to be tested is abnormal is related to each preset test point, the electrical parameter sequence corresponding to each preset test point is subjected to chaotic abnormal distribution analysis processing, so that the overall abnormal condition of the conduction path to be tested can be conveniently judged.

As an example, this step may include the steps of:

and combining the test electrical parameters at the same position in the test electrical parameter sequence corresponding to each preset test point on the conductive path to be tested into a test electrical parameter set to obtain a test electrical parameter set.

The test electrical parameter set may be a set of test electrical parameters at respective preset test points acquired at the same time. The test electrical parameters in the test electrical parameter set may correspond one-to-one with preset test points on the conductive path to be inspected. The test electrical parameters at the same position in the test electrical parameter sequence corresponding to each preset test point can be test electrical parameters collected at the same moment. The same positions in the test electrical parameter sequence corresponding to each preset test point can be the same serial numbers.

For example, the t-th test electrical parameter in the test electrical parameter sequence corresponding to each preset test point on the conductive path to be tested may be combined into the test electrical parameter set.

And a second step of combining each adjacent preset number of the test electric parameters in the test electric parameter sets into sub-test electric parameter sets based on the sequence of the test electric parameters in the preset test electric parameter sets, so as to obtain sub-test electric parameter sets corresponding to the test electric parameter sets.

The preset number may be a preset number. The preset number may be less than the number of preset test points on the conductive path to be inspected. For example, the preset number may be 2. The ordering of the test electrical parameters in the set of test electrical parameters may be a pre-set ordering. For example, the preset ordering may be a random ordering. For example, the test electrical parameters in the set of test electrical parameters may be randomly ordered.

And thirdly, determining the target frequency corresponding to each sub-test electrical parameter set in the sub-test electrical parameter set corresponding to each test electrical parameter set.

Wherein the same set of subtest electrical parameters may be considered as the same kind of set of subtest electrical parameters.

For example, the target frequency for a sub-test electrical parameter set may be the frequency at which the sub-test electrical parameter set appears in the sub-test electrical parameter set.

And fourthly, determining the distribution chaotic entropy corresponding to each test electric parameter group according to the target frequencies corresponding to the sub-test electric parameter groups in the sub-test electric parameter group set corresponding to each test electric parameter group.

And fifthly, determining the accumulated sum of the distribution chaotic entropies corresponding to all the test electric parameter sets in the test electric parameter set as a path chaotic index.

For example, the formula for determining the correspondence of the path confusion index may be:

where a is a path confusion index. N is the number of test electrical parameter sets in the set of test electrical parameter sets.

Is the distribution chaotic entropy corresponding to the p-th test electric parameter set in the test electric parameter set.

The number of the sub-test electric parameter sets in the sub-test electric parameter set corresponding to the p-th test electric parameter set.

Is the target frequency corresponding to the h seed test electrical parameter set in the sub test electrical parameter set corresponding to the p-th test electrical parameter set.

Is based on natural constant

Logarithmic (log). p is the sequence number of the test electrical parameter set in the test electrical parameter set. h is the type number of the sub-test electrical parameter set in the sub-test electrical parameter set corresponding to the p-th test electrical parameter set.

It should be noted that, since the test electrical parameter set is a set made up of test electrical parameters at respective preset test points collected at the same time. So when the p-th test electric parameter group corresponds to the distributed chaotic entropy

The larger the test electric parameters in the p-th test electric parameter set are, the more chaotic the test electric parameters at each preset test point collected at the same moment are, and the more likely the conductive path to be tested is to have abnormal conduction at the moment. Thus, the larger the path confusion index a, the more likely the conductive path to be inspected is to have abnormal conductivity in the time period corresponding to the test electrical parameter sequence.

And S4, performing stability analysis processing on the test electrical parameter sequences corresponding to each preset test point to obtain a stability index corresponding to the preset test point.

In some embodiments, stability analysis processing may be performed on the electrical parameter sequence corresponding to each preset test point, so as to obtain a stability index corresponding to the preset test point.

It should be noted that, if the preset test point is normal, the test electrical parameter at the preset test point is often stable, so that the stability analysis processing is performed on the test electrical parameter sequence corresponding to the preset test point, so that it is convenient to determine whether the preset test point is abnormal or not.

As an example, this step may include the steps of:

the first step, for each test electric parameter in the test electric parameter sequence corresponding to the preset test point, the sum of squares of each test electric parameter in the preset window corresponding to the test electric parameter is squared to obtain an electric parameter representative value corresponding to the test electric parameter.

The preset window may be a one-dimensional window of a preset length. The preset length may be a preset length. The predetermined length corresponding value may be less than the number of electrical parameters tested in the sequence of electrical parameters tested. For example, the preset length may be 10. The test electrical parameter may be located at the center of a predetermined window corresponding to the test electrical parameter. For example, if the preset length is 3, the test electrical parameters in the preset window corresponding to the 3 rd test electrical parameter in the test electrical parameter sequence may include: the 2 nd test electrical parameter, the 3 rd test electrical parameter and the 4 th test electrical parameter in the sequence of test electrical parameters.

And a second step of screening out a test electric parameter adjacent to the test electric parameter from the test electric parameter sequence for each test electric parameter in the test electric parameter sequence corresponding to the preset test point, taking the test electric parameter as a reference electric parameter corresponding to the test electric parameter, and determining an electric parameter representative value corresponding to the reference electric parameter as a reference representative value corresponding to the test electric parameter.

For example, if there are only 1 test electrical parameters adjacent to a certain test electrical parameter, such as the first test electrical parameter in the test electrical parameter sequence, the test electrical parameter adjacent to the test electrical parameter is the reference electrical parameter corresponding to the test electrical parameter. If there are 2 test electric parameters adjacent to a certain test electric parameter, for example, the test electric parameter located in the middle in the test electric parameter sequence, the previous test electric parameter of the test electric parameter is the reference electric parameter corresponding to the test electric parameter. For example, the reference electrical parameter corresponding to the 2 nd test electrical parameter in the test electrical parameter sequence may be the 3 rd test electrical parameter in the test electrical parameter sequence.

And thirdly, determining the absolute value of the difference value between the electric parameter representative value corresponding to each test electric parameter and the reference representative value as a first difference index corresponding to the test electric parameter.

And fourthly, performing negative correlation mapping on the first difference index corresponding to each test electrical parameter to obtain a first stability index corresponding to the test electrical parameter.

And fifthly, determining the accumulated sum of the first stability indexes corresponding to the test electric parameters in the test electric parameter sequence corresponding to the preset test point as the stability index corresponding to the preset test point.

For example, the formula corresponding to the stability index corresponding to the predetermined test point may be:

is the stability index corresponding to the ith preset test point on the conductive path to be tested.

Is a first stable index corresponding to the t-th test electric parameter in the test electric parameter sequence corresponding to the i-th preset test point.

Is the electrical parameter representative value corresponding to the t-th test electrical parameter in the test electrical parameter sequence corresponding to the i-th preset test point.

Is the reference representative value corresponding to the t-th test electric parameter in the test electric parameter sequence corresponding to the i-th preset test point.

Is to prevent the denominator from being 0, a factor greater than 0 is preset, e.g

May be 0.02.

Is the 1 st test electrical parameter in the preset window corresponding to the t test electrical parameter in the test electrical parameter sequence corresponding to the i preset test point.

Is the 2 nd test electrical parameter in the preset window corresponding to the t test electrical parameter in the test electrical parameter sequence corresponding to the i preset test point.

Is the ith in the preset window corresponding to the t test electric parameter in the test electric parameter sequence corresponding to the i preset test point

And testing the electrical parameters.

Is the number of the test electrical parameters in the preset window corresponding to the t test electrical parameter in the test electrical parameter sequence corresponding to the i preset test point.

Is a first difference index corresponding to the t-th test electric parameter in the test electric parameter sequence corresponding to the i-th preset test point. i is the serial number of the preset test point on the conductive path to be tested. t is the serial number of the test electric parameter in the test electric parameter sequence corresponding to the ith preset test point.

Can realize the pair of

Is a negative correlation mapping of (1).

When the following is performed

The smaller the test parameters, the more similar the test parameters in the preset window corresponding to the t test parameters and the test parameters in the preset window corresponding to the reference parameters, the more the test parameters areThe closer the number is to the trend of the reference electrical parameter. Thus, when the i-th preset test point corresponds to the stability index

When the test parameters are larger, the change trend of each test electrical parameter in the test electrical parameter sequence corresponding to the ith preset test point is more similar, the test electrical parameters in the test electrical parameter sequence corresponding to the ith preset test point are more stable, and the test electrical parameter in the test electrical parameter sequence corresponding to the ith preset test point is more likely to be abnormal.

And S5, carrying out abnormal deviation analysis processing on the test electrical parameter sequence corresponding to each preset test point according to the pre-acquired normal electrical parameter sequence to obtain an abnormal deviation index corresponding to the preset test point.

In some embodiments, according to the pre-acquired normal electrical parameter sequence, performing an abnormal deviation analysis process on the test electrical parameter sequence corresponding to each preset test point to obtain an abnormal deviation index corresponding to the preset test point.

The normal electrical parameter sequence may be a test electrical parameter sequence corresponding to a test point on a normal conductive path in the normal circuit board. The normal circuit board may be the same specification type of circuit board as the target circuit board. The normal conductive path may be the same path as the conductive path to be inspected.

It should be noted that, because the test electrical parameter sequences corresponding to the test points on the normal conductive path in the normal circuit board are often similar, the normal electrical parameter sequence may be a test electrical parameter sequence corresponding to any one test point on the normal conductive path. If the preset test point is abnormal, the abnormal deviation index corresponding to the preset test point is often larger, so that the abnormal deviation analysis processing is performed on the test electrical parameter sequence corresponding to the preset test point, and the subsequent judgment of whether the preset test point is abnormal or not can be facilitated.

As an example, this step may include the steps of:

and firstly, constructing a Gaussian model according to the normal electrical parameter sequence, and taking the Gaussian model as a normal Gaussian model.

And secondly, determining the probability density of each test electric parameter in the test electric parameter sequence corresponding to the preset test point under the normal Gaussian model, and taking the probability density as the normal probability corresponding to the test electric parameter.

And thirdly, performing negative correlation mapping on the normal probability corresponding to each test electrical parameter to obtain a deviation probability factor corresponding to the test electrical parameter.

For example, a difference between the preset value and the normal probability corresponding to each test electrical parameter may be determined as the deviation probability factor corresponding to the test electrical parameter. The preset value may be a preset value greater than or equal to 1. For example, the preset value may be 1. When the preset value is 1, the deviation probability factor may characterize the deviation probability. The difference value of the normal probability corresponding to the preset numerical value and the test electrical parameter can realize the negative correlation mapping of the normal probability corresponding to the test electrical parameter.

And fourthly, determining the accumulated sum of deviation probability factors corresponding to all the test electric parameters in the test electric parameter sequence corresponding to the preset test point as an abnormal deviation index corresponding to the preset test point.

For example, the formula corresponding to the abnormal deviation index corresponding to the predetermined test point may be determined as follows:

is an abnormal deviation index corresponding to the ith preset test point on the conductive path to be tested.

Is a preset value, for example,

。

is the deviation probability factor corresponding to the t test electric parameter in the test electric parameter sequence corresponding to the i preset test point.

Is the normal probability corresponding to the t-th test electric parameter in the test electric parameter sequence corresponding to the i-th preset test point. i is the serial number of the preset test point on the conductive path to be tested. t is the serial number of the test electric parameter in the test electric parameter sequence corresponding to the ith preset test point.

It should be noted that the normal probability corresponding to the t-th test electrical parameter

The probability that the t-th test electrical parameter is a normal test electrical parameter may be characterized. When (when)

In the time-course of which the first and second contact surfaces,

the probability that the t-th test electrical parameter is an abnormal test electrical parameter may be characterized. Thus, when the i-th preset test point corresponds to the abnormal deviation index

And S6, determining a target abnormality index corresponding to each preset test point according to the preliminary abnormality index, the stability index and the abnormality deviation index corresponding to each preset test point.

In some embodiments, the target abnormality index corresponding to each preset test point may be determined according to the preliminary abnormality index, the stability index, and the abnormality deviation index corresponding to each preset test point.

It should be noted that, the target abnormality index corresponding to the preset test point may represent an abnormality of the preset test point. The preliminary abnormal index, the stability index and the abnormal deviation index corresponding to the preset test point are comprehensively considered to determine the target abnormal index, so that the accuracy of determining the target abnormal index can be improved.

As an example, this step may include the steps of:

and performing negative correlation mapping on the stability index corresponding to the preset test point to obtain a change degree index corresponding to the preset test point.

And secondly, determining the product of the change degree index, the preliminary abnormality index and the abnormality deviation index corresponding to the preset test point as a target abnormality index corresponding to the preset test point.

For example, the formula corresponding to the target abnormality index corresponding to the predetermined test point may be determined as follows:

is a target abnormal index corresponding to the ith preset test point on the conductive path to be tested.

May be 0.05.

Is the change index corresponding to the ith preset test point on the conductive path to be tested.

Can realize the pair of

Is a negative correlation mapping of (1).

Is an abnormal deviation index corresponding to the ith preset test point on the conductive path to be tested. i is the serial number of the preset test point on the conductive path to be tested.

It should be noted that, because the i-th preset test point corresponds to the preliminary abnormal index

The larger the i-th preset test point is, the more likely the abnormality occurs in the time period corresponding to the test electric parameter sequence. Stability index corresponding to ith preset test point

The larger the i-th preset test point is, the more likely that no abnormality occurs in the time period corresponding to the test electric parameter sequence is indicated. Abnormal deviation index corresponding to ith preset test point

The larger the i-th preset test point is, the more likely the abnormality occurs in the time period corresponding to the test electric parameter sequence. Thus, the target abnormality index corresponding to the ith preset test point

And S7, determining the path abnormality index corresponding to the conductive path to be inspected according to the path confusion index and the target abnormality index corresponding to each preset test point on the conductive path to be inspected.

In some embodiments, the path abnormality index corresponding to the conductive path to be inspected may be determined according to the path confusion index and the target abnormality index corresponding to each preset test point on the conductive path to be inspected.

It should be noted that, comprehensively considering the path confusion index and the target abnormality index corresponding to each preset test point, determining the path abnormality index can improve the accuracy of determining the path abnormality index.

As an example, this step may include the steps of:

and determining the accumulated sum of the target abnormal indexes corresponding to the preset test points on the conductive path to be tested as a first abnormal index.

And a second step of determining a product of the first abnormality index and the route confusion index as a second abnormality index.

For example, the formula for determining that the second abnormality index corresponds to may be:

Wherein B is a second abnormality index. A is a path confusion index.

Is a target abnormal index corresponding to the ith preset test point on the conductive path to be tested. n is the number of preset test points on the conductive path to be inspected. i is the serial number of the preset test point on the conductive path to be tested.

It should be noted that, because the target abnormality index corresponding to the ith preset test point

The larger the i-th preset test point is, the more likely the abnormality occurs in the time period corresponding to the test electric parameter sequence. So when

The larger the size, the more often the individual presets on the conductive path to be inspected are accounted forThe more likely that the test point is abnormal in the time period corresponding to the test electrical parameter sequence, the more likely that the conductive path to be tested is abnormal in the time period corresponding to the test electrical parameter sequence. And the larger the path confusion index A is, the more likely the conductive abnormality of the conductive path to be detected is in the time period corresponding to the test electrical parameter sequence is, so the larger the second abnormality index B is, the more likely the conductive abnormality of the conductive path to be detected is in the time period corresponding to the test electrical parameter sequence is.

And thirdly, normalizing the second abnormal index to obtain the path abnormal index.

And S8, judging whether the conduction path to be checked is abnormal in conduction according to the path abnormality index.

In some embodiments, whether the conductive path to be inspected is abnormal in conductivity may be determined according to the path abnormality index.

It should be noted that, since the path abnormality index quantifies the abnormality of the conductive path to be inspected, it is possible to judge whether the conductive path to be inspected is abnormal in conduction or not relatively objectively according to the path abnormality index.

As an example, this step may include the steps of:

and a first step of judging that the conduction path to be inspected is abnormal in conduction when the path abnormality index is larger than a preset abnormality threshold value.

The abnormal threshold may be a maximum allowed path abnormality index when the conduction of the preset conductive path to be checked is normal. For example, the anomaly threshold value may be 0.6.

And secondly, when the path abnormality index is smaller than or equal to the abnormality threshold, judging that the conduction of the to-be-inspected conduction path is normal.

Based on the same inventive concept as the above method embodiments, the present invention provides a circuit system for inspecting a conductive path of a circuit board, the system comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the computer program implementing the steps of a method for inspecting a conductive path of a circuit board when executed by the processor.

It should be noted that the inspection circuit system of a circuit board conductive path may be a software system, and may be used to implement the steps of the inspection method of a circuit board conductive path. The circuit board conductive path inspection circuitry may also be a hardware system and may include sensors for acquiring test electrical parameters and a data processing module, wherein the data processing module may be used to implement the steps of a circuit board conductive path inspection method. The sensor for acquiring the test electrical parameter may be connected to the data processing module.

In summary, if the conduction path to be inspected is abnormal, the change rule of the test electrical parameter at the preset test point is often changed, so that the test electrical parameter sequence corresponding to the preset test point is obtained, and the change rule of the test electrical parameter corresponding to the preset test point can be analyzed conveniently. Then, if the preset test point is abnormal, the conductive path to be tested is often abnormal in conduction, so that preliminary abnormal indexes corresponding to the preset test point are determined, the abnormal condition of the preset test point can be judged in a preliminary mode, and whether the conductive path to be tested is abnormal in conduction can be judged in a convenient mode. Then, because whether the conduction path to be tested is conductive or not is related to each preset test point, the chaotic abnormal distribution analysis processing is carried out on the test electrical parameter sequences corresponding to each preset test point, so that the overall abnormal condition of the conduction path to be tested can be conveniently judged. If the preset test point is normal, the test electrical parameters at the preset test point are stable, so that stability analysis processing is carried out on the test electrical parameter sequence corresponding to the preset test point, and whether the preset test point is abnormal or not can be judged conveniently. Then, because the test electrical parameter sequences corresponding to the test points on the normal conductive path in the normal circuit board are often similar, the normal electrical parameter sequence can be the test electrical parameter sequence corresponding to any one test point on the normal conductive path. If the preset test point is abnormal, the abnormal deviation index corresponding to the preset test point is often larger, so that the abnormal deviation analysis processing is performed on the test electrical parameter sequence corresponding to the preset test point, and the subsequent judgment of whether the preset test point is abnormal or not can be facilitated. Furthermore, the target abnormality index corresponding to the preset test point can represent the abnormality of the preset test point. The preliminary abnormal index, the stability index and the abnormal deviation index corresponding to the preset test point are comprehensively considered to determine the target abnormal index, so that the accuracy of determining the target abnormal index can be improved. And then, comprehensively considering the path confusion indexes and the target abnormality indexes corresponding to the preset test points to determine the path abnormality indexes, so that the accuracy of determining the path abnormality indexes can be improved. Finally, since the abnormal condition of the conductive path to be inspected is quantified by the path abnormality index, whether the conductive path to be inspected is abnormal in conductivity can be objectively judged according to the path abnormality index.

The above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention and are intended to be included within the scope of the invention.

Claims

1. A method for inspecting a conductive path of a circuit board, comprising the steps of:

2. The method for inspecting a conductive path of a circuit board according to claim 1, wherein performing gaussian anomaly analysis on a test electrical parameter sequence corresponding to each preset test point to obtain a preliminary anomaly index corresponding to the preset test point comprises:

3. The method for testing a conductive path of a circuit board according to claim 2, wherein determining the preliminary anomaly index corresponding to the preset test point according to the first index and the variance corresponding to each sub-gaussian model in the set of sub-gaussian models comprises:

4. The method for testing a conductive path of a circuit board according to claim 1, wherein the performing chaotic anomaly distribution analysis on the test electrical parameter sequences corresponding to each preset test point on the conductive path to be tested to obtain a path chaotic indicator corresponding to the conductive path to be tested comprises:

5. The method for testing a conductive path of a circuit board according to claim 1, wherein the performing stability analysis on the test electrical parameter sequence corresponding to each preset test point to obtain a stability index corresponding to the preset test point comprises:

6. The method for testing a conductive path of a circuit board according to claim 1, wherein the performing, according to a pre-obtained normal electrical parameter sequence, an abnormal deviation analysis process on a test electrical parameter sequence corresponding to each preset test point to obtain an abnormal deviation index corresponding to the preset test point includes:

7. The method for inspecting a conductive path of a circuit board according to claim 1, wherein determining the target abnormality index corresponding to each preset test point according to the preliminary abnormality index, the stability index and the abnormality deviation index corresponding to the preset test point comprises:

8. The method for inspecting a conductive path of a circuit board according to claim 1, wherein determining a path abnormality index corresponding to the conductive path to be inspected according to the path confusion index and a target abnormality index corresponding to each preset test point on the conductive path to be inspected comprises:

normalizing the second abnormal index to obtain the path abnormal index.

9. The method for inspecting a conductive path of a circuit board according to claim 1, wherein the determining whether the conductive path to be inspected is abnormal in conduction according to the path abnormality index comprises:

10. A circuit system for inspecting a conductive path of a circuit board, comprising a processor and a memory, the processor being configured to process instructions stored in the memory to implement a method for inspecting a conductive path of a circuit board as claimed in any one of claims 1 to 9.