CN115964063A

CN115964063A - Motor controller CPLD program upgrading method and device, motor controller and vehicle

Info

Publication number: CN115964063A
Application number: CN202211431544.4A
Authority: CN
Inventors: 李芝炳; 李帅; 李伟亮; 刘亚川; 贾琪
Original assignee: FAW Group Corp
Current assignee: FAW Group Corp
Priority date: 2022-11-15
Filing date: 2022-11-15
Publication date: 2023-04-14
Also published as: WO2024103635A1

Abstract

The application discloses a method and a device for upgrading a CPLD program of a motor controller, the motor controller and a vehicle, wherein the method for upgrading the CPLD program of the motor controller comprises the following steps: the CPU judges whether an upgrading request of an upper computer is received or not; if yes, the CPU obtains a first program file and a second program file sent by the upper computer based on the communication bus; the CPU respectively writes the first program file and the second program file to appointed RAM positions; and the CPU operates the second program file to flash the first program file to the CPLD. According to the motor controller CPLD program upgrading method, the CPU operates the second program file to write the first program file to the CPLD through the transmission form of the bus, the CPLD program is updated, the CPLD remote online updating method is a CPLD remote online updating mode, the CPLD program is updated in a form of not needing to be disassembled through a JTAG internal controller interface, and the risk of disassembling the machine is avoided.

Description

Motor controller CPLD program upgrading method and device, motor controller and vehicle

Technical Field

The application relates to the technical field of motor controllers, in particular to a method and a device for upgrading a CPLD (complex programmable logic device) program of a motor controller, the motor controller and a vehicle.

Background

CPLD (Complex programmable Logic Device), i.e. a Complex programmable Logic Device, is currently widely used in the field of automotive electronics, especially in the field of motor control. When detecting electric drive system trouble, it can high-speed swift cut off the power take off of motor, guarantees the security of electric drive system. However, with continuous optimization of the CPLD function or Bug problem of the CPLD program, the CPLD program needs to be upgraded. In general, a CPLD debugger and a Joint Test Action Group (JTAG) interface are connected to upgrade CPLD software to complete updating of a CPLD program, but the JTAG interface is generally embedded in a motor control board and cannot be directly connected through the CPLD debugger, a controller needs to be detached from a motor to complete updating of the CPLD program in the process, the process is complex, and a motor system is scrapped. Therefore, an online upgrade method is needed to update the CPLD program.

Accordingly, a technical solution is desired to overcome or at least alleviate at least one of the above-mentioned drawbacks of the prior art.

Disclosure of Invention

It is an object of the present invention to provide a method for program upgrade of a motor controller CPLD that overcomes or at least alleviates at least one of the above-mentioned drawbacks of the prior art.

In one aspect of the present application, there is provided a motor controller CPLD program upgrading method including:

the CPU judges whether an upgrading request of an upper computer is received; if so, then

The method comprises the steps that a CPU obtains a first program file and a second program file sent by an upper computer based on a communication bus;

the CPU respectively writes the first program file and the second program file to appointed RAM positions;

and the CPU operates the second program file to flash the first program file to the CPLD.

Optionally, the determining, by the CPU, whether an upgrade request of the upper computer is received includes:

the CPU judges whether an upgrading request of an upper computer is received through a CAN bus within preset time after power-on;

the first program file and the second program file are acquired through a CAN bus.

Optionally, before the CPU runs the second program file to flash the first program file to the CPLD, the method further includes:

the CPU judges whether the first program file meets a preset condition, if not, the CPU judges whether the first program file meets the preset condition or not, and if not, the CPU judges whether the first program file meets the preset condition or not

Stopping the subsequent steps by the CPU;

the CPU sends a preset instruction to the upper computer.

Optionally, the flushing, by the CPU, the first program file and the second program file to the designated RAM positions respectively includes:

and the CPU writes the first program file to a first RAM area in a flash mode and writes the second program file to a second RAM area in a flash mode.

Optionally, the running, by the CPU, the second program file to flash the first program file to the CPLD includes:

the CPU clears the original program in the CPLD;

the CPU simulates JTAG level to write the first program file to the CPLD.

Optionally, the running, by the CPU, the second program file to flush the first program file to the CPLD further includes:

the CPU checks whether the first program file can normally run in the CPLD;

and the CPU sends the checking result to an upper computer.

On the other hand, the application also provides a program upgrading method for the motor controller CPLD, wherein the program upgrading method for the motor controller CPLD comprises the following steps:

the upper computer sends an upgrading request to the CPU;

the upper computer receives an upgradable instruction sent by the CPU;

the upper computer sends a first program file and a second program file to the CPU;

and the upper computer receives the upgrading result sent by the CPU.

The application also provides a device for upgrading the CPLD program of the motor controller, which comprises: an upper computer and a CAN gateway;

one end of the CAN gateway is connected to the upper computer, and the other end of the CAN gateway is connected to the motor controller; wherein, the first and the second end of the pipe are connected with each other,

the upper computer is used for executing the motor controller CPLD program upgrading method;

and the CAN gateway is used for converting data sent by the computer into CAN signals and sending the CAN signals to the motor controller.

The application also provides a motor controller, which comprises a CPU and a CPLD;

the CPU is used for executing the program upgrading method of the motor controller CPLD to perform the flash operation on the CPLD.

The present application further provides a vehicle comprising a motor controller as described above.

Has the advantages that:

according to the method for upgrading the CPLD program of the motor controller, the CPU runs the second program file to write the first program file to the CPLD through the transmission form of the bus, so that the updating of the CPLD program is completed, the method is a CPLD remote online updating mode, the updating of the CPLD program is completed in a form of not disassembling the machine through a JTAG internal controller interface, and the risk of disassembling the machine is avoided. Meanwhile, the first program file and the second program file are both firstly written into the corresponding RAM storage areas in a flashing mode, and the two program codes do not occupy internal Flash storage resources and external Flash storage resources of the motor controller, so that waste of chip resources is avoided, and chip development cost is reduced. And the whole brushing process has repeatability, even if the brushing fails, the running program of the electric drive main body is not influenced, and the electric drive main body can be updated again until the updating is successful, so that the method has stronger robustness.

Drawings

Fig. 1 is a schematic flowchart of a program upgrading method for a motor controller CPLD according to an embodiment of the present application.

Fig. 2 is a schematic diagram of the connection relationship between the upper computer and the motor controller.

Detailed Description

In order to make the implementation objects, technical solutions and advantages of the present application clearer, the technical solutions in the embodiments of the present application will be described in more detail below with reference to the drawings in the embodiments of the present application. In the drawings, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described are some, but not all embodiments of the disclosure. The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining the present application and should not be construed as limiting the present application. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort belong to the protection scope of the present application. Embodiments of the present application will be described in detail below with reference to the accompanying drawings.

It should be noted that the terms "first" and "second" in the description of the present invention are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

In the prior art, one of the common schemes is to update the CPLD program by simulating JTAG. The method needs to connect a CPLD debugger with a JTAG (Joint Test Action Group) interface for debugging the CPLD program to complete the updating of the CPLD program, but the JTAG interface is generally embedded in a motor control board and cannot be directly connected through the CPLD debugger, the updating of the CPLD program can be completed only by detaching a controller from a motor in the process, the process is complex, and the motor system can be scrapped.

The other scheme is that a General-Purpose input/output (GPIO) Port (General-Purpose input/output interface) is simulated in a Joint Test Action Group (JTAG) interface form through a pull-up resistor, a Complex Programmable Logic Device (CPLD) program to be updated is firstly loaded into a controller main control chip, then the pull-up resistor is started, and a firmware to be updated is updated into the CPLD chip.

In another scheme, a form of a JTAG interface is simulated by the CPU, a CPLD file to be upgraded is first loaded into a local memory (the memory is located outside the CPLD to be upgraded), and after a CPLD upgrade instruction is received, a CPLD program in the local memory is updated into the CPLD chip in the form of the JTAG interface simulated by the CPU.

The other scheme is that a mode of simulating a JTAG port through a GPIO (general purpose input/output) port is adopted, firstly, a CPLD program is programmed into an SPI Flash space, then, an application data stream of the SPI Flash space is read into an MCU module cache space according to pages, MCU cache data is read into a CPLD CRAM space through the mode of simulating the JTAG port through the GPIO port, and finally, the data in the CPLD CRAM space is upgraded, so that the upgrading process is complex, the programming stability is low, and off-chip Flash is required to finish the storage of the CPLD program data, so that the hardware and software development cost is increased.

Fig. 2 is a schematic diagram of a connection relationship between the upper computer and the motor controller.

Referring to fig. 1 and 2, the present application provides a program upgrading method for a motor controller CPLD, including:

the CPU judges whether an upgrading request of an upper computer is received or not; if so, then

respectively writing the first program file and the second program file to the appointed RAM position by the CPU;

and the CPU operates the second program file to write the first program file to the CPLD in a flashing manner.

According to the motor controller CPLD program upgrading method, the CPU operates the second program file to write the first program file to the CPLD through the transmission form of the bus, the CPLD program is updated, the CPLD remote online updating method is a CPLD remote online updating mode, the CPLD program is updated in a form of not needing to be disassembled through a JTAG internal controller interface, and the risk of disassembling the machine is avoided. Meanwhile, the first program file and the second program file are both firstly written into the corresponding RAM storage areas in a flashing mode, and the two program codes do not occupy internal Flash storage resources and external Flash storage resources of the motor controller, so that waste of chip resources is avoided, and chip development cost is reduced. And the whole brushing process has repeatability, even if the brushing fails, the running program of the electric drive main body is not influenced, and the electric drive main body can be updated again until the updating is successful, so that the method has stronger robustness.

In one embodiment, the step of judging whether an upgrade request of an upper computer is received by the CPU includes:

It CAN be understood that, a CAN bus port is reserved in a general motor controller and CAN directly interact with a CPU, the CPU judges whether an upgrade request is received through a CAN bus within a preset time after being electrified, and if not, a driving program is normally carried out; and if so, executing the program upgrading method of the CPLD. Specifically, the Flash area of the controller comprises a Bootloader program area, an application program area and a calibration data area; the Bootloader program area is used for storing a bootstrap program; the application program area is used for storing application programs; the calibration data area is used for storing calibration data. After being powered on, a CPU firstly runs a program file of a Bootloader program area, and if judging that an upgrading request is received through a CAN bus within preset time, the method for upgrading the CPLD program of the motor controller provided by the application is executed; and if the upgrading request of the upper computer is not received through the CAN bus within the preset time, running the program file in the application program area and carrying out other control methods.

In one embodiment, before the obtaining the first program file and the second program file based on the communication bus, the method further includes:

and the CPU sends an upgradable instruction to the upper computer.

In an embodiment, before the CPU runs the second program file to flush the first program file to the CPLD, the method further includes:

the CPU judges whether the first program file meets the preset condition, if not, the CPU judges whether the first program file meets the preset condition or not, if not, the CPU judges that the first program file meets the preset condition

Stopping the subsequent steps by the CPU;

the CPU sends a preset instruction to the upper computer.

In the embodiment, based on the judgment of the first program file, the method has a good program check correct verification mechanism and a good error prevention mechanism, and the robustness of program updating is ensured.

In one embodiment of the present invention, the substrate is,

the method for respectively writing the first program file and the second program file to the designated RAM positions by the CPU comprises the following steps:

the CPU writes the first program file to the first RAM area and writes the second program file to the second RAM area.

In an embodiment, the determining whether the first program file meets the predetermined condition includes:

the CPU judges whether the following conditions are met simultaneously, if yes, the preset conditions are met:

the CPU obtains the address range of the first program file, and judges whether the address range of the first program file meets the preset address range or not;

the CPU judges whether the first program file is complete.

For example, the principle that the CPU determines whether the first program file is complete is as follows, before the upper computer sends the first program file, a check value calculated by a certain check algorithm based on the first program file code is added to the end address of the first program file, after the first program file is obtained, the CPU calculates the check value based on the received first program file according to the same check algorithm, compares whether the check value is consistent with the data of the received first program file end check value padding bit, if not, it indicates that the program is incomplete or there is a omission in the data flashing transmission process, and sends the first program file error instruction to the upper computer at this time.

In one embodiment, the running of the second program file by the CPU to flash the first program file to the CPLD includes:

the CPU clears the original program in the CPLD;

the CPU simulates JTAG level to write the first program file to the CPLD.

In an embodiment, the CPU executing the second program file to flush the first program file to the CPLD further includes:

the CPU checks whether the first program file can normally run in the CPLD;

and the CPU sends the checking result to the upper computer.

For example, the step of checking, by the CPU, whether the first program file can be successfully run on the CPLD includes:

after the first program file is flashed to the CPLD, the CPU starts an overtime judgment mechanism, judges whether the CPU can establish communication with the CPLD within preset time, and judges that the verification result of the first program file is that the first program file can normally run on the CPLD if the communication is successfully established; if the verification fails, the verification result of the first program file is judged to be that the first program file cannot normally run on the CPLD.

The method updates the CPLD program on line based on the CAN bus, creatively decouples the CPLD program updating process and the electric drive main body running software, does not generate any influence on the original Flash memory area of the CPU in the updating process, saves the Flash memory resources built in or out of the chip and saves the chip cost; by C

The second program file completes the functions of simulating a JTAG interface of the CPU, clearing the CPLD program and updating the CPLD program, and stores the CPLD program in a storage area of a DSPR2 RAM (a second RAM area) of the appointed CPU in the updating process of the CPLD program. The first program file to be updated is stored in a storage area of a designated CPU DSPR1 RAM (first RAM area) first. When the current setting process is free from problems, the first program file stored in the space of the DSPR1 RAM is written into the CPLD through the second program file stored in the space of the DSPR2 RAM; the CPLD updating process and the upper computer can keep certain consistency with the application program updating process, and have a program checking mechanism and an error-proofing mechanism for multiple times, so that the robustness of program updating is ensured.

As shown in fig. 1 and fig. 2, the present application further provides a program upgrading method for a motor controller CPLD, including:

the upper computer sends an upgrading request to the CPU;

the upper computer receives an upgradable instruction sent by the CPU;

and the upper computer receives the upgrading result sent by the CPU.

In one embodiment, before the upper computer sends the first program file and the second program file to the CPU, the method further includes:

and the upper computer converts the first program file into a hex format.

The electrically driven controller generally has an external CAN communication interface to complete program upgrade and reading of relevant diagnostic information. Generally, the electric drive controller application programs are executable files in the hex format, and in consideration of compatibility with the electric drive controller application program for online upgrading of an upper computer, when the CPLD is upgraded through the CAN bus, the CPLD program executable files in the jed format need to be converted into the CPLD executable files in the hex format through a DelPoyme tool carried by LATTICE. Thus, the first program file and the second program file can be sent to the CPU by electrically driving the controller Bootloader boot area program and using the diagnostic instrument tool.

As shown in fig. 2, the present application further provides a device for upgrading a program of a motor controller CPLD, where the device for upgrading a program of a motor controller CPLD includes: an upper computer and a CAN gateway;

one end of the CAN gateway is connected with the upper computer, and the other end of the CAN gateway is connected with the motor controller; wherein, the first and the second end of the pipe are connected with each other,

the CAN gateway is used for converting data sent by the computer into CAN signals and sending the CAN signals to the motor controller.

It CAN be understood that the upper computer performs data interaction with the motor controller based on the CAN bus through the UDS unified diagnostic service protocol.

the CPU is used for executing the program upgrading method of the motor controller CPLD to perform the flashing operation on the CPLD.

The application also provides a vehicle, and the vehicle comprises the motor controller.

The memory may include forms of volatile memory in a computer readable medium, random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.

Computer-readable media include both permanent and non-permanent, removable and non-removable media, and may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Disks (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and so forth) having computer-usable program code embodied therein.

Furthermore, it will be obvious that the term "comprising" does not exclude other elements or steps. A plurality of units, modules or devices recited in the device claims may also be implemented by one unit or overall device by software or hardware. The terms first, second, etc. are used to identify names, but not any particular order.

The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks identified in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

The Processor in this embodiment may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, a discrete Gate or transistor logic device, a discrete hardware component, and so on. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The memory may be used to store computer programs and/or modules, and the processor may implement various functions of the apparatus/terminal device by running or executing the computer programs and/or modules stored in the memory, as well as by invoking data stored in the memory. The memory may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required by at least one function (such as a sound playing function, an image playing function, etc.), and the like; the storage data area may store data (such as audio data, a phonebook, etc.) created according to the use of the cellular phone, etc. In addition, the memory may include high speed random access memory, and may also include non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), at least one magnetic disk storage device, a Flash memory device, or other volatile solid state storage device.

In this embodiment, the module/unit integrated with the apparatus/terminal device may be stored in a computer-readable storage medium if it is implemented in the form of a software functional unit and sold or used as a separate product. Based on such understanding, all or part of the flow of the method according to the embodiments of the present invention may also be implemented by hardware related to instructions of a computer program, which may be stored in a computer readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer readable medium may include: any entity or device capable of carrying computer program code, recording medium, U.S. disk, removable hard disk, magnetic disk, optical disk, computer Memory, read-Only Memory (ROM), random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution media, and the like.

It should be noted that the computer readable medium may contain content that is appropriately increased or decreased as required by legislation and patent practice in the jurisdiction. Although the present application has been described with reference to the preferred embodiments, it is not intended to limit the present application, and those skilled in the art can make variations and modifications without departing from the spirit and scope of the present application.

Although the invention has been described in detail with respect to the general description and the specific embodiments thereof, it will be apparent to those skilled in the art that modifications and improvements can be made based on the invention. Accordingly, such modifications and improvements are intended to be within the scope of the invention as claimed.

Claims

1. A program upgrading method for a motor controller CPLD is characterized by comprising the following steps:

The CPU acquires a first program file and a second program file sent by an upper computer based on a communication bus;

the CPU respectively writes the first program file and the second program file to the appointed RAM position;

2. The program upgrading method for a motor controller CPLD according to claim 1,

the CPU judges whether an upgrade request of an upper computer is received or not comprises the following steps:

3. The motor controller CPLD program upgrading method according to claim 2,

before the CPU runs the second program file to flush the first program file to the CPLD, the method further includes:

the CPU judges whether the first program file meets a preset condition, if not, the CPU judges whether the first program file meets the preset condition or not, and if not, the CPU judges that the first program file meets the preset condition

Stopping the subsequent steps by the CPU;

the CPU sends a preset instruction to the upper computer.

4. The motor controller CPLD program upgrading method according to claim 3,

the step of respectively writing the first program file and the second program file to the appointed RAM position by the CPU comprises the following steps:

5. The program upgrading method for a motor controller CPLD according to claim 4,

the step that the CPU operates the second program file to write the first program file to the CPLD comprises the following steps:

the CPU clears the original program in the CPLD;

the CPU simulates JTAG level to write the first program file to the CPLD.

6. The program upgrading method for a motor controller CPLD according to claim 5,

the step that the CPU runs the second program file to flash the first program file to the CPLD further comprises the following steps:

the CPU checks whether the first program file can normally run in the CPLD;

and the CPU sends the checking result to an upper computer.

7. A program upgrading method for a motor controller CPLD is characterized by comprising the following steps:

the upper computer sends an upgrading request to the CPU;

the upper computer receives an upgradable instruction sent by the CPU;

and the upper computer receives the upgrading result sent by the CPU.

8. A program upgrading device for a motor controller CPLD is characterized by comprising the following components: an upper computer and a CAN gateway;

one end of the CAN gateway is connected with the upper computer, and the other end of the CAN gateway is connected with the motor controller; wherein the content of the first and second substances,

the upper computer is used for executing the program upgrading method of the motor controller CPLD according to claim 7;

9. A motor controller is characterized in that the motor controller comprises a CPU and a CPLD;

the CPU is used for executing the program upgrading method of the motor controller CPLD according to any one of claims 1-6 to perform the flash operation on the CPLD.

10. A vehicle characterized in that the vehicle comprises a motor controller according to claim 9.