CN115909973A - Control circuit and display device - Google Patents
Control circuit and display device Download PDFInfo
- Publication number
- CN115909973A CN115909973A CN202211672265.7A CN202211672265A CN115909973A CN 115909973 A CN115909973 A CN 115909973A CN 202211672265 A CN202211672265 A CN 202211672265A CN 115909973 A CN115909973 A CN 115909973A
- Authority
- CN
- China
- Prior art keywords
- signal
- input
- pole
- emitting element
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The application provides a control circuit and a display device, wherein the control circuit is electrically coupled with a light-emitting element of a pixel circuit, the control circuit comprises a signal selection module and a signal addition module, the signal selection module is configured to receive at least two paths of input signals, and one path of the at least two paths of input signals is selected as an initial control signal according to the control signal and is input to the signal addition module; the signal adding module is configured to receive the initial control signal and the voltage signal of the second pole of the light emitting element and provide the control signal to the first pole of the light emitting element according to the initial control signal and the voltage signal of the second pole of the light emitting element. The control circuit that this application provided has avoided light emitting component to have luminance difference between the refresh frame and the maintenance frame through providing different anode voltage to light emitting component, introduces light emitting component cathode voltage simultaneously, has realized the dynamic tracking to cathode voltage, further solves the problem that display panel appears the scintillation.
Description
Technical Field
The application relates to the technical field of display, in particular to a control circuit and a display device.
Background
For an AMOLED (Active matrix organic light emitting diode) display product, in order to reduce the power consumption of the product, a high refresh rate and a low refresh rate alternate display function are adopted. In the low frequency driving mode, a frame of display is displayed in a refresh frame and a plurality of sustain frames. The working parameters of each module in the pixel circuit in the refresh frame and the holding frame are different, so that the brightness difference exists between the refresh frame and the holding frame of the light-emitting element in the pixel circuit, and the display panel has a flicker problem.
Disclosure of Invention
In view of the above, an object of the present application is to provide a control circuit and a display device.
In view of the above, the present application provides a control circuit electrically coupled to a pixel circuit, the pixel circuit including a light emitting element, the control circuit including a signal selection module and a signal addition module, wherein: the signal selection module is configured to receive at least two input signals, and select one of the at least two input signals as an initial control signal according to a control signal to be input to the signal addition module; the signal adding module is configured to receive the initial control signal and the voltage signal of the second pole of the light emitting element and provide a control signal to the first pole of the light emitting element according to the initial control signal and the voltage signal of the second pole of the light emitting element.
Optionally, the signal selection module includes a first signal input terminal, a second signal input terminal, a signal control terminal, and a signal output terminal, where: the first signal input terminal is configured to receive a first input signal, the second signal input terminal is configured to receive a second input signal, the signal control terminal is configured to receive the control signal, the signal output terminal is connected to the signal addition module, the signal selection module is further configured to: and according to the control signal, selecting one path from the first input signal and the second input signal as the initial control signal to be input to the signal addition module.
Optionally, the signal selection module further comprises a first transistor and a second transistor, the first transistor and the second transistor are of different types, a first pole of the first transistor is connected with the first signal input terminal and configured to receive the first input signal, and a first pole of the second transistor is connected with the second signal input terminal and configured to receive the second input signal; control electrodes of the first transistor and the second transistor are connected with the signal control terminal and configured to receive the control signal, and second electrodes of the first transistor and the second transistor are connected with the signal output terminal and configured to input the first input signal or the second input signal to the signal addition module as the initial control signal.
Optionally, the signal addition module further includes an adder unit and an operational amplifier unit, where: the adder unit is connected with the signal selection module and the second pole of the light-emitting element, and is configured to receive the initial control signal and the voltage signal of the second pole of the light-emitting element and provide an addition signal to the operational amplifier unit according to the initial control signal and the voltage signal of the second pole of the light-emitting element; the operational amplifier unit is connected to the adder unit and the first pole of the light emitting element, and configured to receive the addition signal and provide the control signal to the first pole of the light emitting element according to the addition signal.
Optionally, the adder unit comprises a first input, a second input, and an output, wherein: a first input terminal of the adder unit is connected to the signal selection module and configured to receive the initial control signal, a second input terminal of the adder unit is connected to the second pole of the light emitting element and configured to receive a voltage signal of the second pole of the light emitting element, and an output terminal of the adder unit is connected to the operational amplifier unit and configured to output the added signal to the operational amplifier unit.
Optionally, the operational amplifier unit includes an input terminal, a control terminal, and an output terminal, wherein: the input end of the operational amplifier unit is connected with the adder unit and is configured to receive the addition signal, the control end of the operational amplifier unit is connected with the output end, and the output end of the operational amplifier unit is connected with the first pole of the light-emitting element and is configured to provide the control signal for the first pole of the light-emitting element.
Optionally, the operational amplifier unit further includes a first voltage regulating resistor and a second voltage regulating resistor, wherein: the first voltage regulating resistor is positioned on a loop between the control end and the output end of the operational amplifier unit, the first end of the first voltage regulating resistor is connected with the control end of the operational amplifier unit, and the second end of the first voltage regulating resistor is connected with the output end of the operational amplifier unit; and the first end of the second voltage regulating resistor is connected with the first end of the first voltage regulating resistor, and the second end of the second voltage regulating resistor is grounded.
Optionally, the signal addition module further includes a third voltage regulating resistor and a fourth voltage regulating resistor, where: the third voltage-regulating resistor is positioned on a loop between the second input end of the adder unit and the second pole of the light-emitting element, the first end of the third voltage-regulating resistor is connected with the second input end of the adder unit, and the second end of the third voltage-regulating resistor is connected with the second pole of the light-emitting element; and the first end of the fourth voltage regulating resistor is connected with the first end of the third voltage regulating resistor, and the second end of the fourth voltage regulating resistor is grounded.
Optionally, an input end of the operational amplifier unit is a non-inverting input end, and a control end of the operational amplifier unit is a 5-inverting input end.
Optionally, the first electrode of the light emitting element is an anode and the second electrode is a cathode.
Optionally, the control signal is configured to reset an anode voltage of the light emitting element.
Based on the same inventive concept, the application also provides a display device, which comprises a pixel circuit and any one of the control circuits.
As can be seen from the above description, the present application provides a control circuit and a display device, wherein the control circuit is electrically coupled to a pixel circuit, the pixel circuit includes a light emitting element, and the control circuit includes a signal selection module and a signal addition module, wherein: the signal selection module is configured to receive at least two input signals and select one of the at least two input signals as an initial control according to a control signal
Inputting a control signal to the signal addition module; the signal adding module is configured to receive the initial control 5 control signal and the voltage signal of the second pole of the light emitting element and provide a control signal to the first pole of the light emitting element according to the initial control signal and the voltage signal of the second pole of the light emitting element. The control circuit that this application provided has avoided light emitting component to have luminance difference between the refresh frame and the maintenance frame through providing different anode voltage to light emitting component, introduces light emitting component cathode voltage simultaneously, has realized the dynamic tracking to cathode voltage, further solves the problem that display panel appears the scintillation.
Drawings
In order to more clearly illustrate the technical solutions in this application or the related art, the following examples or phases will be provided
While the drawings that are needed to be utilized in the description of the related art are briefly described, it should be apparent that the drawings in the following description are merely exemplary embodiments of the application and that other drawings may be derived from those drawings by one of ordinary skill in the art without inventive faculty.
FIG. 1 is a schematic diagram of a pixel circuit in the related art;
FIG. 2 is a block diagram of a control circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic circuit diagram of a control circuit according to an embodiment of the present disclosure.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is further described in detail below with reference to the accompanying drawings in combination with specific embodiments.
It should be noted that technical terms or scientific terms used in the embodiments of the present application should have a general meaning as understood by those having ordinary skill in the art to which the present application belongs, unless otherwise defined. The use of "first," "second," and similar terms in the embodiments of the present application is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used only to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
As shown in fig. 1, in the related art pixel circuit, in a refresh frame, the transistor T1 is first turned on to reset the storage capacitor Cst, then the transistors T2, T3, and T4 are turned on, data is written into the storage capacitor Cst by the transistor T4, then the transistor T7 is turned on to reset the anode voltage of the light emitting element by Vint2, and finally the transistors T5 and T6 are turned on to light up the light emitting element. Since data does not need to be rewritten, the process of turning on the transistor T7, resetting the anode voltage of the light emitting element with Vint2, and finally turning on the transistors T5 and T6 to light up the light emitting element is repeated for the retention frame.
That is, since the transistors T1 and T2 operate in different manners in the refresh frame and the sustain frame, voltages at points N1 and N3 in fig. 1 are also different in the refresh frame and the sustain frame, and a voltage at a point N3 in the sustain frame is greater than a voltage at a point N3 in the refresh frame, which causes the transistor T6 to turn on in advance, thereby causing an increase in the anode voltage of the light emitting element, and at this time, if the same Vint2 is used, a problem of insufficient reset and flicker of the display panel may occur.
In addition, in the actual use process, the ELVSS may fluctuate due to external interference, which may cause fluctuation in voltage drop across the light emitting elements, and further cause a problem of flicker of the display panel.
In view of the above, an embodiment of the present application provides a control circuit electrically coupled to a pixel circuit, the pixel circuit including a light emitting element, as shown in fig. 2, the control circuit including a signal selection module 10 and a signal addition module 20, wherein:
the signal selection module 10 is configured to receive at least two input signals, and select one of the at least two input signals as an initial control signal DAC according to a control signal SW _ R/S, and input the selected one to the signal addition module 20;
the signal adding module 20 is configured to receive the initial control signal DAC and the voltage signal ELVSS of the second pole of the light emitting element, and provide the control signal Vint2 to the first pole of the light emitting element according to the initial control signal DAC and the voltage signal ELVSS of the second pole of the light emitting element.
The control circuit that this application provided has avoided light emitting component to have luminance difference between the refresh frame and the maintenance frame through providing different anode voltage to light emitting component, introduces light emitting component cathode voltage simultaneously, has realized the dynamic tracking to cathode voltage, further solves the problem that display panel appears the scintillation.
In specific implementation, the control signal SW _ R/S is a GPIO (General Purpose Input Output) signal of a Tcon IC (Timing controller IC). In the related art, although it is possible to directly output Vint2 of different voltages in different periods of display through an I2c (two-wire serial bus) command mode using Tcon (timing controller), this method has disadvantages. First, a time interval of V _ Blank elapses when the refresh frame is switched to the hold frame, and the switching of Vint2 voltage needs to be completed within the time of V _ Blank. However, the Tcon I2c command mode is very likely to exceed V _ Blank on a high resolution and high refresh rate display screen through links such as sending device address and register address, responding, confirming, command progression & progression, and causing picture flicker.
In the embodiment of the present application, the control signal is a digital signal essentially, and the preset multi-path input signal can be input to the subsequent signal addition circuit only by sending the high-level or low-level control signal selection module to work. When the control signal is sent, an analog signal sending link of the Tcon I2c instruction mode is not needed, so that the communication time is saved, and the problem that the voltage switching exceeds V _ Blank is solved.
In a specific embodiment, the first electrode of the light emitting element is an anode and the second electrode is a cathode, and the control signal is configured to reset the anode voltage of the light emitting element.
In some embodiments, as shown in fig. 2, the signal selection module 10 includes a first signal input terminal, a second signal input terminal, a signal control terminal, and a signal output terminal, wherein:
the first signal input terminal is configured to receive a first input signal DAC1, the second signal input terminal is configured to receive a second input signal DAC2, the signal control terminal is configured to receive the control signal SW _ R/S, the signal output terminal is connected to the signal adding module 20, and the signal selecting module 10 is further configured to:
according to the control signal SW _ R/S, one of the first input signal DAC1 and the second input signal DAC2 is selected as the initial control signal DAC to be input to the signal adding module 20.
In a specific embodiment, the signal selection module 10 is further configured to: in response to the level of DAC1 being higher than DAC2, DAC2 is selected as the initial control signal DAC at the refresh frame of the pixel circuit and input to the signal addition module 20, and DAC1 is selected as the initial control signal DAC at the hold frame of the pixel circuit and input to the signal addition module 20. In another specific embodiment, the signal selection module 10 is further configured to: in response to the level of DAC1 being lower than DAC2, DAC1 is selected as the initial control signal DAC at the refresh frame of the pixel circuit and input to the signal addition block 20, and DAC2 is selected as the initial control signal DAC at the hold frame of the pixel circuit and input to the signal addition block 20.
In some embodiments, as shown in fig. 3, the signal selection module 10 further includes a first transistor T11 and a second transistor T12, the first transistor T11 and the second transistor T12 are of different types, a first pole of the first transistor T11 is connected to the first signal input terminal and configured to receive the first input signal DAC1, and a first pole of the second transistor T12 is connected to the second signal input terminal and configured to receive the second input signal DAC2.
The control electrodes of the first transistor T11 and the second transistor T12 are both connected to the signal control terminal and configured to receive the control signal SW _ R/S, and the second electrodes of the first transistor and the second transistor are both connected to the signal output terminal and configured to input the first input signal DAC1 or the second input signal DAC2 as the initial control signal DAC to the signal addition module.
Because the types of the first transistor T11 and the second transistor T12 are different, only one transistor is always in an on state no matter whether the control signal is input in a high level or a low level, the input signal received by the first pole of the transistor is input to the signal addition module as the initial control signal, and a signal selection function is realized by using one path of digital signal.
In a specific embodiment, the first transistor T11 is N-type, the second transistor T12 is P-type, and in response to the control signal SW _ R/S being high, T11 is turned on, T12 is turned off, and the first input signal DAC1 is inputted to the signal adding module as the initial control signal DAC; and in response to the control signal SW _ R/S being at the low level, T11 is closed, T12 is opened, and the second input signal DAC2 is input to the signal addition module as the initial control signal DAC. In another specific embodiment, the first transistor T11 is P-type, the second transistor T12 is N-type, and in response to the control signal SW _ R/S being low, T11 is turned on, T12 is turned off, and the first input signal DAC1 is inputted to the signal adding module as the initial control signal DAC; in response to the control signal SW _ R/S being high, T11 is closed, T12 is opened, and the second input signal DAC2 is input to the signal adding module as the initial control signal DAC.
It should be noted that the models of T11 and T12 in fig. 3 are merely exemplary, and the models of T11 and T12 are not limited.
In some embodiments, as shown in fig. 3, the signal adding module 20 further includes an adder unit 21 and an operational amplifier unit 22, where:
the adder unit 21 is connected to the signal selection module 10 and the second pole of the light emitting element, and configured to receive the initial control signal DAC and the voltage signal ELVSS of the second pole of the light emitting element, and provide an addition signal Vi to the operational amplifier unit 22 according to the initial control signal DAC and the voltage signal ELVSS of the second pole of the light emitting element;
the operational amplifier unit 22 is connected to the adder unit 21 and the first pole of the light emitting element, and configured to receive the addition signal Vi and supply the control signal Vint2 to the first pole of the light emitting element according to the addition signal Vi.
In some embodiments, the adder unit comprises a first input, a second input, and an output, wherein:
a first input terminal of the adder unit is connected to the signal selection module and configured to receive the initial control signal, a second input terminal of the adder unit is connected to the second pole of the light emitting element and configured to receive the voltage signal of the second pole of the light emitting element, and an output terminal of the adder unit is connected to the operational amplifier unit and configured to output the added signal to the operational amplifier unit.
In specific implementation, the adder unit adopts an analog adder, vi = a × ELVSS + b × VDAC after addition, and a and b are parameters of the analog amplifier, and those skilled in the art can set a and b correspondingly by adjusting values of resistors or other elements in the analog amplifier according to actual conditions, which is not described herein in detail.
In some embodiments, as shown in fig. 3, the op-amp unit includes an input terminal +, a control terminal, and an output terminal, wherein:
an input terminal + of the operational amplifier unit 22 is connected to the adder unit 21 and configured to receive the addition signal Vi, a control terminal-of the operational amplifier unit 22 is connected to an output terminal, and an output terminal of the operational amplifier unit is connected to the first pole of the light emitting element and configured to provide the control signal Vint2 to the first pole of the light emitting element.
In a specific embodiment, the input end of the operational amplifier unit is a non-inverting input end, and the control end of the operational amplifier unit is an inverting input end.
In some embodiments, as shown in fig. 3, the operational amplifier unit further includes a first voltage regulating resistor R1 and a second voltage regulating resistor R2, where:
the first voltage-regulating resistor R1 is located on a loop between the control end and the output end of the operational amplifier unit 22, a first end of the first voltage-regulating resistor R1 is connected with the control end of the operational amplifier unit 22, and a second end is connected with the output end of the operational amplifier unit 22;
and the first end of the second voltage regulating resistor R2 is connected with the first end of the first voltage regulating resistor R1, and the second end of the second voltage regulating resistor R2 is grounded.
The operational amplifier unit shown in fig. 3 constitutes a non-inverting amplifier, and based on the principle of the non-inverting amplifier, vint2= Vi × [ (R1 + R2)/R2 ], and Vi = a × ELVSS + b × VDAC, at this time, dynamic tracking of Vint2 to ELVSS can be realized by setting the resistance values of R1 and R2.
In some embodiments, as shown in fig. 3, the signal adding module further includes a third voltage regulating resistor R3 and a fourth voltage regulating resistor R4, where:
the third voltage-regulating resistor R3 is located in a loop between the second input end of the adder unit 21 and the second pole of the light-emitting element, a first end of the third voltage-regulating resistor R3 is connected to the second input end of the adder unit 21, and a second end of the third voltage-regulating resistor R3 is connected to the second pole of the light-emitting element;
and the first end of the fourth voltage regulating resistor R4 is connected with the first end of the third voltage regulating resistor R3, and the second end of the fourth voltage regulating resistor R4 is grounded.
After the third voltage regulating resistor R3 and the fourth voltage regulating resistor R4 are set, the voltage ELVSS' = ELVSS × [ R4/(R3 + R4) ] of the second pole of the light emitting element actually connected to the adder unit can further adjust the dynamic tracking relationship between Vint2 and ELVSS by setting the resistance values of R3 and R4.
For convenience of description, the above devices are described as being divided into various modules by functions, and are described separately. Of course, the functionality of the various modules may be implemented in the same one or more software and/or hardware implementations as the present application.
Based on the same inventive concept, corresponding to the driving circuit in any of the above embodiments, the present application further provides a display device including a pixel circuit and any one of the control circuits in any of the above embodiments.
The application provides a display device provides different anode voltage to light emitting component through control circuit, has avoided light emitting component to have the luminance difference between the refresh frame and the maintenance frame, introduces light emitting component cathode voltage simultaneously, has realized the dynamic tracking to cathode voltage, further solves display panel and appears the problem of scintillation.
In a specific embodiment, the display device includes a plurality of pixel circuits arranged in an array, the pixel circuits are disposed in a display area of the display device, and the control circuit is disposed in a non-display area of the display device.
In addition, in the display device provided by the present application, one of the control circuits may be coupled to the light emitting elements in multiple pixel circuits at the same time, and the same signal lines of the multiple pixel circuits are connected to each other and the control circuit provides the same signal, so that the reset voltage of the light emitting elements in the multiple pixel circuits is adjusted at the same time.
In some embodiments, the display device is an organic light emitting diode display device.
The display device provided by the embodiment can be applied to any products or components with display functions, such as electronic paper, a mobile phone, a tablet personal computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
The display device of the above embodiment includes the corresponding control circuit in any of the foregoing embodiments, and has the beneficial effects of the corresponding embodiments, which are not described herein again.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, is limited to these examples; within the context of the present application, features from the above embodiments or from different embodiments may also be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of brevity.
In addition, well-known power/ground connections to Integrated Circuit (IC) chips and other components may or may not be shown in the provided figures for simplicity of illustration and discussion, and so as not to obscure the embodiments of the application. Furthermore, devices may be shown in block diagram form in order to avoid obscuring embodiments of the application, and this also takes into account the fact that specifics with respect to implementation of such block diagram devices are highly dependent upon the platform within which the embodiments of the application are to be implemented (i.e., specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the application, it should be apparent to one skilled in the art that the embodiments of the application can be practiced without, or with variation of, these specific details. Accordingly, the description is to be regarded as illustrative instead of restrictive.
While the present application has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations of these embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. For example, other memory architectures, such as Dynamic RAM (DRAM), may use the discussed embodiments.
The present embodiments are intended to embrace all such alternatives, modifications and variances which fall within the broad scope of the appended claims. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present application are intended to be included within the scope of the present application.
Claims (12)
1. A control circuit electrically coupled to a pixel circuit, the pixel circuit including a light emitting element, the control circuit comprising a signal selection module and a signal addition module, wherein:
the signal selection module is configured to receive at least two input signals, and select one of the at least two input signals as an initial control signal according to a control signal to be input to the signal addition module;
the signal adding module is configured to receive the initial control signal and the voltage signal of the second pole of the light emitting element and provide a control signal to the first pole of the light emitting element according to the initial control signal and the voltage signal of the second pole of the light emitting element.
2. The control circuit of claim 1, wherein the signal selection module comprises a first signal input terminal, a second signal input terminal, a signal control terminal, and a signal output terminal, wherein:
the first signal input terminal is configured to receive a first input signal, the second signal input terminal is configured to receive a second input signal, the signal control terminal is configured to receive the control signal, the signal output terminal is connected to the signal addition module, the signal selection module is further configured to:
and according to the control signal, selecting one path from the first input signal and the second input signal as the initial control signal to be input to the signal addition module.
3. The control circuit of claim 2, wherein the signal selection module further comprises a first transistor and a second transistor, the first transistor being of a different type than the second transistor, a first pole of the first transistor being connected to the first signal input and configured to receive the first input signal, a first pole of the second transistor being connected to the second signal input and configured to receive the second input signal;
control electrodes of the first transistor and the second transistor are connected to the signal control terminal and configured to receive the control signal, and second electrodes of the first transistor and the second transistor are connected to the signal output terminal and configured to input the first input signal or the second input signal as the initial control signal to the signal addition module.
4. The control circuit of claim 1, the signal addition module further comprising an adder unit and an operational amplifier unit, wherein:
the adder unit is connected with the signal selection module and the second pole of the light-emitting element, and is configured to receive the initial control signal and the voltage signal of the second pole of the light-emitting element, and provide an addition signal to the operational amplifier unit according to the initial control signal and the voltage signal of the second pole of the light-emitting element;
the operational amplifier unit is connected to the adder unit and the first pole of the light emitting element, and configured to receive the addition signal and provide the control signal to the first pole of the light emitting element according to the addition signal.
5. The control circuit of claim 4, wherein the adder unit comprises a first input, a second input, and an output, wherein:
a first input terminal of the adder unit is connected to the signal selection module and configured to receive the initial control signal, a second input terminal of the adder unit is connected to the second pole of the light emitting element and configured to receive a voltage signal of the second pole of the light emitting element, and an output terminal of the adder unit is connected to the operational amplifier unit and configured to output the added signal to the operational amplifier unit.
6. The control circuit of claim 4, wherein the op-amp cell comprises an input terminal, a control terminal, and an output terminal, wherein:
the input end of the operational amplifier unit is connected with the adder unit and is configured to receive the addition signal, the control end of the operational amplifier unit is connected with the output end, and the output end of the operational amplifier unit is connected with the first pole of the light-emitting element and is configured to provide the control signal for the first pole of the light-emitting element.
7. The control circuit of claim 6, the operational amplifier unit further comprising a first voltage regulating resistor and a second voltage regulating resistor, wherein:
the first voltage regulating resistor is positioned on a loop between the control end and the output end of the operational amplifier unit, the first end of the first voltage regulating resistor is connected with the control end of the operational amplifier unit, and the second end of the first voltage regulating resistor is connected with the output end of the operational amplifier unit;
and the first end of the second voltage regulating resistor is connected with the first end of the first voltage regulating resistor, and the second end of the second voltage regulating resistor is grounded.
8. The control circuit of claim 5, the signal summing block further comprising a third voltage regulating resistor and a fourth voltage regulating resistor, wherein:
the third voltage-regulating resistor is positioned on a loop between the second input end of the adder unit and the second pole of the light-emitting element, the first end of the third voltage-regulating resistor is connected with the second input end of the adder unit, and the second end of the third voltage-regulating resistor is connected with the second pole of the light-emitting element;
and the first end of the fourth voltage regulating resistor is connected with the first end of the third voltage regulating resistor, and the second end of the fourth voltage regulating resistor is grounded.
9. The control circuit of claim 6, wherein the input terminal of the operational amplifier unit is a non-inverting input terminal, and the control terminal of the operational amplifier unit is an inverting input terminal.
10. The control circuit of claim 1, wherein the first pole of the light emitting element is an anode and the second pole is a cathode.
11. The control circuit of claim 1, wherein the control signal is configured to reset an anode voltage of the light emitting element.
12. A display device comprising a pixel circuit and the control circuit of any one of claims 1 to 11.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211672265.7A CN115909973A (en) | 2022-12-23 | 2022-12-23 | Control circuit and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211672265.7A CN115909973A (en) | 2022-12-23 | 2022-12-23 | Control circuit and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115909973A true CN115909973A (en) | 2023-04-04 |
Family
ID=86472783
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211672265.7A Pending CN115909973A (en) | 2022-12-23 | 2022-12-23 | Control circuit and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115909973A (en) |
-
2022
- 2022-12-23 CN CN202211672265.7A patent/CN115909973A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111710299B (en) | Display panel, driving method thereof and display device | |
| US11270630B2 (en) | Driving circuit, driving method thereof and display apparatus | |
| CN109637457B (en) | Pixel circuit, display panel and display device | |
| CN110268465B (en) | Pixel circuit, display panel and driving method of pixel circuit | |
| EP3879517B1 (en) | Pixel circuit | |
| CN109545145B (en) | Pixel circuit, driving method thereof and display device | |
| US8648884B2 (en) | Display device | |
| CN112820242B (en) | Pixel driving circuit, driving method thereof and display panel | |
| CN111243514A (en) | Pixel driving circuit, driving method thereof and display panel | |
| CN112164370B (en) | Pixel circuit, driving method thereof and electronic device | |
| US20210166636A1 (en) | Pixel driving circuit, display panel and methods for driving the same | |
| KR20070007591A (en) | Voltage generator for flat panel display apparatus | |
| CN110867162A (en) | Pixel driving circuit, driving method thereof and display panel | |
| CN112885277B (en) | Display method of display panel, display module and display device | |
| CN114387923A (en) | Display device supporting variable frame mode | |
| US11741868B2 (en) | Reference voltage generator, display device including the same, and method of driving display device | |
| CN109616042B (en) | Pixel circuit, driving method thereof and display device | |
| CN114283739A (en) | Pixel circuit, driving method thereof and display device | |
| CN115909973A (en) | Control circuit and display device | |
| CN113270073B (en) | Data driving module, method and display device | |
| US11798480B2 (en) | Organic light emitting diode display system | |
| CN220604307U (en) | Pixel circuit and display device including the same | |
| CN110033729B (en) | Pixel circuit, display panel, driving method and display device | |
| CN112088400A (en) | Display driving method, display driving device and display device | |
| CN113808519B (en) | Pixel circuit, driving method thereof and display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |