CN115862181B - Chain type communication display instrument group and chain type communication method thereof - Google Patents
Chain type communication display instrument group and chain type communication method thereof Download PDFInfo
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- CN115862181B CN115862181B CN202310048841.9A CN202310048841A CN115862181B CN 115862181 B CN115862181 B CN 115862181B CN 202310048841 A CN202310048841 A CN 202310048841A CN 115862181 B CN115862181 B CN 115862181B
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Abstract
The invention discloses a chain type communication display instrument group and a chain type communication method thereof, which relate to the technical fields of industrial automatic control, industrial data acquisition and the like and comprise a collector, a controller and a plurality of display instruments connected with the collector and the controller; the collector and the controller are used for collecting operation data in real time and sending address code information; the display instrument is used for displaying operation data in real time, receiving address code information sent by the collector and the controller, taking the address code as self-code after the address code is successfully checked, removing address and address check code data, changing into new data frames again and sending the new data frames to the next linked instrument, all the display instruments obtain the address code, and simultaneously, each instrument receives correct address and the instrument state is fed back to the sending host collector and the controller through the feedback code. The chain type communication of the collector, the controller and a plurality of display instruments is effectively realized.
Description
Technical Field
The invention belongs to the technical fields of industrial automatic control, industrial data acquisition and the like, and particularly relates to a chain type communication display instrument set and a chain type communication method thereof.
Background
In industrial application occasions, more operation data are required to be displayed, various instruments are adopted for displaying in the prior art, the number of the instruments is large, the cost is high, and the maintenance is inconvenient.
With the technical progress, the sensor function, data acquisition and calculation are realized by adopting a multifunctional collector or an industrial automatic control device, but when the sensor is operated on site, the key operation data still need to be displayed on site in real time for use and management.
Each display meter is of a plurality of types, each of which can display one or more data, and the meters are mounted on the panel of a control screen cabinet. As shown in fig. 1.
The traditional display mode comprises the following steps:
1) With SPI communication, a large number of chip selection signals are needed to select equipment, wiring is complex, and maintenance is inconvenient.
2) By adopting the asynchronous serial port mode, wiring is reduced, but each display instrument needs to be provided with an address, so that the cost is increased, the production management is complex, and the use and maintenance are inconvenient.
Disclosure of Invention
The invention aims to solve the technical problem of providing a chain type communication display instrument group and a chain type communication method thereof aiming at the defects of the background technology, which effectively realize chain type communication of a collector, a controller and a plurality of display instruments.
The invention adopts the following technical scheme for solving the technical problems:
a chain type communication display instrument group comprises a collector, a controller and a plurality of display instruments connected with the collector and the controller;
the collector and the controller are used for collecting operation data in real time and sending address code information;
the display instrument is used for displaying operation data in real time, receiving address code information sent by the collector and the controller, taking the address code as self-code after the address code is successfully checked, removing address and address check code data, changing into new data frames again and sending the new data frames to the next linked instrument, all the display instruments obtain the address code, and simultaneously, each instrument receives correct address and the instrument state is fed back to the sending host collector and the controller through the feedback code.
As a further preferable scheme of the chain type communication display instrument group, the collector and the controller comprise a data collection module, a multiplexing switch, a data preprocessing module, a controller module, a data transmission module, an encoder module, an interface module and a power supply module; the data acquisition module is connected with the controller through the data preprocessing module, and the controller is respectively connected with the data transmission module, the interface module and the power supply module.
As a further preferable scheme of the chain type communication display instrument group, the display instrument comprises a data receiving module, a decoder, a gain amplifier, a range converter, an RMS-DC converter, an analog-to-digital converter, an MCU module and an LCD display, wherein the data receiving module is connected with the MCU module through the decoder, the gain amplifier, the RMS-DC converter and the analog-to-digital converter in sequence, and the MCU module is respectively connected with the range converter and the LCD display.
As a further preferable scheme of the chain communication display instrument set of the invention, the interface module comprises a dali_rx end of the controller module, a dali_tx end of the MCU data processing module, a VCC voltage end, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first diode, a second diode, a third diode, a first zener diode, a first triode, a second triode, a third triode, an LM317 chip, a voltage stabilizing control chip, a first capacitor, a second capacitor, a third capacitor;
the VCC voltage end is respectively connected with one end of a first capacitor, the Vin end of a voltage stabilizing control chip and the cathode of a first diode, the anode of the first diode is respectively connected with the V0 end of the voltage stabilizing control chip, the cathode of a second diode and the DA+ end, one end of a first resistor is respectively connected with one end of a second resistor, the ADJ end of the voltage stabilizing control chip, the anode of the second diode and one end of the second capacitor, and the other end of the second resistor is respectively connected with the other end of the second capacitor, the other end of the first capacitor and the DA-end of the first capacitor and grounded;
the DA+ end is respectively connected with the grid electrode of the third triode, one end of the seventh resistor and the cathode of the voltage stabilizing diode, the anode of the voltage stabilizing diode is respectively connected with one end of the fifth resistor and one end of the sixth resistor, the other end of the fifth resistor is respectively connected with the cathode of the third diode, one end of the fourth resistor and the 5V voltage end through the first triode, the anode of the third diode is respectively connected with the DALI_RX end of the MCU and one end of the third resistor, the other end of the third resistor is connected with the 3.3V voltage end, the grid electrode of the third triode is respectively connected with one end of the tenth resistor and the collector of the second triode through the eleventh resistor, the other end of the tenth resistor is connected with the 5V voltage end, the base of the second triode is connected with one end of the eighth resistor and the DALI_TX end of the MCU through the ninth resistor, the other end of the eighth resistor is connected with the 3.3V voltage end, the other end of the fourth resistor, the other end of the sixth resistor, the emitter of the second triode and the DA-end are mutually connected with ground.
As a further preferable scheme of the chain communication display instrument group of the invention, the gain amplifier comprises a reference circuit for providing bias for the circuit and a variable gain control circuit connected with the reference circuit and used for controlling the gain of the regulating circuit, the variable gain circuit comprises a transistor M6, a transistor M7 and a transistor M8 which are connected with each other, the grid electrode of the transistor M8 is connected with a control voltage Vc and used for enabling the transistor M8 to work in a saturation region as a constant current source, the grid electrode of the transistor M7 is connected with the control voltage Vc and used for regulating the voltage value of the grid electrode of the transistor M7, the drain electrode of the transistor M7 is connected with a resistor R1, and the size and the bandwidth of the gain are controlled from regulating the resistance value of the resistor R1; one end of the resistor R1 is coupled with the drain electrode of the transistor M7 and then coupled with the direct current power supply input end VDD, and the other end of the resistor R1 is coupled with the drain electrode of the transistor M6 and then connected to the output end Vout; the grid electrode of the transistor M6 is connected with a reference circuit; the source of the transistor M6 and the source of the transistor M7 are coupled and then coupled to the drain of the transistor M8, and the gate of the transistor M7 is coupled to the external control voltage terminal Vc; the source of the transistor M8 is coupled to the ground GND, and the gate of the transistor M8 is coupled to the voltage source Vbias.
As a further preferable aspect of the chain communication display instrument set of the present invention, the reference circuit includes a transistor M1, a transistor M2, a transistor M3, a transistor M4, a transistor M5 connected to each other, the transistor M1 serving as a load tube of the input terminal differential pair; the grid electrode of the transistor M5 is connected with a reference voltage source Vs, so that the transistor M5 works in a saturation region and is used as a constant current source; the source of the transistor M1 is coupled to the source of the transistor M2 and then to the DC power input VDD, and the gate of the transistor M1 is coupled to the drain of the transistor M1 and then to the gate of the transistor M2 and the drain of the transistor M3; the gate of the transistor M3 is coupled to the input terminal inp, and the source of the transistor M3 is coupled to the drain of the transistor M5 after being coupled to the source of the transistor M4; the gate of the transistor M4 is coupled to the input terminal inn, the source of the transistor M5 is coupled to the ground terminal GND, and the gate of the transistor M5 is coupled to the voltage source Vs.
As a further preferable scheme of the chain type communication display instrument group, the decoder comprises a rotary transformer, an excitation circuit, a conditioning circuit, a signal driving circuit and a singlechip, wherein the rotary transformer is connected with the singlechip through the conditioning circuit and the signal driving circuit in sequence, and the signal driving circuit is connected with the rotary transformer through the excitation circuit.
As a further preferable mode of the chain communication display instrument set of the invention, the exciting circuit comprises a capacitor C1, a capacitor C7, a capacitor C8, a capacitor C12, a resistor R2, a resistor R3, a resistor R4, a resistor R6, a resistor R8, a resistor R11, a resistor R14, a resistor R15, a 5V voltage end, a 12V voltage end, an operational amplifier U1, an operational amplifier U2, an EXC interface,
Interface, OUTEXC interface, < >>
An interface; the 5V voltage end is connected with one end of a resistor R4, the other end of the resistor R4 is respectively connected with one end of a resistor R8, one end of a resistor R2, one end of a capacitor C7 and one end of a resistor R11, the other end of the resistor R8 is connected with the other end of the capacitor C7 and is grounded, the other end of the resistor R2 is connected with a pin 8 of an operational amplifier U1, a pin 1 of the operational amplifier U1 is respectively connected with one end of the capacitor C1 and a 12V voltage end, the other end of the capacitor C1 is grounded, and a pin 2 of the operational amplifier U1 is respectively connected with
One end of the interface, one end of the resistor R6 and one end of the capacitor C12, the other end of the resistor R6 is respectively connected with one end of the resistor R3 and the pin 7 of the operational amplifier U1, and the other end of the resistor R3 is connected with +.>
The interface, the other end of electric capacity C12 is connected OUTEXC interface, one end of resistance R15 and operational amplifier U2's pin 16 respectively, and operational amplifier U2's pin 9 is connected to the other end of resistance R11, and operational amplifier U2's pin 10 is connected the other end of resistance R15 and one end of resistance R14 respectively, and the other end of resistance R14 is connected the EXC interface.
As a further preferable scheme of the chained communication display instrument group, the MCU module adopts a Rassar 7F0C004 chip as a main control MCU, the internal high-speed oscillator system clock can reach 24MHz, 128KB codes Flash, 2KB data Flash and 8KB RAM are arranged in the chip, the data Flash can be used for storing the operation data of a gas meter, and the RAM is used for storing the operation data of the gas meter.
A chain communication method based on chain communication display instrument group specifically comprises the following steps;
after a certain instrument is damaged, the subsequent instrument work is not affected, the fault instrument automatically shorts the physical link of the instrument, after the fault instrument is shorted, the data received by the later instrument is inconsistent with the address codes, the data are fed back to the collector and the controller through the feedback code identification, and the collector and the controller automatically recode the data frame according to the fault type, so that self-adaption is realized.
Compared with the prior art, the technical scheme provided by the invention has the following technical effects:
the invention effectively realizes the chain communication of the collector, the controller and the plurality of display instruments, the collector and the controller firstly send address code information, each display instrument 1 receives data, the address code is used as self code after being checked successfully, the address 1 and the address 1 check code data are removed and changed into new data frames to be sent to the next linked instrument, and the like, the execution process is the same, all the display instruments obtain the address code, each instrument receives correct address and the instrument state is fed back to the sending host collector and the controller through the feedback code, after a certain instrument is damaged, the subsequent instrument is not influenced, the fault instrument automatically shorts the physical link of the instrument, after the short circuit, the received data of the following instrument is inconsistent with the address code, the data frame is automatically recoded by the collector/controller according to the fault type through the feedback code identification, and the self-adaption is realized.
Drawings
FIG. 1 is a schematic diagram of a prior art multiple display meter installation;
FIG. 2 is a schematic diagram of the physical linking of the collector and controller and multiple display meters of the present invention;
FIG. 3 is a schematic diagram of a chain address encoded frame format of the present invention;
FIG. 4 is a schematic diagram of a chained data frame format in accordance with the present invention;
FIG. 5 is a schematic diagram of the structure of the collector and controller of the present invention;
FIG. 6 is a schematic diagram of the structure of the display instrument of the present invention;
FIG. 7 is a circuit diagram of an interface module of the present invention;
fig. 8 is a circuit diagram of a gain amplifier of the present invention;
FIG. 9 is a schematic diagram of the structure of the decoder of the present invention;
fig. 10 is a circuit diagram of the excitation circuit of the present invention.
Description of the embodiments
The technical scheme of the invention is further described in detail below with reference to the accompanying drawings:
the following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
A chain type communication display instrument group comprises a collector, a controller and a plurality of display instruments connected with the collector and the controller;
the display instrument of this design is characterized by: the data displayed by each meter may be 1 to m, each meter may be different in m, and the number of meters installed at the same time is not limited, as may be any type.
The physical linking mode is shown in fig. 2;
the collector, the controller and the display instrument form a chain structure.
The chain address encoded frame format is shown in fig. 3.
The collector and controller transmit data, the data frame is as in fig. 4.
The collector and the controller firstly send address code information, each display instrument 1 receives data, after the data is checked successfully, the data is used for the display of the instrument, meanwhile, check code data from the data 11 to the data 1m and the data 1 are removed, new data frames are changed again and sent to the next linked instrument, and the like, the execution process is the same, and all the display instruments obtain the data.
And each instrument receives correct data and the instrument state is fed back to the sending host collector and the controller through the feedback code.
Self-adaption after fault occurrence
After a certain instrument is damaged, the subsequent instrument work is not affected, and the fault instrument automatically shorts the physical link of the instrument.
After short circuit, the data received by the later table is inconsistent with the address codes, the data is fed back to the collector/controller through the feedback code identification, and the collector/controller automatically recodes the data frame according to the fault type, so that self-adaption is realized.
As shown in fig. 5, the collector and the controller comprise a data collection module, a multiplexing switch, a data preprocessing module, a controller module, a data transmission module, an encoder module, an interface module and a power module; the data acquisition module is connected with the controller through the data preprocessing module, and the controller is respectively connected with the data transmission module, the interface module and the power supply module.
As shown in fig. 6, the display instrument includes a data receiving module, a decoder, a gain amplifier, a range converter, an RMS-DC converter, an analog-to-digital converter, an MCU module, and an LCD display, where the data receiving module is connected to the MCU module through the decoder, the gain amplifier, the RMS-DC converter, and the analog-to-digital converter in sequence, and the MCU module is respectively connected to the range converter and the LCD display.
Firstly, converting the voltage value of a signal source to be tested into the voltage range of an input signal of an RMS-DC converter through a gain amplifier, then connecting the output signal of the RMS-DC converter to the input end of an analog-digital converter, inputting the converted digital signal to a microcontroller in a serial mode, and sending the digital signal to a liquid crystal display to display a measurement result after software processing. If the input voltage of the signal to be detected is not within the proper range, the microcontroller outputs a corresponding control signal after judging, and the gain of the gain amplifier is adjusted through the range converter so as to realize the function of automatic conversion of the millivolt meter range.
The invention converts the voltage value of the signal source to be measured into the voltage range of the input signal of the RMS-DC converter through the gain amplifier, then connects the output signal of the RMS-DC converter to the input end of the analog-digital converter, inputs the converted digital signal to the microcontroller in a serial mode, and sends the processed digital signal to the liquid crystal display to display the measurement result; if the input voltage of the signal to be detected is not within the proper range, the microcontroller outputs a corresponding control signal after judging, and the gain of the gain amplifier is adjusted through the range converter so as to realize the function of automatic conversion of the millivolt meter range;
the digital alternating-current millivoltmeter has the advantages of wide measurement frequency band, high precision, high response speed, high input impedance, small frequency influence error, simple operation, convenient use, higher cost performance and the like, and has the functions of automatic conversion of measuring range, overranging alarm and the like; when voltage signals below 1 000 mV are measured, the maximum resolution can reach 0.001 and mV, so that the measurement requirement of weak signals can be met, and the method has wide market prospect and high popularization and application value;
the variable gain amplifier provided by the invention realizes a medium-low frequency variable gain amplifier, the variable gain control circuit adopts an analog circuit control structure, continuous adjustment of gain is realized, the gain adjustable range reaches 44dB, the 3dB bandwidth is 0Hz to 600MHz, the maximum output noise is-25 dB, the working voltage is 3.3V, and the variable gain amplifier has good linearity.
The range converter uses an 8-channel digitally controlled analog electronic switch CD4051 with 3 control inputs A, B, C and INH inputs, with low on-resistance and very low off-leakage current. When inh=1, all channels are off. When cba=000, the input terminal X0 is turned on, the input signal is amplified 200 times, and the corresponding range is 0 to 10 mV; when cba=001, the input terminal X1 is turned on, the input signal is amplified 20 times, and the corresponding range is 10 to 100 mV; when cba=010, the input terminal X2 is turned on, the input signal is amplified 2 times, and the corresponding range is 100 to 1 000 mV. The CD4051 output terminal (X) is connected with the input terminal (Vin) of the RMS-DC converter
The RMS-DC converter adopts an RMS-DC conversion device AD637 of ADI company. The RMS-DC conversion device AD637 of ADI company is selected from the factors of precision, bandwidth, power consumption, input signal level, crest factor and stable time. AD637 belongs to a high-accuracy single-chip true effective value/direct current converter, and the upper frequency limit of 1 000 mV (RMS) input is up to 5 MHz under the condition of plus or minus 3dB additional errors. An independent buffer amplifier is arranged in the device, so that the device can be used as an input buffer, and an active filter can be formed to reduce ripple waves and improve measurement accuracy; the input terminal is provided with a voltage protection circuit, and even if Vin exceeds the power supply voltage, the chip is not damaged generally.
The a/D conversion circuit employs a 12-bit high precision chip MAX187, which is proposed by MAXIM company in the united states. The MAX187 serial 12-bit analog-to-digital converter can work under a single + V power supply, and the analog input voltage is 0-5V. MAX187 is a successive approximation ADC, fast sample/hold (1.5 μs), on-chip clock, high speed 3-wire serial interface. The MAX187 power supply requires the addition of decoupling capacitance, using a 4.7 uf capacitance in parallel with a 0.1 uf capacitance. Pin 4 is a reference terminal connected to a 4.7 μF capacitor using an internal 4.096V reference voltage.
After MAX187 is powered up, 20 ms, the capacitor connected with the reference voltage pin is charged, and the working state is entered. When the enable terminal CS is set to a low level, the internal track/hold (T/H) enters a hold state and initiates a transition, which is completed, DOUT outputs a level. At this time, a shift pulse is input to the SCLK end to sequentially read the 12-bit conversion result from the most significant bit to the least significant bit. The CS terminal may be set to low level, the shift pulse may be sent after 8.5 μs, the conversion result may be read, and the CS may be set to high level after all 12 bits of the result are read.
As shown in fig. 7, the interface module includes a dali_rx end of the controller module, a dali_tx end of the MCU data processing module, a VCC voltage end, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first diode, a second diode, a third diode, a first zener diode, a first triode, a second triode, a third triode, an LM317 chip, a regulator control chip, a first capacitor, a second capacitor, and a third capacitor;
the VCC voltage end is respectively connected with one end of a first capacitor, the Vin end of a voltage stabilizing control chip and the cathode of a first diode, the anode of the first diode is respectively connected with the V0 end of the voltage stabilizing control chip, the cathode of a second diode and the DA+ end, one end of a first resistor is respectively connected with one end of a second resistor, the ADJ end of the voltage stabilizing control chip, the anode of the second diode and one end of the second capacitor, and the other end of the second resistor is respectively connected with the other end of the second capacitor, the other end of the first capacitor and the DA-end of the first capacitor and grounded;
the DA+ end is respectively connected with the grid electrode of the third triode, one end of the seventh resistor and the cathode of the voltage stabilizing diode, the anode of the voltage stabilizing diode is respectively connected with one end of the fifth resistor and one end of the sixth resistor, the other end of the fifth resistor is respectively connected with the cathode of the third diode, one end of the fourth resistor and the 5V voltage end through the first triode, the anode of the third diode is respectively connected with the DALI_RX end of the MCU and one end of the third resistor, the other end of the third resistor is connected with the 3.3V voltage end, the grid electrode of the third triode is respectively connected with one end of the tenth resistor and the collector of the second triode through the eleventh resistor, the other end of the tenth resistor is connected with the 5V voltage end, the base of the second triode is connected with one end of the eighth resistor and the DALI_TX end of the MCU through the ninth resistor, the other end of the eighth resistor is connected with the 3.3V voltage end, the other end of the fourth resistor, the other end of the sixth resistor, the emitter of the second triode and the DA-end are mutually connected with ground.
The interface module circuit of the invention adopts the LM317 voltage stabilizing control chip to provide working voltage for the MCU to provide output stable voltage for the bus interface, effectively improves the anti-interference capability of the interface in transmission, can adapt to the level signal range specified by the DALI 2.0 standard, and improves the reliability of the system.
As shown in fig. 8, the gain amplifier comprises a reference circuit for providing bias for the circuit and a variable gain control circuit connected with the reference circuit for controlling and adjusting the gain of the circuit, wherein the variable gain circuit comprises a transistor M6, a transistor M7 and a transistor M8 which are connected with each other, the gate of the transistor M8 is connected with a control voltage Vc for enabling the transistor M8 to work in a saturation region as a constant current source, the gate of the transistor M7 is connected with the control voltage Vc for adjusting the voltage value of the gate of the transistor M7, the drain of the transistor M7 is connected with a resistor R1, and the magnitude and bandwidth of the gain are controlled from adjusting the resistance value of the resistor R1; one end of the resistor R1 is coupled with the drain electrode of the transistor M7 and then coupled with the direct current power supply input end VDD, and the other end of the resistor R1 is coupled with the drain electrode of the transistor M6 and then connected to the output end Vout; the grid electrode of the transistor M6 is connected with a reference circuit; the source of the transistor M6 and the source of the transistor M7 are coupled and then coupled to the drain of the transistor M8, and the gate of the transistor M7 is coupled to the external control voltage terminal Vc; the source of the transistor M8 is coupled to the ground GND, and the gate of the transistor M8 is coupled to the voltage source Vbias.
The reference circuit comprises a transistor M1, a transistor M2, a transistor M3, a transistor M4 and a transistor M5 which are connected with each other, wherein the transistor M1 is used as a load tube of an input end differential pair; the grid electrode of the transistor M5 is connected with a reference voltage source Vs, so that the transistor M5 works in a saturation region and is used as a constant current source; the source of the transistor M1 is coupled to the source of the transistor M2 and then to the DC power input VDD, and the gate of the transistor M1 is coupled to the drain of the transistor M1 and then to the gate of the transistor M2 and the drain of the transistor M3; the gate of the transistor M3 is coupled to the input terminal inp, and the source of the transistor M3 is coupled to the drain of the transistor M5 after being coupled to the source of the transistor M4; the gate of the transistor M4 is coupled to the input terminal inn, the source of the transistor M5 is coupled to the ground terminal GND, and the gate of the transistor M5 is coupled to the voltage source Vs. A variable gain amplifier realizes a medium-low frequency variable gain amplifier, the variable gain control circuit adopts an analog circuit control structure, continuous adjustment of gain is realized, the gain adjustable range reaches 44dB, the 3dB bandwidth is 0Hz to 600MHz, the maximum output noise is-25 dB, the working voltage is 3.3V, and the variable gain amplifier has good linearity.
As shown in fig. 9, the decoder comprises a rotary transformer, an excitation circuit, a conditioning circuit, a signal driving circuit and a singlechip, wherein the rotary transformer is connected with the singlechip through the conditioning circuit and the signal driving circuit in sequence, and the signal driving circuit is connected with the rotary transformer through the excitation circuit. The peripheral circuit of the AD2S1205 minimum system is designed for providing high-frequency stable sine wave excitation for the rotary excitation winding, enabling sine and cosine signals output by the rotary excitation winding to meet the input requirement of a decoding chip, and simultaneously guaranteeing that the angular position/angular speed signals output by the decoding chip to the singlechip have enough driving capability. The peripheral circuit mainly comprises an excitation circuit, a signal conditioning circuit and a signal driving circuit.
As shown in FIG. 10, the exciting circuit comprises a capacitor C1, a capacitor C7, a capacitor C8, a capacitor C12, a resistor R2, a resistor R3, a resistor R4, a resistor R6, a resistor R8, a resistor R11, a resistor R14, a resistor R15, a 5V voltage terminal, a 12V voltage terminal, an operational amplifier U1, an operational amplifier U2, an EXC interface,
Interface, OUTEXC interface, < >>
An interface; the 5V voltage end is connected with one end of a resistor R4, the other end of the resistor R4 is respectively connected with one end of a resistor R8, one end of a resistor R2, one end of a capacitor C7 and one end of a resistor R11, the other end of the resistor R8 is connected with the other end of the capacitor C7 and grounded, the other end of the resistor R2 is connected with a pin 8 of an operational amplifier U1, and a pin 1 of the operational amplifier U1 is respectively connected with the capacitor COne end of the capacitor C1 is grounded, one end of the capacitor C1 and the 12V voltage end are connected with the pin 2 of the operational amplifier U1 respectively>
One end of the interface, one end of the resistor R6 and one end of the capacitor C12, the other end of the resistor R6 is respectively connected with one end of the resistor R3 and the pin 7 of the operational amplifier U1, and the other end of the resistor R3 is connected with +.>
The interface, the other end of electric capacity C12 is connected OUTEXC interface, one end of resistance R15 and operational amplifier U2's pin 16 respectively, and operational amplifier U2's pin 9 is connected to the other end of resistance R11, and operational amplifier U2's pin 10 is connected the other end of resistance R15 and one end of resistance R14 respectively, and the other end of resistance R14 is connected the EXC interface.
The design of the exciting circuit needs to consider the driving strength of the AD2S1205 on the exciting winding, and gives consideration to the gain of the sine exciting signal, and meanwhile, certain filtering and noise removing treatment must be carried out on the output signal of the driving chip. As shown in fig. 4, the EXC and the output pin of the excitation signal of AD2S1205 are sine wave signals with a center voltage of 2.5V and a peak voltage of 3.6V, and the two pins will generate differential signals with a peak voltage of 7.2V. In the design, the rotation transformation ratio is 0.286, if the exciting circuit is a unit gain, the peak value of sine and cosine signals output to the decoding chip by rotation transformation is only 2V, and the requirement of input voltage (the allowable voltage of the input end is 3.15V +/-27%) of the decoding chip is met, so that the exciting signal is amplified by the double-power operational amplifier TCA0372 DM.
The MCU module adopts a Ruisar 7F0C004 chip as a main control MCU, the system clock of the internal high-speed oscillator can reach 24MHz, 128KB code Flash, 2KB data Flash and 8KB RAM are arranged in the chip, the data Flash can be used for storing the operation data of the gas meter, and the RAM is used for storing the operation data of the gas meter.
While certain exemplary embodiments of the present invention have been described above by way of illustration only, it will be apparent to those of ordinary skill in the art that modifications may be made to the described embodiments in various different ways without departing from the spirit and scope of the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive of the scope of the invention, which is defined by the appended claims.
Claims (2)
1. The utility model provides a chain communication shows instrument group which characterized in that: the system comprises a collector, a controller and a plurality of display instruments connected with the collector and the controller;
the collector and the controller are used for collecting operation data in real time and sending address code information;
the display instrument is used for displaying running data in real time, receiving address code information sent by the collector and the controller, taking the address code as a self code after the address code is successfully checked, removing address and address check code data, changing the address and address check code data into new data frames again, and sending the new data frames to the next linked instrument, wherein all the display instruments obtain the address code, and simultaneously, each instrument receives correct address and the instrument state is fed back to the sending host collector and the controller through a feedback code;
the collector and the controller comprise a data collection module, a multiplexing switch, a data preprocessing module, a controller module, a data transmission module, an encoder module, an interface module and a power module; the data acquisition module is connected with the controller through the data preprocessing module, and the controller is respectively connected with the data transmission module, the interface module and the power supply module;
the display instrument comprises a data receiving module, a decoder, a gain amplifier, a range converter, an RMS-DC converter, an analog-to-digital converter, an MCU module and an LCD display, wherein the data receiving module is connected with the MCU module through the decoder, the gain amplifier, the RMS-DC converter and the analog-to-digital converter in sequence, and the MCU module is respectively connected with the range converter and the LCD display;
the interface module comprises a DALI_RX end of the controller module, a DALI_TX end of the MCU data processing module, a VCC voltage end, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first diode, a second diode, a third diode, a first zener diode, a first triode, a second triode, a third triode, an LM317 chip, a voltage stabilizing control chip, a first capacitor, a second capacitor and a third capacitor;
the VCC voltage end is respectively connected with one end of a first capacitor, the Vin end of a voltage stabilizing control chip and the cathode of a first diode, the anode of the first diode is respectively connected with the V0 end of the voltage stabilizing control chip, the cathode of a second diode and the DA+ end, one end of a first resistor is respectively connected with one end of a second resistor, the ADJ end of the voltage stabilizing control chip, the anode of the second diode and one end of the second capacitor, and the other end of the second resistor is respectively connected with the other end of the second capacitor, the other end of the first capacitor and the DA-end of the first capacitor and grounded;
the DA+ end is respectively connected with the grid electrode of the third triode, one end of the seventh resistor and the cathode of the voltage stabilizing diode, the anode of the voltage stabilizing diode is respectively connected with one end of the fifth resistor and one end of the sixth resistor, the other end of the fifth resistor is respectively connected with the cathode of the third diode, one end of the fourth resistor and the 5V voltage end through the first triode, the anode of the third diode is respectively connected with the DALI_RX end of the MCU and one end of the third resistor, the other end of the third resistor is connected with the 3.3V voltage end, the grid electrode of the third triode is respectively connected with one end of the tenth resistor and the collector of the second triode through the eleventh resistor, the other end of the tenth resistor is connected with the 5V voltage end, the base of the second triode is connected with one end of the eighth resistor and the DALI_TX end of the MCU through the ninth resistor, the other end of the eighth resistor is connected with the 3.3V voltage end, the other end of the fourth resistor, the other end of the sixth resistor and the emitter of the second triode and the DA-end are mutually connected with ground;
the gain amplifier comprises a reference circuit for providing bias for the circuit and a variable gain control circuit connected with the reference circuit and used for controlling and adjusting the gain of the circuit, wherein the variable gain control circuit comprises a transistor M6, a transistor M7 and a transistor M8 which are mutually connected, the grid electrode of the transistor M8 is connected with a control voltage Vc and used for enabling the transistor M8 to work in a saturation region to serve as a constant current source, the grid electrode of the transistor M7 is connected with the control voltage Vc and used for adjusting the voltage value of the grid electrode of the transistor M7, the drain electrode of the transistor M7 is connected with a resistor R1, and the size and the bandwidth of the gain are controlled from the resistance value of the resistor R1; one end of the resistor R1 is coupled with the drain electrode of the transistor M7 and then coupled with the direct current power supply input end VDD, and the other end of the resistor R1 is coupled with the drain electrode of the transistor M6 and then connected to the output end Vout; the grid electrode of the transistor M6 is connected with a reference circuit; the source of the transistor M6 and the source of the transistor M7 are coupled and then coupled to the drain of the transistor M8, and the gate of the transistor M7 is coupled to the external control voltage terminal Vc; the source of the transistor M8 is coupled to the ground GND, and the gate of the transistor M8 is coupled to the voltage source Vbias;
the reference circuit comprises a transistor M1, a transistor M2, a transistor M3, a transistor M4 and a transistor M5 which are connected with each other, wherein the transistor M1 is used as a load tube of an input end differential pair; the grid electrode of the transistor M5 is connected with a reference voltage source Vs, so that the transistor M5 works in a saturation region and is used as a constant current source; the source of the transistor M1 is coupled to the source of the transistor M2 and then to the DC power input VDD, and the gate of the transistor M1 is coupled to the drain of the transistor M1 and then to the gate of the transistor M2 and the drain of the transistor M3; the gate of the transistor M3 is coupled to the input terminal inp, and the source of the transistor M3 is coupled to the drain of the transistor M5 after being coupled to the source of the transistor M4; the gate of the transistor M4 is coupled to the input terminal inn, the source of the transistor M5 is coupled to the ground terminal GND, and the gate of the transistor M5 is coupled to the voltage source Vs;
the decoder comprises a rotary transformer, an excitation circuit, a conditioning circuit, a signal driving circuit and a singlechip, wherein the rotary transformer is connected with the singlechip through the conditioning circuit and the signal driving circuit in sequence, and the signal driving circuit is connected with the rotary transformer through the excitation circuit;
the exciting circuit comprises a capacitor C1, a capacitor C7, a capacitor C8, a capacitor C12, a resistor R2, a resistor R3, a resistor R4, a resistor R6, a resistor R8, a resistor R11, a resistor R14, a resistor R15, a 5V voltage end, a 12V voltage end, an operational amplifier U1, an operational amplifier U2, an EXC interface, a capacitor C,
Interface, OUTEXC interface, < >>
An interface; the 5V voltage end is connected with one end of a resistor R4, the other end of the resistor R4 is respectively connected with one end of a resistor R8, one end of a resistor R2, one end of a capacitor C7 and one end of a resistor R11, the other end of the resistor R8 is connected with the other end of the capacitor C7 and is grounded, the other end of the resistor R2 is connected with a pin 8 of an operational amplifier U1, a pin 1 of the operational amplifier U1 is respectively connected with one end of the capacitor C1 and a 12V voltage end, the other end of the capacitor C1 is grounded, and a pin 2 of the operational amplifier U1 is respectively connected with>
One end of the interface, one end of the resistor R6 and one end of the capacitor C12, the other end of the resistor R6 is respectively connected with one end of the resistor R3 and the pin 7 of the operational amplifier U1, and the other end of the resistor R3 is connected with +.>
The interface, the other end of the electric capacity C12 connects OUTEXC interface, one end of the resistance R15 and pin 16 of the operational amplifier U2 separately, another end of the resistance R11 connects pin 9 of the operational amplifier U2, the pin 10 of the operational amplifier U2 connects another end of the resistance R15 and one end of the resistance R14 separately, another end of the resistance R14 connects EXC interface;
the MCU module adopts a Ruisar 7F0C004 chip as a main control MCU, the system clock of the internal high-speed oscillator can reach 24MHz, 128KB code Flash, 2KB data Flash and 8KB RAM are arranged in the chip, the data Flash can be used for storing the operation data of the gas meter, and the RAM is used for storing the operation data of the gas meter.
2. A chain communication method based on the chain communication display instrument set according to claim 1, characterized in that: the method specifically comprises the following steps of;
step 1, a collector and a controller firstly send address code information;
step 2, each display instrument 1 receives data, checks the data, and then uses the data for the display of the instrument, meanwhile, removes check code data from the data 11 to the data 1m and the data 1, changes the data into a new data frame again and sends the new data frame to the next linked instrument, and the like, wherein the execution process is the same, and all the display instruments obtain the data;
step 3, each instrument receives the correct data and the instrument state to feed back to the sending host collector and the controller through the feedback code;
after a certain instrument is damaged, the subsequent instrument work is not affected, the fault instrument automatically shorts the physical link of the instrument, after the fault instrument is shorted, the data received by the later instrument is inconsistent with the address codes, the data are fed back to the collector and the controller through the feedback code identification, and the collector and the controller automatically recode the data frame according to the fault type, so that self-adaption is realized.
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| CN201060229Y (en) * | 2007-05-09 | 2008-05-14 | 张少勇 | Bus type digital instrument |
| US10311010B2 (en) * | 2011-10-05 | 2019-06-04 | Analog Devices, Inc. | Two-wire communication systems and applications |
| CN106597917A (en) * | 2016-11-02 | 2017-04-26 | 武汉智明力强光电系统有限公司 | Intelligent industrial control instrument suitable for integrated signal management |
| CN109993958B (en) * | 2019-05-08 | 2021-06-11 | 深圳市共济科技股份有限公司 | Data acquisition system and method of RS485 bus |
| CN213069024U (en) * | 2020-06-11 | 2021-04-27 | 宝雨控股有限公司 | Multifunctional instrument of digital display power network |
| CN213690938U (en) * | 2020-11-18 | 2021-07-13 | 杭州中沛电子有限公司 | LORA changes NB-IOT's data collection station |
| CN114363109B (en) * | 2022-01-05 | 2022-10-21 | 北京芯格诺微电子有限公司 | Pulse width modulation single-wire bus communication method based on edge synchronization |
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