CN115858132A

CN115858132A - Thread scheduling method, thread scheduling device, thread scheduling chip, electronic equipment and storage medium

Info

Publication number: CN115858132A
Application number: CN202310176816.9A
Authority: CN
Inventors: 李德建; 刘先华; 张喆; 赵秀嘉; 李伟立; 程旭; 李雷; 种挺
Original assignee: Peking University; Beijing Smartchip Microelectronics Technology Co Ltd
Current assignee: Peking University; Beijing Smartchip Microelectronics Technology Co Ltd
Priority date: 2023-02-28
Filing date: 2023-02-28
Publication date: 2023-03-28

Abstract

The invention discloses a thread scheduling method, a thread scheduling device, a thread scheduling chip, electronic equipment and a storage medium. The method comprises the following steps: determining a thread slot corresponding to the next period from a first state register, wherein the first state register comprises a plurality of thread slots, and the thread slots are used for storing thread information of a plurality of threads according to a preset thread scheduling sequence; determining a thread expected to be scheduled in the next week based on thread information stored in a thread slot corresponding to the next cycle; if the thread expected to be scheduled in the next week is a hard real-time thread and the hard real-time thread is in an active state, scheduling the hard real-time thread in the next period; and if the thread expected to be scheduled next week is a hard real-time thread and the hard real-time thread is in a dormant state, or the thread expected to be scheduled next week is a soft real-time thread, determining a soft real-time thread of the next cycle according to the soft real-time thread scheduled last time, and scheduling the soft real-time thread in the next cycle. Therefore, the threads of different levels can meet the time constraint, and the throughput rate of the system can be improved.

Description

Thread scheduling method, thread scheduling device, thread scheduling chip, electronic equipment and storage medium

Technical Field

The present invention relates to the field of computer application technologies, and in particular, to a method, an apparatus, a chip, an electronic device, and a storage medium for thread scheduling.

Background

With the development of real-time systems, a mixed key system integrating multiple applications in the same system is becoming a research hotspot in the real-time field. The key levels of a plurality of different applications in a mixed key system are different, and the requirements for real-time performance are also different. One of the important contents for designing a hybrid critical system is to implement resource isolation to reduce interference between tasks and ensure that tasks of different critical levels can meet time constraints through efficient task scheduling.

In order to ensure that tasks of different levels are not interfered under the condition of computing resource sharing, a proper isolation and scheduling strategy needs to be provided. Common isolation strategies include hardware-based isolation, software-based isolation, and software-hardware combination-based isolation, but the isolation strategies in the related art have the problem of low system throughput.

It is noted that the information disclosed in this background section is only for background understanding of the concepts of the application and, therefore, it may contain information that does not form the prior art.

Disclosure of Invention

The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, the invention aims to provide a thread scheduling method, a thread scheduling device, a thread scheduling chip, an electronic device and a storage medium, wherein status registers are arranged for threads of different levels to guide hardware automatic scheduling of the threads, so that the threads of different levels can meet time constraints, and soft real-time threads are scheduled based on idle cycles while the hard real-time threads are scheduled at a fixed frequency, so that the throughput rate of a system is improved.

To achieve the above object, an embodiment of a first aspect of the present invention provides a thread scheduling method, where the method includes: determining a thread slot corresponding to the next period from a first state register, wherein the first state register comprises a plurality of thread slots, and the thread slots are used for storing thread information of a plurality of threads according to a preset thread scheduling sequence; determining a thread expected to be scheduled in the next week based on thread information stored in a thread slot corresponding to the next cycle; if the thread expected to be scheduled in the next week is a hard real-time thread and the hard real-time thread is in an active state, scheduling the hard real-time thread in the next cycle; and if the thread expected to be scheduled next week is a hard real-time thread and the hard real-time thread is in a dormant state, or the thread expected to be scheduled next week is a soft real-time thread, determining a soft real-time thread of the next cycle according to the soft real-time thread scheduled last time, and scheduling the soft real-time thread in the next cycle.

In some embodiments of the present invention, the thread information includes identification information of the hard real-time thread and flag information of the soft real-time thread, and determining a thread expected to be scheduled in the next week based on the thread information stored in the thread slot corresponding to the next cycle includes: if the thread information is the identification information, determining that the thread expected to be scheduled in the next week is a hard real-time thread; and if the thread information is the mark information, determining the thread expected to be scheduled in the next week as a soft real-time thread.

In some embodiments of the invention, after determining that the thread expected to be scheduled in the next week is a hard real-time thread, the method further comprises: and determining the state of the hard real-time thread from a second state register based on the identification information, wherein the second state register is used for storing the state of the hard real-time thread corresponding to the identification information, and the state comprises an active state and a dormant state.

In some embodiments of the invention, determining the soft real-time thread for the next cycle based on the last scheduled soft real-time thread comprises: and determining the soft real-time thread of the next period from a second status register according to the soft real-time thread scheduled last time, wherein the second status register is used for storing the mark information and the state of the soft real-time thread according to the preset thread scheduling sequence, and the state comprises an active state and a dormant state.

In some embodiments of the invention, the thread scheduling method further comprises: responding to a creating instruction of the hard real-time thread, and allocating an exclusive thread slot to the hard real-time thread; in response to a soft real-time thread creation instruction, a common thread slot is allocated to the soft real-time thread.

In some embodiments of the invention, the thread scheduling method further comprises: responding a modification instruction for modifying the soft real-time thread into the hard real-time thread, and if the soft real-time thread has an exclusive thread slot, keeping the thread slot unchanged; if the soft real-time thread does not have the exclusive thread slot, allocating the exclusive thread slot to the soft real-time thread; and if the soft real-time thread is the only soft real-time thread, allocating an exclusive thread slot to the soft real-time thread, and removing the common thread slot corresponding to the soft real-time thread.

In some embodiments of the invention, the thread scheduling method further comprises: responding a modification instruction for modifying the hard real-time thread into the soft real-time thread, and if the hard real-time thread does not have an exclusive thread slot, keeping the thread slot unchanged; if the hard real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the hard real-time thread; and if the soft real-time thread does not exist and the shared thread slot corresponding to the soft real-time thread does not exist, the shared thread slot is allocated to the hard real-time thread.

In some embodiments of the invention, the thread scheduling method further comprises: determining that the hard real-time thread exits, and removing an exclusive thread slot corresponding to the hard real-time thread; determining that the soft real-time thread exits, and if the soft real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the soft real-time thread; and determining that the soft real-time thread exits, and removing the shared thread slot corresponding to the soft real-time thread if the soft real-time thread is the only soft real-time thread.

In some embodiments of the invention, the thread scheduling method further comprises: and responding to a sleep instruction of the thread, controlling the thread to enter a sleep state, and controlling the thread to enter an active state when the current time reaches a target time, wherein the thread is a hard real-time thread or a soft real-time thread, the sleep instruction is a delay instruction or a waiting instruction, the current time is acquired by a current time acquisition instruction, and the target time is determined by a target time setting instruction.

In some embodiments of the invention, the thread scheduling method further comprises: responding to an interrupt instruction of the thread, and controlling the thread to enter an active state, wherein the interrupt instruction is used for triggering interrupt when the current time reaches a target time, the interrupt instruction is a normal interrupt instruction or an abnormal interrupt instruction, the thread is a hard real-time thread or a soft real-time thread, the current time is obtained by a current time obtaining instruction, and the target time is determined by a target time setting instruction.

To achieve the above object, a second aspect of the present invention provides a computer-readable storage medium, on which a program is stored, and the program, when executed by a processor, implements the thread scheduling method of any of the above embodiments.

To achieve the above object, a third embodiment of the present invention provides a chip, including: the thread scheduling method comprises the steps of storing a program, executing the program, and executing the program.

To achieve the above object, a fourth aspect of the present invention provides an electronic device, including the foregoing chip.

In order to achieve the above object, a fifth embodiment of the present invention provides a thread scheduling apparatus, including: the determining module is used for determining a thread slot corresponding to the next cycle from the first status register and determining a thread expected to be scheduled in the next cycle based on thread information stored in the thread slot corresponding to the next cycle, wherein the first status register comprises a plurality of thread slots, and the thread slots are used for storing the thread information of the threads according to a preset thread scheduling sequence; and the scheduling module is used for scheduling the hard real-time thread in the next period if the thread expected to be scheduled in the next period is the hard real-time thread and the hard real-time thread is in an active state, determining the soft real-time thread in the next period according to the soft real-time thread scheduled last time if the thread expected to be scheduled in the next period is the hard real-time thread and the hard real-time thread is in a dormant state, or scheduling the soft real-time thread in the next period.

In some embodiments of the invention, the thread information includes identification information of the hard real-time thread and flag information of the soft real-time thread, and the determining module is further configured to: if the thread information is the identification information, determining that the thread expected to be scheduled in the next week is a hard real-time thread; and if the thread information is the mark information, determining that the thread expected to be scheduled in the next week is a soft real-time thread.

In some embodiments of the invention, the determining module is further configured to: and after determining that the thread expected to be scheduled in the next week is a hard real-time thread, determining the state of the hard real-time thread from a second state register based on the identification information, wherein the second state register is used for storing the state of the hard real-time thread corresponding to the identification information, and the state comprises an active state and a dormant state.

In some embodiments of the invention, the scheduling module is further configured to: and determining the soft real-time thread of the next period from a second status register according to the soft real-time thread scheduled last time, wherein the second status register is used for storing the mark information and the state of the soft real-time thread according to the preset thread scheduling sequence, and the state comprises an active state and a dormant state.

In some embodiments of the present invention, the thread scheduling apparatus further comprises: and the allocation module is used for responding to the establishment instruction of the hard real-time thread, allocating an exclusive thread slot to the hard real-time thread, and responding to the establishment instruction of the soft real-time thread, and allocating a common thread slot to the soft real-time thread.

In some embodiments of the invention, the assignment module is further configured to: responding a modification instruction for modifying the soft real-time thread into the hard real-time thread, and if the soft real-time thread has an exclusive thread slot, keeping the thread slot unchanged; if the soft real-time thread does not have the exclusive thread slot, allocating the exclusive thread slot to the soft real-time thread; and if the soft real-time thread is the only soft real-time thread, allocating an exclusive thread slot to the soft real-time thread, and removing the common thread slot corresponding to the soft real-time thread.

In some embodiments of the invention, the assignment module is further to: responding a modification instruction for modifying the hard real-time thread into the soft real-time thread, and if the hard real-time thread does not have an exclusive thread slot, keeping the thread slot unchanged; if the hard real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the hard real-time thread; and if the soft real-time thread does not exist and the shared thread slot corresponding to the soft real-time thread does not exist, the shared thread slot is allocated to the hard real-time thread.

In some embodiments of the invention, the assignment module is further configured to: determining that the hard real-time thread exits, and removing an exclusive thread slot corresponding to the hard real-time thread; determining that the soft real-time thread exits, and if the soft real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the soft real-time thread; and determining that the soft real-time thread exits, and removing the shared thread slot corresponding to the soft real-time thread if the soft real-time thread is the only soft real-time thread.

In some embodiments of the present invention, the thread scheduling apparatus further comprises: and the execution module is used for responding to a sleep instruction of the thread, controlling the thread to enter a sleep state, and controlling the thread to enter an active state when the current time reaches a target time, wherein the thread is a hard real-time thread or a soft real-time thread, the sleep instruction is a delay instruction or a waiting instruction, the current time is acquired by a current time acquisition instruction, and the target time is determined by a target time setting instruction.

In some embodiments of the invention, the execution module is further to: and responding to an interrupt instruction of the thread, and controlling the thread to enter an active state, wherein the interrupt instruction is used for triggering interrupt when the current time reaches a target time, and the interrupt instruction is a normal interrupt instruction or an abnormal interrupt instruction.

According to the thread scheduling method, the thread scheduling device, the thread scheduling chip, the electronic equipment and the storage medium, the thread slot corresponding to the next period is determined from the first state register, and the thread expected to be scheduled in the next period is determined based on the thread information stored in the thread slot corresponding to the next period; if the thread expected to be scheduled in the next week is a hard real-time thread and the hard real-time thread is in an active state, scheduling the hard real-time thread in the next period; and if the thread expected to be scheduled next week is a hard real-time thread and the hard real-time thread is in a dormant state, or the thread expected to be scheduled next week is a soft real-time thread, determining a soft real-time thread of the next cycle according to the soft real-time thread scheduled last time, and scheduling the soft real-time thread in the next cycle. Therefore, the state registers are arranged for the threads of different levels to guide the hardware of the threads to automatically schedule, so that the threads of different levels can meet time constraints, the hard real-time threads can be scheduled at a fixed frequency, meanwhile, the soft real-time threads are scheduled based on an idle period, and the throughput rate of the system is improved.

Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.

Drawings

The above and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

FIG. 1 is a flow diagram illustrating a thread scheduling method according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating the contents of a status register for a thread scheduling method according to one embodiment of the present invention.

FIG. 3 is a thread scheduling diagram of a thread scheduling method according to an embodiment of the present invention.

FIG. 4 is a thread state transition diagram of a thread scheduling method according to an embodiment of the present invention.

FIG. 5 is a block diagram of a chip according to one embodiment of the invention.

Fig. 6 is a block diagram of an electronic device according to an embodiment of the present invention.

Fig. 7 is a block diagram of a thread scheduling apparatus according to an embodiment of the present invention.

Fig. 8 is a block diagram of a thread scheduling apparatus according to another embodiment of the present invention.

Detailed Description

Reference will now be made in detail to the embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are illustrative and intended to explain the present invention and should not be construed as limiting the present invention.

A typical hybrid critical system consists of a finite set of building blocks, each containing a critical level L, and a finite set of sporadic (sporadic) tasks. Each task τ i may be defined as a quadruple, i.e., τ i = ({ Til }, di, { Cil }, li), where Til represents the minimum period of the task τ i at the key level i, di represents the deadline of the task τ i, cil represents the execution time of the task τ i at the key level i, and Li represents the key level of the task τ i. For { Til } and { Cil }: the method is characterized in that L1 is larger than L2 \8658, ti1 is smaller than or equal to Ti2, L1 is larger than L2 \8658, and Ci1 is larger than or equal to Ci2, namely, the higher the key level of the task is, the smaller the minimum period of the task is, and the longer the execution time is in the worst case. However, for higher critical level tasks, more events need to be handled, requiring shorter cycles to meet the time constraints.

The scheduling method of the mixed key system aiming at the single-thread processor can be roughly divided into fixed priority scheduling and dynamic priority scheduling. The fixed priority Scheduling may perform task Scheduling based on a Response Time Analysis (RTA) method or a Slack Scheduling (Slack Scheduling) method, and may optimize the Scheduling method based on a Period transformation (Period transformation) method; the dynamic priority scheduling may be based on an Early Deadline First (EDF) method for task scheduling.

In order to ensure that tasks of different levels are not interfered under the condition of computing resource sharing, a proper isolation and scheduling strategy needs to be provided. Common isolation strategies are hardware-based isolation, software-based isolation, and isolation based on a combination of hardware and software. For example, there are many programming languages and programming models that include features for timing control, such as Ada (a computer programming language), real-Time Euclid (a computer programming language), labVIEW (a program development environment), PTIDES (an embedded model), and so on. Ada provides a Dealy keyword, and can block the running of tasks in Ada until a certain time is reached; the task function of Ada may express common real-time task types, such as periodic tasks and event-driven tasks; ada language also supports task scheduling strategies such as an EDF (early delay First) algorithm and the like. Each structure in the Real-Time euclidd specification language requires temporal or spatial constraints to ensure schedulability of threads. The real-time module provided by LabVIEW can be used for a user to intuitively develop parallel tasks and acquire a time sequence with higher reliability and accuracy. PTIDES is a programming model designed for time-synchronized distributed real-time systems that specifies functions and timing in event-triggered distributed systems.

As with programming languages, implementing timing control in an instruction system also requires hardware implementation and support of a chain of compilation tools. The sequential instructions in the instruction system are more bottom-level than the programming language, and can provide guidance for hardware design to realize more accurate real-time semantics, for example, the sequential instruction dead is used for specifying the shortest execution time of a section of code. In order to realize the instruction, a plurality of registers special for timing are added in a processor, a dead instruction takes the registers as destination operands and receives source operands as count values, when the dead instruction runs, the dead instruction firstly waits for the registers to be reset to zero and then rewrites the source operands into the registers as the count values, and the effect of the dead instruction is equivalent to running a specified number of idle operation instructions. In a program requiring precise code timing, compared with manual insertion of multiple idle operations, the instruction can provide correct and precise timing semantics while effectively reducing the size of the code, but the processor cannot utilize idle clock cycles, thereby reducing the throughput of the system.

Bui et al further propose four timing semantics that can be expressed at the instruction system level:

1) Ensuring that the code block executes requires at least a specified time.

2) And executing the code block, and jumping after the code execution is finished when the execution time exceeds the appointed time.

3) And executing the code block, and immediately jumping when the execution time exceeds the appointed time.

4) The code blocks are guaranteed to execute at most for no more than a specified time.

Liu designs the four time sequences into four instructions, and realizes the four instructions in a processor PTARM based on an ARM (processor) instruction system, and uses a get _ time instruction to replace set _ time semantics for obtaining the current time, so that for processing after timeout, a branch _ extended instruction can be adopted, and particularly the merging realization is realized based on the get _ time instruction and a common branch instruction.

Antolak et al added four timing instructions in the proposed multi-core timing predictable processor, which are: an SD (Set delay) instruction, an AD (active delay) instruction, and DD (inactive delay) and WFD (Wait For delay) instructions. The processor is provided with a plurality of deadline counters for each hardware thread, the value of each clock cycle counter is reduced by one when the counters are activated, and the current thread is suspended when the counters are reduced to zero, so that an interrupt processing timeout condition is caused. The user can write the deadline into the appointed counter through the SD instruction, then the AD instruction and the DD instruction respectively activate and deactivate the appointed counter, when the counter equipped on a certain thread is reduced to zero, the WFD instruction suspends the thread until the value of the corresponding counter becomes 1. To prevent the occurrence of a timeout condition, a new deadline is set immediately following the WFD instruction and the SD instruction. This approach does not take into account the configuration of the various threads.

The PRET (machine model) model designed by Berkeley division of California university realizes RV32I (32-bit basic integer instruction set) basic instructions of a RISC-V (open source instruction set architecture) instruction system, extends timing instructions and provides support for the operation of real-time programs. However, the model still has problems, for example, hardware semantics are not abstracted to software semantics which are easy to understand by programmers, and programmers need to understand the bottom-layer implementation, so that appropriate codes are written to run real-time programs, and the learning cost of the programmers is increased; the existing bottom layer software has incomplete functions, lacks a communication mechanism among threads and the like; the lack of a complete upper-layer interface, the configuration of tasks, the installation of interrupt processing programs and the like all need a user to write inline assembly to realize, and the development workload is large.

In view of the foregoing problems, embodiments of the present invention provide a method, an apparatus, a chip, an electronic device, and a storage medium for thread scheduling, which can ensure that tasks of different key levels can meet time constraints and have a high throughput rate.

In particular, for a conventional single-threaded processor, the most direct way to process real-time tasks is to run a real-time operating system thereon, and the real-time operating system (RTOS) provides real-time support for the tasks on a software level, but this presents a challenge to the analysis of the worst execution time (WCET), and the prediction mechanism of hardware is, for example: branch prediction, caching, etc. make the execution time of instructions unpredictable accurately, and removing these prediction mechanisms can again cause damage to processor performance. Therefore, to address the above challenges of analyzing the worst-case execution time, the present application employs a fine-grained multithreaded processor design to mitigate the above-described prediction mechanism from compromising processor performance to some extent.

In addition, when the pipeline of the traditional single-thread processor needs to be stopped due to transfer instructions and the like, the adoption of the fine-grained multi-thread processor can ensure that a CPU (central processing unit) can carry out thread switching in each clock cycle, and the overall throughput of the processor is improved. Typically, the fine-grained multithreaded processor uses SPM (a high-speed memory) instead of cache, so that the latency of accessing instructions is fixed. The fine-grained multithread processor divides hardware threads into Hard-real-time threads (HRTT) and Soft-real-time threads (SRTT), wherein the Hard real-time threads can be scheduled according to the configuration of the first status register of the embodiment of the invention at a fixed rate to provide hardware isolation, ensure real-time requirements and meet time constraints; the soft real-time thread can use idle clock cycles according to the configuration of the first status register of the embodiment of the invention, so that the throughput of the system is improved, and the resource utilization rate is improved.

The following describes a thread scheduling method, apparatus, chip, electronic device, and storage medium according to embodiments of the present invention in detail with reference to the accompanying drawings.

As shown in fig. 1, the thread scheduling method may include:

s11: and determining a thread slot corresponding to the next period from the first status register.

Specifically, a first status register CSR _ slot may be added for storing the thread order that the hardware scheduler should schedule. Specifically, the first status register CSR _ slot includes a plurality of thread slots, and the thread slots are used for storing thread information of a plurality of threads according to a preset thread scheduling order. For example, taking the first status register CSR _ slot as a 32-bit register as an example, the first status register CSR _ slot may be divided into 8 thread slots (slots) with 4 bits, 16 thread slots with 2 bits, and the like, and corresponding thread information may be set for each thread slot according to a preset thread scheduling order. It should be noted that the number of the first status registers and the thread slot division may be set based on actual situations.

In some embodiments, the thread information includes identification information for hard real-time threads and flag information for soft real-time threads. The identification information can be a thread number of the hard real-time thread and represents that the thread slot is dedicated to the appointed thread; the flag information may be a letter or string of characters, etc., such as the letter S, indicating that the thread slot is used by the soft real-time thread. Additionally, multiple thread slots may not be fully enabled, for which an inactive thread slot may be marked with a letter or character string, such as marked with a D.

When the hardware scheduler determines a thread to be scheduled in a next cycle, a thread slot corresponding to the next cycle (the thread slot is an enabled thread slot) may be first searched from the first status register CSR _ slot according to the thread scheduled in the current cycle.

S13: and determining the thread expected to be scheduled in the next week based on the thread information stored in the thread slot corresponding to the next cycle.

Specifically, the thread slot stores thread information, such as identification information of a hard real-time thread or flag information of a soft real-time thread, and after finding the thread slot corresponding to the next cycle, the thread expected to be scheduled in the next cycle can be determined based on the thread information stored in the thread slot corresponding to the next cycle.

In some embodiments, determining the thread expected to be scheduled in the next week based on the thread information stored in the thread slot corresponding to the next cycle includes: if the thread information is the identification information, determining that the thread expected to be scheduled in the next week is a hard real-time thread; and if the thread information is the mark information, determining that the thread expected to be scheduled in the next week is a soft real-time thread.

For example, when the thread information stored in the thread slot is the thread number of a certain hard real-time thread, it may be determined that the thread expected to be scheduled next week is a certain hard real-time thread corresponding to the thread number; when the thread information stored in the thread slot is flag information of a soft real-time thread, such as the letter S, it may be determined that a thread expected to be scheduled in the next week is a soft real-time thread.

S15: and if the thread expected to be dispatched in the next week is the hard real-time thread and the hard real-time thread is in the active state, dispatching the hard real-time thread in the next cycle.

That is, after determining that the thread expected to be scheduled in the next cycle is a hard real-time thread, it is further determined whether the hard real-time thread is in an active state, and if the hard real-time thread is in the active state, the hard real-time thread is scheduled in the next cycle.

In some embodiments, after determining that the thread expected to be scheduled in the next week is a hard real-time thread, determining the state of the hard real-time thread from a second state register based on the identification information, wherein the second state register is used for storing the state of the hard real-time thread corresponding to the identification information, and the state comprises an active state and a dormant state.

Specifically, a second status register CSR _ tmode may be added for storing statuses of all threads and attributes, wherein the statuses include an active status and a sleep status, and the attributes include a hard real-time thread (HRTT) and a soft real-time thread (SRTT). The second status register CSR _ tmode has four values, respectively: HA (active HRTT), SA (active SRTT), HZ (dormant HRTT), SZ (dormant SRTT).

After determining that the thread expected to be scheduled in the next cycle is a hard real-time thread, querying the state of the hard real-time thread corresponding to the thread number from the second state register CSR _ tmode based on the thread number of the hard real-time thread, and if the thread is in an active state, scheduling the hard real-time thread in the next cycle, thereby ensuring that the hard real-time thread can be scheduled at a fixed frequency, providing hardware isolation, ensuring real-time requirements, and satisfying time constraints.

S17: and if the thread expected to be scheduled next week is a hard real-time thread and the hard real-time thread is in a dormant state, or the thread expected to be scheduled next week is a soft real-time thread, determining a soft real-time thread of the next cycle according to the soft real-time thread scheduled last time, and scheduling the soft real-time thread in the next cycle.

That is, after determining that the thread expected to be scheduled in the next cycle is a hard real-time thread, if the hard real-time thread is in a sleep state, the hard real-time thread is not scheduled, and at this time, the soft real-time thread in the next cycle may be determined according to the soft real-time thread scheduled last time, and the soft real-time thread may be scheduled in the next cycle. After determining that the thread expected to be scheduled in the next cycle is a soft real-time thread, determining a soft real-time thread in the next cycle according to the soft real-time thread scheduled in the last cycle, and scheduling the soft real-time thread in the next cycle. Therefore, soft real-time threads are scheduled based on idle time, and the throughput rate of the system is improved.

In summary, when the hardware scheduler performs thread scheduling, the hardware scheduler sequentially and circularly reads the threads corresponding to the thread slots in the first status register CSR _ slot, and when the hard real-time threads corresponding to the thread slots are in a sleep state or the thread slots are dedicated to the soft real-time threads, the hardware scheduler sequentially and circularly schedules the soft real-time threads. Therefore, the soft real-time thread is scheduled by utilizing the idle period while the hard real-time thread is scheduled at a fixed frequency, and the throughput rate of the system is improved.

In some embodiments, determining a soft real-time thread for a next cycle from a last scheduled soft real-time thread comprises: and determining the soft real-time thread of the next period from a second status register according to the soft real-time thread scheduled last time, wherein the second status register is used for storing the mark information and the state of the soft real-time thread according to the preset thread scheduling sequence.

For example, referring to fig. 2, to implement hardware scheduling of threads, a first status register CSR _ slot and a second status register CSR _ tmode are newly added, where the first status register CSR _ slot records thread information of threads according to a preset thread scheduling order, and the second status register CSR _ tmode records a status and an attribute of each thread. In fig. 2, si ∈ { T0, T1., T7, S, D }, ti ∈ { HA, HZ, SA, SZ }, where i = 1., 7, h denotes a hard real-time thread, S denotes a soft real-time thread, a denotes active, Z denotes sleep, and D denotes that a thread slot is not enabled.

Assume that the threads currently needing scheduling include: hard real-time threads T0 and T1, soft real-time threads T2, T3 and T4, and the scheduling frequency of the hard real-time thread T0 is 1/4, the scheduling frequency of the hard real-time thread T1 is 1/2, and thread scheduling is performed according to the thread scheduling sequence shown in FIG. 3, then the thread scheduling sequence is: t0, T1, T2, T1, T0, T1, T3, T1, T0, T1, T4, T1. That is, assuming that the thread scheduled in the current cycle is T0, based on the first status register CSR _ slot shown in fig. 3, it may be determined that the thread slot corresponding to the next cycle is the first thread slot, since the thread information stored in the first thread slot is S0 (T1), and T1 is the thread number, it may be determined that the thread expected to be scheduled in the next cycle is a hard real-time thread, at this time, the state of the hard real-time thread with the thread number of T1 is determined from the second status register CSR _ tmode, and since the state is the active state, the hard real-time thread with the thread number of T1 is scheduled in the next cycle; next, in the next cycle, based on the first status register CSR _ slot shown in fig. 3, it may be determined that the thread slot corresponding to the next cycle is the second thread slot, since the thread information stored in the second thread slot is S1 (S), and S is the flag information of the soft real-time thread, it may be determined that the thread expected to be scheduled in the next cycle is the soft real-time thread, at this time, it is determined from the second status register CSR _ tmode that the soft real-time thread in the next cycle is the soft real-time thread with the thread number of T2, and the soft real-time thread is in an active state, and therefore the thread number of the thread scheduled in the next cycle is the soft real-time thread with the thread number of T2; and by analogy, circularly scheduling the corresponding threads in turn.

Therefore, the state registers are arranged for the threads of different levels to guide the hardware of the threads to automatically schedule, so that the threads of different levels can meet time constraints, the hard real-time threads can be scheduled at a fixed frequency, meanwhile, the soft real-time threads are scheduled based on an idle period, and the throughput rate of the system is improved.

It should be noted that, in addition to the above-mentioned hardware scheduling manner of the thread, a software manner may also be adopted to perform allocation and recovery of the thread slots based on a preset allocation and recovery principle of the thread slots, so as to optimize resource utilization while ensuring that tasks at different key levels can satisfy time constraints.

In some embodiments, the thread scheduling method further comprises: responding to a creating instruction of the hard real-time thread, and allocating an exclusive thread slot to the hard real-time thread; in response to a soft real-time thread create instruction, a common thread slot is allocated to the soft real-time thread.

Specifically, under default conditions, when a creating instruction of a hard real-time thread is received, an exclusive thread slot is allocated to the hard real-time thread, as shown in fig. 3, when a hard real-time thread with a thread number of T1 is created, a first thread slot may be allocated to the hard real-time thread with the thread number of T1, the first thread slot is a dedicated thread slot of the hard real-time thread with the thread number of T1, and other threads are not available; when a creating instruction of a soft real-time thread is received, exclusive thread slots are not allocated, but a common thread slot is allocated uniformly, as shown in fig. 3, when soft real-time threads with thread numbers T2, T3, and T4 are created, one thread slot is allocated uniformly to the soft real-time threads with thread numbers T2, T3, and T4, for example, a second thread slot, that is, the three soft real-time threads share one thread slot. Therefore, good real-time performance can be guaranteed when the user creates the thread under the default condition.

In some embodiments, the thread scheduling method further comprises: responding to a modification instruction for modifying the soft real-time thread into the hard real-time thread, and if the soft real-time thread has an exclusive thread slot, keeping the thread slot unchanged; if the soft real-time thread does not have the exclusive thread slot, allocating the exclusive thread slot to the soft real-time thread; and if the soft real-time thread is the only soft real-time thread, allocating an exclusive thread slot to the soft real-time thread, and removing the common thread slot corresponding to the soft real-time thread.

Specifically, when modifying the priority of the soft real-time thread (modifying to a hard real-time thread), if the soft real-time thread HAs an exclusive thread slot, the thread slot is not additionally allocated, and only the attribute of the thread is changed to the hard real-time thread, as shown in fig. 3, assuming that the soft real-time thread with the thread number T2 HAs an exclusive thread slot, that is, the soft real-time thread with the thread number T2 HAs one thread slot, and the soft real-time threads with the thread numbers T3 and T4 share one thread slot, at this time, since the soft real-time thread with the thread number T2 HAs an exclusive thread slot, the soft real-time thread with the thread number T2 in the second status register is directly changed to a hard real-time thread, that is, T2 (SA) is modified to T2 (HA), and meanwhile, the thread information of the second thread slot in the first status register is modified to S1 (T2).

If the soft real-time thread does not have an exclusive thread slot, an exclusive thread slot needs to be additionally allocated, as shown in fig. 3, the soft real-time threads with thread codes of T2, T3 and T4 share one thread slot, at this time, since the soft real-time thread with the thread number of T2 does not have an exclusive thread slot, an exclusive thread slot needs to be additionally allocated, the position of the specific thread slot needs to be determined based on the thread scheduling sequence, and meanwhile, the soft real-time thread with the thread number of T2 in the second status register is changed into a hard real-time thread, that is, T2 (SA) is changed into T2 (HA).

If the soft real-time thread is the only soft real-time thread, an exclusive thread slot is allocated to the soft real-time thread, and the shared thread slot corresponding to the soft real-time thread is removed. It should be noted that, when the current thread slot is a thread slot shared by the soft real-time threads and there is no active soft real-time thread, the thread slot will be wasted, and therefore, in this case, by removing the shared thread slot, waste of the thread slot can be avoided, and resource utilization rate can be improved.

In some embodiments, the thread scheduling method further comprises: responding a modification instruction for modifying the hard real-time thread into the soft real-time thread, and if the hard real-time thread does not have an exclusive thread slot, keeping the thread slot unchanged; if the hard real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the hard real-time thread; and if the soft real-time thread does not exist and the shared thread slot corresponding to the soft real-time thread does not exist, the shared thread slot is allocated to the hard real-time thread.

Specifically, when modifying the priority of the hard real-time thread (modifying the hard real-time thread into a soft real-time thread), if the hard real-time thread does not have an exclusive thread slot, it is considered that the user has designated the thread slot for the thread, and at this time, no additional processing is performed.

If the hard real-time thread HAs an exclusive thread slot, a shared thread slot is allocated to the hard real-time thread, and the exclusive thread slot corresponding to the hard real-time thread is removed, as shown in fig. 3, assuming that the hard real-time thread with the thread number of T1 needs to be modified into a soft real-time thread, the hard real-time thread with the thread number of T1 and the soft real-time threads with the thread numbers of T2, T3 and T4 share a second thread slot, the first thread slot corresponding to the hard real-time thread with the thread number of T1 is removed, and the hard real-time thread with the thread number of T1 in the second status register is modified into a soft real-time thread, that is, T1 (HA) is modified into T1 (SA).

If there is no soft real-time thread and there is no shared thread slot corresponding to the soft real-time thread, then a shared thread slot is allocated to the hard real-time thread, as shown in fig. 3, if it is necessary to modify the hard real-time thread with thread number T1 into a soft real-time thread, if there is no soft real-time thread and there is no shared thread slot, e.g., there is no soft real-time thread with thread numbers T2, T3 and T4 and there is no second thread slot, then a shared thread slot is allocated to the hard real-time thread with thread number T1 in the second status register, and at the same time, the hard real-time thread with thread number T1 in the second status register is modified into a soft real-time thread, i.e., T1 (HA) is modified into T1 (SA).

In some embodiments, the thread scheduling method further comprises: determining that the hard real-time thread exits, and removing an exclusive thread slot corresponding to the hard real-time thread; determining that the soft real-time thread exits, and if the soft real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the soft real-time thread; and determining that the soft real-time thread exits, and removing the shared thread slot corresponding to the soft real-time thread if the soft real-time thread is the only soft real-time thread.

Specifically, when a thread exits, if the thread is a hard real-time thread, the exclusive thread slot corresponding to the hard real-time thread is removed. If the thread is a soft real-time thread, all the exclusive thread slots corresponding to the thread are removed, as shown in fig. 3, assuming that the soft real-time thread with the thread number of T2 is located in two common thread slots, where one common thread slot is only used by the soft real-time thread with the thread number of T2, and the other common thread slot is also used by the soft real-time threads with the thread numbers of T3 and T4, when the soft real-time thread with the thread number of T2 exits, one common thread slot only used by the soft real-time thread with the thread number of T2 is removed, and the other common thread slot is not removed. If both of these shared thread slots are used only by the soft real-time thread with thread number T2, i.e., there is only one soft real-time thread with thread number T2, all of the shared thread slots will be removed.

So, on the basis of thread hardware scheduling, adopt the software mode to manage the thread groove, allocate thread groove resource for every thread, and carry out corresponding thread groove resource recovery, thereby can be when guaranteeing that different key level's task can both satisfy time constraint, optimize resource utilization, this software and hardware collaborative mode, for pure hardware's thread scheduling, when the thread carries out the rank modification or withdraws from, retrieve the thread groove that it accounts for and use for the thread of newly-created, the utilization of resource has been optimized, resource utilization has been promoted, thereby whole scheduling performance has been promoted.

In some embodiments, the thread scheduling method further comprises: and responding to a sleep instruction of the thread, controlling the thread to enter a sleep state, and controlling the thread to enter an active state when the current time reaches a target time, wherein the thread is a hard real-time thread or a soft real-time thread, the sleep instruction is a delay instruction or a waiting instruction, the current time is acquired by a current time acquisition instruction, and the target time is determined by a target time setting instruction.

In some embodiments, the thread scheduling method further comprises: responding to an interrupt instruction of the thread, and controlling the thread to enter an active state, wherein the interrupt instruction is used for triggering interrupt when the current time reaches a target time, the interrupt instruction is a normal interrupt instruction or an abnormal interrupt instruction, the thread is a hard real-time thread or a soft real-time thread, the current time is obtained by a current time obtaining instruction, and the target time is determined by a target time setting instruction.

Specifically, in order to support precise timing control and precise thread scheduling with different granularities, several timing semantics can be implemented by a plurality of extended instructions, and a relevant description of six additional extended instructions is given in table 1.

TABLE 1

Wherein get _ time is a current time obtaining instruction for obtaining the current time.

set _ compare is a target time setting instruction for setting a target time, which can cooperate with delay _ unit, wait _ unit, interrupt _ on _ exception, and exception _ on _ exception, and can replace the function of deactivating _ exception.

The delay _ unit is a delay instruction, which is used for enabling the thread to enter a sleep state, and waking up the thread to enable the thread to enter an active state when the current time reaches a set _ compare set target time.

The wait _ unit is a wait instruction that functions the same as the delay _ unit except that the wait _ unit can be awakened by other external interrupts, but the delay _ unit cannot be awakened by external interrupts. The wait _ unit can wake up the thread to continue running after finishing processing the interrupt when the external interrupt arrives, so that the processing mode of the thread when the interrupt arrives is enriched.

interrupt _ on _ exception is a normal interrupt instruction, is used for triggering interrupt when the current time reaches the set _ compare set target time, and belongs to normal program behavior.

The exception _ on _ exception is an abort instruction, is used for triggering an abort when the current time reaches the set _ compare set target time, and belongs to an exception program behavior.

In order to extend the implementation of the instruction, two registers are added to the hardware, namely a first register CSR _ clock and a second register CSR _ compare. The first register CSR _ clock is used for storing the current time, the unit of the stored current time is nanoseconds, 10 is added to the value in the first register CSR _ clock in each cycle at the main frequency of 100Mhz, and in order to reduce the hardware area and complexity, the bit width of the first register CSR _ clock is set to 32 bits, and the first register CSR _ clock overflows about every 400 milliseconds; the second register CSR _ compare is used to store the target time. In each cycle, the current time in the first register CSR _ clock is compared with the target time in the second register CSR _ match, and if the current time in the first register CSR _ clock reaches the target time, the thread is woken up, or a normal interrupt or an abnormal interrupt is generated.

It should be noted that the thread states recorded by the hardware include a sleep state and an active state, and the thread in the active state does not always occupy the time of the CPU, but in terms of software support, a conventional definition may be adopted for abstracting the thread states, the active state corresponds to a ready state and a running state in the real-time operating system, the sleep state corresponds to a blocking state in the real-time operating system, and a termination state is added at the same time, which indicates a state after the thread is created but the kernel has not started scheduling and a state after the thread exits. The thread state transition diagram is shown in fig. 4. The solid arrows in fig. 4 represent the state transition of the thread hardware scheduling, and the dotted arrows partially represent the state transition of the thread software scheduling, i.e. the hardware is guided by six extended instructions to automatically perform the thread scheduling, or the hardware is handed to the real-time operating system to perform the thread scheduling.

As shown in the solid line part of fig. 4, if a thread (e.g., a hard real-time thread or a soft real-time thread) is in an active state, the thread may be controlled to enter a sleep state by calling delay _ unit or wait _ unit, and the current time stored in the first register CSR _ clock may be compared with the target time stored in the second register CSR _ match in each cycle, and if the current time reaches the target time, the thread may be controlled to enter the active state. If the thread is in a dormant state, the thread can be controlled to enter an active state by calling interrupt _ on _ exception or exception _ on _ exception when the current time stored in the first register CSR _ clock reaches the target time stored in the second register CSR _ match, namely when an interrupt instruction is received, the thread is controlled to enter the active state. When the thread state changes, the state of the thread stored in the corresponding second state register changes, so that the hardware is guided to automatically carry out thread scheduling.

As shown in the dotted line portion of fig. 4, after a thread (such as a hard real-time thread or a soft real-time thread) is created, the thread will be in an active state, and at this time, the thread can be suspended by calling osThreadSuspend instruction, so that the thread enters a sleep state; while the thread is in the sleep state, the thread in the sleep state may be awakened by calling osthreaderesum (thread wakeup instruction), thereby entering the active state.

It should be noted that, many priorities may be defined in the real-time operating system, and a thread with a higher priority may immediately preempt the running opportunity of the current thread, so in the embodiment of the present invention, two key levels are defined for the hardware thread, which are respectively a hard real-time thread and a soft real-time thread, and the hard real-time thread and the soft real-time thread are associated with two common levels, osprioritylreal and osprioritylnormal, in the standard interface of the real-time operating system, and the remaining priority levels may be designed into different thread levels according to needs, and establish corresponding association and scheduling mechanisms.

Therefore, more precise time sequence control can be realized based on the six extended instructions, the states of the threads stored in the second state register are flexibly modified through the time sequence control, and the threads are efficiently scheduled through a software and hardware coordinated scheduling strategy by combining the thread information stored in the thread slots in the first state register.

In the timing control, a thread-independent processing method is adopted for the interrupt signal, that is, each thread has a separate interrupt signal, and when one thread processes an interrupt, the timing of other threads is not affected.

In order to verify the effect of the thread scheduling method according to the embodiment of the present invention, the following verification examples and corresponding verification results are given.

Based on the investigation of an API (Application Programming Interface) of a related real-time operating system, the method abstracts a thread control block of an original RTOS (real-time operating system), provides thread control Interface encapsulation for a designed hardware real-time processor, including thread control, timer control and the like, and simultaneously conducts WCET analysis based on a prototype of the real-time system, thereby proving the effectiveness of a software and hardware cooperative scheduling strategy under the thread scheduling method. The thread scheduling comparison is shown in table 2.

TABLE 2

Therefore, the performance of the software and hardware cooperative scheduling strategy under the thread scheduling method is superior to that of the software scheduling of a real-time operating system.

It should be noted that the experimental conditions mentioned above are only for illustrating the implementation of the present invention in detail, and should not be construed as limiting the present invention. In other examples or embodiments or examples, other values may be selected in accordance with the present invention and are not specifically limited herein.

In correspondence with the above embodiments, an embodiment of the present invention further provides a computer-readable storage medium, on which a program is stored, and the program, when executed by a processor, implements the thread scheduling method of any of the above embodiments.

According to the computer-readable storage medium of the embodiment of the invention, the thread slot corresponding to the next cycle is determined from the first status register, and the thread expected to be scheduled in the next cycle is determined based on the thread information stored in the thread slot corresponding to the next cycle; if the thread expected to be scheduled in the next week is a hard real-time thread and the hard real-time thread is in an active state, scheduling the hard real-time thread in the next period; and if the thread expected to be scheduled next week is a hard real-time thread and the hard real-time thread is in a dormant state, or the thread expected to be scheduled next week is a soft real-time thread, determining a soft real-time thread of the next cycle according to the soft real-time thread scheduled last time, and scheduling the soft real-time thread in the next cycle. Therefore, the state registers are arranged for the threads of different levels to guide the hardware of the threads to automatically schedule, so that the threads of different levels can meet time constraints, the hard real-time threads can be scheduled at a fixed frequency, meanwhile, the soft real-time threads are scheduled based on an idle period, and the throughput rate of the system is improved.

For example, when the program is executed by a processor, the following thread scheduling method is implemented:

It should be noted that the above explanation on the embodiment and the advantageous effects of the thread scheduling method is also applicable to the computer readable storage medium of the embodiment of the present invention, and is not detailed herein to avoid redundancy.

Corresponding to the above embodiments, the embodiments of the present invention further provide a chip, and fig. 5 is a block diagram of a chip according to an embodiment of the present invention. As shown in fig. 5, the chip 20 includes a memory 202, a processor 204, and a program 206 stored in the memory 202 and capable of running on the processor 204, and when the processor 204 executes the program 206, the thread scheduling method according to any of the embodiments described above is implemented.

According to the chip provided by the embodiment of the invention, the thread slot corresponding to the next period is determined from the first status register, and the thread expected to be scheduled in the next period is determined based on the thread information stored in the thread slot corresponding to the next period; if the thread expected to be scheduled in the next week is a hard real-time thread and the hard real-time thread is in an active state, scheduling the hard real-time thread in the next period; and if the thread expected to be scheduled next week is a hard real-time thread and the hard real-time thread is in a dormant state, or the thread expected to be scheduled next week is a soft real-time thread, determining a soft real-time thread of the next cycle according to the soft real-time thread scheduled last time, and scheduling the soft real-time thread in the next cycle. Therefore, the state registers are arranged for the threads of different levels to guide the hardware of the threads to automatically schedule, so that the threads of different levels can meet time constraints, the hard real-time threads can be scheduled at a fixed frequency, meanwhile, the soft real-time threads are scheduled based on an idle period, and the throughput rate of the system is improved.

For example, where the program 206 is executed by the processor 204, the following thread scheduling method is implemented:

It should be noted that the above explanation of the embodiments and advantageous effects of the thread scheduling method is also applicable to the chip 20 of the embodiment of the present invention, and is not detailed herein to avoid redundancy.

Corresponding to the above embodiments, an embodiment of the present invention further provides an electronic device, and fig. 6 is a block diagram of a structure of the electronic device according to an embodiment of the present invention. As shown in fig. 6, the electronic device 30 includes the chip 20 described above.

According to the electronic equipment provided by the embodiment of the invention, the thread slot corresponding to the next period is determined from the first status register, and the thread expected to be scheduled in the next period is determined based on the thread information stored in the thread slot corresponding to the next period; if the thread expected to be scheduled in the next week is a hard real-time thread and the hard real-time thread is in an active state, scheduling the hard real-time thread in the next period; and if the thread expected to be scheduled next week is a hard real-time thread and the hard real-time thread is in a dormant state, or the thread expected to be scheduled next week is a soft real-time thread, determining a soft real-time thread of the next cycle according to the soft real-time thread scheduled last time, and scheduling the soft real-time thread in the next cycle. Therefore, the state registers are arranged for the threads of different levels to guide the hardware of the threads to automatically schedule, so that the threads of different levels can meet time constraints, the hard real-time threads can be scheduled at a fixed frequency, meanwhile, the soft real-time threads are scheduled based on an idle period, and the throughput rate of the system is improved.

It should be noted that the above explanation on the embodiment and the beneficial effects of the thread scheduling method is also applicable to the electronic device 30 of the embodiment of the present invention, and is not detailed herein to avoid redundancy.

Corresponding to the foregoing embodiment, an embodiment of the present invention further provides a thread scheduling apparatus, and fig. 7 is a block diagram of a structure of the thread scheduling apparatus according to an embodiment of the present invention. As shown in fig. 7, the thread scheduling apparatus 40 includes: a determination module 401 and a scheduling module 402. The determining module 401 is configured to determine a thread slot corresponding to a next cycle from a first status register, and determine a thread expected to be scheduled in a next cycle based on thread information stored in the thread slot corresponding to the next cycle, where the first status register includes a plurality of thread slots, and the thread slots are used to store thread information of the plurality of threads according to a preset thread scheduling order; the scheduling module 402 is configured to schedule the hard real-time thread in the next cycle if the thread expected to be scheduled in the next cycle is the hard real-time thread and the hard real-time thread is in an active state, and determine the soft real-time thread in the next cycle according to the soft real-time thread scheduled in the last cycle and schedule the soft real-time thread in the next cycle if the thread expected to be scheduled in the next cycle is the hard real-time thread and the hard real-time thread is in a sleep state or the thread expected to be scheduled in the next cycle is the soft real-time thread.

According to the thread scheduling device provided by the embodiment of the invention, the thread slot corresponding to the next period is determined from the first status register, and the thread expected to be scheduled in the next period is determined based on the thread information stored in the thread slot corresponding to the next period; if the thread expected to be scheduled in the next week is a hard real-time thread and the hard real-time thread is in an active state, scheduling the hard real-time thread in the next period; and if the thread expected to be scheduled next week is a hard real-time thread and the hard real-time thread is in a dormant state, or the thread expected to be scheduled next week is a soft real-time thread, determining a soft real-time thread of the next cycle according to the soft real-time thread scheduled last time, and scheduling the soft real-time thread in the next cycle. Therefore, the state registers are arranged for the threads of different levels to guide the hardware of the threads to automatically schedule, so that the threads of different levels can meet time constraints, the hard real-time threads can be scheduled at a fixed frequency, meanwhile, the soft real-time threads are scheduled based on an idle period, and the throughput rate of the system is improved.

In some embodiments of the invention, the thread information includes identification information of the hard real-time thread and flag information of the soft real-time thread, and the determining module 401 is further configured to: if the thread information is the identification information, determining that the thread expected to be scheduled in the next week is a hard real-time thread; and if the thread information is the mark information, determining that the thread expected to be scheduled in the next week is a soft real-time thread.

In some embodiments of the invention, the determining module 401 is further configured to: and after determining that the thread expected to be scheduled in the next week is a hard real-time thread, determining the state of the hard real-time thread from a second state register based on the identification information, wherein the second state register is used for storing the state of the hard real-time thread corresponding to the identification information, and the state comprises an active state and a dormant state.

In some embodiments of the invention, the scheduling module 402 is further configured to: and determining the soft real-time thread of the next period from a second status register according to the soft real-time thread scheduled last time, wherein the second status register is used for storing the mark information and the state of the soft real-time thread according to the preset thread scheduling sequence, and the state comprises an active state and a dormant state.

In some embodiments of the invention, the thread scheduling means further comprises: a module 403 is assigned. The allocation module 403 is configured to allocate an exclusive thread slot to the hard real-time thread in response to the creation instruction of the hard real-time thread, and allocate a common thread slot to the soft real-time thread in response to the creation instruction of the soft real-time thread.

In some embodiments of the invention, the assignment module 403 is further configured to: responding a modification instruction for modifying the soft real-time thread into the hard real-time thread, and if the soft real-time thread has an exclusive thread slot, keeping the thread slot unchanged; if the soft real-time thread does not have the exclusive thread slot, allocating the exclusive thread slot to the soft real-time thread; and if the soft real-time thread is the only soft real-time thread, allocating an exclusive thread slot to the soft real-time thread, and removing the common thread slot corresponding to the soft real-time thread.

In some embodiments of the invention, the assignment module 403 is further configured to: responding a modification instruction for modifying the hard real-time thread into the soft real-time thread, and if the hard real-time thread does not have an exclusive thread slot, keeping the thread slot unchanged; if the hard real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the hard real-time thread; and if the soft real-time thread does not exist and the shared thread slot corresponding to the soft real-time thread does not exist, the shared thread slot is allocated to the hard real-time thread.

In some embodiments of the invention, the assignment module 403 is further configured to: determining that the hard real-time thread exits, and removing an exclusive thread slot corresponding to the hard real-time thread; determining that the soft real-time thread exits, and if the soft real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the soft real-time thread; and determining that the soft real-time thread exits, and removing the shared thread slot corresponding to the soft real-time thread if the soft real-time thread is the only soft real-time thread.

In some embodiments of the present invention, the thread scheduling device 40 further comprises: the module 404 is executed. The execution module 404 is configured to respond to a sleep instruction of a thread, control the thread to enter a sleep state, and control the thread to enter an active state when a current time reaches a target time, where the thread is a hard real-time thread or a soft real-time thread, the sleep instruction is a delay instruction or a wait instruction, the current time is obtained by a current time obtaining instruction, and the target time is determined by a target time setting instruction.

In some embodiments of the invention, the execution module 404 is further configured to: and responding to an interrupt instruction of the thread, and controlling the thread to enter an active state, wherein the interrupt instruction is used for triggering interrupt when the current time reaches a target time, and the interrupt instruction is a normal interrupt instruction or an abnormal interrupt instruction.

It should be noted that the above explanation on the embodiments and advantageous effects of the thread scheduling method is also applicable to the thread scheduling apparatus 40 according to the embodiments of the present invention, and is not detailed herein to avoid redundancy.

It should be noted that the logic and/or steps shown in the flowcharts or otherwise described herein, such as an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.

It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

Furthermore, the terms "first", "second", and the like used in the embodiments of the present invention are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated in the embodiments. Thus, a feature of an embodiment of the present invention that is defined by the terms "first," "second," etc. may explicitly or implicitly indicate that at least one of the feature is included in the embodiment. In the description of the present invention, the word "plurality" means at least two or two and more, such as two, three, four, etc., unless specifically limited otherwise in the examples. Relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.

All the embodiments in the present specification are described in a related manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on differences from other embodiments. In particular, as for the apparatus, the electronic device, and the computer-readable storage medium embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and in relation to the description, reference may be made to some portions of the description of the method embodiments.

Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.

Claims

1. A method for thread scheduling, the method comprising:

determining a thread slot corresponding to a next period from a first state register, wherein the first state register comprises a plurality of thread slots, and the thread slots are used for storing thread information of a plurality of threads according to a preset thread scheduling sequence;

determining the thread expected to be scheduled in the next week based on the thread information stored in the thread slot corresponding to the next cycle;

if the thread expected to be dispatched in the next week is a hard real-time thread and the hard real-time thread is in an active state, dispatching the hard real-time thread in the next cycle;

and if the thread expected to be scheduled next week is the hard real-time thread and the hard real-time thread is in a dormant state, or the thread expected to be scheduled next week is a soft real-time thread, determining the soft real-time thread of the next cycle according to the soft real-time thread scheduled last time, and scheduling the soft real-time thread in the next cycle.

2. The method of claim 1, wherein the thread information comprises identification information of the hard real-time thread and flag information of the soft real-time thread, and wherein determining the thread expected to be scheduled in the next week based on the thread information stored in the thread slot corresponding to the next cycle comprises:

if the thread information is the identification information, determining that the thread expected to be scheduled in the next week is the hard real-time thread;

and if the thread information is the mark information, determining that the thread expected to be scheduled in the next week is the soft real-time thread.

3. The method of claim 2, wherein after determining that the thread expected to be scheduled in the next week is the hard real-time thread, the method further comprises:

determining the state of the hard real-time thread from a second state register based on the identification information, wherein the second state register is used for storing the state of the hard real-time thread corresponding to the identification information, and the state comprises the active state and the dormant state.

4. The method of claim 1, wherein determining the next cycle soft real-time thread based on the last scheduled soft real-time thread comprises:

and determining the soft real-time thread of the next period from a second status register according to the last scheduled soft real-time thread, wherein the second status register is used for storing the mark information and the status of the soft real-time thread according to the preset thread scheduling sequence, and the status comprises the active status and the dormant status.

5. The method of claim 1, further comprising:

responding to a creating instruction of the hard real-time thread, and allocating an exclusive thread slot to the hard real-time thread;

and responding to the creating instruction of the soft real-time thread, and allocating a common thread slot to the soft real-time thread.

6. The method of claim 1, further comprising:

responding to a modification instruction for modifying the soft real-time thread into the hard real-time thread, and if the soft real-time thread has an exclusive thread slot, keeping the thread slot unchanged;

if the soft real-time thread does not have an exclusive thread slot, allocating an exclusive thread slot to the soft real-time thread;

and if the soft real-time thread is the only soft real-time thread, allocating an exclusive thread slot to the soft real-time thread, and removing the shared thread slot corresponding to the soft real-time thread.

7. The method of claim 1, further comprising:

responding to a modification instruction for modifying the hard real-time thread into the soft real-time thread, and if the hard real-time thread does not have an exclusive thread slot, keeping the thread slot unchanged;

if the hard real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the hard real-time thread;

and if the soft real-time thread does not exist and the common thread slot corresponding to the soft real-time thread does not exist, the common thread slot is distributed to the hard real-time thread.

8. The method of claim 1, further comprising:

determining that the hard real-time thread exits, and removing an exclusive thread slot corresponding to the hard real-time thread;

determining that the soft real-time thread exits, and if the soft real-time thread has an exclusive thread slot, removing the exclusive thread slot corresponding to the soft real-time thread;

and determining that the soft real-time thread exits, and if the soft real-time thread is the only soft real-time thread, removing the shared thread slot corresponding to the soft real-time thread.

9. The method according to any one of claims 1-8, further comprising:

responding to a sleep instruction of a thread, controlling the thread to enter a sleep state, and controlling the thread to enter an active state when the current time reaches a target time, wherein the thread is the hard real-time thread or the soft real-time thread, the sleep instruction is a delay instruction or a waiting instruction, the current time is obtained by a current time obtaining instruction, and the target time is determined by a target time setting instruction.

10. The method according to any one of claims 1-8, further comprising:

responding to an interrupt instruction of a thread, and controlling the thread to enter an active state, wherein the interrupt instruction is used for triggering interrupt when the current time reaches a target time, the interrupt instruction is a normal interrupt instruction or an abnormal interrupt instruction, the thread is the hard real-time thread or the soft real-time thread, the current time is obtained by a current time obtaining instruction, and the target time is determined by a target time setting instruction.

11. A computer-readable storage medium, having stored thereon a program which, when executed by a processor, implements the thread scheduling method according to any one of claims 1 to 10.

12. A chip, comprising: a memory, a processor and a program stored on the memory and executable on the processor, the processor implementing the thread scheduling method according to any one of claims 1-10 when executing the program.

13. An electronic device, characterized in that it comprises a chip according to claim 12.

14. A thread scheduling apparatus, the apparatus comprising:

the determining module is configured to determine a thread slot corresponding to a next cycle from a first status register, and determine a thread expected to be scheduled in the next cycle based on thread information stored in the thread slot corresponding to the next cycle, where the first status register includes a plurality of thread slots, and the thread slots are used to store thread information of a plurality of threads according to a preset thread scheduling order;

and the scheduling module is used for scheduling the hard real-time thread in the next period if the thread expected to be scheduled next week is the hard real-time thread and the hard real-time thread is in an active state, determining the soft real-time thread in the next period according to the soft real-time thread scheduled last time if the thread expected to be scheduled next week is the hard real-time thread and the hard real-time thread is in a dormant state, or scheduling the soft real-time thread in the next period if the thread expected to be scheduled next week is the soft real-time thread.

15. The apparatus of claim 14, wherein the thread information comprises identification information of the hard real-time thread and flag information of the soft real-time thread, and wherein the determining module is further configured to:

16. The apparatus of claim 15, wherein the determining module is further configured to: after determining that the thread expected to be scheduled in the next week is the hard real-time thread, determining the state of the hard real-time thread from a second state register based on the identification information, wherein the second state register is used for storing the state of the hard real-time thread corresponding to the identification information, and the state comprises the active state and the dormant state.

17. The apparatus of claim 14, wherein the scheduling module is further configured to: and determining the soft real-time thread of the next period from a second status register according to the last scheduled soft real-time thread, wherein the second status register is used for storing the mark information and the state of the soft real-time thread according to the preset thread scheduling sequence, and the state comprises the active state and the dormant state.

18. The apparatus of claim 14, further comprising:

and the allocation module is used for responding to the creation instruction of the hard real-time thread, allocating an exclusive thread slot to the hard real-time thread, and responding to the creation instruction of the soft real-time thread, and allocating a common thread slot to the soft real-time thread.

19. The apparatus of claim 18, wherein the assignment module is further configured to:

and if the soft real-time thread is the only soft real-time thread, allocating an exclusive thread slot to the soft real-time thread, and removing the common thread slot corresponding to the soft real-time thread.

20. The apparatus of claim 18, wherein the assignment module is further configured to:

and if the soft real-time thread does not exist and the shared thread slot corresponding to the soft real-time thread does not exist, the shared thread slot is allocated to the hard real-time thread.

21. The apparatus of claim 18, wherein the assignment module is further configured to:

22. The apparatus of any one of claims 14-21, further comprising:

the execution module is used for responding to a sleep instruction of a thread, controlling the thread to enter a sleep state, and controlling the thread to enter an active state when the current time reaches a target time, wherein the thread is the hard real-time thread or the soft real-time thread, the sleep instruction is a delay instruction or a waiting instruction, the current time is acquired by a current time acquisition instruction, and the target time is determined by a target time setting instruction.

23. The apparatus of claim 22, wherein the execution module is further configured to: and responding to an interrupt instruction of the thread, and controlling the thread to enter an active state, wherein the interrupt instruction is used for triggering interrupt when the current time reaches the target time, and the interrupt instruction is a normal interrupt instruction or an abnormal interrupt instruction.