CN115775967B - Antenna impedance matching circuit, method, vehicle, storage medium, and chip - Google Patents
Antenna impedance matching circuit, method, vehicle, storage medium, and chip Download PDFInfo
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Abstract
The present disclosure relates to an antenna impedance matching circuit, method, vehicle, storage medium and chip, and relates to the field of radio technology. Specifically, the antenna impedance matching circuit comprises a control chip, an adjusting circuit and an antenna, wherein the adjusting circuit is respectively connected with the control chip and the antenna; the antenna is configured to receive a target signal, wherein the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna; the control chip is configured to determine a target capacitance value of the adjusting circuit according to the target signal, and adjust the capacitance value of the adjusting circuit according to the target capacitance value so as to match the impedance of the antenna. Therefore, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
Description
Technical Field
The present disclosure relates to the field of radio technologies, and in particular, to an antenna impedance matching circuit, method, vehicle, storage medium, and chip.
Background
With the continuous development of radio technology, NFC (english: near Field Communication; chinese: near field wireless communication technology) antenna communication technology is applied to vehicles, and users can enter the vehicles without keys through NFC devices (e.g., mobile terminals or NFC cards) having a function of communicating with the vehicles. NFC circuits are typically provided in the B-pillar, mirror, door handle, etc. of a vehicle. Before the vehicle leaves the factory, impedance matching is performed on the whole NFC circuit, so that components in the NFC circuit are determined, and the NFC antenna can work with the maximum transmitting power.
In a practical scenario, NFC antenna parameters may be detuned due to external environmental interference, which will cause NFC circuit impedance mismatch. However, after the vehicle leaves the factory, the components in the whole NFC circuit are determined, and the impedance value of the whole NFC circuit cannot be changed.
Disclosure of Invention
To overcome the problems in the related art, the present disclosure provides an antenna impedance matching circuit, method, vehicle, storage medium, and chip.
According to a first aspect of embodiments of the present disclosure, there is provided an antenna impedance matching circuit, the antenna impedance matching circuit including a control chip, an adjusting circuit, and an antenna, the adjusting circuit being connected to the control chip and the antenna, respectively; the antenna is configured to receive a target signal, wherein the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna; the control chip is configured to determine a target capacitance value of the adjusting circuit according to the target signal, and adjust the capacitance value of the adjusting circuit according to the target capacitance value so as to match the impedance of the antenna.
Optionally, the control chip is configured to determine a power and a phase of the target signal, and determine a target capacitance value of the adjusting circuit according to the power and the phase.
Optionally, the control chip is configured to determine the target capacitance value according to the power and the phase through a preset capacitance correspondence; the preset capacitance corresponding relation comprises a corresponding relation among power, phase and capacitance.
Optionally, the adjusting circuit includes a first tuning circuit and a first matching circuit, the first matching circuit is connected with the control chip and the antenna respectively, and the first tuning circuit is connected with the control chip and the first matching circuit respectively.
Optionally, the first tuning circuit includes a plurality of first capacitors, each of which is connected to an IO port of the control chip; the control chip is configured to determine a first target capacitance from a plurality of first capacitances of the first tuning circuit according to the target capacitance value, and disconnect branches where other capacitances except the first target capacitance are located from the plurality of first capacitances of the first tuning circuit through an IO port of the control chip.
Optionally, the adjusting circuit includes a first tuning circuit, a second tuning circuit, a first matching circuit and a second matching circuit, the first matching circuit is connected with the control chip and the antenna respectively, the second matching circuit is connected with the control chip and the antenna respectively, the first tuning circuit is connected with the control chip and the first matching circuit respectively, and the second tuning circuit is connected with the control chip and the second matching circuit respectively.
Optionally, the first tuning circuit includes a plurality of first capacitors, each of which is connected to an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is connected with an IO port of the control chip; the control chip is configured to determine a first target capacitance from a plurality of first capacitances of the first tuning circuit and a second target capacitance from a plurality of second capacitances of the second tuning circuit according to the target capacitance value; and disconnecting the branch circuit where the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit are located, and disconnecting the branch circuit where the other capacitors except the second target capacitor in the plurality of second capacitors of the second tuning circuit are located through the IO port of the control chip.
According to a second aspect of embodiments of the present disclosure, there is provided an antenna impedance matching method applied to an antenna impedance matching circuit, where the antenna impedance matching circuit includes a control chip, an adjusting circuit, and an antenna, and the adjusting circuit is connected to the control chip and the antenna, respectively; the method comprises the following steps: receiving a target signal through the antenna, wherein the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna; determining a target capacitance value of the regulating circuit according to the target signal; and adjusting the capacitance value of the adjusting circuit according to the target capacitance value so as to match the impedance of the antenna.
Optionally, the determining the target capacitance value of the adjusting circuit according to the target signal includes: determining the power and phase of the target signal; and determining a target capacitance value of the regulating circuit according to the power and the phase.
Optionally, the determining the target capacitance value of the adjusting circuit according to the power and the phase comprises: determining the target capacitance value through a preset capacitance corresponding relation according to the power and the phase; the preset capacitance corresponding relation comprises a corresponding relation among power, phase and capacitance.
Optionally, the adjusting circuit includes a first tuning circuit and a first matching circuit, the first matching circuit is connected with the control chip and the antenna respectively, and the first tuning circuit is connected with the control chip and the first matching circuit respectively; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with an IO port of the control chip; the adjusting the capacitance value of the adjusting circuit according to the target capacitance value comprises: determining a first target capacitance from a plurality of first capacitances of the first tuning circuit according to the target capacitance value; and disconnecting branches of other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit through the IO port of the control chip.
Optionally, the adjusting circuit includes a first tuning circuit, a second tuning circuit, a first matching circuit and a second matching circuit, where the first matching circuit is connected with the control chip and the antenna respectively, the second matching circuit is connected with the control chip and the antenna respectively, the first tuning circuit is connected with the control chip and the first matching circuit respectively, and the second tuning circuit is connected with the control chip and the second matching circuit respectively; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is connected with an IO port of the control chip; the adjusting the capacitance value of the adjusting circuit according to the target capacitance value comprises: determining a first target capacitance from a plurality of first capacitances of the first tuning circuit and a second target capacitance from a plurality of second capacitances of the second tuning circuit according to the target capacitance value; and disconnecting the branch circuit where other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit are located, and disconnecting the branch circuit where other capacitors except the second target capacitor in the plurality of second capacitors of the second tuning circuit are located through the IO port of the control chip.
According to a third aspect of embodiments of the present disclosure, there is provided a vehicle comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to implement the steps of the antenna impedance matching method provided in the second aspect of the present disclosure when invoking executable instructions stored on the memory.
According to a fourth aspect of embodiments of the present disclosure, there is provided a computer readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the steps of the antenna impedance matching method provided by the second aspect of the present disclosure.
According to a fifth aspect of embodiments of the present disclosure, there is provided a chip comprising a processor and an interface; the processor is configured to read instructions to perform the steps of the antenna impedance matching method provided in the second aspect of the present disclosure.
The technical scheme provided by the embodiment of the disclosure can comprise the following beneficial effects:
the antenna impedance matching circuit comprises a control chip, an adjusting circuit and an antenna, wherein the adjusting circuit is respectively connected with the control chip and the antenna; the antenna is configured to receive a target signal, wherein the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna; the control chip is configured to determine a target capacitance value of the adjusting circuit according to the target signal, and adjust the capacitance value of the adjusting circuit according to the target capacitance value to match the impedance of the antenna. Through the circuit, the target capacitance value of the regulating circuit in the current antenna impedance matching circuit can be determined according to the target signal, and then the capacitance value of the regulating circuit is regulated according to the target capacitance value, so that the impedance of the antenna is matched. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 is a block diagram of an antenna impedance matching circuit, shown according to an exemplary embodiment;
fig. 2 is a block diagram of another antenna impedance matching circuit shown in accordance with an exemplary embodiment;
fig. 3 is a block diagram of another antenna impedance matching circuit shown in accordance with an exemplary embodiment;
fig. 4 is a flow chart illustrating a method of antenna impedance matching according to an exemplary embodiment;
fig. 5 is a flow chart illustrating another antenna impedance matching method according to an exemplary embodiment;
fig. 6 is a flow chart illustrating another antenna impedance matching method according to an exemplary embodiment;
fig. 7 is a flow chart illustrating another antenna impedance matching method according to an exemplary embodiment;
FIG. 8 is a schematic diagram illustrating a functional block diagram of a vehicle according to an exemplary embodiment.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present disclosure as detailed in the accompanying claims.
The terms first, second and the like in the description and in the claims of the application and in the above-described figures, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. In addition, in the description with reference to the drawings, the same reference numerals in different drawings denote the same elements.
Before introducing the antenna impedance matching circuit, the method, the vehicle, the storage medium and the chip provided by the disclosure, application scenarios related to various embodiments of the disclosure are first described. With the continuous development of radio technology, NFC antenna communication technology is applied to vehicles, and users can enter the vehicles without keys through NFC devices (e.g., mobile terminals or NFC cards) having a function of communicating with the vehicles. NFC circuits are typically provided in the B-pillar, mirror, door handle, etc. of a vehicle. Before the vehicle leaves the factory, impedance matching is carried out on the whole NFC circuit, so that components in the NFC circuit are determined. The impedance value of the whole NFC circuit can be adjusted by arranging the matching circuit in the NFC circuit, so that the NFC antenna can work with the maximum transmitting power.
However, in a practical scenario, since a large number of metal devices are disposed in the vehicle, if the NFC antenna is too close to the metal devices due to assembly tolerance, electromagnetic interference will be formed on the NFC antenna by the metal environment, and thus parameters of the NFC antenna may be detuned. In addition, the change of the environmental temperature can also cause the change of the component parameters, for example, the accuracy of the components (such as capacitance, inductance and resistance) can be influenced under the high-temperature environment. In addition, the aging of the component itself also affects the accuracy of the component. In the above scenario, the matching circuit in the NFC circuit may be detuned, which further causes impedance mismatch of the entire NFC circuit. However, after the vehicle leaves the factory, the components in the whole NFC circuit are determined, and the impedance value of the whole NFC circuit cannot be changed. If the NFC antenna parameter is in a detuned state, the transmitting power of the NFC antenna will be affected, thereby causing attenuation of the communication distance.
In order to solve the technical problems, the application provides an antenna impedance matching circuit, an antenna impedance matching method, a vehicle, a storage medium and a chip, which can determine a target capacitance value of an adjusting circuit in the current antenna impedance matching circuit according to a target signal, and further adjust the capacitance value of the adjusting circuit according to the target capacitance value so as to match the impedance of the antenna. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
The following describes specific embodiments of the present application in detail with reference to the drawings.
Fig. 1 is a block diagram of an antenna impedance matching circuit according to an exemplary embodiment, and as shown in fig. 1, the antenna impedance matching circuit 100 includes a control chip 101, a regulating circuit 102, and an antenna 103, the regulating circuit 102 being connected to the control chip 101 and the antenna 103, respectively.
The antenna 103 is configured to receive a target signal.
The target signal is a signal fed back by the target object after transmitting a radio frequency signal to the target object through the antenna 103. In this way, it can be further determined from the target signal whether the current impedance of the antenna 103 matches, i.e. whether the antenna 103 can operate at maximum power.
The antenna may be, for example, an NFC antenna. In a practical scenario, NFC communication is largely classified into active communication and passive communication. Accordingly, in the active communication scenario, after the antenna 103 transmits the rf signal to the target object, the rf field of the antenna 103 is turned off. At the same time, the target object will generate its own rf field, and based on the rf signal, the target signal is fed back to the antenna 103. In the passive communication scenario, after the antenna 103 transmits the rf signal to the target object, the target object does not need to generate an rf field, but obtains energy from the rf field of the antenna 103, and feeds back the target signal to the antenna 103 by means of load modulation.
The control chip 101 is configured to determine a target capacitance value of the adjusting circuit 102 according to the target signal, and adjust the capacitance value of the adjusting circuit 102 according to the target capacitance value to match the impedance of the antenna 103.
Thus, by adjusting the capacitance value of the adjusting circuit 102, the impedance value of the entire antenna impedance matching circuit 100 is adjusted to match the impedance of the antenna 103, so that the antenna 103 can operate at maximum power.
The control chip 101 may be, for example, an NFC control chip, such as, but not limited to, an NFC transceiver chip ST25R3914.
In one possible implementation manner, the adjusting circuit 102 may include a plurality of third capacitors, each of which is connected to the IO port of the control chip 101, and each of the branches where the third capacitors are located may be selectively turned on or off through the IO port, so that a plurality of capacitance values may be formed by selecting different third capacitors. For example, a third target capacitor may be determined from the plurality of third capacitors according to the target capacitance value, and the IO port of the control chip 101 disconnects the branch where the other capacitors except the third target capacitor are located.
In another possible implementation, the adjusting circuit 102 may include a first tuning circuit and a first matching circuit in view of stability of the antenna impedance matching circuit 100. The first tuning circuit includes a plurality of first capacitors, each of which is connected to an IO port of the control chip 101, and a branch where each of the first capacitors is located may be selectively opened or closed through the IO port. The first matching circuit is a circuit of a fixed impedance value, which may be determined in advance according to the antenna impedance matching circuit 100. In other words, in an ideal state, the impedance value of the first matching circuit can impedance match the antenna impedance matching circuit 100, and the antenna 103 can operate at the maximum power. In this way, in practical applications, if it is determined that the antenna 103 can operate with the maximum power according to the target signal, it is not necessary to turn on the branches where the plurality of first capacitors in the first tuning circuit are located, so that the stability of the entire antenna impedance matching circuit 100 is increased. Meanwhile, if it is determined that the antenna 103 cannot operate with the maximum power according to the target signal, the impedance value of the antenna impedance matching circuit 100 may be adjusted by turning on or off the branch where one or more first capacitors in the first tuning circuit are located according to the target capacitance value, so that the antenna impedance matching circuit 100 performs impedance matching, and the antenna 103 is ensured to operate with the maximum power. In this way, the impedance value of the antenna impedance matching circuit 100 can be adjusted by the adjusting circuit 102 according to the target capacitance value, which corresponds to a capacitance (i.e., the first tuning circuit) whose capacitance value is adjustable within a certain range being connected in parallel to the first matching circuit.
By adopting the circuit, the target capacitance value of the regulating circuit in the current antenna impedance matching circuit can be determined according to the target signal, and then the capacitance value of the regulating circuit is regulated according to the target capacitance value, so that the impedance of the antenna is matched. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
Optionally, the control chip 101 is configured to determine a power and a phase of the target signal, and determine a target capacitance value of the adjusting circuit according to the power and the phase.
For example, the target capacitance value may be determined by a preset capacitance correspondence relationship according to the power and the phase. The preset capacitance corresponding relation comprises a corresponding relation among power, phase and capacitance. That is, the capacitance corresponding to the power and the phase may be determined from a preset capacitance correspondence according to the power and the phase of the target signal, and the target capacitance value may be determined according to the capacitance, for example, the capacitance may be taken as the target capacitance value.
In one possible implementation, if the rf signal is a single-ended signal, as shown in fig. 2, the adjusting circuit 102 includes a first tuning circuit 1021 and a first matching circuit 1022, the first matching circuit 1022 is connected to the control chip 101 and the antenna 103, and the first tuning circuit 1021 is connected to the control chip 101 and the first matching circuit 1022, respectively.
Optionally, the first tuning circuit 1021 includes a plurality of first capacitors, each of which is respectively connected to the IO port of the control chip 101. Each first capacitor is equivalent to being connected with the control chip 101 through a soft switch, and the control chip 101 can open or disconnect one or more branches where the first capacitors are located through an IO port. Wherein each of the first capacitors may be connected in parallel.
The control chip 101 is configured to determine a first target capacitance from the plurality of first capacitances of the first tuning circuit 1021 according to the target capacitance value, and disconnect branches where other capacitances except the first target capacitance are located from the plurality of first capacitances of the first tuning circuit 1021 through an IO port of the control chip.
In this embodiment, the first target capacitance may be determined from a plurality of first capacitances of the first tuning circuit 1021 according to the target capacitance value. And the branch circuit of the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit 1021 is disconnected through the IO port of the control chip so as to adjust the capacitance value of the first tuning circuit 1021, and then the resonance frequency of the antenna 103 can be adjusted, so that the antenna 103 can work with the maximum power.
If the plurality of first capacitors can achieve the target capacitance value in a plurality of combinations, the first capacitor in the combination having the smallest number of first capacitors among the plurality of combinations may be used as the first target capacitor. Thus, errors caused by component aging can be reduced as much as possible.
In another possible implementation, if the rf signal is a differential signal, as shown in fig. 3, the adjusting circuit 102 includes a first tuning circuit 1021, a second tuning circuit 1023, a first matching circuit 1022 and a second matching circuit 1024, the first matching circuit 1022 is connected to the control chip 101 and the antenna 103, the second matching circuit 1024 is connected to the control chip 101 and the antenna 103, the first tuning circuit 1021 is connected to the control chip 101 and the first matching circuit 1022, and the second tuning circuit 1023 is connected to the control chip 101 and the second matching circuit 1024, respectively.
Optionally, the first tuning circuit 1021 includes a plurality of first capacitors, each of which is connected to an IO port of the control chip 101; the second tuning circuit 1024 includes a plurality of second capacitors, each of which is connected to the IO port of the control chip. That is, each first capacitor and each second capacitor are equivalent to being connected with the control chip 101 through the soft switch, and the control chip 101 can open or disconnect one or more branches where the first capacitors are located through the IO port, and can also open or disconnect one or more branches where the second capacitors are located through the IO port. Wherein, each first capacitor can be connected in parallel, and each second capacitor can also be connected in parallel. Due to the characteristics of the differential circuit, the structures and parameters of the two branches are consistent. Therefore, in this embodiment, the impedance values of the first matching circuit 1022 and the second matching circuit 1024 may be set to be the same.
The control chip 101 is configured to determine a first target capacitance from a plurality of first capacitances of the first tuning circuit 1021, and determine a second target capacitance from a plurality of second capacitances of the second tuning circuit 1023, according to the target capacitance value; and disconnecting the branch circuit where the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit 1021 are located, and disconnecting the branch circuit where the other capacitors except the second target capacitor in the plurality of second capacitors of the second tuning circuit 1023 are located, through the IO port of the control chip.
Similarly, since the structures and parameters of the two branches of the differential circuit are identical, the adjustment modes of the second tuning circuit 1023 and the first tuning circuit 1021 are identical, and the capacitance values after adjustment are also identical.
In this way, no matter the antenna impedance matching circuit 100 is detuned due to environmental changes or aging of components, the capacitance value of the adjusting circuit 102 can be adjusted in real time according to the target signal, so that the whole antenna impedance matching circuit 100 can always maintain high stability, and the antenna 103 can operate with maximum power.
By adopting the circuit, the target capacitance value of the regulating circuit in the current antenna impedance matching circuit can be determined according to the target signal, and then the capacitance value of the regulating circuit is regulated according to the target capacitance value, so that the impedance of the antenna is matched. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
Fig. 4 is a schematic diagram of an antenna impedance matching method according to an exemplary embodiment, applied to an antenna impedance matching circuit, the antenna impedance matching circuit including a control chip, a regulating circuit, and an antenna, the regulating circuit being connected to the control chip and the antenna, respectively; as shown in fig. 4, the method may include the steps of:
in step S201, a target signal is received through the antenna.
The target signal is a signal fed back by the target object after the radio frequency signal is transmitted to the target object through the antenna.
In step S202, a target capacitance value of the adjusting circuit is determined according to the target signal.
In step S203, the capacitance value of the adjusting circuit is adjusted according to the target capacitance value to match the impedance of the antenna.
As shown in fig. 5, the determining the target capacitance value of the adjusting circuit according to the target signal in the step S202 may include the following steps:
in step S2021, the power and phase of the target signal are determined.
In step S2022, a target capacitance value of the regulating circuit is determined from the power and the phase.
For example, the target capacitance value may be determined by a preset capacitance correspondence relationship according to the power and the phase. The preset capacitance corresponding relation comprises a corresponding relation among power, phase and capacitance.
In one possible implementation manner, if the radio frequency signal is a single-ended signal, the adjusting circuit may include a first tuning circuit and a first matching circuit, where the first matching circuit is connected to the control chip and the antenna, and the first tuning circuit is connected to the control chip and the first matching circuit, respectively; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with the IO port of the control chip. Accordingly, as shown in fig. 6, the adjusting the capacitance value of the adjusting circuit according to the target capacitance value in the step S203 may include the following steps:
in step S2031, a first target capacitance is determined from a plurality of first capacitances of the first tuning circuit according to the target capacitance value.
In step S2032, the branch circuit where the other capacitors except the first target capacitor are located in the plurality of first capacitors of the first tuning circuit is disconnected through the IO port of the control chip.
In another possible implementation manner, if the radio frequency signal is a differential signal, the adjusting circuit may include a first tuning circuit, a second tuning circuit, a first matching circuit and a second matching circuit, where the first matching circuit is connected to the control chip and the antenna, the second matching circuit is connected to the control chip and the antenna, the first tuning circuit is connected to the control chip and the first matching circuit, and the second tuning circuit is connected to the control chip and the second matching circuit; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is respectively connected with an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is respectively connected with the IO port of the control chip. Accordingly, as shown in fig. 7, the adjusting the capacitance value of the adjusting circuit according to the target capacitance value in the step S203 may include the following steps:
in step S2033, a first target capacitance is determined from the plurality of first capacitances of the first tuning circuit and a second target capacitance is determined from the plurality of second capacitances of the second tuning circuit according to the target capacitance value.
In step S2034, the branches where the capacitances other than the first target capacitance are located in the plurality of first capacitances of the first tuning circuit are disconnected, and the branches where the capacitances other than the second target capacitance are located in the plurality of second capacitances of the second tuning circuit are disconnected through the IO port of the control chip.
By adopting the method, the target capacitance value of the regulating circuit in the current antenna impedance matching circuit can be determined according to the target signal, and then the capacitance value of the regulating circuit is regulated according to the target capacitance value, so that the impedance of the antenna is matched. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
The specific manner in which the operations are performed by the steps in the above-described embodiments are described in detail in the embodiments of fig. 1 to 3 regarding the antenna impedance matching circuit 100, and will not be described in detail herein.
The present disclosure also provides a computer readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the steps of the antenna impedance matching method provided by the present disclosure.
The present disclosure also provides a chip, which may be, for example, an NFC transceiver chip, comprising a processor and an interface; the processor is configured to read instructions to perform the steps of the antenna impedance matching method provided by the present disclosure.
Fig. 8 is a block diagram of a vehicle 300, according to an exemplary embodiment. For example, the vehicle 300 may be a hybrid vehicle, or may be a non-hybrid vehicle, an electric vehicle, a fuel cell vehicle, or other type of vehicle. The vehicle 300 may be an autonomous vehicle, a semi-autonomous vehicle, or a non-autonomous vehicle.
Referring to fig. 8, a vehicle 300 may include various subsystems, such as an infotainment system 310, a perception system 320, a decision control system 330, a drive system 340, and a computing platform 350. Wherein the vehicle 300 may also include more or fewer subsystems, and each subsystem may include multiple components. In addition, interconnections between each subsystem and between each component of the vehicle 300 may be achieved by wired or wireless means.
In some embodiments, the infotainment system 310 may include a communication system, an entertainment system, a navigation system, and the like.
The perception system 320 may include several types of sensors for sensing information of the environment surrounding the vehicle 300. For example, the perception system 320 may include a global positioning system (which may be a GPS system, or may be a beidou system or other positioning system), an inertial measurement unit (inertial measurement unit, IMU), a lidar, millimeter wave radar, an ultrasonic radar, and a camera device.
Decision control system 330 may include a computing system, a vehicle controller, a steering system, a throttle, and a braking system.
The drive system 340 may include components that provide powered movement of the vehicle 300. In one embodiment, the drive system 340 may include an engine, an energy source, a transmission, and wheels. The engine may be one or a combination of an internal combustion engine, an electric motor, an air compression engine. The engine is capable of converting energy provided by the energy source into mechanical energy.
Some or all of the functions of the vehicle 300 are controlled by the computing platform 350. The computing platform 350 may include at least one processor 351 and a memory 352, the processor 351 may execute instructions 353 stored in the memory 352.
The processor 351 may be any conventional processor, such as a commercially available CPU. The processor may also include, for example, an image processor (Graphic Process Unit, GPU), a field programmable gate array (Field Programmable Gate Array, FPGA), a System On Chip (SOC), an application specific integrated Chip (Application Specific Integrated Circuit, ASIC), or a combination thereof.
The memory 352 may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.
In addition to instructions 353, memory 352 may store data such as road maps, route information, vehicle location, direction, speed, and the like. The data stored by memory 352 may be used by computing platform 350.
In an embodiment of the present disclosure, the processor 351 may execute the instructions 353 to perform all or part of the steps of the antenna impedance matching method described above.
In another exemplary embodiment, a computer program product is also provided, comprising a computer program executable by a programmable apparatus, the computer program having code portions for performing the above-described antenna impedance matching method when executed by the programmable apparatus.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
Claims (14)
1. The antenna impedance matching circuit is characterized by comprising a control chip, an adjusting circuit and an antenna, wherein the adjusting circuit is respectively connected with the control chip and the antenna;
the antenna is configured to receive a target signal, wherein the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna;
the control chip is configured to determine a target capacitance value of the adjusting circuit according to the target signal, and adjust the capacitance value of the adjusting circuit according to the target capacitance value so as to match the impedance of the antenna;
the adjusting circuit comprises a first tuning circuit, a second tuning circuit, a first matching circuit and a second matching circuit, wherein the first matching circuit is connected with the control chip and the antenna respectively, the second matching circuit is connected with the control chip and the antenna respectively, the first tuning circuit is connected with the control chip and the first matching circuit respectively, and the second tuning circuit is connected with the control chip and the second matching circuit respectively.
2. The circuit of claim 1, wherein the control chip is configured to determine a power and a phase of the target signal and to determine a target capacitance value of the regulating circuit based on the power and the phase.
3. The circuit of claim 2, wherein the control chip is configured to determine the target capacitance value from a preset capacitance correspondence based on the power and the phase; the preset capacitance corresponding relation comprises a corresponding relation among power, phase and capacitance.
4. The circuit of claim 1, wherein the tuning circuit comprises a first tuning circuit and a first matching circuit, the first matching circuit being coupled to the control chip and the antenna, respectively, the first tuning circuit being coupled to the control chip and the first matching circuit, respectively.
5. The circuit of claim 4, wherein the first tuning circuit comprises a plurality of first capacitors, each of the first capacitors being respectively connected with an IO port of the control chip;
the control chip is configured to determine a first target capacitance from a plurality of first capacitances of the first tuning circuit according to the target capacitance value, and disconnect branches where other capacitances except the first target capacitance are located from the plurality of first capacitances of the first tuning circuit through an IO port of the control chip.
6. The circuit of claim 1, wherein the first tuning circuit comprises a plurality of first capacitors, each of the first capacitors being respectively connected with an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is connected with an IO port of the control chip;
the control chip is configured to determine a first target capacitance from a plurality of first capacitances of the first tuning circuit and a second target capacitance from a plurality of second capacitances of the second tuning circuit according to the target capacitance value; and disconnecting the branch circuit where the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit are located, and disconnecting the branch circuit where the other capacitors except the second target capacitor in the plurality of second capacitors of the second tuning circuit are located through the IO port of the control chip.
7. The antenna impedance matching method is characterized by being applied to an antenna impedance matching circuit, wherein the antenna impedance matching circuit comprises a control chip, an adjusting circuit and an antenna, and the adjusting circuit is respectively connected with the control chip and the antenna; the method comprises the following steps:
receiving a target signal through the antenna, wherein the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna;
determining a target capacitance value of the regulating circuit according to the target signal;
according to the target capacitance value, adjusting the capacitance value of the adjusting circuit to match the impedance of the antenna;
the adjusting circuit comprises a first tuning circuit, a second tuning circuit, a first matching circuit and a second matching circuit, wherein the first matching circuit is connected with the control chip and the antenna respectively, the second matching circuit is connected with the control chip and the antenna respectively, the first tuning circuit is connected with the control chip and the first matching circuit respectively, and the second tuning circuit is connected with the control chip and the second matching circuit respectively.
8. The method of claim 7, wherein determining the target capacitance value of the conditioning circuit from the target signal comprises:
determining the power and phase of the target signal;
and determining a target capacitance value of the regulating circuit according to the power and the phase.
9. The method of claim 8, wherein said determining a target capacitance value of the regulating circuit based on the power and the phase comprises:
determining the target capacitance value through a preset capacitance corresponding relation according to the power and the phase;
the preset capacitance corresponding relation comprises a corresponding relation among power, phase and capacitance.
10. The method of claim 7, wherein the tuning circuit comprises a first tuning circuit and a first matching circuit, the first matching circuit being connected to the control chip and the antenna, respectively, the first tuning circuit being connected to the control chip and the first matching circuit, respectively; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with an IO port of the control chip; the adjusting the capacitance value of the adjusting circuit according to the target capacitance value comprises:
determining a first target capacitance from a plurality of first capacitances of the first tuning circuit according to the target capacitance value;
and disconnecting branches of other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit through the IO port of the control chip.
11. The method of claim 7, wherein the first tuning circuit comprises a plurality of first capacitors, each of the first capacitors being respectively connected with an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is connected with an IO port of the control chip; the adjusting the capacitance value of the adjusting circuit according to the target capacitance value comprises:
determining a first target capacitance from a plurality of first capacitances of the first tuning circuit and a second target capacitance from a plurality of second capacitances of the second tuning circuit according to the target capacitance value;
and disconnecting the branch circuit where other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit are located, and disconnecting the branch circuit where other capacitors except the second target capacitor in the plurality of second capacitors of the second tuning circuit are located through the IO port of the control chip.
12. A vehicle, characterized by comprising:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to implement the steps of the method of any of claims 7 to 11 when invoking executable instructions stored on the memory.
13. A computer readable storage medium having stored thereon computer program instructions, which when executed by a processor, implement the steps of the method of any of claims 7 to 11.
14. A chip, comprising a processor and an interface; the processor is configured to read instructions to perform the method of any one of claims 7 to 11.
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