CN115733514A - Frequency hopping generating device - Google Patents
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- CN115733514A CN115733514A CN202111021616.3A CN202111021616A CN115733514A CN 115733514 A CN115733514 A CN 115733514A CN 202111021616 A CN202111021616 A CN 202111021616A CN 115733514 A CN115733514 A CN 115733514A
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Abstract
The invention provides a frequency hopping generation device, which comprises a main control module, a frequency direct synthesis module, a phase-locked loop module and a frequency multiplication module, wherein the frequency direct synthesis module is used for directly synthesizing frequency; the main control module is respectively connected with the frequency direct synthesis module and the phase-locked loop module; the frequency direct synthesis module is respectively connected with the phase-locked loop module and the frequency multiplication module; the frequency doubling module comprises a plurality of cascaded sub frequency doubling modules, and each sub frequency doubling module comprises a band-pass filter, an amplifier and a frequency multiplier; the main control module sends a first control signal to the phase-locked loop module, sends a second control signal to the direct frequency synthesis module, the direct frequency synthesis module generates a frequency hopping signal according to the clock signal and the second control signal and outputs the frequency hopping signal to the frequency doubling module, a plurality of cascaded sub frequency doubling modules of the frequency doubling module perform frequency doubling processing and stray processing on the frequency hopping signal, and the processed frequency hopping signal is output as a local oscillation signal. The local oscillator signal output by the device has the advantages of high frequency, high frequency hopping rate, continuous phase and low spurious.
Description
Technical Field
The present invention relates to the field of frequency hopping communications, and more particularly, to a frequency hopping generation apparatus.
Background
An intermediate frequency module in a ground terminal product of a new generation of frequency hopping communication system needs two broadband high-speed frequency hopping generation devices to generate local oscillation signals. The frequency hopping generation device in the prior art generally comprises a main control module and a frequency synthesis module, and the frequency synthesis module is implemented by 3 methods: direct analog frequency synthesis, indirect frequency synthesis, and direct digital frequency synthesis. The indirect frequency synthesis method generally includes a pulse control phase-locked loop method and a digital preset loop method. Because direct analog frequency synthesis is the first generation frequency synthesis technology, the current frequency synthesis module is generally realized by a phase-locked loop module or a direct digital frequency synthesizer, and the phase-locked loop module is called PLL for short and has the characteristics of high output signal frequency, wide frequency band, low phase noise and small spurious, but the direct analog frequency synthesis module has the defects of longer frequency locking time of the output signal and larger signal resolution. The direct digital frequency synthesizer, referred to as DDS for short, has the advantages of fast changing the frequency of the output signal, extremely small resolution of the output signal, and continuous phase, but has the disadvantages of low frequency band, narrow frequency band and spurious difference of the output signal.
In the prior art, a frequency hopping generation device for generating frequency hopping signals usually adopts a ping-pong phase-locked loop scheme of a DDS excited PLL, and a half-frequency-locked and half-working ping-pong phase-locked loop structure can shorten half of the phase-locked time, but is limited by the PLL locking time and is commonly used for a frequency hopping system of thousands of levels.
As shown in fig. 1, a main control module FPGA (field programmable gate array) controls two DDSs to generate a clock signal through SPI (serial peripheral interface), and the clock signal is used as a reference clock REF of a phase-locked loop module PLL1 and a phase-locked loop module PLL 2; then the FPGA controls the PLL1 and the PLL2 to generate signals in a certain frequency range through the SPI, ping-pong switching output of two paths of signals is completed through the high-isolation radio frequency switch to form frequency hopping signals, wherein the high-pass filter and the low-pass filter are used for inhibiting out-of-band spurious and harmonic waves, the output power is improved by using the amplifier, and the load traction phenomenon output by the PLL1 and the PPL2 is reduced by using the reverse isolation of the amplifier.
The ping-pong frequency hopping generator has the following disadvantages: firstly, practice of various chips verifies that the frequency locking time of a phase-locked loop module is difficult to be less than 100us, the frequency hopping rate of a generated frequency hopping signal is difficult to be more than 10000 hops per second, and the phase-locked loop module is not suitable for a frequency hopping system of more than thousands of levels; secondly, the radio frequency switch switching in the generating device can cause the phase-locked loop module to generate an output load traction phenomenon, so that the frequency of an output signal has large fluctuation, namely the frequency locking time of the phase-locked loop module becomes longer, and the frequency hopping rate of a frequency hopping signal is further reduced; moreover, the phases of the output frequencies of the phase-locked loop modules of the two branches are difficult to synchronize, and the switching delay of the radio frequency switch also affects the phase of the signal, so that the phase of the finally output signal is discontinuous, and the phase-locked loop is difficult to be applied to signal processing application of coherent demodulation in receiving; finally, the integral circuit power consumption of the ping-pong frequency hopping generator is large, the design cost is high, and the application field of the generator is limited.
Disclosure of Invention
The present invention is directed to overcome at least one of the above drawbacks of the prior art, and provides a frequency hopping generator, which is used to solve the problems of discontinuous phase of the frequency hopping signal output by the frequency hopping generator, low frequency hopping rate, large power consumption of the circuit, and the like in the prior art.
The technical scheme adopted by the invention comprises the following steps:
a frequency hopping generation device comprises a main control module, a frequency direct synthesis module, a phase-locked loop module and a frequency doubling module; the main control module is respectively connected with the frequency direct synthesis module and the phase-locked loop module; the frequency direct synthesis module is respectively connected with the phase-locked loop module and the frequency multiplication module; the frequency doubling module comprises a plurality of cascaded sub frequency doubling modules; the sub frequency doubling module comprises a band-pass filter, an amplifier and a frequency multiplier which are connected in sequence; the main control module sends a first control signal to the phase-locked loop module and sends a second control signal to the frequency direct synthesis module; the phase-locked loop module generates a clock signal according to the first control signal and outputs the clock signal to the frequency direct synthesis module; the frequency direct synthesis module generates a frequency hopping signal according to the second control signal and the clock signal, and outputs the frequency hopping signal to the frequency doubling module; and a plurality of cascaded sub frequency multiplication modules of the frequency multiplication module perform frequency multiplication processing and spurious processing on the frequency hopping signal, and the frequency hopping signal after the frequency multiplication processing and the spurious processing is output as a local oscillator signal.
In a specific embodiment, the plurality of cascaded frequency doubling submodules are a first frequency doubling submodule, a second frequency doubling submodule and a third frequency doubling submodule which are cascaded in sequence; the band-pass filter of the first sub-frequency doubling module is a passive band-pass filter, and/or the band-pass filter of the second sub-frequency doubling module is a dielectric band-pass filter, and/or the band-pass filter of the third sub-frequency doubling module is a dielectric band-pass filter.
Further, the passive band-pass filter is a 9-order passive band-pass filter; the dielectric band-pass filter is an 11-order dielectric cavity band-pass filter.
In a specific embodiment, the system further comprises a spurious suppression module connected to the frequency doubling module; and the spurious suppression module carries out spurious processing on the local oscillation signal and then outputs the processed local oscillation signal.
Furthermore, the stray rejection module comprises a first microstrip band-pass filter, an amplifier and a second microstrip band-pass filter which are connected in sequence.
Further, the first microstrip band-pass filter and the second microstrip band-pass filter are both 7-order parallel microstrip band-pass filters.
In a specific embodiment, the frequency direct synthesis module, the first frequency doubling submodule, the second frequency doubling submodule and the third frequency doubling submodule are separated by a separation cavity.
In a specific embodiment, the frequency direct synthesis module is a direct digital frequency synthesizer.
In a specific embodiment, the frequency range of the clock signal is between 4.5GHz and 5 GHz; the frequency range of the frequency hopping signal generated by the frequency direct synthesis module is between 550MHz and 750 MHz; the frequency range of the local oscillation signal is between 4.4GHz and 6 GHz.
Compared with the prior art, the invention has the beneficial effects that:
in the apparatus provided in this embodiment, the pll module provides a clock signal as a system clock for the frequency direct synthesis module according to a first control signal sent by the main control module, and meanwhile, the frequency direct synthesis module is used as a frequency hopping core, the frequency direct synthesis module determines a fundamental frequency range of an output signal based on a second control signal, and rapidly updates the frequency of the frequency hopping signal in the fundamental frequency range based on the system clock, and if the clock signal is a higher-frequency signal, the frequency hopping rate of the frequency hopping signal can be higher, and meanwhile, because the frequency hopping signal is generated and output only by the frequency direct synthesis module, the continuity of the phase of the frequency hopping signal can be ensured. However, in order to fully utilize the excellent spurious performance in a certain broadband of the chip itself, a lower frequency-hopping signal frequency range is preferred, and the frequency-hopping signals generally used for frequency-hopping communication, especially satellite communication, need to meet the technical requirements of high frequency and low spurious.
Drawings
Fig. 1 is a schematic diagram of a ping-pong frequency hopping generator in the background art.
Fig. 2 is a schematic diagram showing the entire module composition of the frequency hopping generation device according to embodiment 1.
Fig. 3 is a schematic diagram illustrating a plurality of sub frequency doubling modules of the frequency doubling module 400 according to embodiment 1.
Fig. 4 is a schematic diagram illustrating the components of three sub-frequency doubling modules of the frequency doubling module 400 according to embodiment 1.
Fig. 5 is a schematic diagram showing the overall module composition of the frequency hopping generation apparatus including the spurious suppression module 500 according to embodiment 1.
Fig. 6 is a schematic diagram of the stray suppression module 500 according to embodiment 1.
Fig. 7 is a schematic diagram showing the entire module composition of the frequency hopping generation device according to embodiment 2.
Detailed Description
The drawings are only for purposes of illustration and are not to be construed as limiting the invention. For a better understanding of the following embodiments, certain features of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
Example 1
The present embodiment provides a frequency hopping generation device, configured to generate a frequency hopping signal as a local oscillator signal for output, where the frequency hopping signal is a signal generated by using a frequency hopping technique, and a carrier frequency of the signal is continuously hopped and is commonly used in satellite communication. In this embodiment, the frequency hopping signal refers to a radio frequency hopping signal, and the technical difficulty in implementing radio frequency hopping is mainly expressed in how to implement fast frequency conversion of the signal in a frequency band and how to ensure high quality of the signal while fast frequency conversion is performed.
As shown in fig. 2, the generating device includes: the main control module 100, the phase-locked loop module 200, the frequency direct synthesis module 300, and the frequency doubling module 400.
The main control module 100 is typically implemented by a main control chip or a main control integrated circuit, such as an FPGA chip. The phase-locked loop module 200 is a control circuit capable of implementing feedback of a phase-locked loop, and generally includes a phase detector, a loop filter, and a voltage-controlled oscillator. The direct frequency synthesis module 300 refers to a control circuit capable of directly synthesizing a frequency signal, and specifically, the direct frequency synthesis module 300 may be a direct analog frequency synthesizer or a direct digital frequency synthesizer, but since the direct digital frequency synthesizer can realize faster frequency conversion of an output signal, the direct frequency synthesis module 300 in the present embodiment is preferably a direct digital frequency synthesizer. The frequency doubling module 400 is a module capable of frequency doubling, and the module at least includes a frequency doubler or a device/circuit capable of realizing the same function of the frequency doubler.
In the frequency hopping generation device, the connection relationship of the modules is as shown in fig. 2:
the main control module 100 is respectively connected with the phase-locked loop module 200 and the frequency direct synthesis module 300;
the frequency direct synthesis module 300 is respectively connected with the phase-locked loop module 200 and the frequency multiplication module 400;
as shown in fig. 3, the frequency doubling module 400 includes a plurality of cascaded frequency doubling submodules, and each frequency doubling submodule includes a band pass filter, an amplifier and a frequency multiplier connected in sequence. The multiple of the frequency multiplier is N, and the value of the multiple N and the number of the sub frequency doubling modules jointly determine the frequency of the frequency doubled signal input to the frequency doubling module 400, that is, the final frequency of the signal is jointly determined, and the spurious performance and the frequency doubling harmonic in the bandwidth of the frequency hopping signal are also factors for balancing N, so the value of the multiple N and the number of the sub frequency doubling modules are determined according to the final frequency actually required.
In the frequency hopping generating device, the generation of the frequency hopping signal and the process of outputting the frequency hopping signal as the local oscillation signal are shown in fig. 2 and 3:
the main control module 100 sends a first control signal to the pll module 200 and a second control signal to the fsd module 300.
Based on this, the pll module 200 generates a clock signal according to the first control signal, and outputs the clock signal to the frequency direct synthesis module 300, so that the frequency direct synthesis module 300 uses the clock signal as the system clock. The frequency direct synthesis module 300 determines a fundamental frequency range of an output signal thereof according to the second control signal, generates a frequency hopping signal within the fundamental frequency range according to the clock signal, and outputs the frequency hopping signal to the frequency doubling module 400.
Specifically, the clock signal is the basis of sequential logic, and can be used to determine when the status of a certain module is updated during a certain operation, and when the clock signal is used as the system clock of a module, the clock signal will determine the frequency of status update of the module/unit during the whole operation. After receiving the second control signal, the direct frequency synthesis module 300 determines the fundamental frequency range of its output signal according to the second control signal, and after receiving the clock signal transmitted by the phase-locked loop module 200, uses the clock signal as the system clock. The frequency direct synthesis module 300 is used as a frequency hopping core of the whole frequency hopping generation apparatus, and the frequency of the output signal is rapidly updated within a fundamental frequency range according to a system clock, so that the output signal becomes a frequency hopping signal. The frequency updating rate of the frequency hopping signal determines the frequency hopping rate of the frequency hopping signal, and the higher the frequency of the clock signal as the system clock is, the higher the frequency direct synthesis module 300 can update the frequency of the frequency hopping signal within its own capability range at a higher rate, and the higher the frequency hopping rate of the output frequency hopping signal is.
After receiving the frequency hopping signal, the multiple cascaded frequency doubling sub-modules of the frequency doubling module 400 perform frequency doubling and spur processing on the frequency hopping signal, and output the frequency hopping signal after the frequency doubling and spur processing as a local oscillation signal. The spur processing generally refers to filtering the signal through a filter, and in this embodiment, the spur processing further includes amplifying the power of the signal. The frequency doubling process generally refers to frequency doubling of a signal by a frequency multiplier to increase the frequency of the signal.
Specifically, when the frequency hopping signal is input to the frequency doubling module 400, the frequency hopping signal is input from the first-stage cascaded frequency doubling sub-module, each frequency doubling sub-module includes a band-pass filter, an amplifier and a frequency multiplier which are connected in sequence, and after the frequency hopping signal is input to each frequency doubling sub-module, the frequency hopping signal is firstly subjected to band-pass filtering by the band-pass filter, then amplified in power by the amplifier, and finally subjected to N-fold frequency doubling by the frequency multiplier and then output. If the number of the sub-frequency multiplication modules of the frequency multiplication module 400 is m, the frequency of the frequency hopping signal output from the frequency multiplier of the last sub-frequency multiplication module is N which is the frequency of the frequency hopping signal generated by the frequency direct synthesis module 300 m And (4) doubling.
The frequency hopping generating device provided by the embodiment has the following beneficial effects:
based on one of the advantages of the phase-locked loop 200, that is, the phase-locked loop module 200 can output a high frequency signal, the main control module of the apparatus provided in this embodiment controls the phase-locked loop module 200 to provide the clock signal to the frequency direct synthesis module 300 as its system clock through the first control signal, where the clock signal may be a high frequency signal if the local oscillator signal requires a higher frequency hopping rate. Based on one of the advantages of the direct frequency synthesis module 300, namely, the ability to quickly update the frequency of the output signal, the apparatus provided in this embodiment uses the direct frequency synthesis module 300 as a frequency hopping core, the main control module determines the fundamental frequency range of the direct frequency synthesis module 300 through the second control signal, the direct frequency synthesis module 300 quickly updates the frequency of the frequency hopping signal in the fundamental frequency range based on the system clock, and if the clock signal is a higher frequency signal, the frequency hopping rate of the frequency hopping signal can reach a higher value, and meanwhile, since the frequency hopping signal is generated and output only by the direct frequency synthesis module 300, the continuity of the phase of the frequency hopping signal can be ensured. However, in order to fully utilize the excellent spurious performance in a certain broadband of the chip itself, the frequency direct synthesis module 300 preferably selects a lower frequency range of the frequency hopping signal, and the frequency hopping signals generally used for frequency hopping communication, especially satellite communication, all need to meet the technical requirements of high frequency and low spurious level, so that the apparatus provided by this embodiment performs spurious processing and frequency multiplication processing on the frequency hopping signals by using the frequency multiplication module 400, each cascaded frequency multiplication sub-module in the frequency multiplication module 400 is designed in the form of "bandpass filter-amplifier-frequency multiplier", and spurious suppression is performed on the frequency hopping signals in the process of increasing the frequency of the frequency hopping signals, so that the finally output frequency hopping signals of the apparatus have the advantages of high frequency, high frequency hopping rate, continuous phase and low spurious level as local oscillation signals.
In a specific implementation manner, as shown in fig. 4, a frequency doubling module 400 of the apparatus provided in this embodiment includes a plurality of cascaded frequency sub-doubling modules, which are specifically a first frequency sub-doubling module 410, a second frequency sub-doubling module 420, and a third frequency sub-doubling module 430 that are cascaded in sequence.
The band-pass filter of the first sub-frequency doubling module is a passive band-pass filter, and/or the band-pass filter of the second sub-frequency doubling module is a dielectric band-pass filter, and/or the band-pass filter of the third sub-frequency doubling module is a dielectric band-pass filter. Preferably, in order to reduce the spurious of the frequency hopping signal finally output by the apparatus, the filters among the multiple sub-frequency doubling modules should be designed in a matched manner, the band-pass filter of the first sub-frequency doubling module is a passive band-pass filter, the band-pass filter of the second sub-frequency doubling module is a dielectric band-pass filter, and the band-pass filter of the third sub-frequency doubling module is a dielectric band-pass filter.
Meanwhile, in order to reduce the radiation crosstalk between the modules in the apparatus, especially in the processes of generating a frequency hopping signal and performing frequency doubling and spurious processing on the frequency hopping signal, it should be noted that the modules are isolated from each other, and therefore, preferably, the frequency direct synthesis module 300, the first frequency sub-doubling module 410, the second frequency sub-doubling module 420, and the third frequency sub-doubling module 430 are isolated from each other by using partition compartments, which may be metal partition compartments, and the modules are isolated from each other by block shielding constructed by the partition compartments, so as to reduce the radiation crosstalk between the modules.
In a preferred embodiment, in order to further enhance the suppression of out-of-band harmonics or spurs of the local oscillator signal, the apparatus provided in this embodiment further includes a spur suppression module 500, as shown in fig. 5, where the spur suppression module 500 is connected to the third sub-frequency multiplication module 430, and is configured to perform spur processing on the local oscillator signal output by the third sub-frequency multiplication module 430.
Specifically, as shown in fig. 6, the spurious suppression module 500 includes a first microstrip bandpass filter, an amplifier, and a second microstrip bandpass filter connected in sequence. When the frequency hopping signal is input to the spurious suppression module 500, the frequency hopping signal is first subjected to microstrip filtering by the first microstrip band-pass filter, then subjected to power amplification by the amplifier, and finally subjected to microstrip filtering by the second microstrip band-pass filter and then output. The spurious suppression module 500 of the device further enhances the suppression of out-of-band harmonics or spurious of the local oscillation signal in the design form of 'microstrip band-pass filter-amplifier-microstrip band-pass filter', and improves the output power of the local oscillation signal.
Example 2
Based on the same concept as that of embodiment 1, the present embodiment provides a frequency hopping generating apparatus, which is different from embodiment 1 in that the apparatus is provided for generating a frequency hopping signal of a C band to be output as a local oscillation signal.
The frequency hopping signal of the C frequency band is a signal with the frequency range of 4.4 GHz-6 GHz, and the technical indexes of the frequency hopping signal of the C frequency band comprise: the frequency range of the frequency hopping signal is between 4.4GHz and 6GHz, the frequency resolution of the signal is 10Hz, the frequency hopping rate of the signal is 20000 hops/second, the frequency conversion time of the signal is not more than 100ns, the phase noise of the signal is not more than-85dBc @10kHz, and the in-band spurious of the signal is not more than-50 dBc.
Based on the above indexes, the apparatus provided in this embodiment is as shown in fig. 7, where the main control module is implemented by an FPGA chip, the phase-locked loop module is implemented by a phase-locked loop circuit PLL, and the direct frequency synthesis module is implemented by a direct digital frequency synthesizer DDS.
The FPGA outputs a control signal SPI1 to a phase-locked loop circuit PLL through the SPI, the phase-locked loop circuit PLL generates a clock signal REF with fixed frequency after receiving the control signal SPI1, and the clock signal REF is output to a direct digital frequency synthesizer DDS. The FPGA outputs a control signal SPI2 to a direct digital frequency synthesizer DDS through the SPI, the direct digital frequency synthesizer DDS determines the fundamental frequency range of the output signal after receiving the control signal SPI2, and then according to a clock signal REF transmitted by a phase-locked loop circuit PLL, the frequency of the output signal is updated through self pin input pulse, so that a frequency hopping signal is generated, and the frequency range of the frequency hopping signal is in the fundamental frequency range.
The direct digital frequency synthesizer DDS cannot directly synthesize high-frequency signals due to the limitation of the device, so that the FPGA controls the direct digital frequency synthesizer DDS to generate signals with the frequency range of 550MHz to 750MHz through the control signal SPI 2. Compared with a direct digital frequency synthesizer DDS, the phase-locked loop circuit PLL can generate a high-frequency signal, the FPGA controls the phase-locked loop circuit PLL to generate a high-frequency clock signal REF through the control signal SPI1, and the frequency range of the clock signal REF is between 4.8GHz and 5 GHz. Specifically, the direct digital frequency synthesizer DDS updates the frequency of the output signal by inputting a pulse through the update pin, the time occupied by updating the frequency each time is about 2 to 3 cycles of frequency division of the clock signal REF/16, and if the frequency of the clock signal REF is 4.8GHz, the time for updating the frequency of the output signal each time by the direct digital frequency synthesizer DDS is about 3 × 16/4.8ghz =10ns (nanoseconds), that is, the frequency hopping rate of the frequency hopping signal can reach hundreds of thousands of hops/second, which meets the frequency hopping rate index of the frequency hopping signal of the C frequency band, but the frequency is lower and is between 550MHz and 750 MHz.
Further, in order to improve the frequency of the frequency hopping signal and suppress spurious, the frequency hopping signal (fundamental frequency) generated by the direct digital frequency synthesizer DDS is input into an LC band-pass filter in the first frequency doubling module, namely a passive band-pass filter for band-pass filtering, and is input into a frequency doubling multiplier after being subjected to power amplification by an amplifier, so that the frequency of the frequency hopping signal is changed into 2 times of the fundamental frequency, and the frequency range is between 1.1 and 1.5 GHz; inputting the frequency-doubled frequency hopping signal into a next-stage frequency-doubling sub-module, namely a second frequency-doubling sub-module, inputting the frequency hopping signal into a medium band-pass filter for band-pass filtering, performing power amplification on the frequency hopping signal through an amplifier, and inputting the frequency hopping signal into a frequency multiplier of 2 times again to enable the frequency of the frequency hopping signal to be 4 times of the fundamental frequency, wherein the frequency range is between 2.2 and 3 GHz; the frequency-doubled frequency hopping signal is input into the next-stage frequency doubling sub-module, namely a third frequency doubling sub-module, the frequency hopping signal is input into a medium band-pass filter for band-pass filtering, the frequency hopping signal is input into a 2-time frequency multiplier again after being subjected to power amplification by an amplifier, the frequency of the frequency hopping signal is changed to 8 times of the original frequency, and the frequency range is 4.4-6 GHz. Through the design form of three stages of sub frequency doubling modules and a band-pass filter-amplifier-2 times frequency multiplier of each sub frequency doubling module, the frequency of a frequency hopping signal generated by a direct digital frequency synthesizer DDS reaches the frequency index of a C frequency band signal and can be output as a local oscillator signal.
Preferably, the LC band-pass filter of the first sub-frequency doubling module is a 9-order LC band-pass filter, and the dielectric band-pass filters of the second sub-frequency doubling module and the third sub-frequency doubling module are 11-order dielectric cavity band-pass filters, so that the rectangular coefficient can be maximally improved and stray can be suppressed. The amplifiers of all the sub-frequency doubling modules are independently powered by low-noise multi-channel power supplies, so that power coupling crosstalk between the cascaded modules is reduced. Meanwhile, in order to reduce the radiation crosstalk between the modules, especially when a frequency hopping signal is generated and frequency multiplication and stray processing are performed on the frequency hopping signal, it should be noted that isolation among the modules is performed, and therefore, the direct digital frequency synthesizer DDS, the first sub-frequency multiplication module, the second sub-frequency multiplication module and the third sub-frequency multiplication module are all isolated by a partition, preferably, the partition may be a metal partition, and the block shielding isolation of each module is established among the modules by the partition, so that the radiation crosstalk between the modules is reduced.
In order to further enhance the suppression of the interference stray of the local oscillator signal, the local oscillator signal is input into a first microstrip band-pass filter of the enhanced outband stray suppression module for band-pass filtering, the power of the local oscillator signal is further amplified by an amplifier and then input into a second microstrip band-pass filter for band-pass filtering, and finally the local oscillator signal is output. Through the design form of 'microstrip band-pass filter-amplifier-microstrip band-pass filter' of the enhanced type out-of-band spurious suppression module, the local oscillator signal is further amplified in power and suppressed in spurious. Preferably, the first microstrip band-pass filter and the second microstrip band-pass filter of the enhanced outband spurious suppression module are both 7-order parallel microstrip band-pass filters.
Based on the above specific and preferred schemes, the device provided by the embodiment is verified through experiments: when the frequency of the clock signal REF output by the phase-locked loop module reaches 4.8GHz, the frequency-hopping signal generated by the direct digital frequency synthesizer DDS passes through the local oscillator signal output by the three-stage sub-frequency-multiplication module and the enhanced out-of-band spurious suppression module, and the frequency resolution of the local oscillator signal is as low as 4.8GHz/2 48 About 0.001Hz, and meets the technical requirement of 10Hz of resolution; the stray within the output fundamental frequency band of 550 MHz-750 MHz is better than-73 dBc, and the distance indexThe-68 dBc threshold of the stray interference filter has 5dB margin, and the technical requirement of stray is met; the phase noise of 4.8GHz dot frequency is about-92dBc @10kHz, and the distance index of-85dBc @10kHz still has 7dB margin, so that the technical requirement of the phase noise is met.
The total power consumption of active parts such as a phase-locked loop circuit PLL, a direct digital frequency synthesizer DDS, an amplifier and the like of the device is about 2.5W, the number of stages of a frequency doubling module can be cut to output signals of an S or L frequency band, the application field is wide, and the power consumption is further reduced. The device combines a direct digital frequency synthesizer DDS with an 8 frequency multiplication frequency chain, has simple circuit and control interface, has small volume of various filters and is assembled in a mounting way, and embodies the design concept of miniaturization, modularization, low power consumption and high reliability.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the technical solutions of the present invention, and are not intended to limit the specific embodiments of the present invention. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention claims should be included in the protection scope of the present invention claims.
Claims (10)
1. A frequency hopping generation device is characterized by comprising a main control module, a frequency direct synthesis module, a phase-locked loop module and a frequency multiplication module;
the main control module is respectively connected with the frequency direct synthesis module and the phase-locked loop module; the frequency direct synthesis module is respectively connected with the phase-locked loop module and the frequency multiplication module;
the frequency doubling module comprises a plurality of cascaded sub frequency doubling modules; the sub frequency doubling module comprises a band-pass filter, an amplifier and a frequency multiplier which are connected in sequence;
the main control module sends a first control signal to the phase-locked loop module and sends a second control signal to the frequency direct synthesis module; the phase-locked loop module generates a clock signal according to the first control signal and outputs the clock signal to the frequency direct synthesis module; the frequency direct synthesis module generates a frequency hopping signal according to the second control signal and the clock signal, and outputs the frequency hopping signal to the frequency doubling module; and a plurality of cascaded sub frequency multiplication modules of the frequency multiplication module perform frequency multiplication processing and spurious processing on the frequency hopping signal, and the frequency hopping signal after the frequency multiplication processing and the spurious processing is output as a local oscillator signal.
2. The frequency hopping generation apparatus of claim 1,
the plurality of cascaded sub-frequency doubling modules are a first sub-frequency doubling module, a second sub-frequency doubling module and a third sub-frequency doubling module which are sequentially cascaded;
the band-pass filter of the first sub-frequency doubling module is a passive band-pass filter, and/or the band-pass filter of the second sub-frequency doubling module is a dielectric band-pass filter, and/or the band-pass filter of the third sub-frequency doubling module is a dielectric band-pass filter.
3. The frequency hopping generation device according to claim 1 or 2, further comprising a spur suppression module connected to said frequency doubling module;
and the spurious suppression module carries out spurious processing on the local oscillation signal and then outputs the processed local oscillation signal.
4. The apparatus of claim 3, wherein the spur suppression module comprises a first microstrip bandpass filter, an amplifier, and a second microstrip bandpass filter connected in series.
5. The frequency hopping generating device according to claim 2, wherein said passive band pass filter is a 9 th order passive band pass filter.
6. The frequency hopping generating device according to claim 2, wherein said dielectric bandpass filter is an 11 th order dielectric cavity bandpass filter.
7. The apparatus according to claim 4, wherein the first microstrip bandpass filter and the second microstrip bandpass filter are both 7 th order parallel microstrip bandpass filters.
8. The apparatus according to claim 2, 5 or 6, wherein the frequency direct synthesis module, the first frequency doubling sub-module, the second frequency doubling sub-module and the third frequency doubling sub-module are separated by a gap.
9. The frequency hopping generating apparatus according to any one of claims 1 to 2 or 4 to 7, wherein said frequency direct synthesis module is a direct digital frequency synthesizer.
10. The frequency hopping generating device according to claim 9, wherein the frequency range of said clock signal is between 4.5GHz and 5 GHz; the frequency range of the frequency hopping signal generated by the frequency direct synthesis module is between 550MHz and 750 MHz; the frequency range of the local oscillation signal is between 4.4GHz and 6 GHz.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116203594A (en) * | 2023-05-06 | 2023-06-02 | 石家庄银河微波技术股份有限公司 | Device and system for generating radio navigation signal |
| CN116743207A (en) * | 2023-08-14 | 2023-09-12 | 成都谐盈科技有限公司 | ADRV9009 chip-based broadband frequency hopping system and method |
-
2021
- 2021-09-01 CN CN202111021616.3A patent/CN115733514A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116203594A (en) * | 2023-05-06 | 2023-06-02 | 石家庄银河微波技术股份有限公司 | Device and system for generating radio navigation signal |
| CN116743207A (en) * | 2023-08-14 | 2023-09-12 | 成都谐盈科技有限公司 | ADRV9009 chip-based broadband frequency hopping system and method |
| CN116743207B (en) * | 2023-08-14 | 2023-10-24 | 成都谐盈科技有限公司 | ADRV9009 chip-based broadband frequency hopping system and method |
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