CN115687131A - Program debugging method - Google Patents
Program debugging method Download PDFInfo
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- CN115687131A CN115687131A CN202211380471.0A CN202211380471A CN115687131A CN 115687131 A CN115687131 A CN 115687131A CN 202211380471 A CN202211380471 A CN 202211380471A CN 115687131 A CN115687131 A CN 115687131A
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Abstract
The invention discloses a program debugging method, which belongs to the technical field of computers and comprises the following steps: when the program is operated to the nth instruction, recording the program state of the current instruction n as PCr; judging whether the debugging direction is forward debugging or reverse debugging according to the execution direction state value of the current process; if the debugging direction is reverse debugging, exchanging the historical state record (n-1) of the target instruction n-1 to be skipped with the program state PCR of the current instruction n; the program state PCR of the current instruction n points to the instruction position of a target instruction n-1 to be jumped; after the record is started in the debugging process, the instruction key information is stored in a bidirectional linked list structure, the linked list always maintains the program state debugging track, and the register and the memory under the historical state of the target instruction to be skipped and the current state of the program are subjected to content exchange, so that the problems of inaccurate information record and insufficient architecture support of the traditional debugger are solved.
Description
Technical Field
The invention relates to a program debugging method, and belongs to the technical field of computers.
Background
In the current localization adaptation process, along with the increase of the scale and complexity of an application program, the dependency on a debugger is higher and higher, so that a matched high-level debugging tool corresponding to a processor is required to be developed to adapt to the localization process, reverse debugging and a framework are closely related, the workload is huge and complex, and the workload comprises disassembling, instruction identification, state recording, information recovery and the like.
At present, reverse debugging is extremely important for a traditional debugger, but most of the traditional debuggers do not support the function, the reverse debugging technology does not support shared memories, multiple threads and sub-processes, and meanwhile, a reverse debugging state recording method needs a large amount of memory space and a large amount of time load in the execution process.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
The invention aims to overcome the defects in the prior art, provides a program debugging method, and solves the problems of inaccurate information recording and insufficient framework support of the traditional debugger.
In order to achieve the above purpose/to solve the above technical problems, the present invention is realized by adopting the following technical scheme:
a method of program debugging, comprising: when the program is operated to the nth instruction, recording the program state of the current instruction n as PCr;
judging whether the debugging direction is forward debugging or reverse debugging according to the execution direction state value of the current process;
if the debugging direction is reverse debugging, exchanging the historical state record (n-1) of the target instruction n-1 to be skipped with the program state PCR of the current instruction n; the program state PCR of the current instruction n points to the instruction position of a target instruction n-1 to be jumped;
if the debugging direction is forward debugging, pointing the program state PCR of the current instruction n to the instruction position of the instruction n +1, and searching whether the historical state record (n + 1) of the instruction n +1 exists in a double-linked list;
if the historical state record (n + 1) of the instruction n +1 is recorded, exchanging the program state PCR of the current instruction n with the historical state record (n + 1) of the instruction n +1, and executing the (n + 1) th instruction;
if the history state record (n + 1) of the instruction n +1 is not recorded, the program state of the instruction n +1 is analyzed and recorded into the history state record (n + 1), and the (n + 1) th instruction is executed.
Further, the program state includes a program counter PC, a state control register, a general register, and data in a memory.
Further, the history status record (n + 1) includes a program counter PC for executing the instruction n +1 and register or memory information modified by the instruction n + 1.
Further, the exchanging the historical state record (n-1) of the target instruction n-1 to be skipped with the program state PCr of the current instruction n specifically includes:
checking a predecessor node of a historical state record (n-1) end mark of a target instruction n-1 to be jumped; if the node type is a register, exchanging the value of the register with the program state PCR of the current instruction n, and otherwise, exchanging the value in the memory;
and circularly traversing each node of the history state record (n-1) until the end mark is encountered.
Further, exchanging the program state PCr of the current instruction n with the historical state record (n + 1) specifically includes:
checking a precursor node of a historical state record (n + 1) end mark of the instruction n + 1;
if the node type is a register, exchanging the value of the register with the program state PCR of the current instruction n, otherwise, exchanging the value in the memory;
and circularly traversing each node of the history state record (n + 1) until the end mark is encountered.
Further, the analyzing the program state of the instruction n +1 and recording the program state into the history state record (n + 1) specifically includes:
analyzing the position of a program counter PC corresponding to the instruction n + 1;
obtaining an instruction type and a destination operand;
and storing the destination operand and the program counter PC in the node corresponding to the doubly linked list.
The second objective of the present invention is to provide a program debugging device, which comprises a processor and a storage medium;
the storage medium is used for storing instructions; the processor is configured to operate according to the instructions to perform the steps of the above-described method.
It is a further object of the invention to provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method described above.
Compared with the prior art, the invention has the following beneficial effects:
after the record is opened in the debugging process, the instruction key information is stored in a bidirectional linked list structure, the historical execution state of each instruction is distinguished by using an end mark, the linked list always maintains the program state debugging track, forward and backward debugging is realized by exchanging the contents of the register and the memory under the historical state of the target instruction to be jumped and the current state of the program, and the problems of inaccurate information record and insufficient architecture support of the traditional debugger are solved.
Drawings
Fig. 1 is a flowchart of a program debugging method according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a doubly linked list structure of a program debugging method according to an embodiment of the present invention;
FIG. 3 is a structural diagram of a doubly linked list of a program debugging method according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a record structure of a program debugging method according to an embodiment of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
Example one
As shown in fig. 1, a program debugging method includes:
when the program is operated to the nth instruction, recording the program state of the current instruction n as PCR, wherein the program state comprises a program counter PC, a state control register, a general register and data in a memory;
judging whether the debugging direction is forward debugging (exec _ forward) or reverse debugging (exec _ reverse) according to the execution direction state value of the current process;
if the debugging direction is reverse debugging, exchanging the historical state record (n-1) of the target instruction n-1 to be skipped with the program state PCR of the current instruction n; the program state PCr of the current instruction n points to the instruction position of the target instruction n-1 to be skipped, specifically:
checking a predecessor node of a historical state record (n-1) end mark of a target instruction n-1 to be jumped; if the node type is a register, exchanging the value of the register with the program state PCR of the current instruction n, and otherwise, exchanging the value in the memory; circularly traversing each node of the history state record (n-1) until the end mark is met;
if the debugging direction is forward debugging, the program state PCR of the current instruction n points to the instruction position of the instruction n +1, and whether the history state record (n + 1) of the instruction n +1 exists or not is searched in a double-linked list; the history state record (n + 1) comprises a program counter PC for executing the instruction n +1 and register or memory information modified by the instruction n + 1;
as shown in fig. 4, the record structure records history state information of each instruction, and each history state corresponds to an executed history instruction; the contents of each historical state of the program are three types of nodes such as a register, a memory and an end mark, and each historical state comprises a register node of a program counter PC because the program counter PC is dynamically changed; the end mark indicates the end of one instruction record content, and the adjacent instruction historical states are distinguished;
wherein, record (n-1) is the storage condition of the bidirectional linked list in the reverse execution state of the previous instruction, that is, record (n-1) = record (n) - > prev; the record (n + 1) is the storage condition of the forward execution state doubly linked list of the next instruction to be executed, namely, record (n + 1) = record (n) - > next;
if the historical state record (n + 1) of the instruction n +1 is not recorded, analyzing the program state of the instruction n +1, recording the program state into the historical state record (n + 1), and executing the (n + 1) th instruction; specifically, the method comprises the following steps:
analyzing the position of a program counter PC corresponding to the instruction n +1 to obtain an instruction type and a destination operand; in order to obtain the historical debugging state of a program, a domestic platform is needed to disassemble an instruction stream of the program to obtain an assembly instruction, and the instruction is classified into five types of instruction formats according to different instruction operation codes: a system call class, a transfer control class, a memory access class, a simple operation class and a composite operation class; after an instruction is decoded, a destination operand and a type are obtained, and it is determined whether a register or a memory is modified by the destination operand of the instruction, for example: an instruction (ldl Ra, disp (Rb)) having an instruction format of access class, the destination operand being Ra;
after the record function is opened, the first 6 bits of 32 bits of the Shenwei instruction are extracted to obtain an operation code;
analyzing the instruction type according to the operation code, and judging the offset position of the destination operand in the instruction;
storing a destination operand and a program counter PC into a node corresponding to the doubly linked list;
according to the characteristics of the instructions of the Shenwei processor, a program status register (FPCR) is required to be maintained for the instructions related to floating point operation, and the FPCR comprises a floating point exception state, a floating point rounding mode, floating point exception trap control, special data control and the like so as to support correct debugging of floating point operation;
if the historical state record (n + 1) of the instruction n +1 is recorded, exchanging the program state PCR of the current instruction n with the historical state record (n + 1) of the instruction n +1, and executing the (n + 1) th instruction; specifically, the method comprises the following steps: checking a precursor node of a historical state record (n + 1) end mark of the instruction n + 1; if the node type is a register, exchanging the value of the register with the program state PCR of the current instruction n, otherwise, exchanging the value in the memory; circularly traversing each node of the history state record (n + 1) until the end mark is met;
the program reversely runs to the nth instruction position, and the reverse debugging supports single-step reverse execution, multi-step reverse execution and the like; for multi-step reverse execution operation, two methods of instruction counting and breakpoint insertion are supported, when the source code level is reversely debugged, the total number of instructions corresponding to a source code line is obtained firstly, and each instruction is returned circularly in the total number; under the record function, a label can be set at any instruction position, the total number of instructions of the label to the current state of the program can be calculated during rollback, and finally the total number of recorded instructions can reach the label position after rollback; the rc debugging is supported to be executed, and the purpose of reversely reaching the specified position can be realized by inserting a breakpoint; and the function body is supported to be reversely jumped out, and a breakpoint is inserted into the first instruction position of the function.
As shown in fig. 2, since the operand of each instruction may modify the memory, may also modify the register, and may not need to modify any operand, the use of the fixed array to store the history state will certainly cause memory waste, and the bidirectional linked list nodes are circularly allocated, only the modified register and memory record information during the execution process are allocated, and the bidirectional nodes are allocated, thereby greatly saving the memory and also ensuring the efficiency of reverse debugging;
as shown in fig. 3, defining a doubly-linked list node structure instruction _ node, where the record content of each node may be one of a register, a memory, and an end mark;
wherein reg represents a register, and the content of the reg represents the register number and the register value reg _ buffer;
mem is a memory, and the content is an address addr and a corresponding value mem _ buffer;
end is a linked list end mark, and the content is a signal and the number insn _ num of recorded instructions;
prev and next are the predecessor and successor pointers to the linked list nodes.
Example two
A program debugging device comprises a processor and a storage medium;
a storage medium to store instructions; the processor is configured to operate in accordance with the instructions to perform the steps of the method of:
when the program is operated to the nth instruction, recording the program state of the current instruction n as PCr;
judging whether the debugging direction is forward debugging (exec _ forward) or reverse debugging (exec _ reverse) according to the execution direction state value of the current process;
if the debugging direction is reverse debugging, exchanging the historical state record (n-1) of the target instruction n-1 to be skipped with the program state PCR of the current instruction n; the program state PCR of the current instruction n points to the instruction position of a target instruction n-1 to be jumped;
if the debugging direction is forward debugging, the program state PCR of the current instruction n points to the instruction position of the instruction n + 1, and whether the history state record (n + 1) of the instruction n + 1 exists or not is searched in a double-linked list;
if the history state record (n + 1) of the instruction n + 1 is recorded, exchanging the program state PCr of the current instruction n with the history state record (n + 1) of the instruction n + 1, and executing the (n + 1) th instruction;
if the history state record (n + 1) of the instruction n + 1 is not recorded, the program state of the instruction n + 1 is analyzed and recorded into the history state record (n + 1), and the (n + 1) th instruction is executed.
EXAMPLE III
A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method of:
when the program is operated to the nth instruction, recording the program state of the current instruction n as PCr;
judging whether the debugging direction is forward debugging (exec _ forward) or reverse debugging (exec _ reverse) according to the execution direction state value of the current process;
if the debugging direction is reverse debugging, exchanging the historical state record (n-1) of the target instruction n-1 to be skipped with the program state PCR of the current instruction n; the program state PCR of the current instruction n points to the instruction position of a target instruction n-1 to be jumped;
if the debugging direction is forward debugging, pointing the program state PCR of the current instruction n to the instruction position of the instruction n + 1, and searching whether the historical state record (n + 1) of the instruction n + 1 exists in a double-linked list;
if the historical state record (n + 1) of the instruction n + 1 is recorded, exchanging the program state PCR of the current instruction n with the historical state record (n + 1) of the instruction n + 1, and executing the (n + 1) th instruction;
if the history state record (n + 1) of the instruction n + 1 is not recorded, the program state of the instruction n + 1 is analyzed and recorded into the history state record (n + 1), and the (n + 1) th instruction is executed.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (8)
1. A program debugging method, comprising:
when the program is operated to the nth instruction, recording the program state of the current instruction n as PCr;
judging whether the debugging direction is forward debugging or reverse debugging according to the execution direction state value of the current process;
if the debugging direction is reverse debugging, exchanging the historical state record (n-1) of the target instruction n-1 to be skipped with the program state PCR of the current instruction n; the program state PCR of the current instruction n points to the instruction position of a target instruction n-1 to be jumped;
if the debugging direction is forward debugging, pointing the program state PCR of the current instruction n to the instruction position of the instruction n +1, and searching whether the historical state record (n + 1) of the instruction n +1 exists in a double-linked list;
if the historical state record (n + 1) of the instruction n +1 is recorded, exchanging the program state PCR of the current instruction n with the historical state record (n + 1) of the instruction n +1, and executing the (n + 1) th instruction;
if the history state record (n + 1) of the instruction n +1 is not recorded, the program state of the instruction n +1 is analyzed and recorded into the history state record (n + 1), and the (n + 1) th instruction is executed.
2. A program debugging method according to claim 1, wherein said program state comprises program counter PC, state control registers, general purpose registers and data in memory.
3. A program debugging method according to claim 1, wherein the history status record (n + 1) comprises a program counter PC for executing instruction n +1 and register or memory information modified by instruction n + 1.
4. The method as claimed in claim 1, wherein exchanging the history state record (n-1) of the target instruction n-1 to be skipped with the program state PCr of the current instruction n specifically comprises:
checking a precursor node of a historical state record (n-1) end mark of a target instruction n-1 to be jumped; if the node type is a register, exchanging the value of the register with the program state PCR of the current instruction n, and otherwise, exchanging the value in the memory;
and circularly traversing each node of the history state record (n-1) until the end mark is encountered.
5. The method according to claim 1, wherein exchanging the program state PCr of the current instruction n with the history state record (n + 1) specifically comprises:
checking a precursor node of a historical state record (n + 1) end mark of the instruction n + 1;
if the node type is a register, exchanging the value of the register with the program state PCR of the current instruction n, and otherwise, exchanging the value in the memory;
and circularly traversing each node of the history state record (n + 1) until the end mark is encountered.
6. The method according to claim 1, wherein the parsing and recording the program state of the instruction n +1 into the history state record (n + 1) specifically comprises:
analyzing the position of a program counter PC corresponding to the instruction n + 1;
obtaining an instruction type and a destination operand;
and storing the destination operand and the program counter PC into the nodes corresponding to the doubly linked list.
7. A program debugging apparatus includes a processor and a storage medium; the storage medium is used for storing instructions;
the processor is configured to operate in accordance with the instructions to perform the steps of the method of any of claims 1~6.
8. A computer readable storage medium, having stored thereon a computer program, characterized in that the program, when executed by a processor, performs the steps of the method of any of claims 1~6.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117573565A (en) * | 2024-01-16 | 2024-02-20 | 麒麟软件有限公司 | Debug history information reproduction method, device and storage medium |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117573565A (en) * | 2024-01-16 | 2024-02-20 | 麒麟软件有限公司 | Debug history information reproduction method, device and storage medium |
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