CN115656638B - MLCC capacitance test positive and negative signal acquisition circuit and method - Google Patents
MLCC capacitance test positive and negative signal acquisition circuit and method Download PDFInfo
- Publication number
- CN115656638B CN115656638B CN202211265145.5A CN202211265145A CN115656638B CN 115656638 B CN115656638 B CN 115656638B CN 202211265145 A CN202211265145 A CN 202211265145A CN 115656638 B CN115656638 B CN 115656638B
- Authority
- CN
- China
- Prior art keywords
- signal
- electrically connected
- resistor
- comparator
- control unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 46
- 238000000034 method Methods 0.000 title claims abstract description 17
- 238000005070 sampling Methods 0.000 claims abstract description 33
- 239000003990 capacitor Substances 0.000 claims description 32
- 238000001914 filtration Methods 0.000 claims description 3
- 238000012806 monitoring device Methods 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Landscapes
- Amplifiers (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
The invention discloses a positive and negative signal acquisition circuit and a positive and negative signal acquisition method for MLCC capacitance test, and relates to the technical field of signal acquisition. The circuit comprises a signal in-phase amplifier, a signal inverter, a polarity judging module, a signal selecting switch module and a control unit; the signal in-phase amplifier is used for collecting a target signal and amplifying the target signal; the signal inverter is used for inverting the amplified target signal; the polarity judging module is used for judging the positive and negative polarities of the target signal; the first input channel of the signal selection switch module is electrically connected with the output end of the signal in-phase amplifier, and the second input channel of the signal selection switch module is electrically connected with the output end of the signal inverter; the sampling port of the control unit is electrically connected with the output end of the signal selection switch module, and the polarity identification port of the control unit is electrically connected with the output end of the polarity judgment module. According to the MLCC capacitance test positive and negative signal acquisition circuit provided by the embodiment of the invention, tiny signals can be amplified, the sampling precision is improved, and the positive and negative signals can be sampled simultaneously.
Description
Technical Field
The invention relates to the technical field of signal acquisition, in particular to a positive and negative signal acquisition circuit and method for MLCC capacitance test.
Background
In the field of MLCC capacitance testing, states of a large number of MLCC capacitance testing power supplies, MLCC capacitance testing super-insulation meters and other devices need to be monitored, signals output by sensors of various devices are various, the level of the signals is inconsistent, and therefore multiple signal acquisition monitoring devices are needed, and cost is high. Some monitoring devices at present have multiple paths of acquisition interfaces, but the acquisition function of the interfaces is single, and the monitoring devices often have only the function of positive signal acquisition; and because of the diversity of the target acquisition signals, a plurality of interfaces of the equipment cannot be used, and resource waste is caused.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems existing in the prior art. Therefore, the invention provides a positive and negative signal acquisition circuit and a positive and negative signal acquisition method for MLCC capacitance test, which can acquire positive and negative signals simultaneously.
In one aspect, the MLCC capacitance test positive and negative signal acquisition circuit according to the embodiment of the invention comprises:
the signal in-phase amplifier is used for collecting a target signal and amplifying the target signal;
a signal inverter for inverting the amplified target signal;
the polarity judging module is used for judging the positive and negative polarities of the target signal;
the first input channel of the signal selection switch module is electrically connected with the output end of the signal in-phase amplifier, and the second input channel of the signal selection switch module is electrically connected with the output end of the signal inverter;
the sampling port of the control unit is electrically connected with the output end of the signal selection switch module, and the polarity identification port of the control unit is electrically connected with the output end of the polarity judgment module;
when the polarity judging module judges that the polarity of the target signal is positive, the control unit sends a first control signal to control the first input channel and the output end of the signal selection switch module to be communicated; when the polarity judging module judges that the polarity of the target signal is negative, the control unit sends out a second control signal to control the second input channel of the signal selection switch module to be communicated with the output end.
According to some embodiments of the invention, the signal in-phase amplifier comprises a first comparator, a first resistor and a second resistor, wherein the in-phase input end of the first comparator is used for connecting the target signal, the output end of the first comparator is grounded through the second resistor and the first resistor which are sequentially connected in series, the inverting input end of the first comparator is electrically connected with a connection point between the first resistor and the second resistor, and the output end of the first comparator is also electrically connected with the first input channel of the signal selection switch module.
According to some embodiments of the invention, the signal inverter includes a second comparator, a third resistor, and a fourth resistor, where a first end of the third resistor is electrically connected to an output end of the signal in-phase amplifier, a second end of the third resistor is electrically connected to an inverting input end of the second comparator, a second end of the third resistor is further electrically connected to an output end of the second comparator through the fourth resistor, an in-phase input end of the second comparator is grounded, and an output end of the second comparator is further electrically connected to a second input channel of the signal selection switch module.
According to some embodiments of the invention, the polarity determination module includes:
the non-inverting input end of the third comparator is electrically connected with the output end of the signal non-inverting amplifier, the inverting input end of the third comparator is electrically connected with the output end of the third comparator, and the output end of the third comparator is grounded through a fifth resistor and a sixth resistor which are connected in series;
and the inverting input end of the fourth comparator is electrically connected with the connection point between the fifth resistor and the sixth resistor, the non-inverting input end of the fourth comparator is grounded, the output end of the fourth comparator is connected with a +3.3V power supply through a pull-up resistor, and the output end of the fourth comparator is also electrically connected with the polarity identification port of the control unit.
According to some embodiments of the invention, a first current limiting filter module is arranged between the input end of the signal in-phase amplifier and the target signal; a second current-limiting filtering module is arranged between the output end of the signal selection switch module and the sampling port of the control unit; a third current limiting filter module is arranged between the output end of the polarity judging module and the polarity identifying port of the control unit.
According to some embodiments of the invention, the first current limiting filter module comprises:
the first end of the first current limiting resistor is used for being connected with the target signal, and the second end of the first current limiting resistor is electrically connected with the input end of the signal in-phase amplifier;
the anode end of the first diode is electrically connected with the second end of the first current limiting resistor, and the cathode end of the first diode is connected with a +5V power supply;
the anode end of the second diode is connected with a-5V power supply, and the cathode end of the second diode is electrically connected with the second end of the first current limiting resistor;
the first end of the first filter capacitor is electrically connected with the input end of the signal in-phase amplifier, and the second end of the first filter capacitor is grounded.
According to some embodiments of the invention, the second current limiting filter module comprises:
the first end of the second current limiting resistor is electrically connected with the output end of the signal selection switch module, and the second end of the second current limiting resistor is electrically connected with the sampling port of the control unit;
the anode end of the third diode is electrically connected with the second end of the second current limiting resistor, and the cathode end of the third diode is connected with a +3.3V power supply;
the anode end of the fourth diode is grounded, and the cathode end of the fourth diode is electrically connected with the second end of the second current limiting resistor;
and the first end of the second filter capacitor is electrically connected with the sampling port of the control unit, and the second end of the second filter capacitor is grounded.
According to some embodiments of the invention, the third current limiting filter module comprises:
the first end of the third current limiting resistor is electrically connected with the output end of the polarity judging module, and the second end of the third current limiting resistor is electrically connected with the polarity identifying port of the control unit;
the anode end of the fifth diode is electrically connected with the second end of the third current limiting resistor, and the cathode end of the fifth diode is connected with a +3.3V power supply;
the anode end of the sixth diode is grounded, and the cathode end of the sixth diode is electrically connected with the second end of the third current limiting resistor;
and the first end of the third filter capacitor is electrically connected with the polarity identification port of the control unit, and the second end of the third filter capacitor is grounded.
On the other hand, the MLCC capacitance test positive and negative signal acquisition method according to the embodiment of the invention comprises the following steps:
acquiring a target signal;
after amplifying the target signal, sending the target signal to a first input channel of a signal selection switch module;
inverting the amplified target signal and then sending the signal to a second input channel of the signal selection switch module;
judging the positive and negative polarities of the target signals, and sending the judgment result to a control unit;
when the polarity of the target signal is positive, the control unit sends a first control signal to control the first input channel and the output end of the signal selection switch module to be communicated; when the polarity of the target signal is negative, the control unit sends out a second control signal to control the second input channel of the signal selection switch module to be communicated with the output end.
According to some embodiments of the invention, the method further comprises the steps of:
when no target signal is input, the control unit sends out a third control signal to control the output end of the signal selection switch module to be disconnected with the first input channel and the second input channel.
The MLCC capacitance test positive and negative signal acquisition circuit and method provided by the invention have at least the following beneficial effects: when the polarity of the target signal is positive, the signal is amplified by the signal in-phase amplifier and then sent to a sampling port of the control unit through the signal selection switch module for sampling by the control unit; when the polarity of the signal is negative, the signal is amplified by the signal in-phase amplifier, is inverted by the signal inverter, is changed into a positive signal, and is sent to a sampling port of the control unit through the signal selection switch module for sampling by the control unit. According to the MLCC capacitance test positive and negative signal acquisition circuit and the MLCC capacitance test positive and negative signal acquisition method, tiny signals can be amplified, the sampling precision is improved, positive and negative signals can be sampled simultaneously, the peak and peak values of acquired signals are doubled, and the MLCC capacitance test positive and negative signal acquisition circuit and the MLCC capacitance test positive and negative signal acquisition method can be widely applied to signal sampling of various MLCC capacitance test power supplies or MLCC capacitance test instruments, so that the number of required signal acquisition monitoring equipment is reduced, and the cost is reduced.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
FIG. 1 is a schematic diagram of a module of an MLCC capacitance test positive and negative signal acquisition circuit according to an embodiment of the invention;
FIG. 2 is a schematic circuit diagram of an MLCC capacitance test positive and negative signal acquisition circuit according to an embodiment of the invention;
FIG. 3 is a flowchart illustrating steps of a method for collecting positive and negative signals for MLCC capacitance test according to an embodiment of the invention;
reference numerals:
the device comprises a signal in-phase amplifier 100, a signal inverter 200, a polarity judging module 300, a signal selecting switch module 400 and a control unit 500.
Detailed Description
Reference will now be made in detail to the present embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein the accompanying drawings are used to supplement the description of the written description so that one can intuitively and intuitively understand each technical feature and overall technical scheme of the present invention, but not to limit the scope of the present invention.
In the description of the present invention, unless explicitly defined otherwise, terms such as arrangement, installation, connection, etc. should be construed broadly and the specific meaning of the terms in the present invention can be reasonably determined by a person skilled in the art in combination with the specific contents of the technical scheme.
In one aspect, as shown in fig. 1, an embodiment of the present invention provides a positive and negative signal acquisition circuit for MLCC capacitance test, which includes a signal in-phase amplifier 100, a signal inverter 200, a polarity judgment module 300, a signal selection switch module 400, and a control unit 500; the signal in-phase amplifier 100 is used for collecting a target signal and amplifying the target signal; the signal inverter 200 is used for inverting the amplified target signal; the polarity judging module 300 is configured to judge the positive and negative polarities of the target signal; a first input channel of the signal selection switch module 400 is electrically connected with the output end of the signal in-phase amplifier 100, and a second input channel of the signal selection switch module 400 is electrically connected with the output end of the signal inverter 200; the sampling port of the control unit 500 is electrically connected with the output end of the signal selection switch module 400, and the polarity identification port of the control unit 500 is electrically connected with the output end of the polarity judgment module 300; when the polarity judging module 300 judges that the polarity of the target signal is positive, the control unit 500 sends out a first control signal, and the first input channel of the control signal selection switch module 400 is communicated with the output end; when the polarity determining module 300 determines that the polarity of the target signal is negative, the control unit 500 sends out a second control signal, and the second input channel of the control signal selection switch module 400 is communicated with the output terminal.
The MLCC capacitance test positive and negative signal acquisition circuit can acquire positive and negative signals simultaneously; when the polarity of the signal is positive, the signal is amplified by the signal in-phase amplifier 100 and then sent to a sampling port of the control unit 500 through the signal selection switch module 400 for the control unit 500 to sample; when the polarity of the signal is negative, the signal is amplified by the signal in-phase amplifier 100, then is inverted by the signal inverter 200, and is converted into a positive signal, and then is sent to the sampling port of the control unit 500 through the signal selection switch module 400, so that the control unit 500 samples the signal. The control unit 500 may sample the target signal by using MCU, PLC, FPGA or the like having an ADC sampling function. According to the MLCC capacitance test positive and negative signal acquisition circuit provided by the embodiment of the invention, tiny signals can be amplified, the sampling precision is improved, the positive and negative signals can be sampled simultaneously, the peak and peak values of the acquired signals are doubled, the MLCC capacitance test positive and negative signal acquisition circuit is convenient for being widely applied to signal sampling of various MLCC capacitance test power supplies or MLCC capacitance test instruments, the number of required signal acquisition monitoring equipment is reduced, and the cost is reduced.
As shown in fig. 2, in some embodiments of the present invention, the signal in-phase amplifier 100 includes a first comparator IC1A, a first resistor R1 and a second resistor R2, the in-phase input terminal of the first comparator IC1A is used for connecting a target signal, the output terminal of the first comparator IC1A is grounded through the second resistor R2 and the first resistor R1 which are sequentially connected in series, the inverting input terminal of the first comparator IC1A is electrically connected to a connection point between the first resistor R1 and the second resistor R2, and the output terminal of the first comparator IC1A is also electrically connected to the first input channel (i.e., ch0 of the IC 2) of the signal selection switch module 400. The 8 th pin of the first comparator IC1A is connected with the direct current power supply +5V, and the 4 th pin is connected with the direct current power supply-5V.
As shown in fig. 2, in some embodiments of the present invention, the signal inverter 200 includes a second comparator IC1B, a third resistor R3, and a fourth resistor R4, where a first end of the third resistor R3 is electrically connected to an output end of the signal in-phase amplifier 100 (i.e., an output end of the first comparator IC 1A), a second end of the third resistor R3 is electrically connected to an inverting input end of the second comparator IC1B, a second end of the third resistor R3 is further electrically connected to an output end of the second comparator IC1B through the fourth resistor R4, an in-phase input end of the second comparator IC1B is grounded, and an output end of the second comparator IC1B is further electrically connected to a second input channel of the signal selection switch module 400 (i.e., ch1 of the IC 2).
As shown in fig. 2, in some embodiments of the present invention, the polarity determining module 300 includes a third comparator IC3 and a fourth comparator IC4, the non-inverting input terminal of the third comparator IC3 is electrically connected to the output terminal of the signal non-inverting amplifier 100 (i.e., the output terminal of the first comparator IC 1A), the inverting input terminal of the third comparator IC3 is electrically connected to the output terminal of the third comparator IC3, and the output terminal of the third comparator IC3 is grounded through a fifth resistor R5 and a sixth resistor R6 connected in series; the inverting input terminal of the fourth comparator IC4 is electrically connected to the connection point between the fifth resistor R5 and the sixth resistor R6, the non-inverting input terminal of the fourth comparator IC4 is grounded, the output terminal of the fourth comparator IC4 is connected to the +3.3v power supply through the pull-up resistor R9, and the output terminal of the fourth comparator IC4 is also electrically connected to the polarity recognition port of the control unit 500. The third comparator IC3 is used as a following in-phase buffer, can apply the operational amplifier characteristic and high-resistance isolation target signals, reduces the influence on the target signals, improves the sampling precision, and improves the anti-interference performance of the voltage division signals during polarity judgment; the fifth resistor R5 and the sixth resistor R6 form a voltage dividing circuit, and the fourth comparator IC4 is matched to determine the positive and negative polarities of the target signal.
In some embodiments of the present invention, the signal selection switch module 400 is used to select a signal to be collected, and the signal selection switch module 400 may employ a signal multiplexer, an electronic switch, a relay, and the like. As shown in fig. 2, in this example, the signal selection switch module 400 employs a multiplexing chip IC2 with a model CD4051BM96, ch0 of the IC2 is electrically connected to the output terminal of the signal in-phase amplifier 100, ch1 of the IC2 is electrically connected to the output terminal of the signal inverter 200, other channels (ch 2-ch 7) of the IC2 are all grounded, a channel selection signal a of the IC2 is connected to an IO output pin PA1 of the control unit 500, one end of a pull-up resistor R7 is connected to PA1, and the other end thereof is connected to a dc power supply +3.3v; the channel selection signal B of the IC2 is connected to an IO output pin PA2 of the control unit, one end of a pull-up resistor R8 is connected with the PA2, and the other end of the pull-up resistor R8 is connected with a direct current power supply +3.3V; pins 6, 8 and 9 of the IC2 are grounded; the VDD pin of the IC2 is connected with a direct current power supply +5V, and the VEE pin is connected with a direct current power supply-5V; the output COM of IC2 is electrically connected to the sampling port of control unit 500.
In some embodiments of the present invention, a first current limiting filter module is disposed between the input of the signal in-phase amplifier 100 and the target signal; a second current limiting filter module is arranged between the output end of the signal selection switch module 400 and the sampling port of the control unit 500; a third current limiting filter module is disposed between the output terminal of the polarity judging module 300 and the polarity identifying port of the control unit 500.
Specifically, as shown in fig. 2, the first current limiting filter module includes a first current limiting resistor R11, a first diode D1, a second diode D2, and a first filter capacitor C1, where a first end of the first current limiting resistor R11 is used to connect to a target signal, and a second end of the first current limiting resistor R11 is electrically connected to an input end of the signal in-phase amplifier 100 (i.e., a non-inverting input end of the first comparator IC 1A); the anode end of the first diode D1 is electrically connected with the second end of the first current limiting resistor R11, and the cathode end of the first diode D1 is connected with a +5V power supply; the anode end of the second diode D2 is connected with a-5V power supply, and the cathode end of the second diode D2 is electrically connected with the second end of the first current limiting resistor R11; a first end of the first filter capacitor C1 is electrically connected to the input end of the signal in-phase amplifier 100, and a second end of the first filter capacitor C1 is grounded. The first current limiting resistor R11 is used for preventing the chip or the circuit from being burnt out due to overlarge current in the circuit; the first diode D1 and the second diode D2 are used for preventing the performance of the chip from being affected by the too high amplitude of the signal in the circuit, even burning the chip, and the first filter capacitor C1 is used for filtering the target signal.
As shown in fig. 2, the second current limiting filter module includes a second current limiting resistor R12, a third diode D3, a fourth diode D4, and a second filter capacitor C2, where a first end of the second current limiting resistor R12 is electrically connected to an output end (i.e., COM of the IC 2) of the signal selection switch module 400, and a second end of the second current limiting resistor R12 is electrically connected to a sampling port of the control unit 500; the anode end of the third diode D3 is electrically connected with the second end of the second current limiting resistor R12, and the cathode end of the third diode D3 is connected with a +3.3V power supply; the anode end of the fourth diode D4 is grounded, and the cathode end of the fourth diode D4 is electrically connected with the second end of the second current limiting resistor R12; the first end of the second filter capacitor C2 is electrically connected to the sampling port of the control unit 500, and the second end of the second filter capacitor C2 is grounded.
As shown in fig. 2, the third current limiting filter module includes a third current limiting resistor R13, a fifth diode D5, a sixth diode D6, and a third filter capacitor C3, where a first end of the third current limiting resistor R13 is electrically connected to an output end of the polarity determining module 300 (i.e., an output end of the fourth comparator IC 4), and a second end of the third current limiting resistor R13 is electrically connected to a polarity identifying port of the control unit 500; the anode end of the fifth diode D5 is electrically connected with the second end of the third current limiting resistor R13, and the cathode end of the fifth diode D5 is connected with a +3.3V power supply; the anode end of the sixth diode D6 is grounded, and the cathode end of the sixth diode D6 is electrically connected with the second end of the third current limiting resistor R13; the first end of the third filter capacitor C3 is electrically connected to the polarity recognition port of the control unit 500, and the second end of the third filter capacitor C3 is grounded.
The capacitors C4, C5, C6 and C7 are coupling filter capacitors of the positive direct current power supply of the chip power supply pins, after the capacitors are connected in parallel, one end of each capacitor is connected with the direct current power supply +5V, and the other end of each capacitor is connected with GND and is respectively close to the chip power supply pin layout; the capacitors C8, C9, C10 and C1 are coupling filter capacitors of the negative DC power supply of the chip power supply pins, and after the capacitors are connected in parallel, one end of each capacitor is connected with the DC power supply-5V, and the other end of each capacitor is connected with GND and is respectively close to the chip power supply pin layout.
The MLCC capacitance test positive and negative signal acquisition circuit and method according to the embodiment of the invention have the following working principle:
the target signal Vin enters through the first current limiting resistor R11, where vin=vcc 1 (1); according to the "virtual short" operating principle of the operational amplifier, the inverting input voltage VCC 2=vcc 1 (2) of the first comparator IC1A and the inverting input voltage VCC 4=gnd (3) of the second comparator IC1B can be obtained; the non-inverting input voltage of the third comparator IC3 is equal to the output voltage, i.e., VCC 3=vcc 8 (4); from kirchhoff's law:
when r3=r4, it is possible to obtain:
from the formulae (3), (5) and (6):
the voltage division by the resistors R5, R6 can be obtained:
from the formulae (4), (5), (8):
when the target signal Vin is greater than 0V, VCC3 is a positive signal, VCC5 is a negative signal, and VCC9 is a positive signal, which are obtained by the above formulas (5), (7) and (9), respectively; as can be known from VCC9>0V, the fourth comparator IC4 outputs a low level, that is, VCC 10=0v; after passing through the third current limiting resistor R13, the voltage VCC 11=vcc 10=0v; at this time, when the polarity recognition port of the control unit 500 detects that VCC11 is at a low level, the outputs of PA1 and PA2 are driven to be at a low level, so that the channels of ch0 and COM of IC2 are established, and the positive signal VCC3 is sent to the sampling port of the control unit 500 to sample data.
When the target signal Vin is less than 0V, VCC3 is a negative signal, VCC5 is a positive signal, and VCC9 is a negative signal, respectively, obtained by the above formulas (5), (7) and (9); as can be known from VCC9<0V, the fourth comparator IC4 outputs a high level, that is, VCC 10=3.3v; after passing through the third current limiting resistor R13, the voltage VCC 11=vcc 10=3.3v; at this time, when the control unit 500 detects that VCC11 is at a high level, PA1 is driven to output a high level, and PA2 is driven to output a low level, so that ch1 and COM of IC2 establish a channel, and a positive signal VCC5 is sent to a sampling port of the control unit 500 to sample data.
When no signal needs to be acquired, the control unit 500 outputs PA2 to a high level, and at this time, ch0 and ch1 are both disconnected from COM, so that VCC 6=gnd, thereby reducing signal radiation.
On the other hand, as shown in fig. 3, the embodiment of the invention also provides a positive and negative signal acquisition method for MLCC capacitance test, which corresponds to the positive and negative signal acquisition circuit for MLCC capacitance test, and comprises the following steps:
step S100: acquiring a target signal;
step S200: after amplifying the target signal, sending the amplified target signal to a first input channel of the signal selection switch module 400;
step S300: inverting the amplified target signal and then transmitting the signal to a second input channel of the signal selection switch module 400;
step S400: judging the positive and negative polarities of the target signals, and sending the judgment result to the control unit 500;
step S500: when the polarity of the target signal is positive, the control unit 500 sends out a first control signal, and the first input channel and the output end of the control signal selection switch module 400 are communicated; when the polarity of the target signal is negative, the control unit 500 sends out a second control signal, and the second input channel of the control signal selection switch module 400 is communicated with the output end.
Specifically, first, the target signal enters the signal in-phase amplifier 100 through the first current limiting resistor R11, and is amplified by the first comparator IC1A and then sent to the first input channel (i.e., ch0 of IC 2) of the signal selection switch module 400; meanwhile, the target signal amplified by the first comparator IC1A is sent to the signal inverter 200, and after being inverted by the second comparator IC1B, is sent to the second input channel (i.e., ch1 of IC 2) of the signal selection switch module 400; meanwhile, the target signal amplified by the first comparator IC1A is also sent to the polarity judging module 300, and after the polarity is judged by the polarity judging module 300, the judgment result is sent to the control unit 500; the control unit 500 sends a corresponding control signal to the signal selection switch module 400 according to the polarity of the target signal, so that the first input channel or the second input channel of the signal selection switch module 400 is controlled to be communicated with the output terminal. When the polarity of the target signal is positive, the control unit 500 controls the outputs of the PA1 and the PA2 to be at low level, so that the ch0 and the COM of the IC2 establish a channel, and the positive signal VCC3 is sent to the sampling port of the control unit 500 to sample data; when the polarity of the target signal is negative, the control unit controls the PA1 to output a high level and the PA2 to output a low level, so that the channel between ch1 and COM of the IC2 is established, and a positive signal VCC5 is sent to a sampling port of the control unit 500 to sample data; when no signal needs to be acquired, the control unit 500 outputs PA2 to a high level, and at this time, ch0 and ch1 are both disconnected from COM, so that VCC 6=gnd, thereby reducing signal radiation.
According to the MLCC capacitance test positive and negative signal acquisition circuit and the MLCC capacitance test positive and negative signal acquisition method, tiny signals can be amplified, the sampling precision is improved, positive and negative signals can be sampled simultaneously, the peak and peak values of acquired signals are doubled, and the MLCC capacitance test positive and negative signal acquisition circuit and the MLCC capacitance test positive and negative signal acquisition method can be widely applied to signal sampling of various MLCC capacitance test power supplies or MLCC capacitance test instruments, so that the number of required signal acquisition monitoring equipment is reduced, and the cost is reduced.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of one of ordinary skill in the art without departing from the spirit of the present invention.
Claims (9)
1. The utility model provides a MLCC electric capacity test positive negative signal acquisition circuit which characterized in that includes:
the signal in-phase amplifier is used for collecting a target signal and amplifying the target signal;
a signal inverter for inverting the amplified target signal;
the polarity judging module is used for judging the positive and negative polarities of the target signal;
the first input channel of the signal selection switch module is electrically connected with the output end of the signal in-phase amplifier, and the second input channel of the signal selection switch module is electrically connected with the output end of the signal inverter;
the sampling port of the control unit is electrically connected with the output end of the signal selection switch module, and the polarity identification port of the control unit is electrically connected with the output end of the polarity judgment module;
when the polarity judging module judges that the polarity of the target signal is positive, the control unit sends a first control signal to control the first input channel and the output end of the signal selection switch module to be communicated; when the polarity judging module judges that the polarity of the target signal is negative, the control unit sends a second control signal to control the second input channel of the signal selection switch module to be communicated with the output end;
the polarity judgment module comprises:
the non-inverting input end of the third comparator is electrically connected with the output end of the signal non-inverting amplifier, the inverting input end of the third comparator is electrically connected with the output end of the third comparator, and the output end of the third comparator is grounded through a fifth resistor and a sixth resistor which are connected in series;
and the inverting input end of the fourth comparator is electrically connected with the connection point between the fifth resistor and the sixth resistor, the non-inverting input end of the fourth comparator is grounded, the output end of the fourth comparator is connected with a +3.3V power supply through a pull-up resistor, and the output end of the fourth comparator is also electrically connected with the polarity identification port of the control unit.
2. The positive and negative signal acquisition circuit for MLCC capacitance testing according to claim 1, wherein the signal in-phase amplifier comprises a first comparator, a first resistor and a second resistor, wherein the in-phase input end of the first comparator is used for connecting the target signal, the output end of the first comparator is grounded through the second resistor and the first resistor which are sequentially connected in series, the inverting input end of the first comparator is electrically connected with a connection point between the first resistor and the second resistor, and the output end of the first comparator is further electrically connected with the first input channel of the signal selection switch module.
3. The MLCC capacitance test positive and negative signal acquisition circuit of claim 1, wherein the signal inverter comprises a second comparator, a third resistor, and a fourth resistor, a first end of the third resistor is electrically connected to an output of the signal in-phase amplifier, a second end of the third resistor is electrically connected to an inverting input of the second comparator, a second end of the third resistor is further electrically connected to an output of the second comparator through the fourth resistor, an non-inverting input of the second comparator is grounded, and an output of the second comparator is further electrically connected to a second input channel of the signal selection switch module.
4. The positive and negative signal acquisition circuit for MLCC capacitance test according to claim 1, wherein a first current limiting filter module is arranged between the input end of the signal in-phase amplifier and the target signal; a second current-limiting filtering module is arranged between the output end of the signal selection switch module and the sampling port of the control unit; a third current limiting filter module is arranged between the output end of the polarity judging module and the polarity identifying port of the control unit.
5. The MLCC capacitance test positive and negative signal acquisition circuit of claim 4, wherein the first current limiting filter module comprises:
the first end of the first current limiting resistor is used for being connected with the target signal, and the second end of the first current limiting resistor is electrically connected with the input end of the signal in-phase amplifier;
the anode end of the first diode is electrically connected with the second end of the first current limiting resistor, and the cathode end of the first diode is connected with a +5V power supply;
the anode end of the second diode is connected with a-5V power supply, and the cathode end of the second diode is electrically connected with the second end of the first current limiting resistor;
the first end of the first filter capacitor is electrically connected with the input end of the signal in-phase amplifier, and the second end of the first filter capacitor is grounded.
6. The MLCC capacitance test positive and negative signal acquisition circuit of claim 4, wherein the second current limiting filter module comprises:
the first end of the second current limiting resistor is electrically connected with the output end of the signal selection switch module, and the second end of the second current limiting resistor is electrically connected with the sampling port of the control unit;
the anode end of the third diode is electrically connected with the second end of the second current limiting resistor, and the cathode end of the third diode is connected with a +3.3V power supply;
the anode end of the fourth diode is grounded, and the cathode end of the fourth diode is electrically connected with the second end of the second current limiting resistor;
and the first end of the second filter capacitor is electrically connected with the sampling port of the control unit, and the second end of the second filter capacitor is grounded.
7. The MLCC capacitance test positive and negative signal acquisition circuit of claim 4, wherein the third current limiting filter module comprises:
the first end of the third current limiting resistor is electrically connected with the output end of the polarity judging module, and the second end of the third current limiting resistor is electrically connected with the polarity identifying port of the control unit;
the anode end of the fifth diode is electrically connected with the second end of the third current limiting resistor, and the cathode end of the fifth diode is connected with a +3.3V power supply;
the anode end of the sixth diode is grounded, and the cathode end of the sixth diode is electrically connected with the second end of the third current limiting resistor;
and the first end of the third filter capacitor is electrically connected with the polarity identification port of the control unit, and the second end of the third filter capacitor is grounded.
8. A positive and negative signal acquisition method for MLCC capacitance testing, based on the MLCC capacitance testing positive and negative signal acquisition circuit according to any one of claims 1 to 7, comprising the steps of:
acquiring a target signal;
after amplifying the target signal, sending the target signal to a first input channel of a signal selection switch module;
inverting the amplified target signal and then sending the signal to a second input channel of the signal selection switch module;
the polarity judging module judges the positive and negative polarities of the target signal and sends the judging result to the control unit;
when the polarity of the target signal is positive, the control unit sends a first control signal to control the first input channel and the output end of the signal selection switch module to be communicated; when the polarity of the target signal is negative, the control unit sends out a second control signal to control the second input channel of the signal selection switch module to be communicated with the output end.
9. The method for collecting positive and negative signals for MLCC capacitance testing according to claim 8, further comprising the steps of:
when no target signal is input, the control unit sends out a third control signal to control the output end of the signal selection switch module to be disconnected with the first input channel and the second input channel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211265145.5A CN115656638B (en) | 2022-10-17 | 2022-10-17 | MLCC capacitance test positive and negative signal acquisition circuit and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211265145.5A CN115656638B (en) | 2022-10-17 | 2022-10-17 | MLCC capacitance test positive and negative signal acquisition circuit and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115656638A CN115656638A (en) | 2023-01-31 |
| CN115656638B true CN115656638B (en) | 2024-01-05 |
Family
ID=84987385
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211265145.5A Active CN115656638B (en) | 2022-10-17 | 2022-10-17 | MLCC capacitance test positive and negative signal acquisition circuit and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115656638B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116699463B (en) * | 2023-07-28 | 2024-02-06 | 珠海禅光科技有限公司 | MLCC capacitor leakage current measuring method, device, control device and medium |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202583316U (en) * | 2012-06-01 | 2012-12-05 | 惠州市亿能电子有限公司 | Circuit for collecting positive and negative current by single power supply |
| CN203117357U (en) * | 2012-12-31 | 2013-08-07 | 东莞市新泽谷机械制造股份有限公司 | LED (light emitting diode) polarity detecting device |
| CN203492673U (en) * | 2013-09-27 | 2014-03-26 | 九阳股份有限公司 | Intelligent shutoff noodle maker |
| CN203798901U (en) * | 2014-03-17 | 2014-08-27 | 华晶精密制造有限公司 | Voltage signal detection device |
| CN205484647U (en) * | 2016-04-15 | 2016-08-17 | 邢峻 | Many function combination formula polarity test appearance |
| CN212586450U (en) * | 2019-11-29 | 2021-02-23 | 深圳远征技术有限公司 | Lightning current monitoring circuit |
| CN113092987A (en) * | 2021-03-01 | 2021-07-09 | 重庆睿歌微电子有限公司 | Current chip step test system |
-
2022
- 2022-10-17 CN CN202211265145.5A patent/CN115656638B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202583316U (en) * | 2012-06-01 | 2012-12-05 | 惠州市亿能电子有限公司 | Circuit for collecting positive and negative current by single power supply |
| CN203117357U (en) * | 2012-12-31 | 2013-08-07 | 东莞市新泽谷机械制造股份有限公司 | LED (light emitting diode) polarity detecting device |
| CN203492673U (en) * | 2013-09-27 | 2014-03-26 | 九阳股份有限公司 | Intelligent shutoff noodle maker |
| CN203798901U (en) * | 2014-03-17 | 2014-08-27 | 华晶精密制造有限公司 | Voltage signal detection device |
| CN205484647U (en) * | 2016-04-15 | 2016-08-17 | 邢峻 | Many function combination formula polarity test appearance |
| CN212586450U (en) * | 2019-11-29 | 2021-02-23 | 深圳远征技术有限公司 | Lightning current monitoring circuit |
| CN113092987A (en) * | 2021-03-01 | 2021-07-09 | 重庆睿歌微电子有限公司 | Current chip step test system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115656638A (en) | 2023-01-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100501436C (en) | Electric resistance loading system | |
| CN115656638B (en) | MLCC capacitance test positive and negative signal acquisition circuit and method | |
| CN202600108U (en) | Testing system for printed circuit board | |
| CN112130089A (en) | Module pin connectivity testing device and system | |
| CN105510833A (en) | Storage battery health status detection method, device and system | |
| CN110907863B (en) | Analog input channel wiring state detection method and system | |
| CN113376442A (en) | Bypass capacitor test module and test method | |
| CN212008876U (en) | Circuit for monitoring working state of switching power supply | |
| CN108931720A (en) | A kind of switch signal detection circuit and detection method | |
| CN109374973B (en) | Insulation resistance detection circuit, detection circuit and detection device | |
| CN210865578U (en) | Power consumption detection circuit of display panel | |
| CN114910814A (en) | Multichannel acquisition circuit, aging test equipment and system | |
| CN210895121U (en) | Automobile diagnosis equipment and system | |
| CN214669353U (en) | Current detection system | |
| CN2916607Y (en) | Portable mechanical property tester for breaker | |
| CN105301489A (en) | DC contactor contact detection device | |
| CN109613355A (en) | The Auto-Test System and method of antenna product | |
| CN115951116B (en) | Peak current detection system and test method | |
| CN220525896U (en) | Open-short circuit test circuit based on hardware short-term test | |
| CN220252068U (en) | Measuring system of connector | |
| CN216747878U (en) | Single board testing device | |
| CN219997262U (en) | DC-DC current ripple detection circuit and test equipment | |
| CN211878072U (en) | Voltage and current phase comparison circuit | |
| CN220490911U (en) | Circuit for automatically switching voltage range | |
| CN215894761U (en) | Bypass capacitor test module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |