CN115629300A - Chip detection method and chip detection system - Google Patents
Chip detection method and chip detection system Download PDFInfo
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- CN115629300A CN115629300A CN202211652235.XA CN202211652235A CN115629300A CN 115629300 A CN115629300 A CN 115629300A CN 202211652235 A CN202211652235 A CN 202211652235A CN 115629300 A CN115629300 A CN 115629300A
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Abstract
The application provides a chip detection method and a chip detection system, which comprise the following steps: s1, electrically connecting at least two core particles; s2, the analog output end of the first core particle is electrically connected with the analog input end of the second core particle through a first module, and the first module is used for analog signal transmission; and/or, the first module is used for simulating data handling; s3, taking the analog output signal of the first core particle as the analog input signal of the second core particle; and/or, using the analog output data of the first core grain as the analog input data of the second core grain; s4, detecting an analog output signal of the second core particle; and/or, analog output data detection of the second core particle. The scheme omits the detection of other core particles, only needs the core particle detection of the final analog output signal and the analog output data, simplifies the detection steps and saves the detection time and cost.
Description
Technical Field
The present disclosure relates to the field of chips, and in particular, to a chip detection method and a chip detection system.
Background
In recent decades, the performance of a chip can be doubled in the semiconductor industry every 18 months according to Moore's law, but a bottleneck appears when the current process reaches 3nm and 2nm, and the mode of improving the performance by only improving the density of transistors cannot meet the manufacturing of a high-end chip. In order to solve the problem, a core particle (chip) technology is proposed, and the core particle is formed by splicing modular chips of different processes together and then packaging the spliced modular chips to form a package-level system (SoP). For the same core particles, the photoetching mask required by chip manufacture can be reused, and different manufacturing processes can be adopted for decoupling different types of core particles, so that the manufacturing cost of the chip is reduced, the integration level is improved, and the manufacturing yield can be improved.
Before the chip is used, the core particle is required to be detected, the core particle is composed of a plurality of chips, and compared with the detection of a single chip in the past, the detection complexity is greatly improved. In the existing method, each core particle is detected, and then the whole chip composed of all the core particles is detected.
Since the core particles are already tested when being shipped from a factory, repeated testing can be caused when the core particles are tested again when being used. And some core particles which are detected and have mature technology can be reused without repeated detection, so that the problem to be solved is how to simplify the detection method of the whole chip.
Disclosure of Invention
An object of the embodiments of the present application is to provide a chip detection method and a chip detection system, so as to achieve a technical effect of rapidly detecting whether a chip composed of core particles is normal.
A first embodiment of the present application provides a chip detection method, including the following steps: s1, electrically connecting at least two core particles; s2, the analog output end of the first core particle is electrically connected with the analog input end of the second core particle through a first module, and the first module is used for analog signal transmission; and/or, the first module is used for simulating data handling; s3, taking the analog output signal of the first core particle as the analog input signal of the second core particle; and/or, taking the analog output data of the first core particle as the analog input data of the second core particle; s4, detecting an analog output signal of the second core particle; and/or, analog output data detection of the second core particle.
In the implementation process, the analog output end of the first core grain is electrically connected with the analog input end of the second core grain through the first module, and the first module can simultaneously carry out analog signal transmission and analog data transportation, and can also independently carry out one of the analog signal transmission and the analog data transportation. The analog output signal of the first core particle may serve as the analog input signal of the second core particle, and the analog output data of the first core particle may also serve as the analog input data of the second core particle. After the analog output data of the first core grain is transmitted to the first module from the analog output end, the analog output data of the first core grain is carried to the second core grain through the analog data of the first module and is used as the analog input data of the second core grain, and at the moment, only the analog output data of the second core grain needs to be detected; after the analog output signal of the first core grain is transmitted to the first module from the analog output end, the analog output signal of the first core grain is transmitted to the second core grain through the first module and is used as the analog input signal of the second core grain, and at the moment, only the analog output signal of the second core grain needs to be detected. The analog output signal and the analog output data of the second core particle are detected if the first core particle and the second core particle simultaneously transmit the signal and the data, and the analog output signal or the analog output data of the second core particle is detected only if the first core particle and the second core particle transmit only one of the signal and the data. The scheme can be that a plurality of core particles are electrically connected through the first module, signals and data can be transmitted simultaneously, one of the signals and the data can be transmitted, the signals and the data of the previous core particle are transmitted to the next core particle through the first module, only the final analog output signals and the final analog output data need to be detected during detection, and if the signals and the data are normal, the plurality of core particles are proved to be normal. According to the scheme, detection of other core particles is omitted, only the core particles of the final analog output signals and the analog output data need to be detected, detection steps are simplified, and detection time and cost are saved.
In one possible implementation, the transmission rate of the analog signal between the first core particle and the second core particle is the lower of the two; and/or, the analog data transmission rate between the first core particle and the second core particle adopts the lower transmission rate of the first core particle and the second core particle.
In the implementation process, the analog data transmission rate between the first core particle and the second core particle adopts the lower transmission rate of the first core particle and the second core particle; the analog signal transmission rate between the first core particle and the second core particle adopts the lower one of the two transmission rates; if both data and signals are transmitted, the lower transmission rate is used. Because the parameters of the core particles such as the specification, the time sequence, the frequency and the like are different, in order to ensure that the core particles of different process procedures can reasonably carry out interactive cooperation, the core particles with lower transmission rate are adopted, and the use process is more stable.
In a possible implementation manner, a control calibration module is arranged in the first module, and the control calibration module is used for controlling the consistency of the transmission quantity of the analog data between the first core grain and the second core grain.
In the implementation process, a control calibration module is also arranged in the first module, and can control the transmission quantity of the analog data between the first core grain and the second core grain, for example, if the transmission rate of the analog data of the first core grain is higher, and the transmission rate of the analog data of the second core grain is lower, part of the analog data in the first core grain is deleted; if the first core grain analog data transmission rate is slower and the second core grain analog data transmission rate is faster, the analog data in the first core grain is increased. When the core particles of different process procedures are matched for use, the data transmission quantity can be kept consistent, and the core particles are more stable in the using process.
In a possible implementation manner, in step S3, the method further includes: the analog output end of the third core grain is electrically connected with the analog input end of the second core grain through the first module, and the analog output signal of the third core grain is used as the analog input signal of the second core grain; and/or the analog output data of the third core grain is used as the analog input data of the second core grain; the first core grain further comprises at least one second analog output end, the second analog output end is electrically connected with the analog input end of the third core grain through the first module, and a second analog output signal of the first core grain is used as an analog input signal of the third core grain; and/or the second analog output data of the first core grain is used as the analog input data of the third core grain.
In the above implementation process, the first core particle may have two analog output terminals electrically connected to the second core particle and the third core particle through the first module, respectively, and the third core particle is electrically connected to the second core particle through the first module. Taking the second analog output signal of the first core particle as an analog input signal for verifying a third core particle, taking the analog output signal of the third core particle as an analog input signal of the second core particle, and transmitting the signal from the analog output end of the first core particle to the second core particle through the first module; or the analog output signal of the second core particle can be detected by transmitting the analog output signal of the second core particle from the second analog output end of the first core particle to a third core particle through the first module and then transmitting the analog output signal of the third core particle to the second core particle through the first module. The first core particle may include a plurality of analog output terminals electrically connected to the plurality of core particles through the first module, and the signal may pass through the first core particle, the first module, the plurality of core particles, the first module, and the second core particle, and finally only the analog output signal of the second core particle is detected. The data transmission process is the same as the signal transmission process, the data and the signal can be transmitted simultaneously, only the data or the signal can be transmitted, and the third core particle can simulate the transmission environment. The chip may comprise a plurality of core particles which are electrically connected with each other, signals and data finally reach the second core particle from the first core particle, and if the analog output signals and data of the second core particle are detected to be normal, all the core particles in the chip are proved to be normal, so that the detection steps are simplified, and the detection time and cost are saved.
In one possible implementation manner, the first module further includes: the first verification switch and the second verification switch are respectively and electrically connected with the analog output end of the first core grain and the second analog output end; the first verification switch and the second verification switch are respectively used for controlling whether the analog output end of the first core grain and the second analog output end output signals or not; and/or the first verification switch and the second verification switch are respectively used for controlling whether the analog output end of the first core grain and the second analog output end output data or not.
In the implementation process, the first module further comprises a first verification switch and a second verification switch, and the first verification switch and the second verification switch are electrically connected with the analog output end and the second analog output end of the first core grain respectively. The analog output terminal and the second analog output terminal of the first core particle can be controlled by the first verification switch and the second verification switch. If the third core particle has a problem, only the corresponding second analog output end needs to be closed, and at the moment, data and signals can be transmitted only from the first core particle, the first module and the second core particle, and can be transmitted simultaneously or only one of the data and the signals. If the first core grain has a plurality of analog output ends and is connected with a plurality of core grains, when a certain core grain has a problem, only the analog output end corresponding to the core grain with the problem needs to be closed. Therefore, the shielding of a single core particle is realized, the problem of the single core particle is avoided, the influence on the whole chip is avoided, the whole chip can normally operate, and the use is more flexible.
In a possible implementation manner, when the first verification switch is turned off and the second verification switch is turned on, the detection of the analog output signal of the second core particle is cancelled, and the detection of the analog output signal of the third core particle is converted into the detection of the analog output signal of the third core particle; and/or canceling the detection of the analog output data of the second core grain and converting the detection of the analog output data of the second core grain into the detection of the analog output data of the third core grain.
In the implementation process, when the second core particle has a problem, the first verification switch can be turned off, and only the second verification switch is turned on. If the signal is transmitted, replacing the final analog output signal detection object with a third core particle; if the data is transmitted, the final analog output data detection object is replaced by a third core particle; if the data and the signal are transmitted at the same time, the final analog output data and the analog output signal detection object are replaced with a third core particle. When first core grain is connected with a plurality of core grains, when certain core grain goes wrong, only need close the analog output verification switch that corresponds, avoid single core grain to go wrong to cause the influence to whole chip, use more nimble.
A second embodiment of the present application provides a chip detection system, including: a first core particle and a second core particle electrically connected to the first core particle; the first module is electrically connected with the analog output end of the first core particle and the analog input end of the second core particle respectively, and is used for analog signal transmission, and the analog output signal of the first core particle is used as the analog input signal of the second core particle; and/or the first module is used for simulating data transportation, and the simulation output data of the first core grain is used as the simulation input data of the second core grain; the detection module is electrically connected with the analog output end of the second core grain, and when the analog signal of the first core grain is transmitted to the analog output end of the second core grain through the first module, the detection module detects the analog signal; and/or, the detection module detects analog data of the first core grain when the analog data is transmitted to the analog output end of the second core grain through the first module.
In the implementation process, the analog output end of the first core grain is electrically connected with the analog input end of the second core grain through the first module, and the first module can simultaneously carry out analog signal transmission and analog data transportation and can also independently carry out one of the analog signal transmission and the analog data transportation. The analog output signal of the first core particle may serve as the analog input signal of the second core particle, and the analog output data of the first core particle may also serve as the analog input data of the second core particle. The detection module is electrically connected with the analog output end of the second core grain, the analog output data of the first core grain is transferred to the second core grain through the analog data of the first module after being transferred from the analog output end to the first module, and is used as the analog input data of the second core grain, and at the moment, the detection module is only needed to detect the analog output data of the second core grain; after the analog output signal of the first core grain is transmitted to the first module from the analog output end, the analog output signal of the first core grain is transmitted to the second core grain through the analog signal of the first module and is used as the analog input signal of the second core grain, and at the moment, the detection module is only needed to detect the analog output signal of the second core grain. The detection module detects the analog output signal and the analog output data of the second core if the first core and the second core simultaneously transmit signals and data, and detects only the analog output signal or the analog output data of the second core if the first core and the second core transmit only one of the signals and the data. The scheme omits the detection of other core particles, only needs the core particle detection of the final analog output signal and the analog output data, simplifies the detection steps and saves the detection time and cost.
In one possible implementation manner, the first module further includes: the speed adjusting module is used for controlling the transmission speed of the analog signal between the first core grain and the second core grain to be the lower one of the first core grain and the second core grain; and/or the analog data transmission rate between the first core particle and the second core particle is the lower of the two; the time sequence adjusting module is used for controlling the transmission time of the analog signal between the first core grain and the second core grain to adopt the longer one of the two transmission times; and/or the analog data transmission time between the first core grain and the second core grain adopts the longer transmission time of the two; and the control calibration module is used for controlling the consistency of the analog data transmission quantity between the first core grain and the second core grain.
In the foregoing implementation process, the first module further includes: the rate adjusting module is used for controlling the transmission rate of the analog signal between the first core grain and the second core grain to be the lower one of the first core grain and the second core grain; the analog data transmission rate between the first core die and the second core die is the lower of the two. The analog data transmission rate between the first core grain and the second core grain adopts the lower one of the two transmission rates; the analog signal transmission rate between the first core grain and the second core grain adopts the lower one of the two transmission rates; if both data and signals are transmitted, the lower transmission rate is used. Because the parameters of the core particles such as the specification, the time sequence, the frequency and the like are different, in order to ensure that the core particles of different process procedures can reasonably carry out interactive cooperation, the core particles with lower transmission rate are adopted, and the use process is more stable. The time sequence adjusting module is used for controlling the transmission time of the analog signal between the first core grain and the second core grain to adopt the longer transmission time of the two; the analog data transmission time between the first core particle and the second core particle is the longer one of the two. The timing adjustment module may adjust transmission times of the data and the signal between the first core particle, the first module, and the second core particle such that the transmission times are consistent. Because the parameters of the core particles such as specification, time sequence, frequency and the like are different, in order to enable the core particles of different process procedures to reasonably carry out interactive cooperation, the core particles with longer transmission time are adopted. The control calibration module is used for controlling the consistency of the transmission quantity of the analog data between the first core grain and the second core grain, and the control calibration module can control the transmission quantity of the analog data between the first core grain and the second core grain, for example, if the transmission rate of the analog data of the first core grain is higher, and the transmission rate of the analog data of the second core grain is lower, part of the analog data in the first core grain is deleted; if the first core grain analog data transmission rate is slower and the second core grain analog data transmission rate is faster, the analog data in the first core grain is increased. When the core particles of different process procedures are matched for use, the data transmission quantity can be kept consistent, and the core particles are more stable in the using process.
In one possible implementation manner, the chip detection system further includes: the analog output end of the third core grain is electrically connected with the analog input end of the second core grain through the first module, and the analog output signal of the third core grain is used as the analog input signal of the second core grain; and/or the analog output data of the third core grain is used as the analog input data of the second core grain; the first core grain further comprises at least one second analog output end, the second analog output end is electrically connected with the analog input end of the third core grain through the first module, and a second analog output signal of the first core grain is used as an analog input signal of the third core grain; and/or the second analog output data of the first core grain is used as the analog input data of the third core grain.
In the above implementation process, the first core particle may have two analog output terminals electrically connected to the second core particle and the third core particle through the first module, respectively, and the third core particle is electrically connected to the second core particle through the first module. Taking the second analog output signal of the first core grain as an analog input signal for verifying a third core grain, taking the analog output signal of the third core grain as an analog input signal of the second core grain, and transmitting the signal from the analog output end of the first core grain to the second core grain through the first module; or the analog output signal of the second core particle can be detected by transmitting the analog output signal of the first core particle to a third core particle from the second analog output end of the first core particle through the first module and then transmitting the analog output signal of the third core particle to the second core particle through the first module. The first core particle can comprise a plurality of analog output ends, the plurality of analog output ends are electrically connected with the plurality of core particles through the first module, signals can pass through the first core particle, the first module, the plurality of core particles, the first module and the second core particle, and finally, only analog output signals of the second core particle are detected. The data transmission process is the same as the signal transmission process, and data and signals can be transmitted simultaneously or only data or signals can be transmitted. The chip may comprise a plurality of core particles which are electrically connected with each other, data finally arrives at the second core particle from the first core particle, and if the analog output signal and the data of the second core particle are detected to be normal, all the core particles in the chip are proved to be normal, the detection step is simplified, and the detection time and the detection cost are saved.
In one possible implementation manner, the first module further includes: and the verification switch module comprises a first verification switch electrically connected with the analog output end of the first core particle and a second verification switch electrically connected with the analog output end of the second core particle, and the first verification switch and the second verification switch are used for controlling the transmission of analog data and analog signals between the first core particle and the first module.
In the implementation process, the first module further comprises a first verification switch and a second verification switch, and the first verification switch and the second verification switch are electrically connected with the analog output end and the second analog output end of the first core grain respectively. The analog output terminal and the second analog output terminal of the first core particle can be controlled by the first verification switch and the second verification switch. If the third core particle has a problem, only the corresponding second analog output end needs to be closed, and at the moment, data and signals can be transmitted only from the first core particle, the first module and the second core particle, and can be transmitted simultaneously or only one of the data and the signals. If the first core grain has a plurality of analog output ends and is connected with a plurality of core grains, when a certain core grain has a problem, only the analog output end corresponding to the core grain with the problem needs to be closed. Therefore, the shielding of a single core particle is realized, the problem that the single core particle has a problem is avoided, the whole chip is prevented from being influenced, the whole chip can normally operate, and the use is more flexible.
In a possible implementation manner, an analog output end of the third core particle is electrically connected to the detection module, and when the first verification switch is turned off and the second verification switch is turned on, the detection module cancels the detection of the analog output signal of the second core particle and converts the detection of the analog output signal of the third core particle into the detection of the analog output signal of the third core particle; and/or canceling the detection of the analog output data of the second core grain and converting the detection of the analog output data of the second core grain into the detection of the analog output data of the third core grain.
In the implementation process, the analog output end of the third core particle is electrically connected with the detection module, when the second core particle has a problem, the first verification switch can be closed, and only the second verification switch is kept to be opened. If the signal is transmitted, replacing the final analog output signal detection object with a third core particle; if the data is transmitted, replacing the final analog output data detection object with a third core particle; if the data and the signal are transmitted at the same time, the final analog output data and the analog output signal detection object are replaced with a third core particle. When first core grain is connected with a plurality of core grains, when certain core grain goes wrong, only need close the analog output verification switch that corresponds, avoid single core grain to go wrong to cause the influence to whole chip, use more nimble.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a flowchart of a chip detection method according to an embodiment of the present disclosure;
fig. 2 is a structural diagram of a chip detection system according to an embodiment of the present disclosure;
fig. 3 is a structural diagram of another chip detection system according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined or explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not construed as indicating or implying relative importance.
In a first aspect, an embodiment of the present application provides a chip detection method, please refer to fig. 1, S1, where at least two core particles are electrically connected; s2, the analog output end of the first core particle is electrically connected with the analog input end of the second core particle through a first module, and the first module is used for analog signal transmission; s3, taking the analog output signal of the first core particle as the analog input signal of the second core particle; and S4, detecting the analog output signal of the second core particle.
In one possible implementation, S1, at least two core particles are electrically connected; s2, the analog output end of the first core particle is electrically connected with the analog input end of the second core particle through a first module, and the first module is used for analog data transportation; s3, taking the analog output data of the first core grain as the analog input data of the second core grain; and S4, detecting the analog output data of the second core particles.
In the implementation process, the analog output end of the first core grain is electrically connected with the analog input end of the second core grain through the first module, and the first module can simultaneously carry out analog signal transmission and analog data transportation and can also independently carry out one of the analog signal transmission and the analog data transportation. The analog output signal of the first core particle may be used as the analog input signal of the second core particle, and the analog output data of the first core particle may also be used as the analog input data of the second core particle. After the analog output data of the first core grain is transmitted to the first module from the analog output end, the analog output data of the first core grain is carried to the second core grain through the analog data of the first module and is used as the analog input data of the second core grain, and at the moment, only the analog output data of the second core grain needs to be detected; after the analog output signal of the first core grain is transmitted to the first module from the analog output end, the analog output signal of the first core grain is transmitted to the second core grain through the first module and is used as the analog input signal of the second core grain, and at the moment, only the analog output signal of the second core grain needs to be detected. The analog output signal and the analog output data of the second core particle are detected if the first core particle and the second core particle simultaneously transmit signals and data, and the analog output signal or the analog output data of the second core particle is detected only if the first core particle and the second core particle transmit only one of the signals and the data. The scheme can be that a plurality of core particles are electrically connected through the first module, signals and data can be transmitted simultaneously, one of the signals and the data can be transmitted, the signals and the data of the previous core particle are transmitted to the next core particle through the first module, only the final analog output signals and the final analog output data need to be detected during detection, and if the signals and the data are normal, the plurality of core particles are proved to be normal. The scheme omits the detection of other core particles, only needs the core particle detection of the final analog output signal and the analog output data, simplifies the detection steps and saves the detection time and cost.
In one possible implementation, the analog signal transmission rate between the first core particle and the second core particle is the lower of the two.
In one possible implementation, the analog data transmission rate between the first core particle and the second core particle is the lower of the two.
In the implementation process, the analog data transmission rate between the first core particle and the second core particle adopts the lower one of the two transmission rates; the analog signal transmission rate between the first core grain and the second core grain adopts the lower one of the two transmission rates; if both data and signals are transmitted, the lower transmission rate is used. Because the parameters of the core particles such as the specification, the time sequence, the frequency and the like are different, in order to ensure that the core particles of different process procedures can reasonably carry out interactive cooperation, the core particles with lower transmission rate are adopted, and the use process is more stable.
In a possible implementation manner, a control calibration module is arranged in the first module, and the control calibration module is used for controlling the consistency of the analog data transmission quantity between the first core grain and the second core grain.
In the implementation process, a control calibration module is also arranged in the first module, and can control the transmission quantity of the analog data between the first core grain and the second core grain, for example, if the transmission rate of the analog data of the first core grain is high, and the transmission rate of the analog data of the second core grain is low, part of the analog data in the first core grain is deleted; if the first core grain analog data transmission rate is slower and the second core grain analog data transmission rate is faster, the analog data in the first core grain is increased. When the core particles of different process procedures are matched for use, the data transmission quantity can be kept consistent, and the core particles are more stable in the using process.
Referring to fig. 2, in a possible implementation manner, in step S3, the method further includes: the analog output end of the third core grain is electrically connected with the analog input end of the second core grain through the first module, and the analog output signal of the third core grain is used as the analog input signal of the second core grain; the first core grain further comprises at least one second analog output end, the second analog output end is electrically connected with the analog input end of the third core grain through the first module, and a second analog output signal of the first core grain is used as an analog input signal of the third core grain.
In a possible implementation manner, in step S3, the method further includes: the analog output end of the third core grain is electrically connected with the analog input end of the second core grain through the first module, and the analog output data of the third core grain is used as the analog input data of the second core grain; the first core grain further comprises at least one second analog output end, the second analog output end is electrically connected with the analog input end of the third core grain through the first module, and second analog output data of the first core grain is used as analog input data of the third core grain.
In the above implementation process, the first core particle may have two analog output terminals electrically connected to the second core particle and the third core particle through the first module, respectively, and the third core particle is electrically connected to the second core particle through the first module. Taking the second analog output signal of the first core particle as an analog input signal for verifying a third core particle, taking the analog output signal of the third core particle as an analog input signal of the second core particle, and transmitting the signal from the analog output end of the first core particle to the second core particle through the first module; or the analog output signal of the second core particle can be detected by transmitting the analog output signal of the first core particle to a third core particle from the second analog output end of the first core particle through the first module and then transmitting the analog output signal of the third core particle to the second core particle through the first module. The first core particle may include a plurality of analog output terminals electrically connected to the plurality of core particles through the first module, and the signal may pass through the first core particle, the first module, the plurality of core particles, the first module, and the second core particle, and finally only the analog output signal of the second core particle is detected. The data transmission process is the same as the signal transmission process, the data and the signal can be transmitted simultaneously, only the data or the signal can be transmitted, and the third core particle can simulate the transmission environment. The chip may comprise a plurality of core particles which are electrically connected with each other, signals and data are transmitted from the first core particle to the second core particle, and if the analog output signals and data of the second core particle are detected to be normal, all the core particles in the chip are proved to be normal, so that the detection steps are simplified, and the detection time and cost are saved.
In one possible implementation manner, the first module further includes: the first verification switch and the second verification switch are respectively and electrically connected with the analog output end and the second analog output end of the first core grain; the first verification switch and the second verification switch are respectively used for controlling whether the analog output end and the second analog output end of the first core grain output signals or not.
In one possible implementation manner, the first module further includes: the first verification switch and the second verification switch are respectively and electrically connected with the analog output end and the second analog output end of the first core grain; the first verification switch and the second verification switch are respectively used for controlling whether the analog output end and the second analog output end of the first core grain output data or not.
In the implementation process, the first module further comprises a first verification switch and a second verification switch, and the first verification switch and the second verification switch are electrically connected with the analog output end and the second analog output end of the first core grain respectively. The analog output terminal and the second analog output terminal of the first core particle can be controlled by the first verification switch and the second verification switch. If the third core has a problem, the corresponding second analog output end is only needed to be closed, and at the moment, data and signals can be transmitted only from the first core, the first module and the second core, and can be transmitted simultaneously or only one of the data and the signals can be transmitted. If the first core grain has a plurality of analog output ends and is connected with a plurality of core grains, when a certain core grain has a problem, only the analog output end corresponding to the core grain with the problem needs to be closed. Therefore, the shielding of a single core particle is realized, the problem that the single core particle has a problem is avoided, the whole chip is prevented from being influenced, the whole chip can normally operate, and the use is more flexible.
In one possible implementation, when the first verification switch is turned off and the second verification switch is turned on, the detection of the analog output signal of the second core particle is cancelled and converted into the detection of the analog output signal of the third core particle.
In one possible implementation manner, when the first verification switch is turned off and the second verification switch is turned on, the detection of the analog output data of the second core particle is cancelled, and the detection of the analog output data of the third core particle is converted into the detection of the analog output data of the third core particle.
In the implementation process, when the second core particle has a problem, the first verification switch can be turned off, and only the second verification switch is turned on. If the signal is transmitted, the final analog output signal detection object is replaced by a third core particle; if the data is transmitted, replacing the final analog output data detection object with a third core particle; if the data and the signal are transmitted at the same time, the final analog output data and the analog output signal detection object are replaced with a third core particle. When a first core grain is connected with a plurality of core grains and a certain core grain goes wrong, only the corresponding analog output verification switch needs to be turned off, the influence on the whole chip caused by the single core grain going wrong is avoided, and the use is more flexible.
In a second aspect, the present application further provides a chip inspection system, please refer to fig. 2, including: a first core particle and a second core particle electrically connected to the first core particle; the first module is electrically connected with the analog output end of the first core particle and the analog input end of the second core particle respectively, and is used for analog signal transmission, and the analog output signal of the first core particle is used as the analog input signal of the second core particle; and the detection module is electrically connected with the analog output end of the second core particle, and detects the analog signal when the analog signal of the first core particle is transmitted to the analog output end of the second core particle through the first module.
In one possible implementation, a chip detection system includes: a first core particle and a second core particle electrically connected to the first core particle; the first module is respectively and electrically connected with the analog output end of the first core grain and the analog input end of the second core grain, and is used for carrying analog data and taking the analog output data of the first core grain as the analog input data of the second core grain; and the detection module is electrically connected with the analog output end of the second core particle, and when the analog data of the first core particle is transmitted to the analog output end of the second core particle through the first module, the detection module detects the analog data.
In the implementation process, the analog output end of the first core grain is electrically connected with the analog input end of the second core grain through the first module, and the first module can simultaneously carry out analog signal transmission and analog data transportation and can also independently carry out one of the analog signal transmission and the analog data transportation. The analog output signal of the first core particle may be used as the analog input signal of the second core particle, and the analog output data of the first core particle may also be used as the analog input data of the second core particle. The detection module is electrically connected with the analog output end of the second core grain, the analog output data of the first core grain is transferred to the second core grain through the analog data of the first module after being transferred from the analog output end to the first module, and is used as the analog input data of the second core grain, and at the moment, the detection module is only needed to detect the analog output data of the second core grain; after the analog output signal of the first core grain is transmitted to the first module from the analog output end, the analog output signal of the first core grain is transmitted to the second core grain through the analog signal of the first module and is used as the analog input signal of the second core grain, and at the moment, the detection module is only needed to detect the analog output signal of the second core grain. The detection module detects the analog output signal and the analog output data of the second core if the first core and the second core simultaneously transmit signals and data, and detects only the analog output signal or the analog output data of the second core if the first core and the second core transmit only one of the signals and the data. The scheme omits the detection of other core particles, only needs the core particle detection of the final analog output signal and the analog output data, simplifies the detection steps and saves the detection time and cost.
In one possible implementation manner, the first module further includes: the speed adjusting module is used for controlling the transmission speed of the analog signal between the first core grain and the second core grain to be the lower one of the first core grain and the second core grain; the time sequence adjusting module is used for controlling the transmission time of the analog signal between the first core grain and the second core grain to adopt the longer one of the two transmission times; and the control calibration module is used for controlling the consistency of the transmission quantity of the analog data between the first core particle and the second core particle.
In one possible implementation manner, the first module further includes: the rate adjusting module is used for controlling the transmission rate of the analog data between the first core grain and the second core grain to be the lower one of the first core grain and the second core grain; the time sequence adjusting module is used for controlling the transmission time of the analog data between the first core grain and the second core grain to adopt the longer transmission time of the two; and the control calibration module is used for controlling the consistency of the transmission quantity of the analog data between the first core grain and the second core grain.
In the foregoing implementation process, the first module further includes: the speed adjusting module is used for controlling the transmission speed of the analog signal between the first core grain and the second core grain to be the lower one of the first core grain and the second core grain; the analog data transmission rate between the first core die and the second core die is the lower of the two. The analog data transmission rate between the first core grain and the second core grain adopts the lower one of the two transmission rates; the analog signal transmission rate between the first core grain and the second core grain adopts the lower one of the two transmission rates; if both data and signals are transmitted, the lower transmission rate is used. Because the parameters of the core particles such as the specification, the time sequence, the frequency and the like are different, in order to ensure that the core particles of different process procedures can reasonably carry out interactive cooperation, the core particles with lower transmission rate are adopted, and the use process is more stable. The time sequence adjusting module is used for controlling the transmission time of the analog signal between the first core grain and the second core grain to adopt the longer one of the two transmission times; the analog data transmission time between the first core particle and the second core particle is the longer one of the two. The timing adjustment module may adjust a transmission time of the data and the signal between the first core, the first module, and the second core such that the transmission times are uniform. Because the parameters of the core particles, such as specification, time sequence, frequency, and the like, are different, in order to enable the core particles of different process procedures to reasonably carry out interactive cooperation, the core particles with longer transmission time are adopted. The control calibration module is used for controlling the consistency of the transmission quantity of the analog data between the first core grain and the second core grain, and the control calibration module can control the transmission quantity of the analog data between the first core grain and the second core grain, for example, if the transmission rate of the analog data of the first core grain is higher, and the transmission rate of the analog data of the second core grain is lower, part of the analog data in the first core grain is deleted; if the first core particle analog data transmission rate is slower and the second core particle analog data transmission rate is faster, the analog data in the first core particle is increased. When the core particles of different process procedures are matched for use, the data transmission quantity can be kept consistent, and the core particles are more stable in the using process.
In one possible implementation, the chip detection system further includes: the analog output end of the third core grain is electrically connected with the analog input end of the second core grain through the first module, and the analog output signal of the third core grain is used as the analog input signal of the second core grain; the first core grain further comprises at least one second analog output end, the second analog output end is electrically connected with the analog input end of the third core grain through the first module, and a second analog output signal of the first core grain is used as an analog input signal of the third core grain.
In one possible implementation, the chip detection system further includes: the analog output end of the third core grain is electrically connected with the analog input end of the second core grain through the first module, and the analog output data of the third core grain is used as the analog input data of the second core grain; the first core grain further comprises at least one second analog output end, the second analog output end is electrically connected with the analog input end of the third core grain through the first module, and second analog output data of the first core grain are used as analog input data of the third core grain.
In the above implementation process, the first core particle may have two analog output terminals electrically connected to the second core particle and the third core particle through the first module, respectively, and the third core particle is electrically connected to the second core particle through the first module. Taking the second analog output signal of the first core particle as an analog input signal for verifying a third core particle, taking the analog output signal of the third core particle as an analog input signal of the second core particle, and transmitting the signal from the analog output end of the first core particle to the second core particle through the first module; or the analog output signal of the second core particle can be detected by transmitting the analog output signal of the first core particle to a third core particle from the second analog output end of the first core particle through the first module and then transmitting the analog output signal of the third core particle to the second core particle through the first module. The first core particle may include a plurality of analog output terminals electrically connected to the plurality of core particles through the first module, and the signal may pass through the first core particle, the first module, the plurality of core particles, the first module, and the second core particle, and finally only the analog output signal of the second core particle is detected. The data transmission process is the same as the signal transmission process, and data and signals can be transmitted simultaneously or only data or signals can be transmitted. The chip may comprise a plurality of core particles which are electrically connected with each other, data from the first core particle finally reaches the second core particle, and if the analog output signal and the data of the second core particle are detected to be normal, all the core particles in the chip are proved to be normal, so that the detection step is simplified, and the detection time and cost are saved.
In one possible implementation manner, the first module further includes: and the verification switch module comprises a first verification switch electrically connected with the analog output end of the first core particle and a second verification switch electrically connected with the analog output end of the second core particle, and the first verification switch and the second verification switch are used for controlling the transmission of analog data and analog signals between the first core particle and the first module.
In the implementation process, the first module further comprises a first verification switch and a second verification switch, and the first verification switch and the second verification switch are electrically connected with the analog output end and the second analog output end of the first core grain respectively. The analog output terminal and the second analog output terminal of the first core particle can be controlled by the first verification switch and the second verification switch. If the third core particle has a problem, only the corresponding second analog output end needs to be closed, and at the moment, data and signals can be transmitted only from the first core particle, the first module and the second core particle, and can be transmitted simultaneously or only one of the data and the signals. If the first core grain has a plurality of analog output ends and is connected with a plurality of core grains, when a certain core grain has a problem, only the analog output end corresponding to the core grain with the problem needs to be closed. Therefore, the shielding of a single core particle is realized, the problem that the single core particle has a problem is avoided, the whole chip is prevented from being influenced, the whole chip can normally operate, and the use is more flexible.
Referring to fig. 3, in a possible implementation manner, the analog output end of the third core particle is electrically connected to the detection module, and when the first verification switch is turned off and the second verification switch is turned on, the detection module cancels the detection of the analog output signal of the second core particle and converts the detection of the analog output signal of the third core particle into the detection of the analog output signal of the third core particle.
Referring to fig. 3, in a possible implementation manner, the analog output end of the third core particle is electrically connected to the detection module, and when the first verification switch is turned off and the second verification switch is turned on, the detection module cancels the detection of the analog output data of the second core particle and converts the detection of the analog output data of the third core particle into the detection of the analog output data of the third core particle.
In the implementation process, the analog output end of the third core particle is electrically connected with the detection module, when the second core particle has a problem, the first verification switch can be closed, and only the second verification switch is kept to be opened. If the signal is transmitted, the final analog output signal detection object is replaced by a third core particle; if the data is transmitted, replacing the final analog output data detection object with a third core particle; if the data and the signal are transmitted at the same time, the final analog output data and analog output signal detection object is replaced with a third core particle. When a first core grain is connected with a plurality of core grains and a certain core grain goes wrong, only the corresponding analog output verification switch needs to be turned off, the influence on the whole chip caused by the single core grain going wrong is avoided, and the use is more flexible.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made to the present application by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
Claims (12)
1. A chip detection method is characterized by comprising the following steps:
s1, electrically connecting at least two core particles;
s2, the analog output end of the first core particle is electrically connected with the analog input end of the second core particle through a first module, and the first module is used for analog signal transmission; and/or the presence of a gas in the gas,
the first module is used for simulating data handling;
s3, taking the analog output signal of the first core particle as the analog input signal of the second core particle; and/or the presence of a gas in the gas,
taking the analog output data of the first core grain as the analog input data of the second core grain;
s4, detecting an analog output signal of the second core particle; and/or the presence of a gas in the gas,
detecting analog output data of the second core particle.
2. The chip detection method according to claim 1, wherein an analog signal transmission rate between the first core particle and the second core particle is the lower of the two; and/or the presence of a gas in the gas,
the analog data transmission rate between the first core die and the second core die is the lower of the two.
3. The chip detection method according to claim 1, wherein the transmission time of the analog signal between the first core particle and the second core particle is the longer of the two; and/or the presence of a gas in the gas,
the analog data transmission time between the first core grain and the second core grain adopts the longer transmission time of the two.
4. The chip detection method according to claim 1, wherein a control calibration module is provided in the first module, and the control calibration module is configured to control a transmission amount of the analog data between the first core particle and the second core particle to be consistent.
5. The chip detection method according to any one of claims 1 to 4, wherein in step S3, further comprising:
a third core grain having an analog output terminal coupled to the analog input terminal of the second core grain
The analog output signal of the third core particle is used as the analog input signal of the second core particle through the first module electrical connection; and/or the presence of a gas in the atmosphere,
the analog output data of the third core grain is used as the analog input data of the second core grain;
the first core grain further comprises at least one second analog output end, the second analog output end is electrically connected with the analog input end of the third core grain through the first module, and a second analog output signal of the first core grain is used as an analog input signal of the third core grain; and/or the presence of a gas in the atmosphere,
the second analog output data of the first core particle is used as the analog input data of the third core particle.
6. The chip detection method according to claim 5, wherein the first module further comprises:
the first verification switch and the second verification switch are respectively and electrically connected with the analog output end of the first core grain and the second analog output end;
the first verification switch and the second verification switch are respectively used for controlling whether the analog output end of the first core grain and the second analog output end output signals or not; and/or the presence of a gas in the gas,
the first verification switch and the second verification switch are respectively used for controlling whether the analog output end of the first core grain and the second analog output end output data or not.
7. The chip detection method according to claim 6, wherein when the first verification switch is turned off and the second verification switch is turned on, the analog output signal detection of the second core particle is cancelled and converted into the analog output signal detection of the third core particle; and/or the presence of a gas in the gas,
and canceling the detection of the analog output data of the second core grain, and converting the detection of the analog output data of the third core grain into the detection of the analog output data of the third core grain.
8. A chip detection system, comprising:
a first core particle and a second core particle electrically connected to the first core particle;
the first module is electrically connected with the analog output end of the first core grain and the analog input end of the second core grain respectively, and is used for analog signal transmission, and the analog output signal of the first core grain is used as the analog input signal of the second core grain; and/or the presence of a gas in the gas,
the first module is used for simulating data transportation and taking the simulation output data of the first core grain as the simulation input data of the second core grain;
the detection module is electrically connected with the analog output end of the second core grain, and detects the analog signal when the analog signal of the first core grain is transmitted to the analog output end of the second core grain through the first module; and/or the presence of a gas in the gas,
the detection module detects analog data of the first core grain when the analog data is transmitted to an analog output of the second core grain through the first module.
9. The chip detection system according to claim 8, wherein the first module further comprises
The method comprises the following steps:
the speed adjusting module is used for controlling the transmission speed of the analog signal between the first core grain and the second core grain to be the lower one of the first core grain and the second core grain; and/or the presence of a gas in the gas,
the analog data transmission rate between the first core die and the second core die is the lower of the two;
the time sequence adjusting module is used for controlling the transmission time of the analog signal between the first core grain and the second core grain to adopt the longer one of the two transmission times; and/or the presence of a gas in the gas,
the analog data transmission time between the first core grain and the second core grain adopts the longer transmission time of the first core grain and the second core grain;
and the control calibration module is used for controlling the consistency of the transmission quantity of the analog data between the first core grain and the second core grain.
10. The chip detection system according to claim 8 or 9, further comprising:
a third core grain, an analog output of the third core grain and an analog input of the second core grain
The analog output signal of the third core particle is used as the analog input signal of the second core particle through the first module electrical connection; and/or the presence of a gas in the atmosphere,
the analog output data of the third core particle is used as the analog input data of the second core particle;
the first core grain further comprises at least one second analog output end, the second analog output end is electrically connected with the analog input end of the third core grain through the first module, and a second analog output signal of the first core grain is used as an analog input signal of the third core grain; and/or the presence of a gas in the atmosphere,
the second analog output data of the first core grain is used as the analog input data of the third core grain.
11. The chip detection system according to claim 10, wherein the first die
The block further comprises:
and the verification switch module comprises a first verification switch electrically connected with the analog output end of the first core particle and a second verification switch electrically connected with the analog output end of the second core particle, and the first verification switch and the second verification switch are used for controlling the transmission of analog data and analog signals between the first core particle and the first module.
12. The chip detection system according to claim 11, wherein the third core
The analog output end of the grain is electrically connected with the detection module, when the first verification switch is closed and the second verification switch is opened, the detection module cancels the detection of the analog output signal of the second core grain and converts the detection of the analog output signal of the third core grain into the detection of the analog output signal of the third core grain; and/or the presence of a gas in the gas,
the detection of the analog output data of the second core particle is cancelled, and the detection is converted into the detection of the analog output data of the third core particle.
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