CN115622585A - Full-rate asynchronous serial port transceiver - Google Patents
Full-rate asynchronous serial port transceiver Download PDFInfo
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- CN115622585A CN115622585A CN202211226640.5A CN202211226640A CN115622585A CN 115622585 A CN115622585 A CN 115622585A CN 202211226640 A CN202211226640 A CN 202211226640A CN 115622585 A CN115622585 A CN 115622585A
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Abstract
The invention discloses a full-rate asynchronous serial port transceiver, which is characterized by comprising a baud rate detection module and a self-adaptive slew rate control module; the baud rate detection module is used for detecting the zero pulse width of a signal at the data input end of the transceiver, calculating the baud rate of the transceiver based on the zero pulse width, and sending the baud rate to the self-adaptive slew rate control module; the self-adaptive slew rate control module is used for adjusting the slew rate of the transceiver according to the baud rate. The invention detects the data input end signal of the transceiver through the baud rate detection module to obtain the baud rate of the transceiver, and adjusts the slew rate of the transceiver through the adaptive slew rate control module according to different baud rates of the transceiver, thereby realizing the adaptive control of the slew rate of the transceiver, covering the signal integrity from low-speed to high-speed full-rate communication and reducing the electromagnetic interference of a communication system.
Description
Technical Field
The invention relates to the technical field of fault diagnosis of mechanical equipment, in particular to a full-rate asynchronous serial port transceiver.
Background
The rapid development of intelligent instruments and industry 4.0 has driven the continuous increase of fieldbus utilization rate, so we are required to continuously optimize fieldbus technology and provide reliable support for intelligent systems. To achieve higher rates and greater data throughput, two important factors, EMC stability and data transmission reliability of the system, must be carefully balanced.
In industrial control applications, fieldbus is typically in a high data rate, long cable transmission line state and system interference is large. These demanding applications put higher demands on the signal integrity of the serial interface transceiver to ensure the reliability and EMC characteristics of the intelligent system.
High baud rates and long distance communications are inevitable for serial interface transceivers. As an interface device, the reliability and signal integrity of the transceiver directly affects the performance of the entire intelligent system. Due to the complexity of industrial field environments, a constant transceiver cannot accommodate a variety of different application scenarios.
When the output of the driver and the receiver transmits information by using the edge which changes rapidly, high-frequency components are generated, and in an actual application environment, if a twisted pair balanced system is not adopted, the system becomes a radiator, and EMI (electromagnetic interference) is generated, so that the normal operation of the whole intelligent system is influenced.
However, the rapid edge change of the drivers of the transmitting and receiving circuits can bring about the overshoot, undershoot and ringing effect of the signals, and in severe cases, the signals can cause bit errors and even damage the chips connected with the signals.
The above-mentioned problems of high-speed signal in distance transmission cannot be solved only by using a high-quality and high-speed cable due to the complexity of an industrial field, the uncertainty of wiring and the compatibility of bus network expansion, and a high-performance serial interface transceiver is required to ensure the high stability and reliability of the system.
Disclosure of Invention
The invention aims to overcome the defect that an intelligent system cannot work normally due to electromagnetic interference generated when a high-speed signal edge is used for sending information by using a conventional transceiver in the prior art, and provides a full-rate asynchronous serial port transceiver.
The invention solves the technical problems through the following technical scheme:
the invention provides a full-rate asynchronous serial port transceiver, which comprises a baud rate detection module and a self-adaptive slew rate control module, wherein the baud rate detection module is used for detecting the baud rate of a serial port;
the baud rate detection module is used for detecting the zero pulse width of a signal at the data input end of the transceiver, calculating the baud rate of the transceiver based on the zero pulse width, and sending the baud rate to the self-adaptive slew rate control module;
the self-adaptive slew rate control module is used for adjusting the slew rate of the transceiver according to the baud rate.
Preferably, the baud rate detection module includes an internal oscillation unit and a pulse width detection unit;
the internal oscillation unit is used for generating a main frequency of a transceiver so as to ensure the detection precision of the pulse width detection unit according to the main frequency;
the pulse width detection unit is used for detecting the zero pulse width of a signal at the data input end of the transceiver and calculating the baud rate of the transceiver based on the zero pulse width.
Preferably, the full-rate asynchronous serial port transceiver further comprises a driver;
the driver is used for processing the received data input end signal so as to output the adjusted slew rate of the transceiver.
Preferably, the driver comprises a driver control module, a balance driving module and a driving output module;
the driver control module is used for receiving the data input end signal and respectively transmitting the data input end signal to the baud rate detection module and the balance driving module;
the balance driving module is used for converting the data input end signal into a differential control signal and transmitting the differential control signal to the self-adaptive slew rate control module;
the adaptive slew rate control module is used for adjusting the differential control signal according to the baud rate to obtain an adjusted differential control signal, adjusting the slew rate of the transceiver based on the adjusted differential control signal, and transmitting the adjusted slew rate of the transceiver to the drive output module;
the driving output module is used for outputting the adjusted slew rate of the transceiver.
Preferably, the full-rate asynchronous serial port transceiver further comprises a receiver;
the receiver is used for processing a differential signal of the wide common mode voltage on the bus to obtain a logic signal and driving the logic signal to a preset logic level.
Preferably, the receiver comprises a level conversion module, a comparator and a receiver output module;
the level conversion module is used for adjusting a differential signal of the wide common mode voltage on the bus to a target differential signal corresponding to normal work of the comparator and transmitting the target differential signal to the comparator;
the comparator is used for comparing the target differential signal to obtain a logic signal and transmitting the logic signal to the receiver output module;
the receiver output module is used for driving the logic signal to a preset logic level.
Preferably, the full-rate asynchronous serial port transceiver further comprises a hot plug module, an overvoltage and overcurrent protection module and a temperature protection module;
the hot plug module is used for preventing the abnormal disturbance of bus signals and receiver signals in the process of power-on and/or power-off of the transceiver;
the overvoltage and overcurrent protection module is used for controlling the transceiver to limit current when the bus signal or the receiver signal has high voltage or abnormal current;
the temperature protection module is used for controlling the transceiver to be closed when detecting that the temperature value of the transceiver exceeds a preset temperature value.
Preferably, the expression for calculating the baud rate of the transceiver based on the zero pulse width is:
BAUD＝(N+1)/T
wherein BAUD represents the BAUD rate of the transceiver, N represents the sequence number of data 1 from DO, and T represents the time of zero pulse width.
Preferably, the adaptive slew rate control module is configured to adjust the slew rate of the driver according to the baud rate by adjusting the gate input current of the driver.
Preferably, the adaptive slew rate control module is configured to adjust the slew rate of the driver according to the baud rate by adjusting the gate resistance of the driver.
The positive progress effects of the invention are as follows:
the invention detects the data input end signal of the transceiver through the baud rate detection module to obtain the baud rate of the transceiver, and adjusts the slew rate of the transceiver through the self-adaptive slew rate control module according to different baud rates of the transceiver, thereby realizing the self-adaptive control of the slew rate of the transceiver, covering the signal integrity from low-speed to high-speed full-rate communication and reducing the electromagnetic interference of a communication system.
Drawings
Fig. 1 is a schematic structural diagram of a full-rate asynchronous serial port transceiver according to an exemplary embodiment of the present invention.
Fig. 2 is a schematic diagram of communication interaction of a full-rate asynchronous serial port transceiver according to an exemplary embodiment of the present invention.
Detailed Description
The invention is further illustrated by the following examples, which are not intended to limit the scope of the invention.
As shown in fig. 1, the full-rate asynchronous serial port transceiver provided in this embodiment includes a baud rate detection module 11 and an adaptive slew rate control module 12;
the baud rate detection module 11 is used for detecting the zero pulse width of a signal at the data input end of the transceiver, calculating the baud rate of the transceiver based on the zero pulse width, and sending the baud rate to the adaptive slew rate control module 12;
the adaptive slew rate control module 12 is configured to adjust a slew rate of the transceiver according to the baud rate.
As an alternative embodiment, the expression for calculating the baud rate of the transceiver based on the zero pulse width is as follows:
BAUD＝(N+1)/T
where BAUD denotes the BAUD rate of the transceiver, N denotes the sequence number of data 1 from DO, and T denotes the time of zero pulse width.
In this embodiment, the DL/T645 rule in the electric meter communication is taken as an example, the preamble character of the data frame at the time of transmission is 0XFE, and the relationship between the BAUD rate (BAUD) and the zero pulse width is as follows: BAUD = (N + 1)/T, where N denotes a sequence number where data is 1 from DO. When the leading frame is fixed to be 0XFE, N =1, starting from the start bit, the transceiver detects that the width of the zero pulse width is 2 bit widths, so that the baud rate can be calculated, and the slew rate is adjusted based on the baud rate.
In this embodiment, the asynchronous serial port communication protocol is as shown in table 1:
TABLE 1
Wherein, the meanings of each bit in table 1 are as follows:
the initial position: sending 1 bit logic 0 (low level), and starting to transmit data;
data bit: the data can be 5-8 bits, the low bit is sent first, and then the high bit is sent;
checking the bit: parity check, adding check bits to data bits, wherein the number of bits of 1 is an even number (even check), and the number of bits of 1 is an odd number (odd check);
stopping the position: the stop bit is a mark of the end of data transmission and can be logic 1 (high level) of 1/1.5/2 bits;
idle bit: the data line is in a high level state in idle, which represents no data transmission;
as can be seen from table 1, UART (universal asynchronous receiver transmitter) start bit 0 represents the baud rate of communication, and the BC terminal (i.e., baud rate detection module control terminal) and the DI terminal (data input terminal) set the pulse width of the data bit starting from LSB to 0, and after enabling is sent, the pulse width of the zero signal (i.e., the detection zero pulse width of the signal at the data input terminal) can be detected according to the data of the frame header or the preamble frame of the data, and after the rising edge is detected, the detection is ended, and the corresponding baud rate is calculated.
In this embodiment, the byte transmission sequence is shown in table 2:
TABLE 2
In the embodiment, the BC terminal configures the zero pulse width of baud rate detection, sets the transmission format of a preamble frame or a data frame header to realize the automatic detection of the baud rate, and adjusts the slew rate of the transceiver according to different baud rates to realize the control function of self-adaptive slew rate.
It should be noted that, taking the transceiver as RS485/RS422 as an example, according to the RS485/RS422 protocol, when the load is a 54-ohm resistor and a 50pF capacitor connected in parallel, the rise (or fall) time tr/tf and the communication speed f of the differential signal should satisfy tr/tf ≦ 0.3/f. Therefore, for different communication rates, a transceiver using adaptive slew rate control is the best choice to avoid generating EMI.
As an alternative embodiment, as shown in fig. 1, the baud rate detection module 11 includes an internal oscillation unit 111 and a pulse width detection unit 112;
the internal oscillation unit 111 is used for generating a main frequency of the transceiver to ensure the detection accuracy of the pulse width detection unit according to the main frequency;
the pulse width detection unit 112 is configured to detect a zero pulse width of a signal at the data input end of the transceiver, and calculate a baud rate of the transceiver based on the zero pulse width.
It should be noted that the detection method of the zero pulse width may adopt oversampling of the main clock, and the detection accuracy is determined by the clock frequency (i.e., the main frequency) generated by the internal oscillation unit.
As an alternative embodiment, as shown in fig. 1, the full-rate asynchronous serial port transceiver further includes a driver 13;
the driver controller 13 is configured to process the received data input signal to output an adjusted slew rate of the transceiver.
As an alternative embodiment, as shown in fig. 1, the driver 13 includes a driver control module 131, a balance driving module 132, and a driving output module 133;
the driver control module 131 is configured to receive a data input end signal, and transmit the data input end signal to the baud rate detection module and the balanced driving module 132 respectively;
the balance driving module 132 is configured to convert the data input end signal into a differential control signal, and transmit the differential control signal to the adaptive slew rate control module 12;
the adaptive slew rate control module 12 is configured to adjust the differential control signal according to the baud rate to obtain an adjusted differential control signal, adjust the slew rate of the transceiver based on the adjusted differential control signal, and transmit the adjusted slew rate of the transceiver to the driving output module 133;
the driving output module 133 is used for outputting the adjusted slew rate of the transceiver.
In an alternative embodiment, as shown in fig. 1, the full-rate asynchronous serial port transceiver further includes a receiver 14;
the receiver 14 is configured to process the differential signal of the wide common mode voltage on the bus to obtain a logic signal, and drive the logic signal to a preset logic level.
As an alternative embodiment, as shown in fig. 1, the receiver 14 includes a level conversion module 141, a comparator 142, and a receiver output module 143;
the level conversion module 141 is configured to adjust the differential signal of the wide common mode voltage on the bus to a target differential signal corresponding to normal operation of the comparator, and transmit the target differential signal to the comparator 142;
in this embodiment, the target differential signal corresponding to the normal operation of the comparator meets the level range of the normal operation of the comparator.
The comparator 142 is configured to compare the target differential signal to obtain a logic signal, and transmit the logic signal to the receiver output module 143;
the receiver output module 143 is configured to drive the logic signal to a preset logic level.
In this embodiment, the preset logic level is a standard logic level, and the standard logic level is a voltage signal meeting the standard of the serial communication physical layer.
As an optional implementation manner, as shown in fig. 1, the full-rate asynchronous serial port transceiver further includes a hot plug module 15, an overvoltage and overcurrent protection module 16, and a temperature protection module 17;
the hot plug module 15 is used for preventing the abnormal disturbance of the bus signal and the receiver signal in the process of powering on and/or powering off the transceiver;
in the embodiment, the control end of the transceiver is designed and optimized to ensure that the transceiver does not generate abnormal disturbance of bus signals and receiver signals in the power-on and/or power-off process.
The overvoltage and overcurrent protection module 16 is used for controlling the transceiver to limit current when a bus signal or a receiver signal has high voltage or abnormal current;
in the embodiment, when high voltage or abnormal current occurs in the bus signal or the receiver signal, the output capacity of the driver and the receiver is limited, and the transceiver is protected, so that the transceiver can work more reliably.
The temperature protection module 17 is configured to control the transceiver to be turned off when detecting that the temperature value of the transceiver exceeds a preset temperature value.
In this embodiment, the temperature value inside the transceiver is detected, and when the temperature value exceeds the set temperature value, the driver is turned off until the temperature returns to normal.
It should be noted that the preset temperature value is set according to actual conditions, and is not specifically limited herein.
In this embodiment, the reliability of the transceiver can be enhanced by the hot plug module 15, the over-voltage and over-current protection module 16 and the temperature protection module 17, so as to adapt to the application of the full-rate asynchronous serial port transceiver in various severe environments.
As an alternative embodiment, the adaptive slew rate control module 12 is configured to adjust the slew rate of the driver 13 according to the baud rate by adjusting the gate input current of the driver.
As an alternative embodiment, the adaptive slew rate control module 12 is configured to adjust the slew rate of the driver 13 according to the baud rate by adjusting the gate resistance of the driver.
In this embodiment, the slew rate control may adjust the slew rate of the output tube of the driver by adjusting the change rate of the input voltage to the gate of the driving tube of the driver, for example, by changing the input current to the gate of the driving tube or changing the gate resistance of the driving tube; the driving capability of the driving tube (namely, the internal resistance of the driving tube) can be adjusted through current control, the slew rate can be adjusted based on the driving capability, or the driving tubes with different sizes can be opened in sequence by adopting a distributed weighting method. It should be noted that the default is unlimited slew rate after the transceiver is powered on, and when the driver is enabled, the communication baud rate is obtained by calculating the pulse width of the zero signal, and the slew rate is adjusted according to the transmitted baud. Therefore, the EMI problem caused by the quick edge can be solved while the normal communication of the high-speed signal is ensured.
The truth tables for the transceivers are shown in tables 3 and 4:
TABLE 3
TABLE 4
In a specific implementation process, for example, taking a high-speed RS-485 transceiver as an example, the high-speed RS-485 transceiver needs to communicate and interact with a main control chip (e.g., an MCU) in a working process, as shown in fig. 2, the MCU needs two IO ports to control the transceiver except RX and TX ports, where IO2 completes switching between transmitting and receiving enabling, and IO1 serves as a zero pulse width when a baud rate control terminal and a DI terminal configure communication together, so as to implement dynamic detection and adaptive slew rate control of the baud rate in the communication process.
Specifically, in a practical application environment, data transmission needs a communication protocol matched with a communication system, for example, taking a smart meter as an example, a DL/T645 protocol is generally adopted, a leading frame of transmission data is 0xFE, and an nth (N = 1) bit of data is 1 from a start bit. When the MCU transmits a data frame, first, IO1 and IO2 are set high, at this time, the outputs of the driver and the receiver of the transceiver are both in a high impedance state, and the transceiver detects N (for 0xfe N = 1) falling edges at the DI end, and obtains (N + 1)/BAUD, that is, 2/BAUD, width of zero pulse width. After transmission is finished, the IO1 is set to be low, the IO2 is set to be high, at the moment, the output of the driver is enabled, the output of the receiver is high-resistance, the transceiver obtains the corresponding baud rate by detecting the width of the zero pulse width of a DI signal of the data input end of the transceiver, and therefore the slew rate of the driver is adjusted according to the baud rate. It should be noted that, for a communication system in which the leading frame or the frame header is a fixed character, the communication system only needs to configure the BC terminal once after being powered on, and thus the adaptive control of the slew rate of the driver can be achieved.
In addition, the transceivers of the embodiment include, but are not limited to, an RS-485 transceiver, an RS-422 transceiver, an RS-232 transceiver, an asynchronous serial port transceiver such as CAN and the like.
In the embodiment, the baud rate of the transceiver is obtained by detecting the data input end signal of the transceiver through the baud rate detection module, and the slew rate of the transceiver is adjusted through the adaptive slew rate control module according to different baud rates of the transceiver, so that the adaptive control of the slew rate of the transceiver is realized, the signal integrity from low-speed to high-speed full-rate communication is covered, and the electromagnetic interference of a communication system is reduced.
While specific embodiments of the invention have been described above, it will be understood by those skilled in the art that this is by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.
Claims (10)
1. A full-rate asynchronous serial port transceiver is characterized by comprising a baud rate detection module and a self-adaptive slew rate control module;
the baud rate detection module is used for detecting the zero pulse width of a signal at the data input end of the transceiver, calculating the baud rate of the transceiver based on the zero pulse width, and sending the baud rate to the self-adaptive slew rate control module;
the self-adaptive slew rate control module is used for adjusting the slew rate of the transceiver according to the baud rate.
2. The full-rate asynchronous serial port transceiver of claim 1, wherein said baud rate detection module comprises an internal oscillation unit and a pulse width detection unit;
the internal oscillation unit is used for generating a main frequency of a transceiver so as to ensure the detection precision of the pulse width detection unit according to the main frequency;
the pulse width detection unit is used for detecting the zero pulse width of a signal at the data input end of the transceiver and calculating the baud rate of the transceiver based on the zero pulse width.
3. The full rate asynchronous serial port transceiver of claim 1, further comprising a driver;
the driver is used for processing the received data input end signal so as to output the adjusted slew rate of the transceiver.
4. The full-rate asynchronous serial port transceiver of claim 3, wherein said driver comprises a driver control module, a balanced driver module, and a driver output module;
the driver control module is used for receiving the data input end signal and respectively transmitting the data input end signal to the baud rate detection module and the balance driving module;
the balance driving module is used for converting the data input end signal into a differential control signal and transmitting the differential control signal to the self-adaptive slew rate control module;
the adaptive slew rate control module is used for adjusting the differential control signal according to the baud rate to obtain an adjusted differential control signal, adjusting the slew rate of the transceiver based on the adjusted differential control signal, and transmitting the adjusted slew rate of the transceiver to the drive output module;
the driving output module is used for outputting the adjusted slew rate of the transceiver.
5. The full rate asynchronous serial port transceiver of claim 1, wherein said full rate asynchronous serial port transceiver further comprises a receiver;
the receiver is used for processing a differential signal of a wide common mode voltage on a bus to obtain a logic signal and driving the logic signal to a preset logic level.
6. The full rate asynchronous serial port transceiver of claim 5 wherein said receiver comprises a level translation module, a comparator and a receiver output module;
the level conversion module is used for adjusting a differential signal of the wide common mode voltage on the bus to a target differential signal corresponding to normal work of the comparator and transmitting the target differential signal to the comparator;
the comparator is used for comparing the target differential signal to obtain a logic signal and transmitting the logic signal to the receiver output module;
the receiver output module is used for driving the logic signal to a preset logic level.
7. The full-rate asynchronous serial port transceiver of claim 1, further comprising a hot plug module, an over-voltage and over-current protection module, and a temperature protection module;
the hot plug module is used for preventing the abnormal disturbance of bus signals and receiver signals in the process of power-on and/or power-off of the transceiver;
the overvoltage and overcurrent protection module is used for controlling the transceiver to limit current when the bus signal or the receiver signal has high voltage or abnormal current;
the temperature protection module is used for controlling the transceiver to be closed when detecting that the temperature value of the transceiver exceeds a preset temperature value.
8. The full-rate asynchronous serial port transceiver of claim 1, wherein the expression for calculating the baud rate of said transceiver based on said zero pulse width is:
BAUD＝(N+1)/T
wherein BAUD represents the BAUD rate of the transceiver, N represents the sequence number of data 1 from DO, and T represents the time of zero pulse width.
9. The full-rate asynchronous serial port transceiver as claimed in claim 4, wherein said adaptive slew rate control module is configured to adjust the slew rate of said driver according to said baud rate by adjusting the gate input current of said driver.
10. The full-rate asynchronous serial port transceiver of claim 4, wherein said adaptive slew rate control module is configured to adjust the slew rate of said driver according to said baud rate by adjusting the gate resistance of said driver.
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