CN115547230B

CN115547230B - Video data display processing method and device, micro display screen and storage medium

Info

Publication number: CN115547230B
Application number: CN202211469976.4A
Authority: CN
Inventors: 孟雄飞; 陈弈星; 刘元开
Original assignee: Nanjing Xinshiyuan Electronics Co ltd
Current assignee: Nanjing Xinshiyuan Electronics Co ltd
Priority date: 2022-11-23
Filing date: 2022-11-23
Publication date: 2023-03-10
Anticipated expiration: 2042-11-23
Also published as: CN115547230A

Abstract

The application provides a video data display processing method and device, a micro display screen and a storage medium, and relates to the technical field of micro display. When a micro display screen supporting low gray scale depth needs to display a video source with high gray scale depth, gray scale precision regulation and control strategies corresponding to the display types of the micro display screen are used for carrying out gray scale error mapping processing on the video source data with high gray scale depth to obtain video data consistent with the low gray scale depth supported by the micro display screen, namely, detail errors between the gray scale depth of the video source with high gray scale depth and the low gray scale depth supported by the micro display screen are reasonably mapped or error transmitted to make up the deficiency of the details, the purpose of mapping the video source data with high gray scale depth to the micro display screen with low gray scale depth for displaying is achieved, and the purpose of displaying the video source with high gray scale depth by the micro display screen with low gray scale depth can be achieved without additionally increasing the power consumption and the size of the micro display screen.

Description

Video data display processing method and device, micro display screen and storage medium

Technical Field

The application relates to the technical field of micro display, in particular to a video data display processing method and device, a micro display screen and a storage medium.

Background

Micro-display, which is one of the indispensable key technologies in the fields of Augmented Reality (AR), virtual Reality (VR) and MR Mixed Reality (MR), can greatly display the color fidelity of a picture, the fineness of the picture and the uniformity of picture transition, and has a great influence on the user's impression.

At present, video sources develop towards a high gray scale depth direction, such as a Dolby Vision standard movie with a 10-bit gray scale depth, which can improve the viewing experience of users.

However, in the field of micro display, micro display screens supporting high gray scale depth are not common, and if a micro display screen is required to play a video source with high gray scale depth, the gray scale depth of the micro display screen needs to be increased, so that the size and power consumption of the display screen are greatly increased, the endurance, heat dissipation and the like of the display screen are not facilitated, and the cost of the display screen is also increased.

Disclosure of Invention

An object of the present application is to provide a method and an apparatus for processing video data display, a micro display screen, and a storage medium, so as to solve the above-mentioned problems in the prior art.

In order to achieve the above purpose, the technical solutions adopted in the embodiments of the present application are as follows:

in a first aspect, an embodiment of the present application provides a method for displaying and processing video data, where the method includes:

acquiring video source data to be displayed;

determining a target gray scale precision regulation strategy according to the display type of the micro display screen;

performing gray scale error mapping processing on the video source data to be displayed by using the target gray scale precision regulation and control strategy to obtain processed video source data, wherein the gray scale depth of the processed video source data is the same as the gray scale depth supported by the micro display screen;

and displaying the processed video source data to the micro display screen.

Optionally, the determining a target grayscale precision adjusting and controlling manner according to the display type of the micro display screen includes:

and if the display type of the micro display screen is spatial color, determining that the target gray scale precision regulation strategy is a gray scale error mapping strategy between corresponding color sub-pixels on adjacent resolution pixels.

Optionally, the performing gray scale error mapping processing on the video source data to be displayed by using the target gray scale precision regulation and control strategy to obtain processed video source data includes:

traversing the video source data to be displayed, and respectively executing the following steps aiming at the traversed current pixel:

acquiring preset configuration parameters and a pixel value of a current pixel, wherein the configuration parameters comprise: a pixel structure, a number of error mapped pixels, a position of each error mapped pixel, and a threshold;

acquiring a pixel value of each error mapping pixel according to the pixel structure, the number of the error mapping pixels and the position of each error mapping pixel;

determining whether an absolute value of a difference between a pixel value of the current pixel and a pixel value of each of the error mapped pixels is greater than the threshold;

if not, determining the weight value of each error mapping pixel according to the pixel value of the current pixel and the absolute value of the difference value between each error mapping pixel;

and determining the display pixel value of the current pixel according to the pixel value of the current pixel, the pixel value of each error mapping pixel and the weight value of each error mapping pixel.

Optionally, the configuration parameters include: the pixel structure is a Chinese character 'tian' shaped pixel structure, the number of error mapping pixels is 3, and the positions of the error mapping pixels are right, below and below right;

the obtaining the pixel value of each error mapping pixel according to the pixel structure, the number of the error mapping pixels and the position of each error mapping pixel includes:

acquiring a corresponding color component of a right pixel of the current pixel, a corresponding color component of a lower pixel of the current pixel, and a corresponding color component of a lower right pixel of the current pixel, wherein the color components include: a red component, a green component, a blue component, and a W component.

Optionally, the determining a target gray scale precision adjusting and controlling manner according to the display type of the micro display screen includes:

and if the display type of the micro display screen is time sequence color, determining the target gray scale precision regulation strategy as a gray scale error mapping strategy of adjacent physical pixels.

acquiring preset configuration parameters and a pixel value of a current pixel, wherein the configuration parameters comprise: the number of error mapping pixels, the position of each error mapping pixel and the weight value of each error mapping pixel;

acquiring a pixel value of each error mapping pixel according to the number of the error mapping pixels and the position of each error mapping pixel;

Optionally, the displaying the processed video source data on the micro display screen includes:

if the display type of the micro display screen is spatial color, displaying the processed video source data on the micro display screen by using the pixel structure supported by the spatial color, wherein the pixel structure supported by the spatial color comprises: a field-shaped pixel structure, a strip-shaped pixel structure, a delta-shaped pixel structure and an L-shaped pixel structure;

and if the display type of the micro display screen is time sequence color, displaying the processed video source data on the micro display screen by using time division multiplexing physical pixels.

In a second aspect, an embodiment of the present application further provides a video data display processing apparatus, where the apparatus includes:

the acquisition module is used for acquiring video source data to be displayed;

the determining module is used for determining a target gray scale precision regulating and controlling strategy according to the display type of the micro display screen;

the processing module is used for performing gray scale error mapping processing on the video source data to be displayed by using the target gray scale precision regulating and controlling strategy to obtain processed video source data, wherein the gray scale depth of the processed video source data is the same as the gray scale depth supported by the micro display screen;

and the display module is used for displaying the processed video source data to the micro display screen.

Optionally, the determining module is further configured to:

Optionally, the processing module is further configured to:

the processing module is further configured to:

Optionally, the determining module is further configured to:

and if the display type of the micro display screen is time sequence color, determining that the target gray scale precision regulation strategy is a gray scale error mapping strategy of adjacent physical pixels.

Optionally, the processing module is further configured to:

Optionally, the display module is further configured to:

if the display type of the micro display screen is a spatial color, displaying the processed video source data on the micro display screen by using a pixel structure supported by the micro display screen, wherein the pixel structure supported by the micro display screen comprises: the pixel structure comprises a field-shaped pixel structure, a strip-shaped pixel structure, a delta-shaped pixel structure and an L-shaped pixel structure;

In a third aspect, an embodiment of the present application further provides a micro display screen, including: the driving chip and the micro display chip are in communication through a bus, the driving chip or the micro display chip stores executable machine readable instructions, and when the micro display screen runs, the driving chip or the micro display chip executes the machine readable instructions to execute the steps of the method provided by the first aspect.

In a fourth aspect, embodiments of the present application further provide a computer-readable storage medium, where a computer program is stored, and when the computer program is executed by a driving module or a micro display chip, the computer program performs the steps of the method as provided in the first aspect.

The beneficial effect of this application is:

the embodiment of the application provides a video data display processing method and device, a micro display screen and a storage medium, wherein when a micro display screen supporting low gray scale depth needs to display a video source with high gray scale depth, a gray scale precision regulation and control strategy corresponding to a display type of the micro display screen can be used for performing gray scale error mapping processing on the video source data with high gray scale depth to obtain video data consistent with the low gray scale depth supported by the micro display screen, namely, a detail error between the gray scale depth of the video source with high gray scale depth and the low gray scale depth supported by the micro display screen is reasonably mapped or error transmitted, so that the purpose of making up the loss of details is achieved, and the purpose of mapping the video source data with high gray scale depth to the micro display screen with low gray scale depth for displaying is achieved. Therefore, the purpose of displaying the video source with high gray scale depth by using the micro display screen with low gray scale depth can be achieved without additionally increasing the power consumption and the size of the micro display screen, so that higher gray scale depth visual perception is obtained, the display effect superior to that of the micro display screen with low gray scale depth is obtained, the micro display screen is particularly suitable for application scenes with higher requirements on the power consumption and the size of the micro display screen and higher requirements on the display gray scale depth, and the problem that the micro display screen with low gray scale depth in the prior art cannot display the video source with high gray scale depth is solved.

Drawings

To more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a schematic structural diagram of a micro display screen provided in an embodiment of the present application;

fig. 2 is a schematic structural diagram of a driving chip provided in an embodiment of the present application;

fig. 3 is a schematic flowchart of a video data display processing method according to an embodiment of the present application;

fig. 4 is a schematic flowchart of another video data display processing method according to an embodiment of the present application;

fig. 5 is a mapping relationship diagram of a sub-pixel R in a field-line pixel structure according to an embodiment of the present disclosure;

FIG. 6 is a mapping diagram of a sub-pixel G in a field-line pixel structure according to an embodiment of the present disclosure;

FIG. 7 is a diagram illustrating a mapping relationship of a sub-pixel B in a field-column pixel structure according to an embodiment of the present disclosure;

fig. 8 is a mapping relationship diagram of a sub-pixel W in a field-word line pixel structure according to an embodiment of the present application;

FIG. 9 is a diagram of a complete relationship of field-line pixel structure mapping according to an embodiment of the present application;

fig. 10 is a schematic flowchart of another video data display processing method according to an embodiment of the present application;

FIG. 11 is a schematic diagram illustrating a variation of time-sequential colors of a 1920 × 1080 resolution frame video source according to an embodiment of the present invention;

fig. 12 is a schematic structural diagram of a video data display processing apparatus according to an embodiment of the present application.

An icon: 100-micro display screen; 101-a driver chip; 102-micro display chip; 201-a memory; 202-a processor; 1201-an obtaining module; 1202-a determination module; 1203-a processing module; 1204-display module.

Detailed Description

In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it should be understood that the drawings in the present application are for illustrative and descriptive purposes only and are not used to limit the scope of protection of the present application. Further, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in this application illustrate operations implemented according to some embodiments of the present application. It should be understood that the operations of the flow diagrams may be performed out of order, and steps without logical context may be performed in reverse order or simultaneously. One skilled in the art, under the guidance of this application, may add one or more other operations to, or remove one or more operations from, the flowchart.

In addition, the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as presented in the figures, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that in the embodiments of the present application, the term "comprising" is used to indicate the presence of the features stated hereinafter, but does not exclude the addition of further features.

First, before specifically explaining the technical solution provided in the present application, a brief description is given to the structure of the micro display screen related to the present application.

Referring to fig. 1, the micro display screen 100 includes: the display device comprises a driving chip 101 and a micro display chip 102, wherein the driving chip 101 and the micro display chip 102 are connected through bus communication.

The Micro display screen 100 may be a Silicon-based Liquid Crystal (LCoS), an Organic Light-Emitting Diode (OLED), a Micro Light-Emitting Diode (Micro LED), or a Quantum Dot Light-Emitting Diode (Q-LED), and may be a display device installed on an AR or VR or MR eyeglass lens, and is particularly suitable for the field of Micro display AR or VR or MR, where the requirement for gray scale depth is high.

As shown in fig. 1, the driver chip 101 is configured to obtain and process video source data to be played, and the driver chip 101 may support, but is not limited to, an RGB888 interface, an MIPI interface, an HDMI interface, and a VGA interface.

Optionally, the driver chip 101 and the micro display chip 102 support, but are not limited to, video sources with 1920 × 1080 and 1280 × 720 resolutions, and support, but are not limited to, video sources with 10bit depth.

In this embodiment, the driver chip 101 and the micro display chip 102 perform information interaction through a bus, the video data display processing method provided by the present application is integrated in the driver chip 101, the driver chip 101 executes the video data display processing method provided by the present application to obtain processed video data, and sends the processed video data to the micro display chip 102, and the micro display chip 102 displays the processed video data; the video data display processing method provided by the present application may also be integrated into the micro display chip 102, and the micro display chip 102 executes the video data display processing method provided by the present application. That is, executable machine readable instructions may be stored on the driving chip 101 or the micro display chip 102, and when the micro display screen 100 runs, the driving chip 101 or the micro display chip 102 may be configured to execute the machine readable instructions to execute the video data display processing method provided in the following embodiments, so as to improve the flexibility of executing the video data display processing method provided in this application.

It will be appreciated that the configuration shown in FIG. 1 is merely illustrative and that micro-display 100 may also include more or fewer components than shown in FIG. 1 or have a different configuration than shown in FIG. 1. The components shown in fig. 1 may be implemented in hardware, software, or a combination thereof.

The structure of the driving chip 101 or the micro display chip 102 in fig. 1 for performing the video data display processing method provided in the present application is briefly explained as follows.

In this embodiment, the driving chip 101 and the micro display chip 102 may have the same structure, and the driving chip 101 is taken as an example for description.

As shown in fig. 2, the driving chip 101 includes a memory 201 and a processor 202. Wherein, the memory 201 and the processor 202 are electrically connected to each other directly or indirectly to realize data transmission or interaction. For example, the components may be electrically connected to each other via one or more communication buses or signal lines.

The memory 201 stores software functional modules stored in the memory 201 in the form of software or firmware (firmware), and the processor 202 executes various functional applications and data processing by running the software programs and modules stored in the memory 201, that is, implements the video data display processing method in the embodiment of the present application.

The Memory 201 may be, but is not limited to, a Random Access Memory (RAM), a Read Only Memory (ROM), a Programmable Read-Only Memory (PROM), an Erasable Read-Only Memory (EPROM), and the like. The memory 201 is used for storing a program, and the processor 202 executes the program after receiving an execution instruction.

The processor 202 may be an integrated circuit chip having signal processing capabilities. The Processor 202 may be a general-purpose Processor including a Central Processing Unit (CPU), a Network Processor (NP), and the like.

The following will explain the implementation principle of the steps of the video data display processing method provided by the present application and the beneficial effects produced by the steps through a plurality of specific embodiments.

Fig. 3 is a schematic flowchart of a video data display processing method according to an embodiment of the present application; alternatively, the main body of the method may be the driving chip 101 or the micro display chip 102 shown in fig. 1.

It should be understood that in other embodiments, the order of some steps in the video data display processing method may be interchanged according to actual needs, or some steps may be omitted or deleted. As shown in fig. 3, the method includes:

s301, video source data to be displayed are obtained.

And the gray scale depth of the video source data to be displayed is greater than or equal to the gray scale depth of the original video source supported by the micro display screen.

It should be understood that the gray scale refers to a point on a display screen, i.e., a pixel, which is visible to the naked eye of a human, and is composed of three primary colors of red, green, and blue (RGB). The light source behind it can exhibit different brightness levels for each primary color. The gray scale represents the gradation level with different brightness from the darkest to the brightest, namely the change level of each color of three primary colors in the process of continuously darkening from pure color (such as pure red) to black is divided into the gray scale of the color and is represented by a number, namely the most common color storage principle, and the more the intermediate levels are, the more exquisite the picture effect can be presented. For example, an 8-bit video source may also be referred to as a 2 ⁸ The video source of 10bit with the gray scale of =256 can also be called 2 ¹⁰ =1024 gray scale.

For example, for each color component gray scale depth d of the original video source supported by the micro display screen, the depth of each color component gray scale of the video source to be displayed is m, that is, the error of the two gray scale depths is e = m-d; wherein d, m and e are positive integers, and d is less than or equal to m. For example, the gray scale depth of the original video source supported and displayed by the micro display screen is 8 bits, and the gray scale depth of the video source to be displayed is 10 bits, that is, the error between the gray scale depths of the original video source and the video source to be displayed supported and displayed by the micro display screen is 2 bits.

Generally, in order to solve the problem that the gray scale depth is inconsistent between an original video source supported by the micro display screen and a video source to be displayed, the micro display screen with low gray scale depth cannot display the video source with high gray scale depth. In this embodiment, it is proposed that a video source with a high gray scale depth to be displayed may be subjected to gray scale mapping processing to obtain video data supported by a micro display screen with a low gray scale depth. The details will be described in detail by the following steps.

Optionally, if the acquired interface format of the video source data to be displayed is not supported by the micro display screen, the interface format conversion of the video source data to be displayed needs to be performed to convert the video source data to be displayed into a video format supported by the micro display screen, for example, to convert the HDMI into an RGB format.

S302, determining a target gray scale precision regulation and control strategy according to the display type of the micro display screen.

The display type of the micro display screen is a display mode of the micro display screen for the video source data to be displayed. Illustratively, for example, the display types of the micro display L1 include: spatial color and temporal color.

It should be understood that, the display types of the micro display screens are different, and the gray scale precision regulation and control strategies adopted by the micro display screens are also different. Therefore, in this embodiment, the gray scale precision adjustment and control strategy corresponding to the video source data to be displayed can be further determined by combining the display type of the micro display screen.

And S303, performing gray scale error mapping processing on the video source data to be displayed by using a target gray scale precision regulation and control strategy to obtain the processed video source data.

And S304, displaying the processed video source data on a micro display screen.

And the gray scale depth of the processed video source data is the same as the gray scale depth supported by the micro display screen.

In this embodiment, if the display type of the micro display screen L1 is a spatial color, a gray scale precision adjustment and control strategy corresponding to the spatial color is used to perform gray scale error mapping processing on video source data to be displayed, that is, to perform reasonable mapping or error transmission on detail errors between the gray scale depth of the video source to be displayed and the gray scale depth supportable by the micro display screen, so as to make up for the loss of details, and map the video source data with a high gray scale depth to the micro display screen with a low gray scale depth for display. Therefore, the purpose of displaying the video source with high gray scale depth by the micro display screen with low gray scale depth can be achieved without additionally increasing the power consumption and the size of the micro display screen, higher gray scale depth visual perception is obtained, the display effect of the micro display screen superior to that of the micro display screen with low gray scale depth is obtained, the micro display screen is particularly suitable for application scenes with higher requirements on the power consumption and the size of the micro display screen and the display gray scale depth, and the problem that the micro display screen with low gray scale depth cannot display the video source with high gray scale depth in the prior art is solved.

In summary, in the present disclosure, when a micro display screen supporting a low grayscale depth needs to display a video source with a high grayscale depth, a grayscale precision control strategy corresponding to a display type of the micro display screen may be used to perform grayscale error mapping processing on the video source data with the high grayscale depth, that is, a detail error between the grayscale depth of the video source with the high grayscale depth and the low grayscale depth supportable by the micro display screen is reasonably mapped or error-transferred, so as to achieve the purpose of compensating for the lack of detail, obtain video data consistent with the low grayscale depth supported by the micro display screen, and achieve the purpose of mapping the video source data with the high grayscale depth to the micro display screen with the low grayscale depth for display. Therefore, the purpose of displaying the video source with high gray scale depth by using the micro display screen with low gray scale depth can be achieved without additionally increasing the power consumption and the size of the micro display screen, so as to obtain higher gray scale depth visual perception, obtain the display effect superior to the self display effect of the micro display screen with low gray scale depth, be particularly suitable for application scenes with higher requirements on the power consumption and the size of the micro display screen and higher requirements on the display gray scale depth, and solve the problem that the micro display screen with low gray scale depth in the prior art cannot display the video source with high gray scale depth.

How to determine the gray scale precision control strategy will be explained in detail by the following embodiments.

First, when the display type of the micro display screen is spatial color, the following is specific:

optionally, the step S302 of determining the target gray scale precision adjusting and controlling manner according to the display type of the micro display screen includes:

in this embodiment, if the display type of the microdisplay is spatial color, the target grayscale accuracy adjusting and controlling policy may be determined as a grayscale error mapping policy between corresponding color sub-pixels on adjacent resolution pixels.

The following embodiment specifically explains how to use the target grayscale accuracy control strategy in step S303 to perform grayscale error mapping on video source data to be displayed, so as to obtain processed video source data.

Optionally, referring to fig. 4, the video source data to be displayed is traversed, and for a traversed current pixel, the following steps are respectively performed:

s401, obtaining preset configuration parameters and a pixel value of a current pixel.

Wherein, the configuration parameters comprise: pixel structure, number of mapped pixels, location of each error mapped pixel, and threshold.

S402, acquiring a pixel value of each error mapping pixel according to the pixel structure, the number of the error mapping pixels and the position of each error mapping pixel.

Illustratively, the spatial color-supported pixel structure includes: a field-shaped pixel structure, a strip-shaped pixel structure, a delta-shaped pixel structure and an L-shaped pixel structure.

The threshold Q is a critical determination value in which two pixels are edge pixels.

For example, in performing gray scale error mapping, the selected pixels are pixels of adjacent resolution, the selected pixel structure is a field-shaped pixel structure, and the current pixel P is ₀ (x, y) the number of error map pixels is 3, and the position of each error map pixel is right, lower, and rightCorresponding color component of the lower 3 pixels, i.e. P ₁ （x，y+1）、P ₂ （x+1，y）、P ₃ (x +1, y + 1), then P can be read separately ₁ （x，y+1）、P ₂ （x+1，y）、P ₃ (x +1, y + 1) the three errors map the pixel values of the pixels. For example, the current pixel P ₀ (x, y) has a pixel value of

Current pixel P ₀ The error mapped pixel of (x, y) has a pixel value of

Wherein t is less than or equal to L. Wherein the content of the first and second substances,

is P ₁ A pixel value of (x, y + 1),

is P ₂ (x +1, y) pixel value,

is P ₃ (x +1, y + 1).

S403, whether the absolute value of the difference value between the pixel value of the current pixel and the pixel value of each error mapping pixel is larger than a threshold value or not is determined.

S404, if not, determining the weight value of each error mapping pixel according to the pixel value of the current pixel and the absolute value of the difference value between each error mapping pixel.

Alternatively, the weight value of each error mapped pixel may also be a preconfigured value, such as P ₁ （x，y+1）、P ₂ （x+1，y）、P ₃ The weight values of (x +1, y + 1) are 3/8, 3/8 and 2/8 respectively. In this embodiment, in order to improve the accuracy of the gray scale error mapping process, an automatic weight ratio updating method is adopted.

S405, determining a display pixel value of the current pixel according to the pixel value of the current pixel, the pixel value of each error mapping pixel and the weight value of each error mapping pixel.

In this embodiment, to determine whether there is an edge between the current pixel and its error mapped pixel, it is proposed that the pixel value of the current pixel may be compared with the pixel values of the error mapped pixels. If the absolute value of the difference between the pixel value of the current pixel and the pixel value of one error mapping pixel is less than or equal to the threshold value Q, that is

If the difference is not greater than the threshold Q, it can be determined that there is a continuous transition gray level between the current pixel and each of the pixels, and the position and number of each of the error-mapped pixels remain unchanged. Thus, the weight value of each error mapped pixel may be determined based on the pixel value of the current pixel and the absolute value of the difference between each error mapped pixel.

Specifically, the absolute value of the difference between the pixel value of the current pixel and each error mapped pixel is summed, i.e.

(ii) a Then, the sequence is ordered from large to small, assuming,

is greater than

Is greater than

Then, the weight value of each error mapped pixel may be determined as follows:

the right error mapped pixel P1 (x, y + 1) has a weight value of

；

The lower error mapped pixel P2 (x +1, y) has a weight value of

；

The weighted value of the lower right error mapped pixel P3 (x +1, y + 1) is

。

Therefore, the display pixel value of the current pixel can be calculated by combining the pixel value of the current pixel, the pixel value of each error mapping pixel and the weight value of each error mapping pixel. And the display pixel value of the current pixel is the pixel value of the current pixel finally displayed on the micro display screen.

It should be noted that after traversing and processing each pixel point in the video source data to be displayed to obtain the display pixel value of each pixel point, the display pixel value of each pixel point may be cached according to a certain pixel structure to obtain the processed video source data.

In another way, for example, if the absolute value of the difference between the pixel value of the current pixel and the pixel value of one of the error mapped pixels is greater than a threshold value, that is, the difference is smaller than the threshold value

>And determining that an edge exists between the current pixel and the error mapped pixel by using the threshold value Q, wherein the position and the number of the error mapped pixel need to be updated at the moment so as to eliminate the error mapped pixel of the original edge. Assume that the error-mapped pixel P on the right is excluded from the location ₁ (x, y + 1), the remaining error mapped pixels may then be summed, i.e., summed

And sorting according to the sequence from big to small. It is assumed that,

is greater than

Then the weight value of lower right error mapped pixel P3 (x +1, y + 1) may be determined as

And the weight value of the lower error mapped pixel P2 (x +1, y) is

。

in the step S402, obtaining the pixel value of each error mapping pixel according to the pixel structure, the number of error mapping pixels, and the position of each error mapping pixel includes:

IN the present embodiment, with 1920 × 1080 resolution, the video source data to be displayed is 10bit gray scale depth, using IN ₁₀ Showing that the pixel structure is a Chinese character 'tian' shaped pixel structure, and the pixel structure is displayed on a spatial color micro-display screen with 8-bit gray scale depth for illustration, and is indicated by OUT ₈ And (4) showing.

The spatial color screen comprises a resolution pixel point and a pixel structure, wherein the resolution pixel point of the spatial color screen comprises 4 sub-pixels of a red component R, a green component G, a blue component B and a W component in a field-shaped row pixel structure, the W sub-pixel is obtained by calculating the three sub-pixels of the red component R, the green component G and the blue component B, namely W = n 1R + n 2G + n 3B, and n1+ n2+ n3=1.

In the present embodiment, the corresponding red color component, green component, blue component, and W component of the pixel on the right of the current pixel, the corresponding red color component, green component, blue component, and W component of the pixel below the current pixel, and the corresponding red color component, green component, blue component, and W component of the pixel below and to the right of the current pixel may be acquired.

Wherein the mapping error _Δ R is IN ₁₀ Red component of (2) bit lower, mapping error _Δ G is IN ₁₀ Green component of (2) bit less, mapping error _Δ B is IN ₁₀ Blue component of (2) bit less, mapping error _Δ W is IN ₁₀ The W component of (a) is 2 bits lower.

Referring to FIG. 5, it is a diagram showing the mapping relationship of the sub-pixel R in the field-word-line pixel structure, where R is _ij The pixel array is characterized by representing red component sub-pixels in a frame of picture, i represents a line number, j represents a column number, the value range of i is 0 to 1079, and the value range of j is 0 to 1919.

In FIG. 5, R is a square column of pixels with 3 rows and 4 columns ₀₀ Error mapped pixel of R ₀₁ 、R ₁₀ 、R ₁₁ This is three pixels, at R ₀₁ Thereon is provided with 3 _Δ R ₀₀ Embodiment of/8 in R ₁₀ Thereon is provided with 3 _Δ R ₀₀ Embodiment of/8, in R ₁₁ Thereon is provided with 2 _Δ R ₀₀ The embodiment of/8, see mapping circle No. 1 in FIG. 5;

R ₀₁ error mapped pixel of R ₀₂ 、R ₁₁ 、R ₁₂ At R ₀₂ Thereon is provided with 3 _Δ R ₀₁ Embodiment of/8, in R ₁₁ Thereon is provided with 3 _Δ R ₀₁ Embodiment of/8, in R ₁₂ Thereon is provided with 2 _Δ R ₀₁ The embodiment of/8 can be seen in the mapping circle No. 2 in FIG. 5;

R ₀₂ error mapped pixel of R ₀₃ 、R ₁₂ 、R ₁₃ At R ₀₃ Thereon is provided with 3 _Δ R ₀₂ Embodiment of/8 in R ₁₂ Thereon is provided with 3 _Δ R ₀₂ Embodiment of/8, in R ₁₃ Thereon is provided with 2 _Δ R ₀₂ Embodiment of/8;

R ₀₃ error mapped pixel of (2) is R ₁₃ At R ₁₃ Thereon is provided with 3 _Δ R ₀₃ The embodiment of/8 is shown in the No. 3 mapping circle in FIG. 5; note that the last column of pixels is different from the other columns of pixels.

R ₁₀ Error mapping ofThe pixel is R ₁₁ 、R ₂₀ 、R ₂₁ At R ₁₁ Thereon is provided with 3 _Δ R ₁₀ Embodiment of/8, in R ₂₀ Thereon is provided with 3 _Δ R ₁₀ Embodiment of/8 in R ₂₁ Thereon is provided with 2 _Δ R ₁₀ The embodiment of/8, see mapping circle No. 4 in FIG. 5;

R ₁₁ error mapped pixel of (2) is R ₁₂ 、R ₂₁ 、R ₂₂ At R ₁₂ Thereon is provided with 3 _Δ R ₁₁ Embodiment of/8, in R ₂₁ Thereon is provided with 3 _Δ R ₁₁ Embodiment of/8, in R ₂₂ Thereon is provided with 2 _Δ R ₁₁ The embodiment of/8, see mapping circle No. 5 in FIG. 5;

R ₁₂ error mapped pixel of (2) is R ₁₃ 、R ₂₂ 、R ₂₃ At R ₁₃ Thereon is provided with 3 _Δ R ₁₂ Embodiment of/8, in R ₂₂ Thereon is provided with 3 _Δ R ₁₂ Embodiment of/8, in R ₂₃ Thereon is provided with 2 _Δ R ₁₂ The embodiment of/8;

R ₁₃ error mapped pixel of R ₂₃ At R ₂₃ Thereon is provided with 3 _Δ R ₁₃ The embodiment of/8, see mapping circle No. 6 in FIG. 5; note that the last column of pixels is different from the other columns of pixels.

R ₂₀ Error mapped pixel of R ₂₁ At R ₂₁ Thereon is provided with 3 _Δ R ₂₀ The embodiment of/8 is shown in the No. 4 mapping circle in FIG. 5;

R ₂₁ error mapped pixel of R ₂₂ At R ₂₂ Thereon is provided with 3 _Δ R ₂₁ The embodiment of/8 is shown in the No. 5 mapping circle in FIG. 5;

R ₂₂ error mapped pixel of R ₂₃ At R ₂₃ Thereon is provided with 3 _Δ R ₂₂ The embodiment of/8; r ₂₃ No error mapped pixels; see mapping circle No. 6 in fig. 5; note that the last row of pixels is different from the other rows of pixels;

referring to FIG. 6, it is a diagram showing the mapping relationship of the sub-pixel G in the field-line pixel structure, G ₀₀ Error mapped pixel of G ₀₁ 、G ₁₀ 、G ₁₁ At G ₀₁ Thereon is provided with 3 _Δ G ₀₀ /8 embodiment in G ₁₀ Thereon is provided with 3 _Δ G ₀₀ /8 embodiment in G ₁₁ Thereon is provided with 2 _Δ G ₀₀ The embodiment of/8, see mapping circle No. 1 in FIG. 6;

G ₀₁ error mapped pixel of G ₀₂ 、G ₁₁ 、G ₁₂ At G ₀₂ Thereon is provided with 3 _Δ G ₀₁ /8 embodiment in G ₁₁ Thereon is provided with 3 _Δ G ₀₁ /8 embodiment in G ₁₂ Thereon is provided with 2 _Δ G ₀₁ The embodiment of/8 is shown in the No. 2 mapping circle in FIG. 6;

G ₀₂ error mapped pixel of G ₀₃ ，G ₁₂ 、G ₁₃ At G ₀₃ Thereon is provided with 3 _Δ G ₀₂ /8 embodiment in G ₁₂ Thereon is provided with 3 _Δ G ₀₂ /8 embodiment in G ₁₃ Thereon is provided with 2 _Δ G ₀₂ The embodiment of/8;

G ₀₃ error mapped pixel of G ₁₃ At G ₁₃ Thereon is provided with 3 _Δ G ₀₃ The embodiment of/8, see mapping circle No. 3 in FIG. 6;

G ₁₀ error mapped pixel of G ₁₁ 、G ₂₀ 、G ₂₁ In G ₁₁ Thereon is provided with 3 _Δ G ₁₀ /8 embodiment in G ₂₀ Thereon is provided with 3 _Δ G ₁₀ /8 embodiment in G ₂₁ Thereon is provided with 2 _Δ G ₁₀ The embodiment of/8, see mapping circle No. 4 in FIG. 6;

G ₁₁ error mapped pixel of G ₁₂ 、G ₂₁ 、G ₂₂ At G ₁₂ Thereon is provided with 3 _Δ G ₁₁ /8 embodiment in G ₂₁ Thereon is provided with 3 _Δ G ₁₁ /8 embodiment in G ₂₂ Thereon is provided with 2 _Δ G ₁₁ The embodiment of/8, see mapping circle No. 5 in FIG. 6;

G ₁₂ error mapped pixel of G ₁₃ 、G ₂₂ 、G ₂₃ At G ₁₃ Thereon is provided with 3 _Δ G ₁₂ /8 embodiment in G ₂₂ Thereon is provided with 3 _Δ G ₁₂ /8 embodiment in G ₂₃ Thereon is provided with 2 _Δ G ₁₂ The embodiment of/8; g ₁₃ Error mapped pixel of G ₂₃ At G ₂₃ Thereon is provided with 3 _Δ G ₁₃ The embodiment of/8 is shown in the No. 6 mapping circle in FIG. 6;

G ₂₀ error mapped pixel of G ₂₁ At G ₂₁ Thereon is provided with 3 _Δ G ₂₀ The embodiment of/8, see mapping circle No. 4 in FIG. 6;

G ₂₁ error mapped pixel of G ₂₂ At G ₂₂ Thereon is provided with 3 _Δ G ₂₁ The embodiment of/8, see mapping circle No. 5 in FIG. 6;

G ₂₂ error mapped pixel of G ₂₃ At G ₂₃ Thereon is provided with 3 _Δ G ₂₂ Embodiment of/8, G ₂₃ No error mapped pixels; see mapping circle No. 6 in fig. 6;

fig. 7 is a diagram showing a mapping relationship of the sub-pixel B in the field-word line pixel structure.

Wherein, B ₀₀ Error mapped pixel of B ₀₁ 、B ₁₀ 、B ₁₁ In B ₀₁ Thereon is provided with 3 _Δ B ₀₀ Embodiment of/8, in B ₁₀ Thereon is provided with 3 _Δ B ₀₀ Embodiment of/8, in B ₁₁ Thereon is provided with 2 _Δ B ₀₀ The embodiment of/8, see mapping circle No. 1 in FIG. 7;

B ₀₁ error mapped pixel of B ₀₂ 、B ₁₁ 、B ₁₂ In B ₀₂ Thereon is provided with 3 _Δ B ₀₁ Embodiment of/8, in B ₁₁ Thereon is provided with 3 _Δ B ₀₁ Embodiment of/8, in B ₁₂ Thereon is provided with 2 _Δ B ₀₁ The embodiment of/8 is shown in the No. 2 mapping circle in FIG. 7;

B ₀₂ error mapped pixel of (A) is B ₀₃ 、B ₁₂ 、B ₁₃ At B, in ₀₃ Thereon is provided with 3 _Δ B ₀₂ Embodiment of/8, in B ₁₂ Thereon is provided with 3 _Δ B ₀₂ Embodiment of/8, in B ₁₃ Thereon is provided with 2 _Δ B ₀₂ The embodiment of/8; b ₀₃ Error mapped pixel of B ₁₃ At B, in ₁₃ Thereon is provided with 3 _Δ B ₀₃ The embodiment of/8, see mapping circle No. 3 in FIG. 7;

B ₁₀ error mapped pixel of (A) is B ₁₁ 、B ₂₀ 、B ₂₁ In B ₁₁ Thereon is provided with 3 _Δ B ₁₀ Embodiment of/8, in B ₂₀ Thereon is provided with 3 _Δ B ₁₀ Embodiment of/8, in B ₂₁ Thereon is provided with 2 _Δ B ₁₀ The embodiment of/8 is shown in the No. 4 mapping circle in FIG. 7;

B ₁₁ error mapped pixel of B ₁₂ 、B ₂₁ 、B ₂₂ In B ₁₂ Thereon is provided with 3 _Δ B ₁₁ Embodiment of/8, in B ₂₁ Thereon is provided with 3 _Δ B ₁₁ Embodiment of/8, in B ₂₂ Thereon is provided with 2 _Δ B ₁₁ The embodiment of/8, see mapping circle No. 5 in FIG. 7;

B ₁₂ error mapped pixel of B ₁₃ 、B ₂₂ 、B ₂₃ At B, in ₁₃ Thereon is provided with 3 _Δ B ₁₂ Embodiment of/8, in B ₂₂ Thereon is provided with 3 _Δ B ₁₂ Embodiment of/8, in B ₂₃ Thereon is provided with 2 _Δ B ₁₂ The embodiment of/8; b is ₁₃ Error mapped pixel of (A) is B ₂₃ At B, in ₂₃ Thereon is provided with 3 _Δ B ₁₃ The embodiment of/8 is shown in the No. 6 mapping circle in FIG. 7;

B ₂₀ error mapped pixel of (A) is B ₂₁ In B ₂₁ Thereon is provided with 3 _Δ B ₂₀ The embodiment of/8, see mapping circle No. 4 in FIG. 7;

B ₂₁ error mapped pixel of B ₂₂ At B, in ₂₂ Thereon is provided with 3 _Δ B ₂₁ The embodiment of/8, see the mapping circle No. 5 in the figure;

B ₂₂ error mapped pixel of B ₂₃ In B ₂₃ Thereon is provided with 3 _Δ B ₂₂ The embodiment of/8; b is ₂₃ No error mapped pixels; see mapping circle No. 6 in fig. 7;

fig. 8 shows a mapping relationship diagram of the sub-pixel W in the field-word line pixel structure.

Wherein, W ₀₀ Error mapped pixel of W ₀₁ 、W ₁₀ 、W ₁₁ At W ₀₁ Thereon is provided with 3 _Δ W ₀₀ /8 is embodied inW ₁₀ Thereon is provided with 3 _Δ W ₀₀ Embodiment of/8 is as in W ₁₁ Thereon is provided with 2 _Δ W ₀₀ The embodiment of/8 is shown in the No. 1 mapping circle in FIG. 8;

W ₀₁ error mapped pixel of (2) as W ₀₂ 、W ₁₁ 、W ₁₂ In W ₀₂ Thereon is provided with 3 _Δ W ₀₁ Embodiment of/8, in W ₁₁ Thereon is provided with 3 _Δ W ₀₁ Embodiment of/8 is as in W ₁₂ Thereon is provided with 2 _Δ W ₀₁ The embodiment of/8, see mapping circle No. 2 in FIG. 8;

W ₀₂ error mapped pixel of W ₀₃ 、W ₁₂ 、W ₁₃ In W ₀₃ Thereon is provided with 3 _Δ W ₀₂ Embodiment of/8, in W ₁₂ Thereon is provided with 3 _Δ W ₀₂ Embodiment of/8, in W ₁₃ Thereon is provided with 2 _Δ W ₀₂ The embodiment of/8; w is a group of ₀₃ Error mapped pixel of W ₁₃ In W ₁₃ Thereon is provided with 3 _Δ W ₀₃ The embodiment of/8, see mapping circle No. 3 in FIG. 8;

W ₁₀ error mapped pixel of W ₁₁ 、W ₂₀ 、W ₂₁ In W ₁₁ Thereon is provided with 3 _Δ W ₁₀ Embodiment of/8, in W ₂₀ Thereon is provided with 3 _Δ W ₁₀ Embodiment of/8 is as in W ₂₁ Thereon is provided with 2 _Δ W ₁₀ The embodiment of/8, see mapping circle No. 4 in FIG. 8;

W ₁₁ error mapped pixel of W ₁₂ 、W ₂₁ 、W ₂₂ In W ₁₂ Thereon is provided with 3 _Δ W ₁₁ Embodiment of/8 is as in W ₂₁ Thereon is provided with 3 _Δ W ₁₁ Embodiment of/8, in W ₂₂ Thereon is provided with 2 _Δ W ₁₁ The embodiment of/8, see mapping circle No. 5 in FIG. 8;

W ₁₂ error mapped pixel of W ₁₃ 、W ₂₂ 、W ₂₃ In W ₁₃ Thereon is provided with 3 _Δ W ₁₂ Embodiment of/8, in W ₂₂ Thereon is provided with 3 _Δ W ₁₂ Embodiment of/8, in W ₂₃ Thereon is provided with 2 _Δ W ₁₂ Embodiment of/8; w is a group of ₁₃ Error mapped pixel of W ₂₃ In W ₂₃ Thereon is provided with 3 _Δ W ₁₃ The embodiment of/8, see mapping circle No. 6 in FIG. 8;

W ₂₀ error mapped pixel of (2) as W ₂₁ In W ₂₁ Thereon is provided with 3 _Δ W ₂₀ The embodiment of/8, see the mapping circle No. 4 in the figure; see mapping circle No. 4 in fig. 8;

W ₂₁ error mapped pixel of (2) as W ₂₂ In W ₂₂ Thereon is provided with 3 _Δ W ₂₁ The embodiment of/8, see mapping circle No. 5 in FIG. 8;

W ₂₂ error mapped pixel of (2) as W ₂₃ At W ₂₃ Thereon is provided with 3 _Δ W ₂₂ The embodiment of/8; w is a group of ₂₃ No error mapped pixels; see mapping circle No. 6 in fig. 8;

referring to fig. 9, a complete relationship diagram for mapping the field-word line pixel structure is shown.

Wherein, in the order of RGBW, P ₀₀ Shown as [ R ] ₀₀ ,G ₀₀ ,B ₀₀ ,W ₀₀ ]；

P ₀₁ Shown as [ R ] ₀₁ +3 _Δ R ₀₀ /8,G ₀₁ +3 _Δ G ₀₀ /8,B ₀₁ +3 _Δ B ₀₀ /8,W ₀₁ +3 _Δ W ₀₀ /8]；

P ₀₂ Shown as [ R ] ₀₂ +3 _Δ R ₀₁ /8,G ₀₂ +3 _Δ G ₀₁ /8,B ₀₂ +3 _Δ B ₀₁ /8,W ₀₂ +3 _Δ W ₀₁ /8]；

P ₀₃ Shown as [ R ] ₀₃ +3 _Δ R ₀₂ /8,G ₀₃ +3 _Δ G ₀₂ /8,B ₀₃ +3 _Δ B ₀₂ /8,W ₀₃ +3 _Δ W ₀₂ /8]；

P ₁₀ Is shown as [ R ] ₁₀ +3 _Δ R ₀₀ /8,G ₁₀ +3 _Δ G ₀₀ /8,B ₁₀ +3 _Δ B ₀₀ /8,W ₁₀ +3 _Δ W ₀₀ /8]；

P ₁₁ Shown as [ R ] ₁₁ +2 _Δ R ₀₀ /8+3 _Δ R ₀₁ /8+3 _Δ R ₁₀ /8，G ₁₁ +2 _Δ G ₀₀ /8+3 _Δ G ₀₁ /8+3 _Δ G ₁₀ /8，B ₁₁ +2 _Δ B ₀₀ /8+3 _Δ B ₀₁ /8+3 _Δ B ₁₀ /8，W ₁₁ +2 _Δ W ₀₀ /8+3 _Δ W ₀₁ /8+3 _Δ W ₁₀ /8]；

P ₁₂ Shown as [ R ] ₁₂ +2 _Δ R ₀₁ /8+3 _Δ R ₀₂ /8+3 _Δ R ₁₁ /8，G ₁₂ +2 _Δ G ₀₁ /8+3 _Δ G ₀₂ /8+3 _Δ G ₁₁ /8，B ₁₂ +2 _Δ B ₀₁ /8+3 _Δ B ₀₂ /8+3 _Δ B ₁₁ /8，W ₁₂ +2 _Δ W ₀₁ /8+3 _Δ W ₀₂ /8+3 _Δ W ₁₁ /8]；

P ₁₃ Shown as [ R ] ₁₃ +2 _Δ R ₀₂ /8+3 _Δ R ₀₃ /8+3 _Δ R ₁₂ /8，G ₁₃ +2 _Δ G ₀₂ /8+3 _Δ G ₀₃ /8+3 _Δ G ₁₂ /8，B ₁₃ +2 _Δ B ₀₂ /8+3 _Δ B ₀₃ /8+3 _Δ B ₁₂ /8，W ₁₃ +2 _Δ W ₀₂ /8+3 _Δ W ₀₃ /8+3 _Δ W ₁₂ /8]；

P ₂₀ Shown as [ R ] ₂₀ +3 _Δ R ₁₀ /8,G ₂₀ +3 _Δ G ₁₀ /8,B ₂₀ +3 _Δ B ₁₀ /8,W ₂₀ +3 _Δ W ₁₀ /8]；

P ₂₁ Is shown as [ R ] ₂₁ +2 _Δ R ₁₀ /8+3 _Δ R ₁₁ /8+3 _Δ R ₂₀ /8，G ₂₁ +2 _Δ G ₁₀ /8+3 _Δ G ₁₁ /8+3 _Δ G ₂₀ /8，B ₂₁ +2 _Δ B ₁₀ /8+3 _Δ B ₁₁ /8+3 _Δ B ₂₀ /8，W ₂₁ +2 _Δ W ₁₀ /8+3 _Δ W ₁₁ /8+3 _Δ W ₂₀ /8]；

P ₂₂ Shown as [ R ] ₂₂ +2 _Δ R ₁₁ /8+3 _Δ R ₁₂ /8+3 _Δ R ₂₁ /8，G ₂₂ +2 _Δ G ₁₁ /8+3 _Δ G ₁₂ /8+3 _Δ G ₂₁ /8，B ₂₂ +2 _Δ B ₁₁ /8+3 _Δ B ₁₂ /8+3 _Δ B ₂₁ /8，W ₂₂ +2 _Δ W ₁₁ /8+3 _Δ W ₁₂ /8+3 _Δ W ₂₁ /8]；

P ₂₃ Shown as [ R ] ₂₃ +2 _Δ R ₁₂ /8+3 _Δ R ₁₃ /8+3 _Δ R ₂₂ /8，G ₂₃ +2 _Δ G ₁₂ /8+3 _Δ G ₁₃ /8+3 _Δ G ₂₂ /8，B ₂₃ +2 _Δ B ₁₂ /8+3 _Δ B ₁₃ /8+3 _Δ B ₂₂ /8，W ₂₃ +2 _Δ W ₁₂ /8+3 _Δ W ₁₃ /8+3 _Δ W ₂₂ /8]。

Secondly, when the display type of the micro display screen is time sequence color, the following is specific:

optionally, the step S302 of determining a target gray scale precision adjusting and controlling manner according to the display type of the micro display screen includes:

in this embodiment, if the display type of the microdisplay is sequential color, the target grayscale accuracy adjusting and controlling strategy can be determined as the grayscale error mapping strategy of the adjacent physical pixels.

Alternatively, referring to fig. 10, the step S303 includes:

traversing video source data to be displayed, and respectively executing the following steps aiming at the traversed current pixel:

s1001, acquiring preset configuration parameters and a pixel value of a current pixel.

Wherein, the configuration parameters include: the number of error mapped pixels, the location of each error mapped pixel, and the weight value of each error mapped pixel. Illustratively, for example, the number of error mapped pixels is 3, the positions of the error mapped pixels are right, below and right-below the current pixel, and the weight value of the right error mapped pixel, the weight value of the below error mapped pixel and the weight value of the right-below error mapped pixel may be 3/8, 3/8 and 2/8, respectively, that is, the sum of the weight values of the error mapped pixels is 1.

In another implementation manner, the weight value of each error mapped pixel may also be automatically updated, that is, the weight value of each error mapped pixel is determined according to the absolute value of the difference between the pixel value of the current pixel and each error mapped pixel, and the specific calculation process is the step S404 mentioned in the above embodiment, which is not described in detail herein again.

S1002, acquiring a pixel value of each error mapping pixel according to the number of the error mapping pixels and the position of each error mapping pixel.

And S1003, determining the display pixel value of the current pixel according to the pixel value of the current pixel, the pixel value of each error mapping pixel and the weight value of each error mapping pixel.

In the present embodiment, for example, the current pixel is P ₀ (x, y) the error-mapped pixel is 3 pixels such as right, lower, and lower right, i.e., P ₁ (x,y+1)、P ₂ (x+1,y)、P ₃ (x +1, y + 1), that is, the pixel values of the 3 error mapped pixels can be obtained according to the positions of the error mapped pixels, and then the display pixel value of the current pixel can be determined according to the pixel value of the current pixel, the pixel value of each error mapped pixel and the weight value of each error mapped pixel.

For example, a 1920 × 1080 resolution, 10bit gray scale depth video source is shown on a 8bit gray scale depth time sequential color display screen for example.

Referring to FIG. 11, 9 rows 16 columns are illustrated, where P _00, Error mapped pixel of P ₀₁ 、P ₁₀ 、P ₁₁ At P ₀₁ Thereon is provided with 3 _Δ P ₀₀ Embodiment of/8, in P ₁₀ Thereon is provided with 3 _Δ P ₀₀ Embodiment of/8, in P ₁₁ Thereon is provided with 2 _Δ P ₀₀ The embodiment of/8;

P ₀₁ error mapped pixel of P ₀₂ 、P ₁₁ 、P ₁₂ At P ₀₂ Thereon is provided with 3 _Δ P ₀₁ Embodiment of/8, in P ₁₁ Thereon is provided with 3 _Δ P ₀₁ Embodiment of/8, in P ₁₂ Thereon is provided with 2 _Δ P ₀₁ Embodiment of/8;

P ₀₂ error mapped pixel of (2) is P ₀₃ 、P ₁₂ 、P ₁₃ At P ₀₃ Thereon is provided with 3 _Δ P ₀₂ Embodiment of/8, in P ₁₂ Thereon is provided with 3 _Δ P ₀₂ Embodiment of/8, in P ₁₃ Thereon is provided with 2 _Δ P ₀₂ Embodiment of/8; by analogy with one another, P ₀₁₅ Error mapped pixel of P ₁₁₅ At P ₁₁₅ Thereon is provided with 3 _Δ P ₀₁₅ Embodiment of/8;

P ₁₀ error mapped pixel of P ₁₁ 、P ₂₀ 、P ₂₁ At P ₁₁ Thereon is provided with 3 _Δ P ₁₀ Embodiment of/8 is as in P ₂₀ Thereon is provided with 3 _Δ P ₁₀ Embodiment of/8, in P ₂₁ Thereon is provided with 2 _Δ P ₁₀ The embodiment of/8;

P ₁₁ error mapped pixel of (2) is P ₁₂ 、P ₂₁ 、P ₂₂ At P ₁₂ Thereon is provided with 3 _Δ P ₁₁ Embodiment of/8 is as in P ₂₁ Thereon is provided with 3 _Δ P ₁₁ Embodiment of/8, in P ₂₂ Thereon is provided with 2 _Δ P ₁₁ The embodiment of/8;

P ₁₂ error mapped pixel of P ₁₃ 、P ₂₂ 、P ₂₃ At P ₁₃ Thereon is provided with 3 _Δ P ₁₂ Embodiment of/8, in P ₂₂ Thereon is provided with 3 _Δ P ₁₂ Embodiment of/8, in P ₂₃ Thereon is provided with 2 _Δ P ₁₂ Embodiment of/8; by analogy with one another, P ₁₁₅ Error mapped pixel of (2) is P ₂₁₅ At P ₂₁₅ Thereon is provided with 3 _Δ P ₁₁₅ The embodiment of/8; and so on;

P ₈₀ error mapped pixel of P ₈₁ At P ₈₁ Thereon is provided with 3 _Δ P ₈₀ The embodiment of/8; p is ₈₁ Error mapped pixel of P ₈₂ At P ₈₂ Thereon is provided with 3 _Δ P ₈₁ The embodiment of/8;

P ₈₂ error mapped pixel of P ₈₃ At P ₈₃ Thereon is provided with 3 _Δ P ₈₂ Embodiment of/8; p ₈₁₅ No error mapped pixels;

the pixel values at the pixels are denoted by V, and the final displayed pixel values are: p ₀₀ Shown as V ₀₀ ，P ₀₁ Shown as V ₀₁ +3 _Δ V ₀₀ /8，P ₀₂ Shown as V ₀₂ +3 _Δ V ₀₁ /8，P ₀₃ Shown as V ₀₃ +3 _Δ V ₀₂ /8, by analogy, P ₀₁₅ Shown as V ₀₁₅ +3 _Δ V ₀₁₄ /8；

P ₁₀ Shown as V ₁₀ +3 _Δ V ₀₀ /8,P ₁₁ Shown as V ₁₁ +2 _Δ V ₀₀ /8+3 _Δ V ₀₁ /8+3 _Δ V ₁₀ /8,P ₁₂ Shown as V ₁₂ +2 _Δ V ₀₁ /8+3 _Δ V ₀₂ /8+3 _Δ

V

₁₁ 8; by analogy with one another, P ₁₁₅ Shown as V ₁₁₅ +2 _Δ V ₀₁₄ /8+3 _Δ V ₀₁₅ /8+3 _Δ V ₁₁₄ And 8, and so on;

P ₈₀ shown as V ₈₀ +3 _Δ R ₇₀ /8，P ₈₁ Shown as V ₈₁ +2 _Δ V ₇₀ /8+3 _Δ V ₇₁ /8+3 _Δ V ₈₀ /8，P ₂₂ Shown as V ₈₂ +2 _Δ V ₇₁ /8+3 _Δ V ₇₂ /8+3 _Δ V ₈₁ /8, inBy analogy, P ₈₁₅ Shown as V ₈₁₅ +2 _Δ V ₇₁₄ /8+3 _Δ V ₇₁₅ /8+3 _Δ V ₈₁₄ /8。

In this embodiment, after the display pixel value of each pixel point on one frame of video image is obtained, the display pixel value of each pixel point may be cached according to a line arrangement manner, so as to obtain processed video source data.

Optionally, the step S304 displays the processed video source data on a micro display screen, and includes:

if the display type of the micro display screen is spatial color, displaying the processed video source data on the micro display screen by using a pixel structure supported by the spatial color, wherein the pixel structure supported by the spatial color comprises: a field-shaped pixel structure, a strip-shaped pixel structure, a delta-shaped pixel structure and an L-shaped pixel structure;

and if the display type of the micro display screen is time sequence color, displaying the processed video source data on the micro display screen by using the time division multiplexing physical pixels.

In this embodiment, if the display type of the micro display screen is spatial color, the processed video source data is output to the micro display screen for display by using the output modes of the field-shaped pixel structure, the strip-shaped pixel structure, the delta-shaped pixel structure, the L-shaped pixel structure, or the like supported by the spatial color; or, if the display type of the micro display screen is time sequence color, outputting the processed video source data to the micro display screen for display in a time division multiplexing physical pixel output mode. Therefore, under the condition that the display frame rate and the clock frequency of the micro display screen are not additionally increased, pixels at different positions and different quantities can be multiplexed according to a certain rule, the display gray scale depth of the whole micro display screen is improved, the power consumption of a micro display chip is reduced, and the area is reduced.

Based on the same inventive concept, the embodiment of the present application further provides a video data display processing apparatus corresponding to the video data display processing method, and since the principle of the apparatus in the embodiment of the present application for solving the problem is similar to that of the video data display processing method in the embodiment of the present application, the implementation of the apparatus may refer to the implementation of the method, and repeated details are omitted.

Referring to fig. 12, an embodiment of the present application further provides a video data display processing apparatus, including:

an obtaining module 1201, configured to obtain video source data to be displayed;

the determining module 1202 is configured to determine a target grayscale precision regulating and controlling strategy according to a display type of the micro display screen;

a processing module 1203, configured to perform gray scale error mapping processing on video source data to be displayed by using a target gray scale precision regulation and control strategy, so as to obtain processed video source data, where a gray scale depth of the processed video source data is the same as a gray scale depth supported by a micro display screen;

and a display module 1204, configured to display the processed video source data on a micro display screen.

Optionally, the determining module 1202 is further configured to:

and if the display type of the micro display screen is space color, determining that the target gray scale precision regulating strategy is a gray scale error mapping strategy between corresponding color sub-pixels on the pixels with the adjacent resolution ratios.

Optionally, the processing module 1203 is further configured to:

acquiring preset configuration parameters and a pixel value of a current pixel, wherein the configuration parameters comprise: the pixel structure, the number of error mapping pixels, the position of each error mapping pixel and a threshold;

determining whether an absolute value of a difference between a pixel value of the current pixel and a pixel value of each error mapped pixel is greater than a threshold;

if not, determining the weight value of each error mapping pixel according to the absolute value of the difference value between the pixel value of the current pixel and each error mapping pixel;

Optionally, the configuration parameters include: the pixel structure is a Chinese character 'tian' shaped pixel structure, the number of error mapping pixels is 3, and the positions of the error mapping pixels are right, below and right-below;

the processing module 1203 is further configured to:

Optionally, the determining module 1202 is further configured to:

and if the display type of the micro display screen is time sequence color, determining that the target gray scale precision regulating strategy is a gray scale error mapping strategy of the adjacent physical pixels.

Optionally, the processing module 1203 is further configured to:

Optionally, the display module 1204 is further configured to:

if the display type of the micro display screen is spatial color, displaying the processed video source data on the micro display screen by using a pixel structure supported by the spatial color, wherein the pixel structure supported by the spatial color comprises: the pixel structure comprises a field-shaped pixel structure, a strip-shaped pixel structure, a delta-shaped pixel structure and an L-shaped pixel structure;

The above-mentioned apparatus is used for executing the method provided by the foregoing embodiment, and the implementation principle and technical effect are similar, which are not described herein again.

These above modules may be one or more integrated circuits configured to implement the above methods, such as: one or more Application Specific Integrated Circuits (ASICs), or one or more microprocessors (DSPs), or one or more Field Programmable Gate Arrays (FPGAs), among others. For another example, when one of the above modules is implemented in the form of a Processing element scheduler code, the Processing element may be a general-purpose processor, such as a Central Processing Unit (CPU) or other processor capable of calling program code. For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).

Optionally, the present application also provides a program product, such as a computer readable storage medium, comprising a program which, when being executed by a processor, is adapted to carry out the above-mentioned method embodiments.

In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one type of logical functional division, and other divisions may be realized in practice, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.

The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) or a processor (processor) to perform some steps of the methods according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

Claims

1. A method for video data display processing, the method comprising:

acquiring video source data to be displayed;

displaying the processed video source data on the micro display screen;

the method for determining the target gray scale precision regulation and control mode according to the display type of the micro display screen comprises the following steps:

if the display type of the micro display screen is spatial color, determining the target gray scale precision regulation strategy as a gray scale error mapping strategy between corresponding color sub-pixels on adjacent resolution pixels;

the using the target gray scale precision regulation and control strategy to perform gray scale error mapping processing on the video source data to be displayed to obtain processed video source data includes:

if so, determining that an edge exists between the current pixel and the error mapping pixel, and updating the position and the number of the error mapping pixel to eliminate the error mapping pixel of the original edge;

2. The method of claim 1, wherein the configuration parameters comprise: the pixel structure is a Chinese character 'tian' shaped pixel structure, the number of error mapping pixels is 3, and the positions of the error mapping pixels are right, below and below right;

3. The method according to claim 1, wherein determining a target grayscale accuracy control manner according to the display type of the microdisplay comprises:

4. The method according to claim 3, wherein the performing gray scale error mapping processing on the video source data to be displayed by using the target gray scale precision adjustment and control strategy to obtain processed video source data comprises:

5. The method of claim 1, wherein said displaying said processed video source data onto said microdisplay comprises:

if the display type of the micro display screen is spatial color, displaying the processed video source data on the micro display screen by using the pixel structure supported by the spatial color, wherein the pixel structure supported by the spatial color comprises: the pixel structure comprises a field-shaped pixel structure, a strip-shaped pixel structure, a delta-shaped pixel structure and an L-shaped pixel structure;

6. A video data display processing apparatus, characterized in that the apparatus comprises:

the acquisition module is used for acquiring video source data to be displayed;

the display module is used for displaying the processed video source data on the micro display screen;

the determining module is used for determining the target gray scale precision regulating strategy as a gray scale error mapping strategy between corresponding color sub-pixels on adjacent resolution pixels if the display type of the micro display screen is spatial color;

the determining module is specifically configured to:

7. A microdisplay, comprising: the method comprises the following steps: the driving chip and the micro display chip are communicated through a bus, the driving chip or the micro display chip is stored with executable machine readable instructions, and when the micro display screen runs, the driving chip or the micro display chip executes the machine readable instructions to execute the steps of the method according to any one of claims 1 to 5.

8. A computer-readable storage medium, in which a computer program is stored which, when being executed by a driver module or a micro-display chip, carries out the steps of the method according to any one of claims 1 to 5.