CN115509813A - Isolation method, device, equipment and medium for abnormal I2C equipment - Google Patents

Isolation method, device, equipment and medium for abnormal I2C equipment Download PDF

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Publication number
CN115509813A
CN115509813A CN202211191056.0A CN202211191056A CN115509813A CN 115509813 A CN115509813 A CN 115509813A CN 202211191056 A CN202211191056 A CN 202211191056A CN 115509813 A CN115509813 A CN 115509813A
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equipment
abnormal
channel
switch chip
recovery
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张春宏
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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Priority to CN202211191056.0A priority Critical patent/CN115509813A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1405Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016Inter-integrated circuit (I2C)

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Hardware Redundancy (AREA)

Abstract

The application discloses isolation method, device, equipment and medium of unusual I2C equipment relates to the computer field, and the I2C bus of base plate management controller links to each other with I2C Switch chip, and a plurality of passageways of I2C Switch chip link to each other with a plurality of I2C equipment, include: accessing the I2C equipment corresponding to each channel; recovering the I2C equipment with failed access, marking the I2C equipment with abnormal recovery failure, and marking the corresponding channel as a target channel; resetting the I2C Switch chip, and accessing the I2C equipment corresponding to each channel through the channels except the target channel after resetting. The method and the device can realize forced recovery of the I2C bus and ensure realization of functions of the residual I2C equipment. In addition, a plurality of I2C devices are connected through an I2C Switch chip so as to avoid conflict of I2C addresses of a plurality of devices of the same type.

Description

Isolation method, device, equipment and medium for abnormal I2C equipment
Technical Field
The invention relates to the technical field of computers, in particular to an isolation method, device, equipment and medium for abnormal I2C equipment.
Background
Currently, a server BMC (Baseboard Management Controller) monitors more and more contents and more devices to be monitored, and therefore, a plurality of devices to be monitored are mounted under one I2C (Inter Integrated Circuit) bus. Due to the serial characteristic of the I2C bus, all I2C devices mounted on the same I2C bus share signal lines of CLK and DATA, if one of the devices is abnormal, the bus is dead, and if the bus cannot be restored in time, all the devices under the I2C bus cannot access the bus. In addition, due to the increase of server configurable devices, one server may be configured with a plurality of devices of the same type. For multiple devices of the same type, their I2C addresses may conflict.
Therefore, how to avoid I2C address conflicts of multiple devices of the same type, how to force recovery of an I2C bus when an I2C device recovers an exception, and how to avoid the influence of an abnormal I2C device on other devices are problems to be solved in the art.
Disclosure of Invention
In view of this, an object of the present invention is to provide a method, an apparatus, a device and a medium for isolating an abnormal I2C device, which can avoid I2C address collision of multiple devices of the same type, forcibly restore an I2C bus when the I2C device recovers the abnormality, and avoid an influence of the abnormal I2C device on other devices, and a specific scheme thereof is as follows:
in a first aspect, the present application discloses an isolation method for an abnormal I2C device, which is applied to a server baseboard management controller, where an I2C bus in the server baseboard management controller is connected to an I2C Switch chip, and a plurality of channels in the I2C Switch chip are connected to a plurality of I2C devices, including:
sequentially accessing the I2C equipment corresponding to each channel through each channel;
when I2C equipment with access failure exists, performing recovery processing on the I2C equipment, if the recovery fails, marking the I2C equipment as abnormal I2C equipment, and marking a channel corresponding to the abnormal I2C equipment as a target channel;
and after the reset operation, accessing the I2C equipment corresponding to each channel through other channels except the target channel so as to isolate abnormal I2C equipment.
Optionally, before the resetting operation is performed on the I2C Switch chip, the method further includes:
and connecting a universal input/output port in the server substrate management controller with a reset key in the I2C Switch chip.
Optionally, the performing a reset operation on the I2C Switch chip includes:
and carrying out reset operation on the I2C Switch chip through the input/output port.
Optionally, when there is an I2C device with access failure, performing recovery processing on the I2C device, and if the recovery fails, marking the I2C device as an abnormal I2C device, including:
and when I2C equipment with access failure exists, carrying out recovery processing on the I2C equipment according to preset recovery times, and if the recovery fails, marking the I2C equipment as abnormal I2C equipment.
Optionally, after the accessing, by another channel other than the target channel, the I2C device corresponding to each channel to implement isolation of an abnormal I2C device, the method further includes:
and when the server is powered off and powered on again, sequentially accessing the I2C equipment corresponding to each channel through each channel.
Optionally, the I2C Switch chip is PCA9548.
Optionally, when there is an I2C device with access failure, after performing recovery processing on the I2C device, the method further includes:
and if the I2C equipment is successfully recovered, accessing the I2C equipment through a channel corresponding to the I2C equipment.
In a second aspect, the present application discloses an isolating device for an abnormal I2C device, which is applied to a server baseboard management controller, wherein an I2C bus in the server baseboard management controller is connected to an I2C Switch chip, and a plurality of channels in the I2C Switch chip are connected to a plurality of I2C devices, including:
the I2C equipment access module is used for sequentially accessing the I2C equipment corresponding to each channel through each channel;
the I2C equipment recovery processing module is used for performing recovery processing on the I2C equipment when the I2C equipment with access failure exists;
an abnormal marking module, configured to mark the I2C device as an abnormal I2C device and mark a channel corresponding to the abnormal I2C device as a target channel if recovery fails;
the reset operation module is used for carrying out reset operation on the I2C Switch chip so as to realize forced recovery of the I2C bus;
and the isolation module of the abnormal I2C equipment is used for accessing the I2C equipment corresponding to each channel through other channels except the target channel after the reset operation so as to realize isolation of the abnormal I2C equipment.
In a third aspect, the present application discloses an electronic device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the method for isolating an abnormal I2C device as disclosed in the foregoing.
In a fourth aspect, the present application discloses a computer readable storage medium for storing a computer program; wherein the computer program when executed by a processor implements the method of isolating an abnormal I2C device as disclosed above.
It can be seen that, the present application provides an isolation method for an abnormal I2C device, which is applied to a server baseboard management controller, an I2C bus in the server baseboard management controller is connected to an I2C Switch chip, a plurality of channels in the I2C Switch chip are connected to a plurality of I2C devices, including: sequentially accessing the I2C equipment corresponding to each channel through each channel; when I2C equipment with access failure exists, performing recovery processing on the I2C equipment, if the recovery fails, marking the I2C equipment as abnormal I2C equipment, and marking a channel corresponding to the abnormal I2C equipment as a target channel; and after the reset operation, accessing the I2C equipment corresponding to each channel through other channels except the target channel so as to isolate abnormal I2C equipment. Therefore, when the I2C equipment fails to recover, the I2C Switch chip is reset to realize forced recovery of the I2C bus, and the abnormal I2C equipment is isolated to ensure the realization of the functions of the rest I2C equipment. In addition, a plurality of I2C devices are connected through an I2C Switch chip so as to avoid conflict of I2C addresses of a plurality of devices of the same type.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a flowchart of an isolation method for an abnormal I2C device disclosed in the present application;
FIG. 2 is a flowchart of a specific method for isolating abnormal I2C devices disclosed herein;
fig. 3 is a topology diagram of an I2C device connected via an I2C Switch chip disclosed in the present application;
fig. 4 is a schematic structural diagram of an isolating device of an abnormal I2C device disclosed in the present application;
fig. 5 is a block diagram of an electronic device disclosed in the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The architecture comprises a server baseboard management controller, an I2C Switch chip connected with an I2C bus in the server baseboard management controller, and a plurality of I2C devices connected with a plurality of channels in the I2C Switch chip. Through the structure, the I2C Switch chip can be reset to realize forced recovery of the I2C bus when the I2C equipment fails to recover, and the function of the rest I2C equipment is guaranteed by isolating abnormal I2C equipment. Furthermore, a plurality of I2C devices are connected through an I2C Switch chip, so that the conflict of I2C addresses of a plurality of devices of the same type is avoided.
Due to the serial characteristic of the I2C bus, all I2C devices mounted under the same I2C bus share CLK and DATA signal lines, if one of the devices is abnormal, the bus is dead, and if the bus cannot be restored in time, all the devices under the I2C bus cannot access the bus. In addition, as the number of configurable devices increases, one server may be configured with multiple devices of the same type. For multiple devices of the same type, their I2C addresses may conflict.
Therefore, an isolation scheme for an abnormal I2C device is provided in the embodiments of the present application, which can avoid I2C address conflicts of multiple devices of the same type, forcibly recover an I2C bus when the I2C device recovers from an abnormality, and avoid the influence of the abnormal I2C device on other devices.
The embodiment of the application discloses an isolation method of abnormal I2C equipment, which is applied to a server substrate management controller, wherein an I2C bus in the server substrate management controller is connected with an I2C Switch chip, a plurality of channels in the I2C Switch chip are connected with a plurality of pieces of I2C equipment, and as shown in figure 1, the method comprises the following steps:
step S11: and sequentially accessing the I2C equipment corresponding to each channel through each channel.
It should be noted that the present embodiment can be applied not only to the server baseboard management controller, but also to other devices that need to monitor the I2C device.
In this embodiment, since the plurality of channels in the I2C Switch chip are connected to the plurality of I2C devices, the server baseboard management controller can access the I2C device corresponding to each channel sequentially through each channel.
Step S12: and when I2C equipment with access failure exists, performing recovery processing on the I2C equipment, if the recovery fails, marking the I2C equipment as abnormal I2C equipment, and marking a channel corresponding to the abnormal I2C equipment as a target channel.
It should be noted that, when the I2C device corresponding to each channel is accessed sequentially through each channel, if there is an I2C device with access failure, the I2C device is recovered, and after the I2C device is recovered, if the I2C device is successfully recovered, the I2C device is accessed through the channel corresponding to the I2C device. If the I2C device fails to be recovered, marking the I2C device as an abnormal I2C device, and marking a channel corresponding to the abnormal I2C device as a target channel, where the recovering is performed on the I2C device, and if the recovering fails, marking the I2C device as an abnormal I2C device, which may specifically include: and when I2C equipment with access failure exists, recovering the I2C equipment according to preset recovery times, and marking the I2C equipment as abnormal I2C equipment if the I2C equipment still fails to recover after the preset recovery times.
Step S13: and after the reset operation, accessing the I2C equipment corresponding to each channel through other channels except the target channel so as to isolate abnormal I2C equipment.
In this embodiment, after the I2C device is marked as an abnormal I2C device, and a channel corresponding to the abnormal I2C device is marked as a target channel, a Reset operation needs to be performed on the I2C Switch chip to implement forced restoration of the I2C bus, where it needs to be pointed out that before the Reset operation is performed on the I2C Switch chip to implement forced restoration of the I2C bus, a General-purpose input/output (GPIO) port in the server board management controller needs to be connected to a Reset key (Reset) in the I2C Switch chip, and after the connection, the I2C Switch chip needs to be Reset through the input/output port, so that all the I2C devices can be cut off to implement forced restoration of the I2C bus. Further, the I2C device corresponding to each channel is accessed through the other channels except the target channel to isolate the abnormal I2C device, and after the server is powered off and powered on again, the I2C device corresponding to each channel is accessed through each channel in sequence, that is, in this embodiment, after the I2C bus is restored by force, the target channel is subjected to avoidance processing, the I2C device corresponding to each channel is accessed through the other channels except the target channel, until the server is powered off and powered on again, the use of the target channel is restored, and the I2C device corresponding to each channel is accessed through each channel in sequence.
In this embodiment, the devices of the same type, which may have address conflicts, are accessed to the I2C Switch chip, so that I2C address conflicts of a plurality of devices of the same type can be avoided. In summary, according to the method and the device, when the I2C device fails to recover, the I2C Switch chip is reset to realize forced recovery of the I2C bus, and the abnormal I2C device is isolated to ensure the realization of the functions of the rest I2C devices. In addition, a plurality of I2C devices are connected through an I2C Switch chip so as to avoid conflict of I2C addresses of a plurality of devices of the same type.
It can be seen that, the present application provides an isolation method for an abnormal I2C device, which is applied to a server baseboard management controller, an I2C bus in the server baseboard management controller is connected to an I2C Switch chip, a plurality of channels in the I2C Switch chip are connected to a plurality of I2C devices, including: sequentially accessing the I2C equipment corresponding to each channel through each channel; when I2C equipment with access failure exists, performing recovery processing on the I2C equipment, if the recovery fails, marking the I2C equipment as abnormal I2C equipment, and marking a channel corresponding to the abnormal I2C equipment as a target channel; and after the reset operation, accessing the I2C equipment corresponding to each channel through other channels except the target channel so as to isolate abnormal I2C equipment. Therefore, when the I2C equipment fails to recover, the I2C Switch chip is reset to realize forced recovery of the I2C bus, and the abnormal I2C equipment is isolated to ensure the realization of the functions of the rest I2C equipment. In addition, a plurality of I2C devices are connected through an I2C Switch chip so as to avoid conflict of I2C addresses of a plurality of devices of the same type.
The embodiment of the application discloses an isolation method for abnormal I2C equipment, which is applied to a server substrate management controller, wherein an I2C bus in the server substrate management controller is connected with a PCA9548, a plurality of channels in the PCA9548 are connected with a plurality of I2C equipment, and as shown in FIG. 2, the method comprises the following steps:
step S21: and sequentially accessing the I2C equipment corresponding to each channel through each channel.
It is noted that the I2C Switch chip used in the present embodiment includes, but is not limited to, PCA9548. The embodiment can be applied to not only the server baseboard management controller but also other devices needing to monitor the I2C equipment.
In this embodiment, since the channels in the PCA9548 are connected to a plurality of I2C devices, the server bmc can access the I2C devices corresponding to each of the channels sequentially through each of the channels in the PCA9548.
Step S22: and when I2C equipment with access failure exists, performing recovery processing on the I2C equipment, if the recovery fails, marking the I2C equipment as abnormal I2C equipment, and marking a channel corresponding to the abnormal I2C equipment as a target channel.
In this embodiment, when the I2C device corresponding to each channel is accessed sequentially through each channel, if there is an I2C device with access failure, the I2C device is recovered, and after the I2C device is recovered, if the I2C device is recovered successfully, the I2C device is accessed through the channel corresponding to the I2C device. If the I2C device fails to be recovered, marking the I2C device as an abnormal I2C device, and marking a channel corresponding to the abnormal I2C device as a target channel, where the recovering is performed on the I2C device, and if the recovering fails, marking the I2C device as an abnormal I2C device, which may specifically include: and when I2C equipment with access failure exists, carrying out recovery processing on the I2C equipment according to preset recovery times, and if the I2C equipment still fails to recover after the preset recovery times, marking the I2C equipment as abnormal I2C equipment.
Step S23: and resetting the PCA9548 to realize forced recovery of the I2C bus, and after the resetting operation, accessing the I2C equipment corresponding to each channel through other channels except the target channel to realize isolation of abnormal I2C equipment.
In this embodiment, after the I2C device is marked as an abnormal I2C device, and a channel corresponding to the abnormal I2C device is marked as a target channel, a reset operation needs to be performed on the PCA9548 to implement forced recovery of the I2C bus, and it needs to be noted that before the reset operation is performed on the PCA9548 to implement forced recovery of the I2C bus, a general-purpose input/output port in the server board management controller needs to be connected to a reset key in the PCA9548, and after the connection, the PCA9548 is reset through the input/output port, so that all I2C devices can be cut off to implement forced recovery of the I2C bus. Further, accessing the I2C device corresponding to each channel through the other channels except the target channel to isolate the abnormal I2C device, and accessing the I2C device corresponding to each channel through each channel in sequence after the server is powered off and powered on again, that is, in this embodiment, after the I2C bus is forcibly restored, the target channel is subjected to avoidance processing, and the I2C device corresponding to each channel is accessed through the other channels except the target channel until the server is powered off and powered on again, the use of the target channel is restored, and at this time, the I2C device corresponding to each channel is accessed through each channel in sequence.
In this embodiment, devices of the same type, which may have address conflicts, are connected to the PCA9548, so that I2C address conflicts of multiple devices of the same type can be avoided. In summary, according to the method and the device, when the I2C device fails to recover, the PCA9548 is reset to realize forced recovery of the I2C bus, and the abnormal I2C device is isolated to ensure the function of the residual I2C device. In addition, multiple I2C devices are connected through PCA9548 to avoid conflicts in I2C addresses of multiple devices of the same type.
Therefore, the application provides an isolation method for abnormal I2C devices, which is applied to a server baseboard management controller, an I2C bus in the server baseboard management controller is connected with a PCA9548, a plurality of channels in the PCA9548 are connected with a plurality of I2C devices, and the method includes: sequentially accessing the I2C equipment corresponding to each channel through each channel; when I2C equipment with access failure exists, performing recovery processing on the I2C equipment, if the recovery fails, marking the I2C equipment as abnormal I2C equipment, and marking a channel corresponding to the abnormal I2C equipment as a target channel; and resetting the PCA9548 to realize forced recovery of the I2C bus, and after the resetting operation, accessing the I2C equipment corresponding to each channel through other channels except the target channel to realize isolation of abnormal I2C equipment. Therefore, according to the method and the device, when the I2C equipment fails to recover, the PCA9548 is reset to realize forced recovery of the I2C bus, and the abnormal I2C equipment is isolated to ensure the realization of the functions of the rest I2C equipment. In addition, multiple I2C devices are connected through PCA9548 to avoid conflicts in I2C addresses of multiple devices of the same type.
Fig. 3 is a topology diagram of an I2C device connected through an I2C Switch chip.
Referring to fig. 3, an I2C bus in the server baseboard management controller is connected to an I2C Switch chip, a plurality of channels in the I2C Switch chip are connected to a plurality of I2C devices, specifically, CH1 in the I2C Switch chip is connected to I2C device 1, CH2 is connected to I2C device 2, CH3 is connected to I2C device 3, CH4 is connected to I2C device 4, CH5 is connected to I2C device 5, CH6 is connected to I2C device 6, CH7 is connected to I2C device 7, CH8 is connected to I2C device 8, and a GPIO in the server baseboard management controller is connected to Reset key Reset in the Switch chip.
Further, the server baseboard management controller sequentially opens the channels of the Switch chip to access the I2C devices at the back end. And after the access fails, the I2C equipment is recovered, after the recovery fails, the equipment is marked as abnormal I2C equipment, and the abnormal I2C channel is recorded as N. The server baseboard management controller resets the Switch chip through the GPIO and cuts off all peripheral I2C devices so as to forcibly recover the I2C. And the server substrate management controller performs evasion processing on the channel N in the subsequent I2C equipment access process, does not select to access the I2C equipment through the channel any more, and allows access to the equipment behind the channel N again until the server is powered off and on next time. Therefore, when the I2C equipment fails to recover, the I2C Switch chip is reset to realize forced recovery of the I2C bus, and the abnormal I2C equipment is isolated to ensure the realization of the functions of the rest I2C equipment. In addition, a plurality of I2C devices are connected through an I2C Switch chip so as to avoid conflict of I2C addresses of a plurality of devices of the same type.
Correspondingly, the embodiment of the present application further discloses an isolation device for an abnormal I2C device, which is applied to a server baseboard management controller, an I2C bus in the server baseboard management controller is connected to an I2C Switch chip, a plurality of channels in the I2C Switch chip are connected to a plurality of I2C devices, as shown in fig. 4, the isolation device includes:
an I2C device access module 11, configured to access, through each channel in sequence, the I2C device corresponding to each channel;
it should be noted that the present embodiment can be applied not only to a server baseboard management controller, but also to other apparatuses that need to monitor I2C devices.
In this embodiment, since the plurality of channels in the I2C Switch chip are connected to the plurality of I2C devices, the server baseboard management controller can access the I2C device corresponding to each channel sequentially through each channel.
An I2C device recovery processing module 12, configured to, when there is an I2C device with access failure, perform recovery processing on the I2C device;
it should be noted that, when the I2C device corresponding to each channel is accessed sequentially through each channel, if there is an I2C device with access failure, the I2C device is recovered, and after the I2C device is recovered, if the I2C device is recovered successfully, the I2C device is accessed through the channel corresponding to the I2C device.
An abnormal marking module 13, configured to mark the I2C device as an abnormal I2C device and mark a channel corresponding to the abnormal I2C device as a target channel if recovery fails;
if the I2C device fails to be recovered, marking the I2C device as an abnormal I2C device, and marking a channel corresponding to the abnormal I2C device as a target channel, where the performing recovery processing on the I2C device, and if the recovery fails, marking the I2C device as an abnormal I2C device may specifically include: and when I2C equipment with access failure exists, recovering the I2C equipment according to preset recovery times, and marking the I2C equipment as abnormal I2C equipment if the I2C equipment still fails to recover after the preset recovery times.
A reset operation module 14, configured to perform a reset operation on the I2C Switch chip to implement forced restoration of the I2C bus;
in this embodiment, after the I2C device is marked as an abnormal I2C device, and the channel corresponding to the abnormal I2C device is marked as a target channel, a reset operation needs to be performed on the I2C Switch chip to implement forced restoration of the I2C bus, where it needs to be pointed out that before the reset operation is performed on the I2C Switch chip to implement forced restoration of the I2C bus, a general-purpose input/output port in the server substrate management controller needs to be connected to a reset key in the I2C Switch chip, and after the connection, the reset operation is performed on the I2C Switch chip through the input/output port, so that all the I2C devices can be cut off to implement forced restoration of the I2C bus.
And the isolation module 15 of the abnormal I2C device is configured to, after the reset operation, access the I2C device corresponding to each channel through the other channels except the target channel, so as to implement isolation of the abnormal I2C device.
Further, accessing the I2C device corresponding to each channel through the other channels except the target channel to isolate the abnormal I2C device, and accessing the I2C device corresponding to each channel through each channel in sequence after the server is powered off and powered on again, that is, in this embodiment, after the I2C bus is forcibly restored, the target channel is subjected to avoidance processing, and the I2C device corresponding to each channel is accessed through the other channels except the target channel until the server is powered off and powered on again, the use of the target channel is restored, and at this time, the I2C device corresponding to each channel is accessed through each channel in sequence.
In this embodiment, devices of the same type, which may have address conflicts, are connected to the I2C Switch chip, so that I2C address conflicts of multiple devices of the same type can be avoided. In summary, according to the method and the device, when the I2C device fails to recover, the I2C Switch chip is reset to realize forced recovery of the I2C bus, and the abnormal I2C device is isolated to ensure the function of the rest I2C devices. In addition, a plurality of I2C devices are connected through an I2C Switch chip so as to avoid the conflict of I2C addresses of a plurality of devices of the same type.
It can be seen that, this application provides an isolating device of unusual I2C equipment, is applied to server base plate management controller, I2C bus in the server base plate management controller links to each other with I2C Switch chip, a plurality of passageway in the I2C Switch chip links to each other with a plurality of I2C equipment, includes: an I2C device access module 11, configured to access, sequentially through each channel, the I2C device corresponding to each channel; an I2C device recovery processing module 12, configured to, when there is an I2C device with access failure, perform recovery processing on the I2C device, and an exception marking module 13, configured to, if recovery fails, mark the I2C device as an exception I2C device and mark a channel corresponding to the exception I2C device as a target channel; a reset operation module 14, configured to perform a reset operation on the I2C Switch chip to implement forced recovery of the I2C bus, and an isolation module 15 of an abnormal I2C device, configured to access, after the reset operation, the I2C device corresponding to each channel through another channel other than the target channel to implement isolation of the abnormal I2C device. In summary, according to the method and the device, when the I2C device fails to recover, the I2C Switch chip is reset to realize forced recovery of the I2C bus, and the abnormal I2C device is isolated to ensure the realization of the functions of the rest I2C devices. Furthermore, a plurality of I2C devices are connected through an I2C Switch chip, so that the conflict of I2C addresses of a plurality of devices of the same type is avoided.
In some embodiments, before the resetting the operation module 14, the method further includes:
and the reset key connecting unit is used for connecting a universal input/output port in the server substrate management controller with the reset key in the I2C Switch chip.
In some specific embodiments, the reset operation module 14 further includes:
a reset operation unit, configured to perform a reset operation on the I2C Switch chip through the input/output port.
In some specific embodiments, the I2C device recovery processing module 12 specifically includes:
and the I2C equipment recovery processing unit is used for performing recovery processing on the I2C equipment according to a preset recovery frequency when the I2C equipment with access failure exists, and marking the I2C equipment as abnormal I2C equipment if the recovery fails.
In some specific embodiments, after the isolation module 15 of the abnormal I2C device, the method further includes:
and the equipment access unit is used for sequentially accessing the I2C equipment corresponding to each channel through each channel after the server is powered off and powered on again.
In some embodiments, the I2C Switch chip is PCA9548.
In some specific embodiments, after the I2C device resumes the processing module, the method further includes:
and the I2C device recovery processing unit is used for accessing the I2C device through a channel corresponding to the I2C device if the I2C device is successfully recovered.
Further, the embodiment of the application also provides electronic equipment. Fig. 5 is a block diagram of electronic device 20 shown in accordance with an exemplary embodiment, and the contents of the diagram should not be construed as limiting the scope of use of the present application in any way.
Fig. 5 is a schematic structural diagram of an electronic device 20 according to an embodiment of the present disclosure. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a display 23, an input output interface 24, a communication interface 25, a power supply 26, and a communication bus 27. Wherein the memory 22 is adapted to store a computer program, which is loaded and executed by the processor 21, to implement the steps of:
sequentially accessing the I2C equipment corresponding to each channel through each channel;
when I2C equipment with access failure exists, performing recovery processing on the I2C equipment, if the recovery fails, marking the I2C equipment as abnormal I2C equipment, and marking a channel corresponding to the abnormal I2C equipment as a target channel;
and after the reset operation, accessing the I2C equipment corresponding to each channel through other channels except the target channel so as to isolate abnormal I2C equipment.
In some embodiments, the processor, by executing the computer program stored in the memory, may further implement the following steps:
and connecting a universal input/output port in the server substrate management controller with a reset key in the I2C Switch chip.
In some embodiments, the processor, by executing the computer program stored in the memory, may specifically implement the following steps:
and carrying out reset operation on the I2C Switch chip through the input/output port.
In some embodiments, the processor may specifically implement the following steps by executing the computer program stored in the memory:
and when I2C equipment with access failure exists, carrying out recovery processing on the I2C equipment according to preset recovery times, and if the recovery fails, marking the I2C equipment as abnormal I2C equipment.
In some embodiments, the processor, by executing the computer program stored in the memory, further implements the following steps:
and when the server is powered off and is powered on again, the server accesses the I2C equipment corresponding to each channel sequentially through each channel.
In some embodiments, the executing, by the processor, the computer program stored in the memory may specifically include: the I2C Switch chip was PCA9548.
In some embodiments, the processor, by executing the computer program stored in the memory, further implements the following steps:
and if the I2C equipment is successfully recovered, accessing the I2C equipment through a channel corresponding to the I2C equipment.
In this embodiment, the power supply 26 is used for providing an operating voltage for each hardware device on the electronic device 20; the communication interface 25 can create a data transmission channel between the electronic device 20 and an external device, and a communication protocol followed by the communication interface is any communication protocol applicable to the technical solution of the present application, and is not specifically limited herein; the input/output interface 24 is configured to obtain external input data or output data to the outside, and a specific interface type thereof may be selected according to specific application requirements, which is not specifically limited herein.
In addition, the memory 22 is used as a carrier for resource storage, and may be a read-only memory, a random access memory, a magnetic disk or an optical disk, etc., and the resource stored thereon may include the computer program 221, and the storage manner may be a transient storage or a permanent storage. The computer program 221 may further include a computer program that can be used to perform other specific tasks in addition to the computer program that can be used to perform the method for isolating an abnormal I2C device executed by the electronic device 20 disclosed in any of the foregoing embodiments.
Further, the embodiment of the application also discloses a computer readable storage medium for storing a computer program; wherein the computer program when executed by a processor implements the method of isolating an abnormal I2C device as disclosed above.
For the specific steps of the method, reference may be made to corresponding contents disclosed in the foregoing embodiments, and details are not repeated here.
In the present application, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts in the embodiments are referred to each other, so that for the apparatus disclosed in the embodiments, since the apparatus corresponds to the method disclosed in the embodiments, the description is simple, and for the relevant parts, the method is referred to the method part.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it should also be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
The method, the apparatus, the device, and the storage medium for isolating the abnormal I2C device provided by the present application are introduced in detail, and a specific example is applied in the present application to explain the principle and the implementation of the present application, and the description of the above embodiment is only used to help understand the method and the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, the specific implementation manner and the application scope may be changed, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (10)

1. An isolation method for abnormal I2C devices is applied to a server baseboard management controller, an I2C bus in the server baseboard management controller is connected with an I2C Switch chip, a plurality of channels in the I2C Switch chip are connected with a plurality of I2C devices, and the method comprises the following steps:
sequentially accessing the I2C equipment corresponding to each channel through each channel;
when I2C equipment with access failure exists, performing recovery processing on the I2C equipment, if the recovery fails, marking the I2C equipment as abnormal I2C equipment, and marking a channel corresponding to the abnormal I2C equipment as a target channel;
and after the reset operation, accessing the I2C equipment corresponding to each channel through other channels except the target channel so as to isolate abnormal I2C equipment.
2. The isolation method for the abnormal I2C device according to claim 1, wherein before the resetting operation is performed on the I2C Switch chip, the method further comprises:
and connecting a universal input/output port in the server substrate management controller with a reset key in the I2C Switch chip.
3. The isolation method of the abnormal I2C device according to claim 2, wherein the resetting the I2C Switch chip comprises:
and carrying out reset operation on the I2C Switch chip through the input/output port.
4. The method according to claim 1, wherein when there is an I2C device with access failure, performing recovery processing on the I2C device, and if the recovery fails, marking the I2C device as an abnormal I2C device comprises:
and when I2C equipment with access failure exists, carrying out recovery processing on the I2C equipment according to preset recovery times, and if the recovery fails, marking the I2C equipment as abnormal I2C equipment.
5. The method according to claim 1, wherein after the accessing, by the channel other than the target channel, the I2C device corresponding to each of the channels to implement isolation of the abnormal I2C device, the method further comprises:
and when the server is powered off and powered on again, sequentially accessing the I2C equipment corresponding to each channel through each channel.
6. The method for isolating an abnormal I2C device according to claim 1, wherein the I2C Switch chip is PCA9548.
7. The method according to any one of claims 1 to 6, wherein, after recovering the I2C device when there is an I2C device with access failure, the method further comprises:
and if the I2C equipment is successfully recovered, accessing the I2C equipment through a channel corresponding to the I2C equipment.
8. The utility model provides an isolating device of unusual I2C equipment which characterized in that is applied to server baseboard management controller, I2C bus in the server baseboard management controller links to each other with I2C Switch chip, a plurality of passageway in the I2C Switch chip links to each other with a plurality of I2C equipment, includes:
the I2C equipment access module is used for sequentially accessing the I2C equipment corresponding to each channel through each channel;
the I2C equipment recovery processing module is used for performing recovery processing on the I2C equipment when the I2C equipment with access failure exists;
an abnormal marking module, configured to mark the I2C device as an abnormal I2C device and mark a channel corresponding to the abnormal I2C device as a target channel if recovery fails;
the reset operation module is used for carrying out reset operation on the I2C Switch chip so as to realize forced recovery of the I2C bus;
and the isolation module of the abnormal I2C equipment is used for accessing the I2C equipment corresponding to each channel through other channels except the target channel after reset operation so as to realize isolation of the abnormal I2C equipment.
9. An electronic device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the method of isolating an abnormal I2C device as claimed in any one of claims 1 to 7.
10. A computer-readable storage medium for storing a computer program; wherein the computer program, when executed by a processor, implements the method of isolating an abnormal I2C device as claimed in any one of claims 1 to 7.
CN202211191056.0A 2022-09-28 2022-09-28 Isolation method, device, equipment and medium for abnormal I2C equipment Pending CN115509813A (en)

Priority Applications (1)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211191056.0A CN115509813A (en) 2022-09-28 2022-09-28 Isolation method, device, equipment and medium for abnormal I2C equipment

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