CN115435897A - Optical module double-closed-loop verification data processing method and related equipment - Google Patents

Optical module double-closed-loop verification data processing method and related equipment Download PDF

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CN115435897A
CN115435897A CN202210826335.3A CN202210826335A CN115435897A CN 115435897 A CN115435897 A CN 115435897A CN 202210826335 A CN202210826335 A CN 202210826335A CN 115435897 A CN115435897 A CN 115435897A
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extinction ratio
optical module
loop
double closed
adjusting
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CN115435897B (en
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郑海江
陈哲
高泉川
黄秋伟
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Xiamen UX High Speed IC Co Ltd
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Xiamen UX High Speed IC Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01JMEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00Photometry, e.g. photographic exposure meter
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01MTESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES; TESTING OF STRUCTURES OR APPARATUS, NOT OTHERWISE PROVIDED FOR
    • G01M11/00Testing of optical apparatus; Testing structures by optical methods not otherwise provided for
    • G01M11/02Testing optical properties

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Abstract

The invention discloses an optical module double closed loop verification data processing method and related equipment, wherein the method comprises the following steps: a temperature data processing step, namely respectively acquiring data of the optical power and the extinction ratio under the temperature change and carrying out stability calculation to obtain a first calculation result; a double closed-loop debugging data processing step, namely performing bidirectional verification calculation aiming at the extinction ratio and the optical power within a preset adjustable range and adjusting stepping data to obtain a second calculation result; the method comprises the steps of processing unlocking data, namely acquiring unlocking data of the optical module under various code types and various duty ratios; and an evaluation step, namely judging the double closed loop verification result of the optical module according to the first calculation result, the second calculation result and the unlocking data. By the method, the working condition of the double closed loop can be comprehensively covered, the performance of the double closed loop is verified, and whether the double closed loop is unlocked or not is checked, so that the technical effect of reliable double closed loop verification is achieved.

Description

Optical module double-closed-loop verification data processing method and related equipment
Technical Field
The invention relates to an optical module testing technology, in particular to an optical module double-closed-loop verification data processing method and related equipment.
Background
The optical module (optical module) is composed of an optoelectronic device, a functional circuit, an optical interface and the like, wherein the optoelectronic device comprises a transmitting part and a receiving part. In brief, the optical module functions in that a transmitting end converts an electrical signal into an optical signal, and a receiving end converts the optical signal into the electrical signal after the optical signal is transmitted through an optical fiber.
At present, the optical power and the extinction ratio of an optical module are controlled in a closed loop mode. The extinction ratio closed-loop control means that the modulation current loaded at different temperatures is controlled by the driving chip, a modulation current temperature compensation table does not need to be manufactured, and the requirement on the consistency of optical devices is low. Thus a double closed loop, namely: the light power and the extinction ratio are controlled in a closed loop mode, and the method has the advantages of being small in workload, high in extinction ratio stability, simple in production debugging and the like. The double closed loop has been widely used in various types of optical modules.
However, the application of the double closed loop has a certain risk that the optical power and the extinction ratio need to be prevented from being uncontrolled (loss of lock). Once the lock is lost, serious conditions will result in packet loss, even a drop of line, and other serious consequences. Therefore, how to comprehensively verify the double closed loop and perform data processing is a problem to be solved urgently.
Disclosure of Invention
The invention aims to comprehensively cover various verification conditions of the double closed loops, accurately verify the performance of the double closed loops of the optical module and check the unlocking condition of the double closed loops by using the method for processing the verification data of the double closed loops of the optical module, thereby achieving the reliable verification effect of the double closed loops.
A processing method for double closed-loop verification data of an optical module comprises the following steps:
a temperature data processing step, namely respectively acquiring data of the optical power and the extinction ratio under the temperature change and carrying out stability calculation to obtain a first calculation result;
a double closed-loop debugging data processing step, namely performing bidirectional verification calculation aiming at the extinction ratio and the optical power within a preset adjustable range and adjusting stepping data to obtain a second calculation result;
the method comprises the steps of processing unlocking data, namely acquiring unlocking data of the optical module under various code types and various duty ratios;
and an evaluation step, namely judging the double closed loop verification result of the optical module according to the first calculation result, the second calculation result and the unlocking data.
Preferably, the double closed loop debugging data processing step is specifically implemented as:
testing the adjustable range of the extinction ratio under the double closed loops to verify the adjustable range of the extinction ratio under the target optical power;
the optical power was adjusted to the lower and upper limits to verify the tunable range of extinction ratio.
Preferably, in the step of processing the unlocking data, the code type instruction is acquired by an error code meter to verify whether the unlocking condition of the optical module occurs.
Preferably, in the step of processing the out-of-lock data, an error code detector or a function signal generator is used to control the enabling time of the burst enabling signal, so as to control the light emitting period and the light emitting duty cycle, so as to verify whether the out-of-lock condition of the optical module occurs.
Preferably, when the reflected light appears on the light path and the adjustable light attenuation is added to the reflected light, the working data of the double closed loops of the optical module under the reflected light with different sizes is determined.
Preferably, the adjustable range test of the extinction ratio under the double closed-loop is performed to verify that the adjustable range of the extinction ratio under the target optical power is specifically realized as follows:
when the optical module is in a double closed-loop working mode, adjusting the optical power to reach a target optical power intermediate value, and adjusting the gear of a double closed-loop extinction ratio, wherein the adjusting method comprises the following steps:
coarse adjustment of the maximum gear and fine adjustment of the maximum gear correspond to the maximum extinction ratio;
the coarse adjustment minimum gear and the fine adjustment minimum gear correspond to a minimum extinction ratio, and the adjustable range of the extinction ratio is recorded;
preferably, the optical power is adjusted to the lower limit and the upper limit, and the adjustable range test of the extinction ratio under the double closed-loop is performed to verify the adjustable range of the extinction ratio under the target optical power, which is specifically realized as follows:
adjusting the light power to reach the eye power lower limit, adjusting the double closed-loop extinction ratio gear, and recording the adjustable range of the extinction ratio;
adjusting the light power to reach the eye power upper limit, adjusting the double closed-loop extinction ratio gear, and recording the adjustable range of the extinction ratio;
adjusting the light power to reach a target value, adjusting rough adjustment gears of the extinction ratio, and testing the corresponding extinction ratio and light power under different rough adjustment gears by taking 1 gear as step for each change;
adjusting the light power to reach a target value, adjusting an extinction ratio coarse adjustment gear to a set position of a target extinction ratio, adjusting an extinction ratio fine adjustment gear, and testing the corresponding extinction ratios and light powers under different fine adjustment gears by taking 1 gear of each change as a step;
adjusting the light power to reach a target value, adjusting an extinction gear to reach the target value, keeping the extinction ratio gear fixed, stepping the light power by 0.5dbm per change, and testing the corresponding extinction ratios under different light powers;
the method is used for determining the coarse adjustment step and the fine adjustment step of the extinction ratio, determining the influence of the dimming power on the extinction ratio during the double closed loop debugging and determining the influence of the dimming ratio on the optical power.
Preferably, the method further comprises the following steps:
when a test condition of repeated electrification is carried out, acquiring a working waveform of an optical module;
and judging whether the double closed loops of the optical module are started normally or not according to the working waveform.
A computing device, at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of the above.
A readable medium storing computer executable instructions for performing the optical module dual closed loop verification data processing method described above.
According to the method for processing the double closed loop verification data of the optical module, stability calculation is performed through a temperature data processing step; a double closed-loop debugging data processing step, which is used for carrying out bidirectional verification calculation aiming at the extinction ratio and the optical power; the method comprises the steps of processing unlocking data, namely acquiring unlocking data of the optical module; and an evaluation step, namely judging the double closed loop verification result of the optical module. By the method, the working condition of the double closed loop can be comprehensively covered, the performance of the double closed loop is verified, and the problem that whether the double closed loop is unlocked or not is checked, so that the technical effect of reliable double closed loop verification is achieved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
fig. 1a is a structural diagram of an optical module dual closed loop verification data processing system according to an embodiment of the present invention;
fig. 1b is a flowchart illustrating a processing method of dual closed-loop verification data of an optical module according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a method for processing dual closed-loop verification data of an optical module according to another embodiment of the present invention;
FIG. 3 is a flowchart illustrating a method for processing dual closed-loop verification data of an optical module according to another embodiment of the present invention;
FIG. 4a is a flowchart illustrating a method for processing dual closed-loop verification data of an optical module according to another embodiment of the present invention;
FIG. 4b is a flowchart illustrating a method for processing dual closed-loop verification data of an optical module according to another embodiment of the present invention;
FIG. 5 is a schematic diagram of a computing device in an embodiment of the invention;
fig. 6 is a schematic structural diagram of a readable medium in an embodiment of the present application.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Before the description of the examples, it is clear that: the extinction ratio is mainly controlled in two modes, one mode is that the purpose of keeping the extinction ratio stable along with the temperature change is achieved through a modulation current temperature lookup table (namely, different modulation currents are indexed under different temperatures); the other method is to sample by a driving chip and adjust the modulation current of the driving chip to achieve the purpose of stabilizing the extinction ratio (called extinction ratio closed loop for short).
If the control of the extinction ratio is realized by adopting the modulation current temperature lookup table, an accurate temperature compensation table needs to be manufactured, so that the workload is greatly increased, and the requirement on the consistency of optical devices is high, so as to ensure the consistency of the extinction ratio at high and low temperatures; meanwhile, a temperature compensation meter needs to be called in the production process, so that the yield of the whole production is influenced.
Fig. 1a shows that the optical module dual closed loop authentication data processing method can be implemented by the data processing system of fig. 1 a. The error code instrument provides different code type signals to the optical module, and controls the enabling time and the enabling period of the burst enabling signal; the direct current power supply supplies power to the test module; the I2C communication board and the computer realize reading and writing of the optical module register and state monitoring; the optical splitter splits the TX output light, and one path of the optical splitter is connected to the optical power meter to read the optical power of the TX output light; one path of the optical splitter is connected to an eye pattern instrument, and the extinction ratio is read under the condition of long-time light emission of the module (the optical splitter is connected to a real-time oscilloscope in a burst mode to test an optical signal output in real time); and the other two paths of the optical splitter are connected to the adjustable optical attenuator to make reflection, and the TX output light is reflected back to the measured optical module. It should be noted that the above structures and examples are not limited to the devices and signal conditions in this implementation.
The embodiment of the invention provides an optical module double-closed-loop verification data processing method and related equipment.
Fig. 1b shows a method for processing dual closed-loop verification data of an optical module according to the present invention, which includes the following steps:
s11, a temperature data processing step, namely respectively acquiring data of the optical power and the extinction ratio under the temperature change and carrying out stability calculation to obtain a first calculation result;
alternatively, the temperature data processing may be implemented by hardware settings and steps as follows:
(1) the optical module is set to emit light (BEN signals are fixedly connected to be high or low, so that BEN is in an enabling state), the error code detector is set to provide a PRBS23 code pattern, and the optical module is set to be in a double closed-loop working mode; (2) calibrating the optical power and the extinction ratio at normal temperature; (3) placing the sample in a warm box, and testing the optical power and the extinction ratio at different temperatures; (4) and obtaining the variation of the optical power along with the temperature under the double closed loops, and obtaining the variation of the extinction ratio along with the temperature under the double closed loops. Thereby verifying the stability of the double closed loop with temperature variation. However, the device and signal conditions in this implementation are not limited.
S12, a double closed-loop debugging data processing step, namely performing bidirectional verification calculation aiming at the extinction ratio and the optical power in a preset adjustable range and adjusting stepping data to obtain a second calculation result;
referring to fig. 2, the double closed-loop debug data processing step is specifically implemented as:
s21, testing the adjustable range of the extinction ratio under the double closed loops to verify the adjustable range of the extinction ratio under the target optical power;
the purpose of this step is: verifying the adjustable range of the extinction ratio, and judging whether the extinction ratio can be adjusted to a target value;
referring to fig. 3, the specific implementation steps are as follows:
s31, when the optical module is in a double-closed-loop working mode, adjusting the optical power to reach a target optical power intermediate value, and adjusting the double-closed-loop extinction ratio gear, wherein the adjusting step comprises the following steps:
s32, coarse adjustment of the maximum gear and fine adjustment of the maximum gear correspond to the maximum extinction ratio;
s33, the minimum extinction ratio corresponding to the coarse adjustment minimum gear and the fine adjustment minimum gear, and recording the adjustable range of the extinction ratio;
and S22, adjusting the optical power to the lower limit and the upper limit to verify the adjustable range of the extinction ratio.
The purpose of this step is: and verifying the rough adjustment step and the fine adjustment step of the extinction ratio under the double closed loops, determining whether the optical power debugging and the extinction ratio debugging influence each other, further solidifying the debugging step during production debugging, and verifying the operability and the convenience degree of the double closed loop debugging.
Referring to fig. 4, the optical power is adjusted to the lower limit and the upper limit to verify that the adjustable range of the extinction ratio is specifically realized as follows:
s41, adjusting the optical power to reach the lower limit of the eye power, adjusting the gear of the double closed-loop extinction ratio, and recording the adjustable range of the extinction ratio;
s42, adjusting the optical power to reach the eye power upper limit, adjusting the double closed-loop extinction ratio gear, and recording the adjustable range of the extinction ratio;
s43, adjusting the optical power to reach a target value, adjusting coarse adjustment gears of the extinction ratio, and testing the corresponding extinction ratios and optical powers under different coarse adjustment gears by taking 1 gear as stepping for each change;
s44, adjusting the optical power to reach a target value, adjusting an extinction ratio coarse adjustment gear to a set position of a target extinction ratio, adjusting an extinction ratio fine adjustment gear, and testing corresponding extinction ratios and optical powers under different fine adjustment gears by taking 1 gear of change as stepping;
and S45, adjusting the optical power to reach a target value, adjusting the extinction gear to reach the target value, keeping the extinction ratio gear fixed, stepping the optical power by 0.5dbm per change, and testing the corresponding extinction ratios under different optical powers.
S13, an unlocking data processing step, namely acquiring unlocking data of the optical module under various code types and various duty ratios;
the double closed-loop loss-of-lock refers to the condition that one or both of the optical power and the extinction ratio go out and lose control. The determination can be made by observing the eye pattern to read the optical power and the extinction ratio, and can also be made according to the magnitude of the modulation current and the bias resistance current. The loss of lock condition occurs, and the common phenomenon is that the bias current is 0 and the extinction ratio is very large.
In the step of processing the unlocking data in step S13, a code type instruction is obtained by an error code meter to verify whether the optical module is unlocked.
The adaptability of the double closed loops to different code types is verified, the long-luminescence and burst-luminescence states of the optical module need to be tested, and the long-luminescence optical module can be realized by the following hardware setting and steps:
(1) the optical module is arranged to emit light; the error code device provides PRBS23 code pattern; setting an optical module to be in a double closed-loop working mode; (2) adjusting the optical power and the extinction ratio to target values, and recording the optical power, the extinction ratio and the corresponding code pattern; (3) and changing the code pattern of the error code meter, and recording the optical power, the extinction ratio and the corresponding code pattern.
Under the condition that the optical module emits light in a burst mode, an error code meter or a function signal generator is adopted to control the enabling time of a burst enabling signal so as to control the light emitting period and the light emitting duty ratio; the code pattern of the input signal is controlled by an error code meter. So as to verify whether the optical module is out-of-lock in the burst mode.
Optionally, when reflected light appears on the light path and adjustable light attenuation is added to the reflected light, working data of the dual closed loops of the optical module under the reflected light with different sizes is determined.
And S14, an evaluation step, namely judging the double closed loop verification result of the optical module according to the first calculation result, the second calculation result and the unlocking data.
According to the calculation results of S11-S13, the working efficiency of the double closed loops of the optical module can be clearly and comprehensively obtained, and the real quality of the optical module can be evaluated.
Referring to fig. 4b, further comprising:
s46, acquiring the working waveform of the optical module when the test condition of repeated electrification is carried out;
and S47, judging whether the double closed loops of the optical module are normally started or not according to the working waveform.
The following steps can be preferably carried out:
the TX output light is accessed into a real-time oscilloscope to test the waveform change of an optical signal, specifically, a waveform needing to be emitted for the first time by a photometric module or an optical network unit ONU, and when the double closed-loop is started, the time from the optical power or extinction ratio to the target optical power is longer, for example, a bias current quick start function is started due to the long stability time of the bias current; for extinction ratios with longer settling times, such as due to the longer settling time of the modulation current, this is solved by indexing the modulation current temperature look-up table to fill in a set of normal index values. After actual stable operation, the modulation current is controlled by a double closed loop.
For optical module testing, according to the testing system shown in fig. 1a, power failure and then power up are repeated, the waveform of an output optical signal in a real-time oscilloscope is checked, whether the waveform is abnormal or not is checked, and the magnitude of bias current and modulation current is checked through a computer. If the ONU is applied, the ONU is connected to the OLT, the ONU only registers the unallocated bandwidth, the ONU is powered off repeatedly and then powered on, and whether the dual-closed-loop start is normal or not is judged by inquiring whether the ONU can register the online. And repeating the power-on and power-off tests, reading the state of the optical module through corresponding programs, and controlling the power-on and power-off to acquire the data related to the stability of the optical module.
In conclusion:
the optical module double closed loop verification data processing method provided by the invention carries out stability calculation through a temperature data processing step; a double closed-loop debugging data processing step, which is used for carrying out bidirectional verification calculation aiming at the extinction ratio and the optical power; the method comprises the steps of processing unlocking data, namely acquiring unlocking data of the optical module; and an evaluation step, namely judging the double closed loop verification result of the optical module. By the method, the working condition of the double closed loop can be comprehensively covered, the performance of the double closed loop is verified, and the problem that whether the double closed loop is unlocked or not is checked, so that the technical effect of reliable double closed loop verification is achieved.
Fig. 5 illustrates a computing device 50 that matches the method of fig. 1-4b, including:
it should be noted that the computing device 50 shown in fig. 5 is only an example, and should not bring any limitation to the functions and the scope of the application of the embodiments.
As shown in fig. 5, the server is in the form of a general purpose computing device 50. Components of computing device 50 may include, but are not limited to: the at least one processor 51, the at least one memory 52, and a bus 53 connecting the various system components (including the memory 52 and the processor 51).
Bus 53 represents one or more of any of several types of bus structures, including a memory bus or memory controller, a peripheral bus, a processor, or a local bus using any of a variety of bus architectures.
The memory 52 may include readable media in the form of volatile memory, such as Random Access Memory (RAM) 521 and/or cache memory 522, and may further include Read Only Memory (ROM) 523.
Memory 52 may also include a program/utility 525 having a set (at least one) of program modules 524, such program modules 524 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination thereof may comprise an implementation of a network environment.
Computing device 50 may also communicate with one or more external devices 54 (e.g., keyboard, pointing device, etc.), one or more devices that enable a user to interact with computing device 50, and/or any device (e.g., router, modem, etc.) that enables computing device 50 to communicate with one or more other computing devices. Such communication may be through an input/output (I/O) interface 55. Moreover, computing device 50 may also communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the internet) via network adapter 56. As shown, the network adapter 56 communicates with other modules for the computing device 50 over the bus 53. It should be understood that although not shown in the figures, other hardware and/or software modules may be used in conjunction with computing device 50, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, to name a few.
In some possible implementations, a computing device according to the present application may include at least one processor, and at least one memory (e.g., a first server). The memory stores program codes, and when the program codes are executed by the processor, the processor executes the steps of the system permission opening method according to the various exemplary embodiments of the present application described above in the present specification.
Referring to fig. 6, the stereoscopic sorting method illustrated in fig. 1-4b and corresponding to the embodiment can also be implemented by a computer-readable medium 61, and referring to fig. 6, computer-executable instructions, i.e., program instructions required to be executed by the method of the present invention, are stored, and the computer-executable instructions or high-speed chip-executable instructions are used for executing the verification data processing method described in the above embodiment.
A readable signal medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable signal medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device over any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., over the internet using an internet service provider).
The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, control device, or apparatus, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The program product for system privilege opening of embodiments of the present application may employ a portable compact disk read-only memory (CD-ROM) and include program code, and may be executable on a computing device. However, the program product of the present application is not limited thereto, and in this document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, control apparatus, or device.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (10)

1. A method for processing double closed-loop verification data of an optical module is characterized by comprising the following steps:
a temperature data processing step, namely respectively acquiring data of the optical power and the extinction ratio under the temperature change and carrying out stability calculation to obtain a first calculation result;
a double closed-loop debugging data processing step, namely performing bidirectional verification calculation aiming at the extinction ratio and the optical power within a preset adjustable range and adjusting stepping data to obtain a second calculation result;
the method comprises the steps of unlocking data processing, namely acquiring unlocking data of the optical module under various code types and various duty ratios;
and an evaluation step, namely judging the double closed loop verification result of the optical module according to the first calculation result, the second calculation result and the unlocking data.
2. The optical module double closed-loop verification data processing method according to claim 1, wherein the double closed-loop debug data processing step is specifically implemented as:
carrying out adjustable range test of the extinction ratio under double closed loops to verify the adjustable range of the extinction ratio under the target optical power;
and adjusting the optical power to the lower limit and the upper limit so as to verify the adjustable range of the extinction ratio.
3. The optical module dual closed-loop verification data processing method of claim 1, wherein in the unlocking data processing step, a code pattern instruction is obtained through an error code meter to verify whether the unlocking condition of the optical module occurs.
4. The method for processing the dual closed-loop verification data of the optical module according to claim 1 or 3, wherein in the step of processing the out-of-lock data, an error code detector or a function signal generator is used to control the enabling time of the burst enabling signal so as to control the light emitting period and the light emitting duty cycle, thereby verifying whether the out-of-lock condition of the optical module occurs.
5. The optical module dual closed-loop verification data processing method as claimed in claim 1, further comprising: when reflected light appears on the light path, and when adjustable light attenuation is added into the reflected light, the working data of the double closed loops of the optical module under the reflected light with different sizes is determined.
6. The optical module double closed-loop verification data processing method as claimed in claim 2, wherein the adjustable range of the extinction ratio under double closed-loop is tested to verify that the adjustable range of the extinction ratio under target optical power is specifically realized as follows:
when the optical module is in a double-closed-loop working mode, adjusting the optical power to reach a target optical power intermediate value, and adjusting the double-closed-loop extinction ratio gear, wherein the adjusting step comprises the following steps:
coarse adjustment of the maximum gear and fine adjustment of the maximum gear correspond to the maximum extinction ratio;
and the coarse adjustment minimum gear and the fine adjustment minimum gear correspond to a minimum extinction ratio, and the adjustable range of the extinction ratio is recorded.
7. The method for processing the double closed-loop verification data of the optical module according to claim 2, wherein the adjustable range test of the extinction ratio under the double closed-loop is performed to verify the adjustable range of the extinction ratio under the target optical power, and the method is specifically realized as follows:
adjusting the light power to reach the eye power lower limit, adjusting the double closed-loop extinction ratio gear, and recording the adjustable range of the extinction ratio;
adjusting the light power to reach the upper limit of the eye light power, adjusting the gear of the double closed-loop extinction ratio, and recording the adjustable range of the extinction ratio;
adjusting the light power to reach a target value, adjusting rough adjustment gears of the extinction ratio, and testing the corresponding extinction ratio and light power under different rough adjustment gears by taking 1 gear as step for each change;
adjusting the light power to reach a target value, adjusting an extinction ratio coarse adjustment gear to a set position of a target extinction ratio, adjusting an extinction ratio fine adjustment gear, and testing the corresponding extinction ratios and light powers under different fine adjustment gears by taking 1 gear of each change as a step;
adjusting the light power to reach a target value, adjusting an extinction gear to reach the target value, keeping the extinction ratio gear fixed, stepping the light power by 0.5dbm per change, and testing the corresponding extinction ratios under different light powers;
the method is used for determining the coarse adjustment step and the fine adjustment step of the extinction ratio, determining the influence of the dimming power on the extinction ratio during the double closed loop debugging and determining the influence of the dimming ratio on the optical power.
8. The optical module dual closed-loop verification data processing method as claimed in claim 1, further comprising:
when a test condition of repeated power-on is carried out, acquiring a working waveform of an optical module;
and judging whether the double closed loops of the optical module are started normally or not according to the working waveform.
9. A computing device characterized by at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-8.
10. A readable medium, characterized by storing computer executable instructions for performing the optical module dual closed loop verification data processing method of claims 1-8 above.
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