CN115407942B - Data processing method suitable for single chip microcomputer chip - Google Patents
Data processing method suitable for single chip microcomputer chip Download PDFInfo
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Abstract
The invention provides a data processing method suitable for a singlechip chip, which comprises the following steps: step 1: acquiring the relevance between data to be stored of a singlechip chip, determining the data storage position to be stored according to the relevance, and generating a data storage list; step 2: and after the singlechip chip receives the operation instruction, acquiring and operating target storage data according to the data storage list, and executing the operation instruction. The invention takes the relevance among the data to be stored of the singlechip chip, determines the storage position of the data to be stored according to the relevance, reasonably distributes the storage space, ensures that the data storage use space is reduced and more data is stored under the conditions of not expanding the singlechip chip and losing the data, simultaneously generates a data storage list, facilitates the data searching and improves the response speed of the operation instructions.
Description
Technical Field
The invention relates to the technical field of data storage, in particular to a data processing method suitable for a single chip microcomputer chip.
Background
As an integrated circuit chip with super-strong operation capability, the single chip microcomputer chip is permeated into various fields in our daily life, as small as household appliances, instruments and meters, as large as medical appliances and aerospace, and no figure of the single chip microcomputer exists. The ultra-strong operation capability and the multifunctional integrated circuit also mean that a larger storage space is needed, and because of the limitation of the storage space, if more data is stored under the condition of not replacing a chip, only an external storage hard disk can be added, but the addition of the external hard disk also possibly brings about the problem of data incompatibility.
Disclosure of Invention
The invention provides a data processing method suitable for a single chip microcomputer chip, which is used for acquiring the relevance among data to be stored of the single chip microcomputer chip, determining the storage position of the data to be stored according to the relevance, reasonably distributing the storage space, ensuring that more data is stored in the space for data storage under the condition that the single chip microcomputer chip is not expanded and the data is not lost, generating a data storage list, facilitating data searching and improving the response speed of an operation instruction; and after the singlechip chip receives the operation instruction, acquiring and running target storage data according to the data storage list, executing the operation instruction, and rapidly completing the user operation instruction to provide user using likeness.
The invention provides a data processing method suitable for a singlechip chip, which comprises the following steps:
step 1: acquiring the relevance between data to be stored of a singlechip chip, determining the data storage position to be stored according to the relevance, and generating a data storage list;
step 2: and after the singlechip chip receives the operation instruction, acquiring and operating target storage data according to the data storage list, and executing the operation instruction.
Preferably, the step 1: acquiring the relevance among data to be stored of the singlechip chip, determining the data storage position to be stored according to the relevance, and generating a data storage list, wherein the specific steps comprise:
step 101: acquiring all data to be stored of the singlechip chip, and constructing a data relationship tree to be stored;
step 102: judging whether the data to be stored have relevance according to the data relation tree to be stored;
step 103: when the correlation exists between the data to be stored, the data to be stored is used as data to be processed, the storage position of the data to be processed is determined, and the data to be processed is compressed and then placed in the corresponding storage position;
Step 104: and generating a data storage list according to the storage result.
Preferably, the step 101: acquiring all data to be stored of the singlechip chip, and constructing a data relationship tree to be stored, wherein the method comprises the following specific steps of:
acquiring all functions of the singlechip chip and operation data corresponding to the all functions, taking the operation data as data to be stored, and establishing a first mapping relation;
acquiring all components controlled by the singlechip chip, and acquiring a function generation second mapping relation according to the all function implementation flow;
determining a corresponding final assembly of each function according to the second mapping relation, classifying all functions based on the final assemblies to obtain a function classification group, and adding a name label to the function group according to the function classification as a corresponding final assembly name;
taking the singlechip chip as a root node, taking the name label as a child node, taking each function in the function classification group corresponding to the name label as a leaf node, and establishing a function relation tree;
and establishing a data relationship tree to be stored according to the first mapping relationship and the functional relationship tree.
Preferably, the step 102: judging whether the data to be stored have relevance according to the data relation tree to be stored, wherein the specific steps comprise:
when a plurality of data to be stored are leaf nodes under the same child node, judging that the plurality of data to be stored have relevance;
otherwise, judging that the plurality of data to be stored are not associated.
Preferably, the step 103: when there is a correlation between the data to be stored, the data to be stored is used as data to be processed, the storage position of the data to be processed is determined, and the data to be processed is compressed and then placed at the corresponding storage position, and the specific steps include:
dividing the storage space of the singlechip chip into a plurality of subspaces based on the number of the child nodes of the data relation tree to be stored, and respectively setting subspace boundaries at the edge boundaries of the subspaces;
obtaining data to be stored corresponding to all leaf nodes under the same child node, obtaining data writing characteristics of the data to be processed as the data to be processed, determining similar data segments of the data to be processed according to the data writing characteristics, performing first marking on the similar data segments, and performing second marking on the rest data segments;
Dividing the data to be processed into a plurality of data segments according to the first mark and the second mark, respectively determining the data attribute of each data segment according to the marks corresponding to the plurality of data segments, and classifying the plurality of data segments according to the data attribute to obtain a public data group and a non-public data group;
combining the repeated data segments in the public data group and the non-public data group to obtain the number of non-repeated data segments corresponding to the data to be processed;
dividing subspaces corresponding to the child nodes according to the number of the non-repeated data segments to obtain a plurality of physical storage blocks;
and after the data compression processing is carried out on the data segments, storing the data segments in corresponding physical storage blocks, wherein the sizes of the physical storage blocks are adaptively adjusted according to the sizes of the data segments.
Preferably, after dividing the data to be processed into a plurality of data segments, the method further includes:
adding identity codes to the plurality of data segments, and respectively determining a first operation sequence in the operation process of the data to be processed corresponding to each leaf node according to the identity codes;
carrying out coding update on the public data to obtain a public code;
Updating the first operation sequence according to the public code to obtain a second operation sequence;
acquiring a coding rule corresponding to the public code, correspondingly coding the second mark based on the coding rule, performing coding replacement, and updating the second operation sequence according to the coding replacement result to obtain a third operation sequence;
and generating a data storage list according to a third operation sequence, a function and an operation instruction corresponding to the function, which are corresponding to all data to be stored, and setting the triggering level of the data storage list as the most preferred level.
Preferably, the step 2: when the singlechip chip receives an operation instruction, acquiring and operating target data to be stored according to the data storage list, and executing the operation instruction, wherein the specific steps comprise:
step 201: after receiving an operation instruction, the singlechip chip automatically decompresses the data storage list;
step 202: obtaining a plurality of compressed target storage data according to a third operation sequence corresponding to the operation instruction on the data storage list;
step 203: after decompressing the target storage data, reorganizing the target storage data according to the third operation sequence to generate calling storage data;
Step 204: and operating the call storage data to finish the operation instruction.
Preferably, after the execution of the operation instruction is completed, the method further includes:
the data storage list keeps a decompression state, and the current marking time of the operation instruction is obtained;
if the singlechip chip continuously does not receive a new operation instruction within the preset time after the current marking time, the data storage list is compressed and stored, and the non-triggered state is recovered.
Preferably, a data processing method suitable for a single chip microcomputer chip further comprises:
step 3: generating an operation record after the operation instruction is finished, hiding the unusual storage data according to the operation record, and specifically, the method comprises the following steps of:
acquiring a data storage list of the single chip microcomputer chip, generating an operation list according to the data storage list, counting the execution times of each operation instruction of the single chip microcomputer chip within a preset time length based on the operation list, and generating a statistics list;
when the execution times are greater than preset times, judging the operation instruction to be a common operation instruction;
when the execution times are smaller than or equal to preset times, judging that the operation instruction is an unusual operation instruction, and acquiring a third operation sequence corresponding to the operation instruction;
Determining a private data segment of the unusual operation instruction according to the third operation sequence, and taking the private data segment as a target data segment;
and acquiring a data segment number corresponding to the target data segment, and hiding the target data segment based on the data segment number.
Preferably, after hiding the target data segment based on the data segment number, the method further includes:
acquiring a storage position of a hidden target data segment in a storage space of the singlechip chip, and generating a hidden data pointer based on the storage position;
acquiring a data code at a position corresponding to the hidden data pointer, comparing the data code with a data storage list, determining a data relationship between the hidden target data segments, combining the hidden data pointers according to the data relationship, generating a specific pointer, determining a hidden operation instruction corresponding to the specific pointer, and establishing a third mapping relationship;
meanwhile, according to the data relationship, matching the specific pointer with the hidden target data segment, and establishing a fourth mapping relationship;
based on the fourth mapping relation, respectively adding a communication mark to the specific pointer and the hidden target data segment;
And when the operation instruction received by the singlechip chip is identified as a hidden operation instruction, triggering a specific pointer based on the third mapping relation and the fourth mapping relation to obtain a target communication mark, and recovering the hidden target data segment according to the target communication mark.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims thereof as well as the appended drawings.
The technical scheme of the invention is further described in detail through the drawings and the embodiments.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:
FIG. 1 is a flow chart of a data processing method suitable for a single chip microcomputer chip according to the present invention;
FIG. 2 is a schematic flow chart of a data processing method step 1 of the present invention applicable to a single chip microcomputer chip;
Fig. 3 is a schematic flow chart of step 2 of a data processing method suitable for a single chip microcomputer chip according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, it being understood that the preferred embodiments described herein are for illustration and explanation of the present invention only, and are not intended to limit the present invention.
Example 1:
the invention provides a data processing method suitable for a singlechip chip, which is shown in fig. 1 and comprises the following steps:
step 1: acquiring the relevance between data to be stored of a singlechip chip, determining the data storage position to be stored according to the relevance, and generating a data storage list;
step 2: and after the singlechip chip receives the operation instruction, acquiring and operating target storage data according to the data storage list, and executing the operation instruction.
In this embodiment, the target storage data refers to storage data that needs to be called by the execution of the operation instruction.
In this embodiment, the data storage list refers to a table constructed according to the function corresponding to the operation instruction and the storage location of the data to be stored corresponding to the operation instruction.
The beneficial effects of the technical scheme are that: the invention obtains the relativity between the data to be stored of the singlechip chip, determines the storage position of the data to be stored according to the relativity, reasonably distributes the storage space, ensures that the space for storing the data is reduced to store more data under the conditions that the singlechip chip is not expanded and the data is not lost, simultaneously generates a data storage list, facilitates the data searching, and improves the response speed of the operation instruction; and after the singlechip chip receives the operation instruction, acquiring and operating target data to be stored according to the data storage list, executing the operation instruction, and rapidly completing the user operation instruction to provide user using likeness.
Example 2:
on the basis of example 1, the step 1: acquiring the relevance between data to be stored of a singlechip chip, determining the data storage position to be stored according to the relevance, and generating a data storage list, wherein the specific steps comprise:
step 101: acquiring all data to be stored of the singlechip chip, and constructing a data relationship tree to be stored;
step 102: judging whether the data to be stored have relevance according to the data relation tree to be stored;
step 103: when the correlation exists between the data to be stored, the data to be stored is used as data to be processed, the storage position of the data to be processed is determined, and the data to be processed is compressed and then placed in the corresponding storage position;
step 104: and generating a data storage list according to the storage result.
In this embodiment, the data to be stored relationship tree represents a relationship diagram of the data classification relationship to be stored.
The beneficial effects of the technical scheme are that: the method acquires all data to be stored of the singlechip chip, constructs the relationship tree of the data to be stored, ensures that the classification of the data to be stored is more definite, and facilitates the data storage; judging whether the data to be stored have relevance according to the data relation tree to be stored; when the correlation exists between the data to be stored, the data to be stored is used as the data to be processed, the storage position of the data to be processed is determined, the data to be processed is compressed and then placed at the corresponding storage position, so that the reasonable distribution of the storage space is facilitated, and the storage space is reduced under the condition that the data is not lost; and a data storage list is generated according to the storage result, so that data searching is facilitated, and the response speed of the operation instruction is improved.
Example 3:
on the basis of example 2, the step 101: acquiring all data to be stored of the singlechip chip, and constructing a data relationship tree to be stored, wherein the method comprises the following specific steps of:
acquiring all functions of the singlechip chip and operation data corresponding to the all functions, taking the operation data as data to be stored, and establishing a first mapping relation;
acquiring all components controlled by the singlechip chip, and acquiring a function generation second mapping relation according to the all function implementation flow;
determining a corresponding final assembly of each function according to the second mapping relation, classifying all functions based on the final assemblies to obtain a function classification group, and adding a name label to the function group according to the function classification as a corresponding final assembly name;
taking the singlechip chip as a root node, taking the name label as a child node, taking each function in the function classification group corresponding to the name label as a leaf node, and establishing a function relation tree;
and establishing a data relationship tree to be stored according to the first mapping relationship and the functional relationship tree.
In this embodiment, the first mapping relationship refers to a corresponding relationship between data to be stored in the single-chip microcomputer and functions that can be realized by the single-chip microcomputer.
In this embodiment, all components controlled by the single chip microcomputer refer to all devices and equipment involved in the process of implementing each function by the single chip microcomputer according to an operation instruction.
In this embodiment, the implementation flow refers to the device and the equipment sequence involved in implementing each function by the singlechip.
In this embodiment, the second mapping relationship refers to a corresponding relationship between the functions of the single chip microcomputer chip and the implementation flow thereof.
In this embodiment, the final component refers to a final device or equipment or a part of equipment controlled by the single chip according to an operation instruction, and the type of the final component is determined by the actual use of the single chip.
In this embodiment, the function grouping refers to a monolithic chip function grouping determined according to whether the final components are identical, and the final components have identical functions as a group.
In this embodiment, the name label is a label added for distinguishing each functional group, and the label is determined according to the name of the final component.
In this embodiment, the functional relationship tree refers to a relationship diagram of functional relationships of the single-chip microcomputer. The root node and the child node of the data relationship tree to be stored, which is established according to the functional relationship tree, are not changed, and only the leaf node is replaced by the corresponding data to be stored.
The beneficial effects of the technical scheme are that: the method comprises the steps of establishing a first mapping relation according to the corresponding relation between the functions which can be realized by the singlechip chip and data to be stored, and then establishing a second mapping relation according to the functions and all devices or equipment (realization flow) involved in the realization process of the functions; and classifying the functions according to the final acting device of the functions to obtain a functional relation tree, and then establishing a data relation tree to be stored according to the first mapping relation and the functional relation tree to provide a basis for data classification in the data storage process to be stored.
Example 4:
based on example 2, the step 102: judging whether the data to be stored have relevance according to the data relation tree to be stored, wherein the specific steps comprise:
when a plurality of data to be stored are leaf nodes under the same child node, judging that the plurality of data to be stored have relevance;
otherwise, judging that the plurality of data to be stored are not associated.
The beneficial effects of the technical scheme are that: the invention determines that the correlation exists among the plurality of data to be stored when the plurality of data to be stored are leaf nodes under the same child node.
Example 5:
based on example 2, step 103: when there is a correlation between the data to be stored, the data to be stored is used as data to be processed, the storage position of the data to be processed is determined, and the data to be processed is compressed and then placed at the corresponding storage position, and the specific steps include:
dividing the storage space of the singlechip chip into a plurality of subspaces based on the number of the child nodes of the data relation tree to be stored, and respectively setting subspace boundaries at the edge boundaries of the subspaces;
obtaining data to be stored corresponding to all leaf nodes under the same child node, obtaining data writing characteristics of the data to be processed as the data to be processed, determining similar data segments of the data to be processed according to the data writing characteristics, performing first marking on the similar data segments, and performing second marking on the rest data segments;
dividing the data to be processed into a plurality of data segments according to the first mark and the second mark, respectively determining the data attribute of each data segment according to the marks corresponding to the plurality of data segments, and classifying the plurality of data segments according to the data attribute to obtain a public data group and a non-public data group;
Combining the repeated data segments in the public data group and the non-public data group to obtain the number of non-repeated data segments corresponding to the data to be processed;
dividing subspaces corresponding to the child nodes according to the number of the non-repeated data segments to obtain a plurality of physical storage blocks;
and after the data compression processing is carried out on the data segments, storing the data segments in corresponding physical storage blocks, wherein the sizes of the physical storage blocks are adaptively adjusted according to the sizes of the data segments.
In this embodiment, the subspace refers to a plurality of small spaces obtained by dividing the storage space according to the number of the child nodes, that is, the number of the categories of the function classification, and the size of each subspace is determined by the size of the data to be stored corresponding to each function group; the subspace limit refers to a mark arranged at the edge of each subspace, so that data confusion in the data storage process is avoided.
In this embodiment, the data to be processed refers to data to be stored corresponding to all leaf nodes under the same child node, that is, data to be stored having the same function class corresponding to the data to be stored.
In this embodiment, the data writing feature refers to a portion, such as initialization, time delay, and interruption, that is included in the same kind of data (data to be stored corresponding to all leaf nodes under the same child node) in the data writing process.
In this embodiment, the similar data segment refers to a portion commonly owned in the data to be processed, such as initialization, time delay, interrupt, and the like.
In this embodiment, the first mark is a mark for marking the position of a similar data segment on each complete data to be stored.
In this embodiment, the second tag is a tag of the remaining data segment position on each complete data to be stored. The remaining data segments refer to other data segments that process similar data segments on each complete data to be stored.
In this embodiment, the data attribute includes a common data segment and a private data segment. The shared data segment refers to a data segment of each data to be processed; the private data section refers to a data section specific to each data to be processed.
In this embodiment, the common data group refers to a data segment group constructed by common data; a non-public data set refers to a data segment packet constructed of private data.
In this embodiment, the repeated data segment is a data segment that is identical to the data segment.
In this embodiment, the number of non-duplicate data segments includes all non-duplicate data in the common data set and the non-common data set.
In this embodiment, the physical storage block refers to the minimum unit in the subspace for storing the respective data segments.
In this embodiment, the adaptive adjustment means that the size of the physical storage block is also changed according to the size of the segments.
The beneficial effects of the technical scheme are that: according to the method, the storage space of the singlechip chip is divided into a plurality of subspaces according to the number of the child nodes of the data relation tree to be stored, the storage positions of different types of data to be stored are limited, the data searching in the execution process of an operation instruction is convenient, and the subspace boundaries are respectively arranged at the edge boundaries of the subspaces, so that the data confusion caused by the interleaving of the different types of data to be stored is avoided; then, dividing the data in the complete data to be processed into two types (common data and private data) according to the data writing characteristics of the data to be processed, marking the data to be processed into a plurality of data segments according to marking results by using two types of marks (a first mark and a second mark), classifying the data segments according to the data attribute of each data segment to obtain a public data group and a non-public data group, merging repeated data segments, and reducing the storage required space as far as possible; and dividing subspaces corresponding to the child nodes according to the number of the non-repeated data segments to obtain a plurality of physical storage blocks, and storing the data segments in the corresponding physical storage blocks after data compression processing. The data to be stored is divided into a plurality of data segments to be stored, and meanwhile, the data are stored by utilizing the principle of unchanged data compression, so that the storage space is reduced and more data are stored under the conditions that the single chip microcomputer is not expanded and the data are not lost.
In addition, the size of the physical storage block is adaptively adjusted according to the size of the data segment, so that the situation that a large number of segments cannot be stored due to unreasonable division of the physical storage block is avoided, and meanwhile, the phenomenon of waste of storage space for storing small data in a large space is avoided.
Example 6:
on the basis of embodiment 5, after dividing the data to be processed into a plurality of data segments, the method further includes:
adding identity codes to the plurality of data segments, and respectively determining a first operation sequence in the operation process of the data to be processed corresponding to each leaf node according to the identity codes;
carrying out coding update on the public data to obtain a public code;
updating the first operation sequence according to the public code to obtain a second operation sequence;
acquiring a coding rule corresponding to the public code, correspondingly coding the second mark based on the coding rule, performing coding replacement, and updating the second operation sequence according to the coding replacement result to obtain a third operation sequence;
and generating a data storage list according to a third operation sequence, a function and an operation instruction corresponding to the function, which are corresponding to all data to be stored, and setting the triggering level of the data storage list as the most preferred level.
In this embodiment, the identity code is a code for determining which data segment belongs to that data to be processed.
In this embodiment, the first operation sequence refers to a sequence constructed by identity codes of data segments corresponding to the to-be-processed data corresponding to each leaf node, that is, the complete to-be-processed data before being split, where the sequence of the identity codes in the sequence is the same as the position sequence of the corresponding data segment in the complete to-be-processed data.
In this embodiment, the common codes are codes for indicating that the data segment is common data of the current subspace, and different common data segments correspond to different common codes.
In this embodiment, the second running sequence refers to replacing the identity code of the data segment with the common code in the first running sequence with the common data code.
In this embodiment, the encoding replacement refers to modifying the encoding of the data whose data attribute is private data, which ensures the data to be tidy and convenient for data arrangement and data searching, as in the format of public encoding.
In this embodiment, the three run sequences refer to new codes corresponding to the result of replacing the non-common codes in the second pre-sequence with their corresponding code replacement.
In this embodiment, the most priority refers to that the operation instruction data storage list is automatically decompressed as long as the single chip microcomputer chip receives the operation instruction data storage list.
The beneficial effects of the technical scheme are that: according to the method, after the data to be processed is divided into a plurality of data segments, identity codes are added to the plurality of data segments, and according to the identity codes, first operation sequences in the operation process of the data to be processed corresponding to each leaf node are respectively determined, so that data confusion caused by data division is avoided, and the integrity of the data storage to be processed is ensured; and then updating the running sequence according to the code update, and finally generating a data storage list, so that the data search is convenient, and the response speed of the operation instruction is improved.
Example 7:
on the basis of example 1, the step 2: when the singlechip chip receives an operation instruction, acquiring and running target storage data according to the data storage list, and executing the operation instruction, as shown in fig. 3, the specific steps include:
step 201: after receiving an operation instruction, the singlechip chip automatically decompresses the data storage list;
step 202: obtaining a plurality of compressed target storage data according to a third operation sequence corresponding to the operation instruction on the data storage list;
step 203: after decompressing the target storage data, reorganizing the target storage data according to the third operation sequence to generate calling storage data;
Step 204: and operating the call storage data to finish the operation instruction.
In this embodiment, the target storage data refers to a data segment to be decompressed determined according to the operation instruction corresponding to the third operation sequence.
In this embodiment, the calling storage data refers to the decompressed target storage data, and after being recombined according to the splicing sequence represented by the third operation sequence, the obtained complete storage data corresponding to the operation instruction.
The beneficial effects of the technical scheme are that: according to the invention, after receiving an operation instruction, the singlechip chip automatically decompresses the data storage list; obtaining a plurality of compressed target storage data according to a third operation sequence corresponding to the operation instruction on the data storage list; after decompressing the target storage data, reorganizing the target storage data according to the third operation sequence to generate calling storage data; and running and calling stored data to finish the operation instruction, and rapidly finishing the user operation instruction to provide user using likeness.
Example 8:
on the basis of embodiment 1, after the execution of the operation instruction is completed, the method further includes:
the data storage list keeps a decompression state, and the current marking time of the operation instruction is obtained;
if the singlechip chip continuously does not receive a new operation instruction within the preset time after the current marking time, the data storage list is compressed and stored, and the non-triggered state is recovered.
In this embodiment, the current tag time refers to the current operation instruction completion time,
in this embodiment, the non-triggered state refers to the compressed state.
The beneficial effects of the technical scheme are that: after the execution of the current operation instruction is completed, the data storage list is kept in a decompressed state, and the current marking time is obtained; if the single chip microcomputer chip continuously does not receive a new operation instruction within a preset time (for example, 60S) after the current marking time, the data storage list is compressed and stored, and the non-triggering state is recovered, so that the storage occupied space is reduced.
Example 9:
on the basis of embodiment 1, a data processing method suitable for a single chip microcomputer chip further includes:
step 3: generating an operation record after the operation instruction is finished, hiding the unusual storage data according to the operation record, and specifically, the method comprises the following steps of:
acquiring a data storage list of the single chip microcomputer chip, generating an operation list according to the data storage list, counting the execution times of each operation instruction of the single chip microcomputer chip within a preset time length based on the operation list, and generating a statistics list;
when the execution times are greater than preset times, judging the operation instruction to be a common operation instruction;
When the execution times are smaller than or equal to preset times, judging that the operation instruction is an unusual operation instruction, and acquiring a third operation sequence corresponding to the operation instruction;
determining a private data segment of the unusual operation instruction according to the third operation sequence, and taking the private data segment as a target data segment;
and acquiring a data segment number corresponding to the target data segment, and hiding the target data segment based on the data segment number.
In this embodiment, the operation list refers to a table containing all operation instructions receivable by the single chip microcomputer chip; the statistical list refers to an operation list showing the number of times each operation instruction is executed for a predetermined time period (for example, one week).
In this embodiment, the unused operation instruction refers to an operation instruction that is not used frequently (the number of times of execution within a preset time period is less than or equal to a preset number of times); the common operation instruction refers to an operation instruction that is frequently used (the number of executions within a preset time period is greater than the preset number).
In this embodiment, the target data segment refers to a private data segment corresponding to the unusual operation instruction.
The beneficial effects of the technical scheme are that: the method comprises the steps of obtaining a data storage list of a single chip microcomputer chip, generating an operation list according to the data storage list, and counting the execution times of each operation instruction of the single chip microcomputer chip within a preset time length based on the operation list to generate a statistics list; when the execution times are greater than preset times, judging the operation instruction to be a common operation instruction; when the execution times are smaller than or equal to preset times, judging that the operation instruction is an unusual operation instruction, and acquiring a third operation sequence corresponding to the operation instruction; determining a private data segment of the unusual operation instruction according to the third operation sequence, and taking the private data segment as a target data segment; and acquiring a data segment number corresponding to the target data segment, hiding the target data segment based on the data segment number, and reducing the data quantity of query data in the execution process of the single chip operation instruction under the condition of ensuring the integrity of the original stored data, thereby shortening the response time of the single chip operation instruction.
Example 10:
on the basis of embodiment 9, after hiding the target data segment based on the data segment number, the method further includes:
acquiring a storage position of a hidden target data segment in a storage space of the singlechip chip, and generating a hidden data pointer based on the storage position;
acquiring a data code at a position corresponding to the hidden data pointer, comparing the data code with a data storage list, determining a data relationship between the hidden target data segments, combining the hidden data pointers according to the data relationship, generating a specific pointer, determining a hidden operation instruction corresponding to the specific pointer, and establishing a third mapping relationship;
meanwhile, according to the data relationship, matching the specific pointer with the hidden target data segment, and establishing a fourth mapping relationship;
based on the fourth mapping relation, respectively adding a communication mark to the specific pointer and the hidden target data segment;
and when the operation instruction received by the singlechip chip is identified as a hidden operation instruction, triggering a specific pointer based on the third mapping relation and the fourth mapping relation to obtain a target communication mark, and recovering the hidden target data segment according to the target communication mark.
In this embodiment, the hidden target data segment refers to a target data segment that has been hidden.
In this embodiment, the hidden data pointer is a tool for calibrating the storage location of the hidden target data segment.
In this embodiment, the data relationship refers to whether the hidden target data segment is a private data segment of the same operation instruction.
In this embodiment, the specific pointer refers to a new pointer generated by combining hidden data pointers corresponding to private data segments of the same operation instruction, where the pointer can mark storage positions of all hidden target data segments of the same operation instruction.
In this embodiment, the third mapping relationship refers to a corresponding relationship between the hidden operation instruction and the specific pointer; the hidden operation instruction refers to an operation instruction of the hidden target data segment.
In this embodiment, the fourth mapping relationship refers to a correspondence between a specific pointer and a hidden target data segment, where one specific pointer corresponds to a plurality of hidden target data segments.
In this embodiment, the communication mark is used to determine that the hidden target data segment belongs to the same hiding operation instruction, and when the specific pointer corresponding to the hidden target data segment is triggered, the hidden target data segment of the same communication mark is recovered at the same time.
In this embodiment, the target communication mark refers to a communication mark determined according to a specific pointer when an operation instruction received by the monolithic chip is identified as a hidden operation instruction.
The beneficial effects of the technical scheme are that: the method comprises the steps of obtaining a storage position of a hidden target data segment in a storage space of a singlechip chip, and generating a hidden data pointer based on the storage position; acquiring a data code at a position corresponding to the hidden data pointer, comparing the data code with a data storage list, determining a data relationship between the hidden target data segments, combining the hidden data pointers according to the data relationship, generating a specific pointer, determining a hidden operation instruction corresponding to the specific pointer, and establishing a third mapping relationship; meanwhile, according to the data relationship, matching the specific pointer with the hidden target data segment, and establishing a fourth mapping relationship; based on the fourth mapping relation, respectively adding a communication mark to the specific pointer and the hidden target data segment; when the operation instruction received by the singlechip chip is identified as a hidden operation instruction, triggering a specific pointer based on the third mapping relation and the fourth mapping relation to obtain a target communication mark, recovering the hidden target data segment according to the target communication mark, realizing reversible change of the hidden data segment, avoiding the situation that the operation instruction cannot be executed after the private data segment of the unusual operation instruction is hidden, and ensuring normal use of all functions of the singlechip chip.
Example 11:
based on embodiment 7, the method evaluates the usage condition of the storage space according to the execution condition of the operation instruction of the single chip microcomputer chip, and specifically includes the following steps:
acquiring the current data processing speed of the single chip microcomputer chip and the sizes of a plurality of storage data segments corresponding to the operation instructions, and calculating the operation instruction response time of the single chip microcomputer chip according to the following formula;
wherein T represents the response time of the operation instruction of the singlechip chip; t (T) A Representing the inquiry waiting time of the operation instruction target data segment; l (L) u Representing the size of a ith storage data segment corresponding to the operation instruction; n represents the total number of the stored data segments corresponding to the operation instruction; delta represents the data compression rate, and the value range is (0.5,0.8); v represents the current data processing speed of the singlechip chip; θ represents a speed influence factor, and the value range is 0,0.4;
calculating an operation instruction execution time deviation value of the singlechip according to the operation instruction response time of the singlechip chip;
wherein T is 0 The standard response time of the singlechip chip is represented; ρ represents an aging factor, and the value range is (0,0.1);
when the execution time deviation value of the operation instruction of the single chip microcomputer chip is larger than a preset value, the storage operation overload of the single chip microcomputer chip is judged, and a storage space cleaning request is sent to a user.
The beneficial effects of the technical scheme are that: according to the invention, the use condition of the storage space is evaluated according to the execution condition of the operation instruction of the single chip microcomputer chip, the response time of the operation instruction of the single chip microcomputer chip is calculated first, the response time of the operation instruction is compared with the standard response time of the single chip microcomputer chip, whether the storage operation of the single chip microcomputer chip is overloaded or not is judged, and when the storage operation is overloaded, a storage space cleaning request is sent to a user, so that the autonomous monitoring of the storage space is realized, the memory occupied by irrelevant data is avoided, the memory pressure of the chip is facilitated to be reduced, and the response rate of the single chip microcomputer is improved.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (8)
1. The data processing method suitable for the singlechip chip is characterized by comprising the following steps of:
step 1: acquiring the relevance between data to be stored of a singlechip chip, determining the data storage position to be stored according to the relevance, and generating a data storage list;
Step 2: after receiving an operation instruction, the singlechip chip obtains and runs target storage data according to the data storage list and executes the operation instruction;
wherein, step 1 includes:
step 101: acquiring all data to be stored of the singlechip chip, and constructing a data relationship tree to be stored;
step 102: judging whether the data to be stored have relevance according to the data relation tree to be stored;
step 103: when the correlation exists between the data to be stored, the data to be stored is used as data to be processed, the storage position of the data to be processed is determined, and the data to be processed is compressed and then placed in the corresponding storage position;
step 104: generating a data storage list according to the storage result;
the step 101: acquiring all data to be stored of the singlechip chip, and constructing a data relationship tree to be stored, wherein the method comprises the following specific steps of:
acquiring all functions of the singlechip chip and operation data corresponding to the all functions, taking the operation data as data to be stored, and establishing a first mapping relation;
acquiring all components controlled by the singlechip chip, and acquiring a function generation second mapping relation according to the all function implementation flow;
Determining a corresponding final assembly of each function according to the second mapping relation, classifying all functions based on the final assemblies to obtain a function classification group, and adding a name label to the function classification group according to the final assembly name corresponding to the function classification group;
taking the singlechip chip as a root node, taking the name label as a child node, taking each function in the function classification group corresponding to the name label as a leaf node, and establishing a function relation tree;
and establishing a data relationship tree to be stored according to the first mapping relationship and the functional relationship tree.
2. The data processing method for a single chip microcomputer chip according to claim 1, wherein the step 102: judging whether the data to be stored have relevance according to the data relation tree to be stored, wherein the specific steps comprise:
when a plurality of data to be stored are leaf nodes under the same child node, judging that the plurality of data to be stored have relevance;
otherwise, judging that the plurality of data to be stored are not associated.
3. The data processing method for a single chip microcomputer chip according to claim 1, wherein the step 103: when there is a correlation between the data to be stored, the data to be stored is used as data to be processed, the storage position of the data to be processed is determined, and the data to be processed is compressed and then placed at the corresponding storage position, and the specific steps include:
Dividing the storage space of the singlechip chip into a plurality of subspaces based on the number of the child nodes of the data relation tree to be stored, and respectively setting subspace boundaries at the edge boundaries of the subspaces;
the subspaces are a plurality of small spaces obtained by dividing the storage space according to the number of the child nodes, namely the number of categories of function classification, and the size of each subspace is determined by the size of data to be stored corresponding to each function group; subspace boundaries refer to the labels set at the edges of each subspace;
obtaining data to be stored corresponding to all leaf nodes under the same child node, obtaining data writing characteristics of the data to be processed as the data to be processed, determining similar data segments of the data to be processed according to the data writing characteristics, performing first marking on the similar data segments, and performing second marking on the rest data segments;
dividing the data to be processed into a plurality of data segments according to the first mark and the second mark, respectively determining the data attribute of each data segment according to the marks corresponding to the plurality of data segments, and classifying the plurality of data segments according to the data attribute to obtain a public data group and a non-public data group;
Combining the repeated data segments in the public data group and the non-public data group to obtain the number of non-repeated data segments corresponding to the data to be processed;
dividing subspaces corresponding to the child nodes according to the number of the non-repeated data segments to obtain a plurality of physical storage blocks;
and after the data compression processing is carried out on the data segments, storing the data segments in corresponding physical storage blocks, wherein the sizes of the physical storage blocks are adaptively adjusted according to the sizes of the data segments.
4. A data processing method suitable for a single chip microcomputer chip according to claim 3, further comprising, after dividing the data to be processed into a plurality of data segments:
adding identity codes to the plurality of data segments, and respectively determining a first operation sequence in the operation process of the data to be processed corresponding to each leaf node according to the identity codes;
carrying out coding update on the public data to obtain a public code;
updating the first operation sequence according to the public code to obtain a second operation sequence;
acquiring a coding rule corresponding to the public code, carrying out coding substitution on the second mark corresponding to the code based on the coding rule, and updating the second operation sequence according to the coding substitution result to acquire a third operation sequence;
And generating a data storage list according to a third operation sequence, a function and an operation instruction corresponding to the function, which are corresponding to all data to be stored, and setting the triggering level of the data storage list as the most preferred level.
5. The data processing method for a single chip microcomputer chip according to claim 4, wherein the step 2: after the singlechip chip receives the operation instruction, acquiring and operating target storage data according to the data storage list, and executing the operation instruction, wherein the specific steps comprise:
step 201: after receiving an operation instruction, the singlechip chip automatically decompresses the data storage list;
step 202: obtaining a plurality of compressed target storage data according to a third operation sequence corresponding to the operation instruction on the data storage list;
step 203: after decompressing the target storage data, reorganizing the target storage data according to the third operation sequence to generate calling storage data;
step 204: and operating the call storage data to finish the operation instruction.
6. The data processing method suitable for a single chip microcomputer chip according to claim 1, wherein: after the execution of the operation instruction is completed, the method further comprises the following steps:
The data storage list keeps a decompression state, and the current marking time of the operation instruction is obtained;
if the singlechip chip continuously does not receive a new operation instruction within the preset time after the current marking time, the data storage list is compressed and stored, and the non-triggered state is recovered.
7. The data processing method for a single chip microcomputer chip according to claim 5, further comprising:
step 3: generating an operation record after the operation instruction is finished, hiding the unusual storage data according to the operation record, and specifically, the method comprises the following steps of:
acquiring a data storage list of the single chip microcomputer chip, generating an operation list according to the data storage list, counting the execution times of each operation instruction of the single chip microcomputer chip within a preset time length based on the operation list, and generating a statistics list;
when the execution times are greater than preset times, judging the operation instruction to be a common operation instruction;
when the execution times are smaller than or equal to preset times, judging that the operation instruction is an unusual operation instruction, and acquiring a third operation sequence corresponding to the operation instruction;
Determining a private data segment of the unusual operation instruction according to the third operation sequence, and taking the private data segment as a target data segment;
and acquiring a data segment number corresponding to the target data segment, and hiding the target data segment based on the data segment number.
8. The data processing method for a single chip microcomputer chip according to claim 7, further comprising, after hiding the target data segment based on the data segment number:
acquiring a storage position of a hidden target data segment in a storage space of the singlechip chip, and generating a hidden data pointer based on the storage position;
acquiring a data code at a position corresponding to the hidden data pointer, comparing the data code with a data storage list, determining a data relationship between the hidden target data segments, combining the hidden data pointers according to the data relationship, generating a specific pointer, determining a hidden operation instruction corresponding to the specific pointer, and establishing a third mapping relationship;
meanwhile, according to the data relationship, matching the specific pointer with the hidden target data segment, and establishing a fourth mapping relationship;
Based on the fourth mapping relation, respectively adding a communication mark to the specific pointer and the hidden target data segment;
the communication mark is used for determining that the hidden target data segments belong to the same hiding operation instruction, and when the corresponding specific pointer is triggered, the hidden target data segments of the same communication mark are simultaneously recovered;
and when the operation instruction received by the singlechip chip is identified as a hidden operation instruction, triggering a specific pointer based on the third mapping relation and the fourth mapping relation to obtain a target communication mark, and recovering the hidden target data segment according to the target communication mark.
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