CN115292226A

CN115292226A - Connector capable of improving signal quality

Info

Publication number: CN115292226A
Application number: CN202211186480.6A
Authority: CN
Inventors: 秦海棠; 王灏; 王东
Original assignee: Yaoxin Electronics Zhejiang Co ltd
Current assignee: Yaoxin Electronics Zhejiang Co ltd
Priority date: 2022-09-28
Filing date: 2022-09-28
Publication date: 2022-11-04
Anticipated expiration: 2042-09-28
Also published as: CN115292226B

Abstract

The invention belongs to the technical field of data transmission, and particularly relates to a connector capable of improving signal quality, which comprises an upper main body, a lower main body and a processor, wherein the upper main body comprises an upper substrate and an upper chip, the upper chip is arranged at the bottom of the upper substrate, the bottom of the upper substrate is protected by potting adhesive of the upper substrate, the lower main body comprises a lower substrate and a lower chip, the lower chip is arranged at the top of the lower substrate, the top of the lower substrate is protected by potting adhesive of the lower substrate, and the processor is in communication connection with a transmission period monitoring module and a normalization analysis feedback module; the invention balances and amplifies the signal in the transmission link of the signal to improve the signal quality, realizes zero bit error, reduces the realization difficulty of a sending end or a receiving end, analyzes the data transmission condition of the connector in the monitoring period through the transmission period monitoring module, and normalizes and analyzes the quality condition of the connector through the normalization analysis feedback module, thereby ensuring the long-term and continuous transmission effect of the signal.

Description

Connector capable of improving signal quality

Technical Field

The invention relates to the technical field of data transmission, in particular to a connector capable of improving signal quality.

Background

The traditional connector is generally in a mechanical contact type and only used for signal connection, in an actual application scene, a sending end sends data, the data passes through a transmission channel with a certain length, the data is connected through the connector, and the data passes through the transmission channel with a certain length, and a receiving end receives and recovers signals; due to the influence of factors such as the length of a transmission channel, the skin effect of a medium, the loss of the medium, the signal bandwidth and the like, the signal quality is deteriorated, and a receiving end even cannot correctly recover the signal, so that error codes are easily generated;

at present, in order to realize zero bit error, signal improvement is generally carried out at a sending end or a receiving end, but the power consumption of the sending end or the receiving end can be increased by the method, the packaging area is enlarged, and the realization is very difficult, when a transmission signal is improved through a connector, the existing connector cannot monitor and analyze the signal processing effect, cannot accurately evaluate and judge the operation quality of the connector, is difficult to find and scrap an abnormal connector in time, and is not beneficial to ensuring long-term and continuous transmission signal improvement;

in view of the above technical drawbacks, a solution is proposed.

Disclosure of Invention

The invention aims to provide a connector capable of improving signal quality, which solves the problems that error codes are easily generated during signal transmission at present, power consumption of a transmitting end or a receiving end is increased by a signal improvement mode at the transmitting end or the receiving end, the packaging area is enlarged, the realization is very difficult, and when the signal is improved through the connector, the signal processing effect cannot be monitored and analyzed, and the operation quality of the connector cannot be accurately evaluated and judged.

In order to achieve the purpose, the invention provides the following technical scheme:

a connector capable of improving signal quality comprises an upper main body, a lower main body and a processor, wherein the upper main body is positioned above the lower main body and comprises an upper substrate and an upper chip, the upper chip is fixedly arranged at the center of the bottom of the upper substrate, and the bottom of the upper substrate is protected by potting of potting adhesive of the upper substrate; the upper substrate comprises an upper substrate plate body, a second upper main body pin array, a first upper main body pin array and an upper main body terminal array, wherein the second upper main body pin array and the first upper main body pin array are printed at the bottom of the upper substrate plate body;

the lower main body comprises a lower substrate and a lower chip, the lower chip is fixedly arranged at the center of the top of the lower substrate, and the top of the lower substrate is protected by pouring sealant of the lower substrate; the lower substrate comprises a lower substrate body, a second lower body pin array, a first lower body pin array and a lower body terminal array, wherein the second lower body pin array and the first lower body pin array are printed on the top of the lower substrate body;

the four corners at the bottom of the upper substrate plate body are fixedly provided with convex matching columns, the four corners at the top of the lower substrate plate body are fixedly provided with concave matching grooves, the convex matching columns correspond to and are matched with the concave matching grooves, the second upper main body pin arrays are aligned and contacted with the second lower main body pin arrays one by one, and the second upper main body pin arrays are in signal connection with the second lower main body pin arrays; the processor is in communication connection with the data storage module, the transmission period monitoring module and the normalization analysis feedback module;

the transmission period monitoring module analyzes the data transmission condition of the connector in the monitoring period, generates a transmission qualified signal, a transmission considered signal or a transmission unqualified signal, and sends the transmission qualified signal, the transmission considered signal or the transmission unqualified signal to the processor; the normalization analysis feedback module performs normalization analysis on the quality condition of the connector, generates an excellent signal, a good signal, a poor signal or a scrapped signal based on the normalization analysis result, and sends the excellent signal, the good signal, the poor signal or the scrapped signal to the processor.

Further, the upper chip comprises a second upper chip pin array and a first upper chip pin array, the first upper chip pin array is located on the periphery of the second upper chip pin array, the second upper chip pin array is connected with the second upper main body pin array, the first upper chip pin array is connected with the first upper main body pin array, and the connection mode of the second upper chip pin array and the second upper main body pin array and the connection mode of the first upper chip pin array and the first upper main body pin array are gold wire bonding or flip chip bonding.

Furthermore, the lower chip comprises a second lower chip pin array and a first lower chip pin array, the first lower chip pin array is located at the periphery of the second lower chip pin array, the second lower chip pin array is connected with the second lower main body pin array, the first lower chip pin array is connected with the first lower main body pin array, and the connection mode of the second lower chip pin array and the second lower main body pin array and the connection mode of the first lower chip pin array and the first lower main body pin array are gold wire bonding or flip chip bonding.

Further, the upper chip and the lower chip are integrated circuit packages, the upper substrate plate body and the lower substrate plate body are made of ceramic, plastic or PCB, and the upper main body terminal array and the lower main body terminal array are in BGA packages, QFP packages or PGA packages.

Further, the specific operation process of the transmission cycle monitoring module includes:

setting a connector monitoring period with the number of days being D1, and acquiring signal transmission processing information in the monitoring period through a data storage module when the number of days for monitoring the connector reaches D1, wherein the signal transmission processing information comprises signal over-attenuation times, attenuation balance output times, signal low-eye-height times and eye-height amplification output times; the signal over-attenuation times represent the times of receiving an eye diagram high-frequency component over-attenuation signal in a monitoring period, the attenuation equalization output times represent the times of equalizing and outputting the eye diagram high-frequency component over-attenuation signal after being processed in the monitoring period, the signal low eye height times represent the times of receiving an eye height over-small signal in the monitoring period, and the eye height amplification output times represent the times of amplifying and outputting the eye height over-small signal after being processed in the monitoring period;

marking the ratio of the attenuation balance output times to the signal over-attenuation times as an over-attenuation position ratio, marking the ratio of the eye height amplification output times to the signal low eye height times as a low eye height position ratio, acquiring an over-attenuation position ratio threshold value and a low eye height position ratio threshold value through a data storage module, respectively comparing the over-attenuation position ratio and the low eye height position ratio with the over-attenuation position ratio threshold value and the low eye height position ratio threshold value, and if both are more than or equal to the corresponding threshold values, generating a transmission qualified signal; if one of the two is smaller than the corresponding threshold value, carrying out assignment summation calculation on the over-attenuation part ratio and the low eye height part ratio to obtain a processing optimal value of the connector in a monitoring period;

acquiring a local optimum range through a data storage module, comparing a processing optimum value with a local optimum range, generating a transmission consideration signal if the processing optimum value is positioned in the local optimum range, generating a transmission qualified signal if the processing optimum value is greater than or equal to the maximum value of the local optimum range, and generating a transmission unqualified signal if the processing optimum value is less than or equal to the minimum value of the local optimum range; and sending the transmission qualified signal, the transmission considered signal and the transmission unqualified signal to a processor.

Furthermore, after the processor receives the transmission qualified signal, the number of qualified monitoring periods of the connector is increased by one through the data storage module; after the processor receives the transmission consideration signal, the number of the consideration monitoring period of the connector is increased by one through the data storage module; and after the processor receives the unqualified transmission signal, the number of times of the unqualified monitoring period of the connector is increased by one through the data storage module.

Further, the specific analysis process of the normalized analysis feedback module includes:

acquiring monitoring results of nearly ten monitoring periods through a data storage module, counting the number HZs of qualified monitoring periods in the nearly ten monitoring periods, considering the number KZs of the monitoring periods and the number BZs of unqualified monitoring periods, generating a transmission analysis value P1 if HZs is greater than KZs + BZs, generating a transmission analysis value P2 if BZs is less than or equal to KZs + BZs, and generating a transmission analysis value P3 if HZs is less than or equal to BZs;

acquiring production distance data and running time data of the connector through a data storage module, wherein the production distance data represents the distance duration from the production date of the connector to the current moment, the running time data represents the actual use duration of the connector, and the time distance value and the running time value of the connector are marked as CJz and YSz; weighting and calculating the production distance data CJz and the operation data YSz of the connector to obtain a time consumption coefficient of the connector;

acquiring a time consumption coefficient threshold value through a data storage module, comparing the time consumption coefficient with the time consumption coefficient threshold value, generating a time consumption analysis value U1 if the time consumption coefficient is larger than or equal to the time consumption coefficient threshold value, and generating a time consumption analysis value U2 if the time consumption coefficient is smaller than the time consumption coefficient threshold value; sending a good signal to the processor when generating P1 # U2; when P3 n U2 is generated, a scrapped signal is sent to a processor; sending a good signal to the processor when generating P1U 1 or P2U 2; when P3U 1 or P2U 1 is generated, a quality difference signal is sent to a processor.

Further, the processor is in communication connection with the server, the server is in communication connection with the intelligent terminal, the processor sends the received excellent signal, good signal or scrapped signal to the server, and the server edits text information of 'normal connector', 'good connector', 'poor connector' or 'scrapped connector' to the corresponding intelligent terminal.

Compared with the prior art, the invention has the beneficial effects that:

1. in the invention, the signal is equalized and amplified during signal transmission to improve the signal quality, which is beneficial to realizing zero bit error, and the signal improvement is not needed at a transmitting end or a receiving end, thereby avoiding the complex design at the transmitting end or the receiving end, reducing the realization difficulty of the transmitting end or the receiving end and ensuring the signal transmission quality;

2. in the invention, the data transmission condition of the connector in the monitoring period is analyzed by the transmission period monitoring module to generate a transmission qualified signal, a transmission considered signal or a transmission unqualified signal, and the transmission qualified signal, the transmission considered signal or the transmission unqualified signal is sent to the processor, so that the monitoring and analysis of the signal processing effect of the connector are realized, and the signal processing condition of the connector and the use condition of the connector can be intuitively known by corresponding users;

3. according to the invention, the quality condition of the connector is subjected to normalization analysis through the normalization analysis feedback module, the excellent signal, the good signal, the poor quality signal or the scrapped signal is generated based on the normalization analysis result, and the excellent signal, the good signal, the poor quality signal or the scrapped signal is sent to the processor, so that a user is reminded to scrap the connector or replace the connector in time, and the long-term and continuous transmission effect of the signal is ensured.

Drawings

In order to facilitate understanding for those skilled in the art, the present invention will be further described with reference to the accompanying drawings;

FIG. 1 is a schematic view of the overall structure of the present invention;

FIG. 2 is a preliminary exploded view of the present invention;

FIG. 3 is an exploded view of the present invention;

FIG. 4 is a bottom view of the upper body of the present invention;

FIG. 5 is a top view of the upper body of the present invention;

FIG. 6 is a schematic structural diagram of an upper chip according to the present invention;

FIG. 7 is a top view of the lower body of the present invention;

FIG. 8 is a bottom view of the lower body of the present invention;

FIG. 9 is a schematic structural diagram of a lower chip according to the present invention;

fig. 10 is a schematic view of an overall signal transmission link of the present invention;

FIG. 11 is a first signal processing diagram according to the present invention;

FIG. 12 is a second signal processing diagram according to the present invention;

FIG. 13 is a block diagram of the system of the present invention;

FIG. 14 is an exploded view of a second embodiment of the present invention;

fig. 15 is a schematic diagram of a signal transmission link according to a second embodiment of the present invention;

FIG. 16 is an exploded view of a third embodiment of the present invention;

fig. 17 is a schematic diagram of a signal transmission link according to a third embodiment of the present invention.

Reference numerals are as follows: 1. an upper main body; 2. a lower body; 11. an upper substrate; 111. an upper substrate plate body; 112. a second upper body pin array; 113. a first upper body pin array; 114. a bump mating post; 115. an upper body terminal array; 12. mounting a chip; 121. a second upper chip pin array; 122. a first upper chip pin array; 13. pouring sealant on the upper substrate; 21. a lower substrate; 211. a lower substrate body; 212. a second lower body pin array; 213. a first lower body pin array; 214. an inner concave matching groove; 215. a lower body terminal array; 22. a chip is put down; 221. a second lower chip pin array; 222. a first lower chip pin array; 23. and (5) pouring sealant on the lower substrate.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.

The first embodiment is as follows:

as shown in fig. 1-9, the connector capable of improving signal quality according to the present invention includes an upper main body 1 and a lower main body 2, the upper main body 1 is located above the lower main body 2, the upper main body 1 includes an upper substrate 11 and an upper chip 12, the upper chip 12 is fixedly disposed at a central position of a bottom of the upper substrate 11, a bottom of the upper substrate 11 is encapsulated and protected by an upper substrate encapsulating compound 13, and the upper substrate encapsulating compound 13 mainly encapsulates and protects element gold wires such as the upper chip 12, a pad, and a gold wire; the upper substrate 11 includes an upper substrate plate 111 and an upper body terminal array 115, the bottom of the upper substrate plate 111 is printed with a second upper body pin array 112 and a first upper body pin array 113, the upper body terminal array 115 is fixedly arranged on the top of the upper substrate plate 111, and the upper body terminal array 115 and the first upper body pin array 113 are connected in a one-to-one correspondence;

the lower main body 2 comprises a lower substrate 21 and a lower chip 22, the lower chip 22 is fixedly arranged at the center of the top of the lower substrate 21, the top of the lower substrate 21 is encapsulated and protected by lower substrate pouring sealant 23, and the lower substrate pouring sealant 23 mainly encapsulates and protects element gold wires such as the lower chip 22, a bonding pad and a gold wire; the lower substrate 21 includes a lower substrate plate 211, a second lower body pin array 212, a first lower body pin array 213, and a lower body terminal array 215, the second lower body pin array 212 and the first lower body pin array 213 are printed on the top of the lower substrate plate 211, the lower body terminal array 215 is fixedly disposed at the bottom of the lower substrate plate 211, and the lower body terminal arrays 215 and the first lower body pin arrays 213 are connected in one-to-one correspondence;

the four corners at the bottom of the upper substrate plate 111 are fixedly provided with convex matching columns 114, the four corners at the top of the lower substrate plate 211 are fixedly provided with concave matching grooves 214, the convex matching columns 114 correspond to and match the concave matching grooves 214, and the second upper main body pin arrays 112 are aligned and contacted with the second lower main body pin arrays 212 one by one, so that the second upper main body pin arrays 112 are in signal connection with the second lower main body pin arrays 212; the upper substrate plate 111 and the lower substrate plate 211 are made of ceramic, plastic or PCB, and the upper body terminal Array 115 and the lower body terminal Array 215 are in the form of BGA (Ball Grid Array), QFP (Quad Flat Package) or PGA (Pin Grid Array) packages, according to different application scenarios.

The upper chip 12 and the lower chip 22 are integrated circuit packages, the chip size is small, the chip includes an input pin array and an output pin array, signals enter the chip from the input pins, are processed by a circuit inside the chip, and are led out from the output pins, the signals can be subjected to improvement processing such as equalization and amplification, a signal link is shown in fig. 10, the signals are connected between the upper main body terminal array 115 and the lower main body terminal array 215, and the middle of the signals are processed by the upper chip 12 and the lower chip 22, so that the improvement of the signals is realized;

specifically, the upper chip 12 includes a second upper chip pin array 121 and a first upper chip pin array 122, the first upper chip pin array 122 is located at the periphery of the second upper chip pin array 121, the second upper chip pin array 121 is connected to the second upper main body pin array 112, the first upper chip pin array 122 is connected to the first upper main body pin array 113, the connection manner between the second upper chip pin array 121 and the second upper main body pin array 112 is gold wire bonding or flip chip bonding, the connection manner between the first upper chip pin array 122 and the first upper main body pin array 113 is gold wire bonding or flip chip bonding, and the connection manner is not limited;

the lower chip 22 includes a second lower chip lead array 221 and a first lower chip lead array 222, the first lower chip lead array 222 is located at the periphery of the second lower chip lead array 221, the second lower chip lead array 221 is connected to the second lower main body lead array 212, the first lower chip lead array 222 is connected to the first lower main body lead array 213, the connection manner of the second lower chip lead array 221 and the second lower main body lead array 212 is gold wire bonding or flip chip, the connection manner of the first lower chip lead array 222 and the first lower main body lead array 213 is gold wire bonding or flip chip, and the connection manner is not limited.

In practical applications, the connector is connected between a transmitting terminal and a receiving terminal to perform signal transmission, the upper main body terminal array 115 and the lower main body terminal array 215 are external interfaces, as shown in fig. 11, when the attenuation of high frequency components of a signal eye diagram input to the upper main body terminal array 115 is too large, and the eye diagram cannot be separated, after passing through the connector, the signal is output from the lower main body terminal array 215, the signal is balanced, the eye diagram is recovered, and then the signal is received by the receiving terminal;

as shown in fig. 12, when the eye height of a signal input to the upper main body terminal array 115 is too small, the eye height increases after passing through the connector and being output from the lower main body terminal array 215, and the signal is amplified and received by the receiving terminal; in a transmission link of a signal, the signal can be equalized and amplified to improve the signal quality, so that zero bit errors are realized, complex design at a transmitting end or a receiving end is avoided, and the realization difficulty of the transmitting end or the receiving end is reduced. In addition to the two signal improvements, other signal processing may be performed to meet the requirements of the application scenario.

The second embodiment:

as shown in fig. 14, the present embodiment is different from embodiment 1 in that the connector capable of improving signal quality provided by the present invention includes an upper main body 1 and a lower main body 2, and a signal transmission link diagram of the second embodiment is as shown in fig. 15, in which the upper main body 1 is located above the lower main body 2, the upper main body 1 includes an upper substrate 11, and the bottom of the upper substrate 11 is encapsulated and protected by an upper substrate encapsulating compound 13; the upper substrate 11 comprises an upper substrate plate body 111, a second upper main body pin array 112, a first upper main body pin array 113 and an upper main body terminal array 115, the second upper main body pin array 112 and the first upper main body pin array 113 are printed at the bottom of the upper substrate plate body 111, and the second upper main body pin array 112 is connected with the first upper main body pin array 113 in a gold wire bonding or flip chip manner; the upper main body terminal array 115 is fixedly arranged on the top of the upper substrate plate body 111, and the upper main body terminal array 115 is connected with the first upper main body pin array 113 in a one-to-one correspondence manner;

the lower main body 2 comprises a lower substrate 21 and a lower chip 22, the lower chip 22 is fixedly arranged at the center of the top of the lower substrate 21, and the top of the lower substrate 21 is encapsulated and protected by a lower substrate pouring sealant 23; the lower substrate 21 includes a lower substrate plate 211, a second lower body pin array 212, a first lower body pin array 213, and a lower body terminal array 215, the second lower body pin array 212 and the first lower body pin array 213 are printed on the top of the lower substrate plate 211, the lower body terminal array 215 is fixedly disposed at the bottom of the lower substrate plate 211, and the lower body terminal arrays 215 and the first lower body pin arrays 213 are connected in one-to-one correspondence; the material of the upper and lower substrate plates 111 and 211 is ceramic, plastic or PCB, and the upper and lower

body terminal arrays

115 and 215 are in the form of BGA package, QFP package or PGA package;

the lower chip 22 is an integrated circuit package, the lower chip 22 includes a second lower chip lead array 221 and a first lower chip lead array 222, the first lower chip lead array 222 is located at the periphery of the second lower chip lead array 221, the second lower chip lead array 221 is connected to the second lower main body lead array 212, the first lower chip lead array 222 is connected to the first lower main body lead array 213, and the connection manner of the second lower chip lead array 221 and the second lower main body lead array 212 and the connection manner of the first lower chip lead array 222 and the first lower main body lead array 213 are gold wire bonding or flip chip bonding. The four corners at the bottom of the upper substrate plate 111 are fixedly provided with convex matching posts 114, the four corners at the top of the lower substrate plate 211 are fixedly provided with concave matching grooves 214, the convex matching posts 114 correspond to and match the concave matching grooves 214, and the second upper main body pin array 112 and the second lower main body pin array 212 are aligned and contacted one by one so that the second upper main body pin array 112 is in signal connection with the second lower main body pin array 212.

Example three:

as shown in fig. 16, the present embodiment is different from embodiment 1 in that, the connector capable of improving signal quality provided by the present invention includes an upper main body 1 and a lower main body 2, a signal transmission link diagram of the third embodiment is shown in fig. 17, the upper main body 1 is located above the lower main body 2, the upper main body 1 includes an upper substrate 11 and an upper chip 12, the upper chip 12 is fixedly disposed at a bottom center position of the upper substrate 11, and the bottom of the upper substrate 11 is encapsulated and protected by an upper substrate encapsulating compound 13; the upper substrate 11 includes an upper substrate plate 111, a second upper body pin array 112, a first upper body pin array 113, and an upper body terminal array 115, the second upper body pin array 112 and the first upper body pin array 113 are printed at the bottom of the upper substrate plate 111, the upper body terminal array 115 is fixedly disposed at the top of the upper substrate plate 111, and the upper body terminal array 115 is connected to the first upper body pin array 113 in a one-to-one correspondence;

the lower main body 2 comprises a lower substrate 21, and the top of the lower substrate 21 is protected by lower substrate pouring sealant 23 in a pouring manner; the lower substrate 21 includes a lower substrate plate 211, a second lower body pin array 212, a first lower body pin array 213 and a lower body terminal array 215, the second lower body pin array 212 and the first lower body pin array 213 are printed on the top of the lower substrate plate 211, and the second lower body pin array 212 is connected with the first lower body pin array 213 in a gold wire bonding or flip chip manner; the lower body terminal array 215 is fixedly disposed at the bottom of the lower substrate board 211, and the lower body terminal array 215 is connected to the first lower body pin array 213 in a one-to-one correspondence; the upper substrate plate 111 and the lower substrate plate 211 are made of ceramic, plastic or PCB, and the upper body terminal array 115 and the lower body terminal array 215 are in the form of BGA package, QFP package or PGA package;

the upper chip 12 is an integrated circuit package, the upper chip 12 includes a second upper chip pin array 121 and a first upper chip pin array 122, the first upper chip pin array 122 is located at the periphery of the second upper chip pin array 121, the second upper chip pin array 121 is connected to the second upper main body pin array 112, the first upper chip pin array 122 is connected to the first upper main body pin array 113, and the connection manner of the second upper chip pin array 121 and the second upper main body pin array 112 and the connection manner of the first upper chip pin array 122 and the first upper main body pin array 113 are gold wire bonding or flip chip bonding. The four corners at the bottom of the upper substrate plate 111 are fixedly provided with convex matching posts 114, the four corners at the top of the lower substrate plate 211 are fixedly provided with concave matching grooves 214, the convex matching posts 114 correspond to and match the concave matching grooves 214, and the second upper main body pin array 112 and the second lower main body pin array 212 are aligned and contacted one by one so that the second upper main body pin array 112 is in signal connection with the second lower main body pin array 212.

Example four:

as shown in fig. 13, the present embodiment is different from embodiments 1, 2 and 3 in that the present embodiment further includes a processor, and the processor is in communication connection with the data storage module, the transmission cycle monitoring module and the normalization analysis feedback module; the transmission period monitoring module analyzes the data transmission condition of the connector in the monitoring period, generates a transmission qualified signal, a transmission considered signal or a transmission unqualified signal, and sends the transmission qualified signal, the transmission considered signal or the transmission unqualified signal to the processor; the specific operation process of the transmission period monitoring module is as follows:

s1, setting a connector monitoring period with the number of days being D1, and when the number of days for monitoring the connector reaches D1, acquiring signal transmission processing information in the monitoring period through a data storage module, wherein the signal transmission processing information comprises signal over-attenuation times GSc, attenuation balance output times SSc, signal low-eye-height times DYc and eye-height amplification output times FDc;

the signal over-attenuation times GSc represent the times of receiving the eye pattern high-frequency component over-attenuation signals in the monitoring period, the attenuation balance output times SSc represent the times of processing the eye pattern high-frequency component over-attenuation signals in the monitoring period and then performing balance output, the signal low eye height times DYc represent the times of receiving the eye height too-small signals in the monitoring period, and the eye height amplification output times FDc represent the times of processing the eye height too-small signals in the monitoring period and then performing amplification output;

step S2, marking the ratio of the attenuation balance output times SSc to the signal over-attenuation times GSc as an over-attenuation position ratio GYB, and marking the ratio of the eye height amplification output times FDc to the signal low eye height times DYc as a low eye height position ratio DYB;

s3, acquiring an over-attenuation ratio threshold and a low-eye-height ratio threshold through a data storage module, wherein the over-attenuation ratio threshold is a preset over-attenuation ratio judgment value and is a positive number, the low-eye-height ratio threshold is a preset low-eye-height ratio judgment value and is a positive number, comparing the over-attenuation ratio GYB with the over-attenuation ratio threshold, comparing the low-eye-height ratio DYB with the low-eye-height ratio threshold, and generating a transmission qualified signal if the over-attenuation ratio threshold and the attenuation ratio threshold are both greater than or equal to corresponding thresholds;

if one of the two terms is less than the corresponding threshold value, passing through a formula

Carrying out assignment summation calculation on the over-attenuation position ratio and the low eye height position ratio to obtain a processing optimal value CYZ of the connector in a monitoring period; wherein a1 and a2 are preset proportionality coefficients, the values of a1 and a2 are greater than zero, a1 is greater than a2, and a1+ a2=3.215;

it should be noted that, the value of the processing figure of merit is in a direct proportion relationship with the figure of merit at the over-attenuation position and the figure of merit at the low eye height position, and the greater the value of the figure of merit at the over-attenuation position and the greater the value of figure of merit at the low eye height position, the greater the value of the processing figure of merit indicates that the connector has the better signal processing effect;

s4, acquiring a dominant range through a data storage module, wherein the dominant range is a preset judgment range of a processing optimal value, comparing the processing optimal value with the dominant range, generating a transmission considered signal if the processing optimal value is located in the dominant range, generating a transmission qualified signal if the processing optimal value is greater than or equal to the maximum value of the dominant range, and generating a transmission unqualified signal if the processing optimal value is less than or equal to the minimum value of the dominant range; the transmission qualified signal, the transmission considered signal and the transmission unqualified signal are sent to the processor, so that the monitoring and analysis of the connector on the signal processing effect are realized, and the signal processing condition of the connector in a monitoring period can be mastered.

After the processor receives the transmission qualified signal, the number of qualified monitoring periods of the connector is increased by one through the data storage module; after the processor receives the transmission consideration signal, the data storage module adds one to the consideration monitoring cycle number of the connector; after the processor receives the unqualified transmission signal, the number of unqualified monitoring periods of the connector is increased by one through the data storage module; the data storage module stores the times of qualified monitoring cycles of the connector and the corresponding monitoring cycles thereof, the times of considered monitoring cycles of the connector and the corresponding monitoring cycles thereof, and the times of unqualified monitoring cycles of the connector and the corresponding monitoring cycles thereof.

The normalization analysis feedback module performs normalization analysis on the quality condition of the connector, generates an excellent signal, a good signal, a poor quality signal or a scrapped signal based on the normalization analysis result, and sends the excellent signal, the good signal, the poor quality signal or the scrapped signal to the processor; the specific analysis process of the normalized analysis feedback module is as follows:

t1, acquiring monitoring results of nearly ten monitoring cycles through a data storage module, counting the number HZs of qualified monitoring cycles in the nearly ten monitoring cycles, considering the number KZs of the monitoring cycles and the number BZs of unqualified monitoring cycles, if HZs is larger than KZs + BZs, indicating that the signal processing effect of a recent processor is excellent, generating a transmission analysis value P1, if BZs is not smaller than HZs and not larger than KZs + BZs, indicating that the signal processing effect of the recent processor is good, generating a transmission analysis value P2, and if HZs is smaller than BZs, indicating that the signal processing effect of the recent processor is poor, generating a transmission analysis value P3;

step T2, acquiring production distance data and running time data of the connector through a data storage module, wherein the production distance data represents the distance duration between the production date of the connector and the current moment, the running time data represents the actual use duration of the connector, and time distance values and running time values of the connector are marked as CJz and YSz;

by the formula

Weighting and calculating the production distance data CJz and the operation data YSz of the connector to obtain a time consumption coefficient SHX of the connector; b1 and b2 are preset proportionality coefficients, the values of b1 and b2 are both larger than zero, b1 is larger than b2, and b1+ b2=2.361;

it should be noted that the time consumption coefficient SHX is in a direct proportion relation with the production distance data CJz and the operation time data YSz, and the larger the value of the production distance data CJz is and the larger the value of the operation time data YSz is, the larger the value of the time consumption coefficient SHX is, which indicates that the loss condition of the connector is more serious, and the connector tends to be scrapped;

t3, acquiring a time consumption coefficient threshold value through a data storage module, wherein the time consumption coefficient threshold value is a preset time consumption coefficient judgment value and the time consumption coefficient is a positive number, comparing a time consumption coefficient SHX with the time consumption coefficient threshold value, if the time consumption coefficient SHX is larger than or equal to the time consumption coefficient threshold value, indicating that the loss of the connector is overlarge, generating a time consumption analysis value U1, and if the time consumption coefficient SHX is smaller than the time consumption coefficient threshold value, indicating that the loss of the connector is in a good degree, generating a time consumption analysis value U2;

step T4, when generating P1 # U2, sending a good signal to a processor; when P3 n U2 is generated, a scrapped signal is sent to a processor; sending a good signal to the processor when generating P1 n U1 or P2 n U2; when P3U 1 or P2U 1 is generated, a quality difference signal is sent to a processor.

The processor is in communication connection with the server, the server is in communication connection with the intelligent terminal, the processor sends the received excellent signal, good signal or scrapped signal to the server, the server edits text information of 'normal connector', 'good connector', 'poor connector' or 'scrapped connector' to the corresponding intelligent terminal, and the intelligent terminal displays the text information; the processor also sends the analysis information of each monitoring period to the server, and the server sends the corresponding analysis information to the intelligent terminal, so that corresponding users can intuitively know the signal processing condition of the connector and the use condition of the connector;

when the intelligent terminal displays text information of 'normal connector', the connector is normal, high-quality signal processing and signal transmission can be carried out, and corresponding users do not need to carry out any operation; when the text information of 'connector scrapping' is displayed, the corresponding user should scrap the connector in time, when the text information of 'connector poor' is displayed, the user is advised to scrap the connector, and when the text information of 'connector good' is displayed, the user with higher requirements on signal transmission processing can select to replace the connector.

The working principle of the invention is as follows: when the device is used, in a transmission link of a signal, the connector balances and amplifies the signal to improve the signal quality, so that zero bit errors are realized, the signal improvement is not needed at a transmitting end or a receiving end, the complex design at the transmitting end or the receiving end is avoided, and the realization difficulty of the transmitting end or the receiving end is reduced; the data transmission condition of the connector in the monitoring period is analyzed through the transmission period monitoring module to generate a transmission qualified signal, a transmission considered signal or a transmission unqualified signal, and the transmission qualified signal, the transmission considered signal or the transmission unqualified signal is sent to the processor, so that the monitoring and analysis of the signal processing effect of the connector are realized, and corresponding users can visually know the signal processing condition of the connector and the use condition of the connector; the quality condition of the connector is subjected to normalization analysis through the normalization analysis feedback module, excellent signals, good signals, poor quality signals or scrapped signals are generated based on the normalization analysis result, the excellent signals, the good signals, the poor quality signals or the scrapped signals are sent to the processor, a user is reminded of scrapping or replacing the connector in time, and the signal transmission effect is guaranteed.

The above formulas are all obtained by collecting a large amount of data and performing software simulation, and a formula close to a true value is selected, the formulas are all obtained by removing dimensions and taking numerical values thereof for calculation, coefficients in the formulas are set by a person skilled in the art according to actual conditions, and regarding the size of the coefficients, the proportional relation between the parameters and the quantized numerical values is not affected, for example, the time consumption coefficient SHX is in direct proportion to the numerical value of the production distance data CJz.

The preferred embodiments of the invention disclosed above are intended to be illustrative only. The preferred embodiments are not intended to be exhaustive or to limit the invention to the precise form disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A connector capable of improving signal quality comprises an upper main body (1), a lower main body (2) and a processor, wherein the upper main body (1) is positioned above the lower main body (2), the connector is characterized in that the upper main body (1) comprises an upper substrate (11) and an upper chip (12), the upper chip (12) is fixedly arranged at the center of the bottom of the upper substrate (11), and the bottom of the upper substrate (11) is encapsulated and protected by upper substrate encapsulating glue (13); the upper substrate (11) comprises an upper substrate plate body (111), a second upper main body pin array (112), a first upper main body pin array (113) and an upper main body terminal array (115), the second upper main body pin array (112) and the first upper main body pin array (113) are printed at the bottom of the upper substrate plate body (111), the upper main body terminal array (115) is fixedly arranged at the top of the upper substrate plate body (111), and the upper main body terminal array (115) is in one-to-one correspondence with and connected with the first upper main body pin array (113);

the lower main body (2) comprises a lower substrate (21) and a lower chip (22), the lower chip (22) is fixedly arranged at the center of the top of the lower substrate (21), and the top of the lower substrate (21) is encapsulated and protected by lower substrate pouring sealant (23); the lower substrate (21) comprises a lower substrate plate body (211), a second lower body pin array (212), a first lower body pin array (213) and a lower body terminal array (215), the second lower body pin array (212) and the first lower body pin array (213) are printed on the top of the lower substrate plate body (211), the lower body terminal array (215) is fixedly arranged at the bottom of the lower substrate plate body (211), and the lower body terminal array (215) is in one-to-one correspondence with and connected with the first lower body pin array (213);

convex matching columns (114) are fixedly arranged at four corners of the bottom of the upper substrate plate body (111), concave matching grooves (214) are fixedly arranged at four corners of the top of the lower substrate plate body (211), the convex matching columns (114) correspond to and are matched with the concave matching grooves (214), the second upper main body pin arrays (112) are aligned and contacted with the second lower main body pin arrays (212) one by one, and the second upper main body pin arrays (112) are in signal connection with the second lower main body pin arrays (212); the processor is in communication connection with the data storage module, the transmission period monitoring module and the normalization analysis feedback module;

the transmission period monitoring module analyzes the data transmission condition of the connector in the monitoring period, generates a transmission qualified signal, a transmission considered signal or a transmission unqualified signal, and sends the transmission qualified signal, the transmission considered signal or the transmission unqualified signal to the processor; the normalization analysis feedback module performs normalization analysis on the quality condition of the connector, generates a good signal, a poor signal or a scrapped signal based on the normalization analysis result, and sends the good signal, the poor signal or the scrapped signal to the processor.

2. The connector according to claim 1, wherein the upper chip (12) includes a second upper chip lead array (121) and a first upper chip lead array (122), the first upper chip lead array (122) is located at the periphery of the second upper chip lead array (121), the second upper chip lead array (121) is connected to the second upper body lead array (112), the first upper chip lead array (122) is connected to the first upper body lead array (113), and the connection manner of the second upper chip lead array (121) to the second upper body lead array (112) and the connection manner of the first upper chip lead array (122) to the first upper body lead array (113) are gold wire bonding or flip chip bonding.

3. The connector of claim 1, wherein the bottom chip (22) includes a second bottom chip lead array (221) and a first bottom chip lead array (222), the first bottom chip lead array (222) is located at the periphery of the second bottom chip lead array (221), the second bottom chip lead array (221) is connected to the second bottom body lead array (212), the first bottom chip lead array (222) is connected to the first bottom body lead array (213), and the connection manner of the second bottom chip lead array (221) and the second bottom body lead array (212) and the connection manner of the first bottom chip lead array (222) and the first bottom body lead array (213) are gold wire bonding or flip chip bonding.

4. The connector, as set forth in claim 1, characterized in that the upper chip (12) and the lower chip (22) are integrated circuit packages, the material of the upper substrate board body (111) and the lower substrate board body (211) is ceramic, plastic or PCB, and the upper body terminal array (115) and the lower body terminal array (215) are in the form of BGA packages, QFP packages or PGA packages.

5. The connector of claim 1, wherein the transmission cycle monitoring module is configured to operate according to a specific process including:

setting a connector monitoring period with the number of days being D1, and acquiring signal transmission processing information in the monitoring period through a data storage module when the number of days for monitoring the connector reaches D1, wherein the signal transmission processing information comprises signal over-attenuation times, attenuation balance output times, signal low-eye-height times and eye-height amplification output times; the signal over-attenuation times represent the times of receiving an eye diagram high-frequency component over-attenuation signal in a monitoring period, the attenuation balance output times represent the times of processing the eye diagram high-frequency component over-attenuation signal in the monitoring period and then performing balance output, the signal low eye height times represent the times of receiving an eye height too-small signal in the monitoring period, and the eye height amplification output times represent the times of processing the eye height too-small signal in the monitoring period and then performing amplification output;

6. The connector of claim 5, wherein the processor increases the number of qualified monitoring cycles of the connector by one after receiving the transmission qualified signal; after the processor receives the transmission consideration signal, the data storage module adds one to the consideration monitoring cycle number of the connector; and after the processor receives the unqualified transmission signal, the number of times of the unqualified monitoring period of the connector is increased by one through the data storage module.

7. The connector of claim 1, wherein the analysis process of the normalized analysis feedback module includes:

acquiring monitoring results of nearly ten monitoring periods through a data storage module, counting the number HZs of qualified monitoring periods in the nearly ten monitoring periods, considering the number KZs of the monitoring periods and the number BZs of unqualified monitoring periods, generating a transmission analysis value P1 if HZs is greater than KZs + BZs, generating a transmission analysis value P2 if BZs is less than or equal to HZs and less than or equal to KZs + BZs, and generating a transmission analysis value P3 if HZs is less than BZs;

acquiring a time consumption coefficient threshold value through a data storage module, comparing the time consumption coefficient with the time consumption coefficient threshold value, generating a time consumption analysis value U1 if the time consumption coefficient is larger than or equal to the time consumption coefficient threshold value, and generating a time consumption analysis value U2 if the time consumption coefficient is smaller than the time consumption coefficient threshold value; sending a good signal to the processor when generating P1 # U2; when P3 ≠ U2 is generated, a scrapping signal is sent to the processor; sending a good signal to the processor when generating P1 n U1 or P2 n U2; when P3U 1 or P2U 1 is generated, a quality difference signal is sent to the processor.

8. The connector of claim 7, wherein the processor is communicatively connected to the server, the server is communicatively connected to the intelligent terminal, the processor sends the received excellent signal, good signal or reject signal to the server, and the server edits text information of "connector normal", "connector good", "connector bad" or "connector reject" to the corresponding intelligent terminal.