CN115150565B

CN115150565B - Signal processing method, device and system

Info

Publication number: CN115150565B
Application number: CN202211065243.4A
Authority: CN
Inventors: 周文浩; 孔文; 刘伟
Original assignee: Hongjing Microelectronics Technology Co ltd
Current assignee: Hongjing Microelectronics Technology Co ltd
Priority date: 2022-09-01
Filing date: 2022-09-01
Publication date: 2023-01-13
Anticipated expiration: 2042-09-01
Also published as: CN115150565A

Abstract

The present disclosure provides a signal processing method, device and system, wherein the method comprises: acquiring a first synchronization level and a first black level corresponding to a current output signal of a video analog-to-digital converter; when the first synchronization level is not in the expected synchronization level range, adjusting the current input offset value of the video analog-to-digital converter to a target offset value according to the comparison result of the first synchronization level and the standard synchronization level; when the first black level is not in the expected black level range, adjusting the current input gain value of the video analog-to-digital converter to a target gain value according to the comparison result of the first black level and a black level threshold value in the expected black level range; the current target offset value and the current target gain value are determined when the first sync level is within the expected sync level range and the first black level is within the expected black level range. The present disclosure can improve adverse effects on image display quality due to an amplitude abnormal change of a composite video broadcast signal input by a video analog-to-digital converter.

Description

Signal processing method, device and system

Technical Field

The present disclosure relates to the field of signal processing technologies, and in particular, to a method, an apparatus, and a system for signal processing.

Background

A Composite Video Broadcast Signal (CVBS) Signal is used as an analog Signal, and the standard Signal amplitude of the CVBS Signal is usually 1V, but the Signal amplitude changes due to loss in the transmission process or a non-standard Signal source, which finally affects the image display quality.

Disclosure of Invention

The present disclosure provides a signal processing method, apparatus and system, which are intended to effectively improve adverse effects on image display quality due to amplitude variations of an input CVBS signal.

In a first aspect, the present disclosure provides a signal processing method, where the signal processing method is used for a video analog-to-digital converter, where the video analog-to-digital converter is used to perform analog-to-digital conversion processing on an input composite video broadcast signal to obtain a corresponding output signal; the signal processing method comprises the following steps:

acquiring a first characteristic level corresponding to a current output signal of the video analog-to-digital converter, wherein the first characteristic level comprises a first synchronous level and a first black level;

when the first synchronization level is not in an expected synchronization level range, adjusting a current input offset value of the video analog-to-digital converter to a target offset value according to a comparison result of the first synchronization level and a standard synchronization level;

when the first black level is not in the expected black level range, adjusting the current input gain value of the video analog-to-digital converter to a target gain value according to the comparison result of the first black level and a black level threshold value in the expected black level range;

returning to execute the step of obtaining the first characteristic level corresponding to the current output signal of the video analog-to-digital converter;

determining a current target offset value and a current target gain value when the first sync level is within an expected sync level range and the first black level is within an expected black level range.

In a second aspect, the present disclosure provides a signal processing apparatus, configured to perform signal processing on an input signal and an output signal of a video analog-to-digital converter, where the video analog-to-digital converter is configured to perform analog-to-digital conversion processing on an input composite video broadcast signal to obtain a corresponding output signal; the signal processing apparatus includes:

the acquisition module is configured to acquire a first characteristic level corresponding to a current output signal of the video analog-to-digital converter, wherein the first characteristic level comprises a first synchronization level and a first black level;

a fine-tuning module configured to: when the first synchronization level is not in the expected synchronization level range, adjusting the current input offset value of the video analog-to-digital converter to a target offset value according to the comparison result of the first synchronization level and the standard synchronization level; when the first black level is not in the expected black level range, adjusting the current input gain value of the video analog-to-digital converter to a target gain value according to the comparison result of the first black level and a black level threshold value in the expected black level range; triggering the acquisition module to execute the step of acquiring a first characteristic level corresponding to a current output signal of the video analog-to-digital converter; determining a current target offset value and a current target gain value when the first sync level is within an expected sync level range and the first black level is within an expected black level range.

In a third aspect, the present disclosure provides a signal processing system comprising:

the video analog-to-digital converter is used for carrying out analog-to-digital conversion processing on the input composite video broadcast signal to obtain a corresponding output signal;

a signal processing apparatus comprising the signal processing apparatus provided in the second aspect.

According to the technical scheme of the signal processing method, the signal processing device and the signal processing system provided by the embodiment of the disclosure, automatic Gain Offset Control (Auto Gain Offset Control) is performed on an input Offset value (Offset) and an input Gain value (Gain) of a video analog-to-digital converter according to a synchronization level and a black level corresponding to an input CVBS signal, so that correction of signal amplitude of the CVBS signal with abnormal signal amplitude is realized, image information (brightness, contrast and chroma) in the output signal can be kept basically consistent with image information input by a standard CVBS signal (the signal amplitude is 1V), the consistency of the output image information of the video analog-to-digital converter is favorably improved, and adverse effects on image display quality caused by abnormal amplitude changes of the input CVBS signal are favorably improved.

It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present disclosure, nor do they limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.

Drawings

The accompanying drawings are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the principles of the disclosure and not to limit the disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which:

fig. 1 is a schematic flow chart of a signal processing method according to an embodiment of the present disclosure;

fig. 2 is a schematic flow chart of another signal processing method provided in the embodiment of the present disclosure;

fig. 3 is a schematic flow chart of another signal processing method provided in the embodiment of the present disclosure;

FIG. 4 is a schematic flow chart of one embodiment of step S12 in FIG. 1;

FIG. 5 is a flowchart illustrating an embodiment of step S13 in FIG. 1

Fig. 6 is a block diagram of a signal processing apparatus according to an embodiment of the disclosure;

fig. 7 is a block diagram of another signal processing apparatus according to an embodiment of the disclosure;

fig. 8 is a block diagram of a signal processing system according to an embodiment of the disclosure;

fig. 9 is a block diagram of an electronic device according to an embodiment of the present disclosure.

Detailed Description

To facilitate a better understanding of the technical aspects of the present disclosure, exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings, wherein various details of the embodiments of the present disclosure are included to facilitate an understanding, and they should be considered as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

Embodiments of the present disclosure and features of embodiments may be combined with each other without conflict.

As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and/or "made from" \8230; \8230 ";" made from ";" specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Fig. 1 is a schematic flow chart of a signal processing method according to an embodiment of the present disclosure.

The disclosed embodiment provides a signal processing method, which is applied to a Video analog-to-digital converter (Video ADC) and is used for performing signal detection on an output signal of the Video ADC and processing an input signal of the Video ADC, wherein the Video ADC is used for performing analog-to-digital conversion processing on an input composite Video broadcast CVBS signal to obtain a corresponding output signal. Referring to fig. 1, the signal processing method may include: step S11 to step S15.

Step S11, a first characteristic level corresponding to a current output signal of the video analog-to-digital converter is obtained, wherein the first characteristic level comprises a first synchronous level and a first black level.

And S12, when the first synchronization level is not in the expected synchronization level range, adjusting the current input offset value of the video analog-to-digital converter to a target offset value according to the comparison result of the first synchronization level and the standard synchronization level.

And S13, when the first black level is not in the expected black level range, adjusting the current input gain value of the video analog-to-digital converter to a target gain value according to the comparison result of the first black level and the black level threshold value in the expected black level range.

And S14, returning to the step of acquiring the first characteristic level corresponding to the current output signal of the video analog-to-digital converter.

And S15, when the first synchronization level is in the expected synchronization level range and the first black level is in the expected black level range, determining a current target offset value and a current target gain value.

In the embodiment of the present disclosure, an input end of the video analog-to-digital converter is configured to receive a CVBS signal, where the CVBS signal is an analog signal, the video analog-to-digital converter is configured to perform analog-to-digital conversion processing on the CVBS signal input by the input end to obtain an output signal, and the output signal is a digital signal. The CVBS signal has a SYNC Level (SYNC Level) and a Black Level (Black Level), and the difference between the amplitudes of the SYNC Level and the Black Level of the standard CVBS signal is usually 300 millivolts (mV), and the current input signal of the video analog-to-digital converter, i.e. the CVBS signal, can be analyzed through the magnitudes of these levels, such as the amplitude characteristic of the CVBS signal.

In step S11, the synchronization level and black level detection module may be used to detect a current output signal of the video analog-to-digital converter, and read values of the current synchronization level and black level according to the current output signal, so as to obtain a first characteristic level corresponding to the current output signal, where the first characteristic level includes a first synchronization level and a first black level. In some embodiments, the sync level and black level detection module may employ a video decoder (TV Decode).

After the first characteristic level is acquired, the first sync level is compared with an expected sync level range, and the first black level is compared with an expected black level range to determine whether the first sync level is within the expected sync level range and to determine whether the first black level is within the expected black level range.

In step S12, when the first sync level is not within the expected sync level range, it indicates that the amplitude of the input CVBS signal is deviated and an Offset (Offset) adjustment is required, and therefore, the current input Offset value (Offset) of the video analog-to-digital converter is adjusted to adjust the current input Offset value of the video analog-to-digital converter to the target Offset value according to the comparison result of the first sync level and the standard sync level. The current input offset value of the video analog-to-digital converter is adjusted to adjust the signal amplitude of the input CVBS, so that the output signal code value of the video analog-to-digital converter is increased or decreased, and the first synchronization level corresponding to the current output signal is adjusted.

In step S13, when the first black level is not in the expected black level range, it indicates that there is a deviation in the amplitude of the input CVBS signal and a Gain adjustment is required, so that the current input Gain value (Gain) of the video analog-to-digital converter is adjusted to the target Gain value according to the comparison result of the first black level and the black level threshold in the expected black level range. The input Gain value (Gain) of the video analog-to-digital converter represents the amplification or reduction proportion of an input CVBS signal, the current input Gain value of the video analog-to-digital converter is adjusted, the input CVBS signal is amplified or reduced in proportion, the signal amplitude of the input CVBS signal is adjusted, the code value of an output signal of the video analog-to-digital converter is amplified or reduced in proportion, and therefore the first black level corresponding to the current output signal is adjusted.

In step S14, after the current input offset value and/or the current input gain value of the video analog-to-digital converter are/is adjusted, the step of obtaining the first characteristic level corresponding to the current output signal of the video analog-to-digital converter is returned to, that is, the step S11 is returned to, so as to obtain the first characteristic level corresponding to the current output signal of the video analog-to-digital converter again.

In step S15, when the first sync level is in the expected sync level range and the first black level is in the expected black level range, the signal amplitude of the currently input CVBS signal is satisfied with the expected requirement, and therefore, the current target offset value and the current target gain value of the video analog-to-digital converter are determined according to the current input offset value and the current input gain value of the video analog-to-digital converter.

In an actual test, when a standard CVBS signal (amplitude of 1V) is input, the digital code value corresponding to the black level BLK _ GOLDEN is 62, the digital code value corresponding to the SYNC level SYNC _ GOLDEN is 32, and the difference between the two is DIFF _ SYNC _ BLK is 30. In the embodiment of the present disclosure, a sync level corresponding to an input with a standard CVBS signal (amplitude of 1V) is taken as a standard sync level, and a black level corresponding to an input with a standard CVBS signal (amplitude of 1V) is taken as a standard black level.

In the embodiment of the present disclosure, the expected synchronization level range is configured in advance according to the standard synchronization level, and for example, the expected synchronization level range may be [ standard synchronization level-1, standard synchronization level +1], that is, in the expected synchronization level range, the maximum synchronization level is the standard synchronization level +1, and the minimum synchronization level is the standard synchronization level-1.

In the embodiment of the present disclosure, the expected black level range is determined according to the currently detected first synchronization level and the difference DIFF _ SYNC _ BLK between the standard black level and the standard synchronization level, and for example, the expected black level range may be [ first synchronization level + DIFF _ SYNC _ BLK-1, first synchronization level + DIFF _ SYNC _ BLK +1], that is, in the expected black level range, the maximum black level threshold is the first synchronization level + DIFF _ SYNC _ BLK +1, and the minimum black level threshold is the first synchronization level + DIFF _ SYNC _ BLK-1.

According to the technical scheme of the signal processing method provided by the embodiment of the disclosure, an automatic Gain Offset Control (Auto Gain Offset Control) is performed on an input Offset value (Offset) and an input Gain value (Gain) of a video analog-to-digital converter according to a synchronization level and a black level corresponding to an input CVBS signal, so that the correction of the signal amplitude of the CVBS signal with abnormal signal amplitude is realized, and image information (brightness, contrast, and chroma) in the output signal can be kept basically consistent with image information input by a standard CVBS signal (the signal amplitude is 1V), thereby being beneficial to improving the consistency of the output image information of the video analog-to-digital converter and improving adverse effects on image display quality caused by abnormal amplitude changes of the input CVBS signal.

Fig. 2 is a schematic flow chart of another signal processing method according to an embodiment of the present disclosure.

Referring to fig. 2, in some embodiments, before the step of acquiring the first characteristic level corresponding to the current output signal of the video analog-to-digital converter, i.e. before step S11, the signal processing method further includes: step S21 to step S23.

And S21, acquiring a second characteristic level corresponding to the current output signal of the video analog-to-digital converter, wherein the second characteristic level comprises a second synchronous level and a second black level.

In step S21, the synchronization level and black level detection module may be used to detect a current output signal of the video analog-to-digital converter, and read a current synchronization level and a current black level according to the current output signal, so as to obtain a second characteristic level corresponding to the current output signal.

And S22, judging whether the difference value between the second black level and the second synchronous level meets a preset rough adjusting condition, if so, executing S23, otherwise, skipping to execute S11.

In some embodiments, the determining whether the difference between the second black level and the second sync level satisfies the preset coarse adjustment condition includes: judging whether the difference value between the second black level and the second synchronous level meets any one of the following preset rough adjusting conditions: a difference between the second black level and the second sync level is greater than or equal to a first threshold; the difference between the second black level and the second sync level is less than or equal to a second threshold, which is less than the first threshold.

The first threshold and the second threshold may be configured according to actual needs, and for example, the first threshold may be configured to be 34, and the second threshold may be configured to be 19.

In step S22, when the difference between the second black level and the second sync level is greater than or equal to the first threshold, which indicates that the signal amplitude of the currently input CVBS signal is large, it is determined that the difference between the second black level and the second sync level satisfies the preset Coarse adjustment condition, and step S23 is performed to perform Coarse adjustment (Coarse Gain) on the currently input composite video broadcast signal.

When the difference between the second black level and the second sync level is less than or equal to the second threshold, which indicates that the signal amplitude of the currently input CVBS signal is small, it is determined that the difference between the second black level and the second sync level satisfies the preset Coarse tuning condition, and step S23 is performed to perform Coarse tuning (Coarse Gain) on the currently input composite video broadcast signal.

And when the difference between the second black level and the second synchronous level is greater than the second threshold and smaller than the first threshold, indicating that the signal amplitude of the currently input CVBS signal is moderate, determining that the difference between the second black level and the second synchronous level does not satisfy the preset coarse adjustment condition, without performing coarse adjustment on the currently input CVBS signal, and skipping to execute step S11.

And step S23, when the difference value between the second black level and the second synchronous level meets the preset rough adjustment condition, performing rough adjustment processing on the currently input composite video broadcast signal, and executing step S11.

In some embodiments, when a difference between the second black level and the second sync level satisfies a preset coarse tuning condition, performing a coarse tuning process on the currently input composite video broadcast signal includes: when the difference value between the second black level and the second synchronization level is greater than or equal to a first threshold value, performing reduction processing on the currently input composite video broadcast signal according to a first gain value, wherein the first gain value is a value greater than 0 and less than 1; and when the difference value between the second black level and the second synchronous level is less than or equal to a second threshold value, amplifying the currently input composite video broadcast signal according to a second gain value, wherein the second gain value is a value greater than 1 and less than 2.

The first gain value and the second gain value are preconfigured gain values, and for example, the first gain value may be configured to be 3/4, and the second gain value may be configured to be 4/3.

When the difference between the second black level and the second synchronization level is greater than or equal to the first threshold, it indicates that the signal amplitude of the currently input CVBS signal is larger, so that the currently input composite video broadcast signal is subjected to an overall reduction process according to the first gain value, that is, the currently input composite video broadcast signal is reduced to 3/4 times of the currently input composite video broadcast signal, so as to reduce the overall signal amplitude of the input CVBS signal; when the difference between the second black level and the second sync level is less than or equal to the second threshold, it indicates that the signal amplitude of the currently input CVBS signal is small, and thus the currently input composite video broadcast signal is subjected to an overall amplification process according to the second gain value, that is, the currently input composite video broadcast signal is overall amplified to 4/3 times of the currently input composite video broadcast signal, so as to increase the overall signal amplitude of the input CVBS signal.

It can be understood that, when the difference between the second black level and the second sync level satisfies the preset coarse adjustment condition, the first characteristic level obtained in step S11 is a characteristic level corresponding to an output signal obtained by performing the coarse adjustment process on the input CVBS signal, that is, step S11 is executed after step S23; when the difference between the second black level and the second sync level does not satisfy the preset coarse adjustment condition, the first characteristic level acquired in step S11 and the second characteristic level acquired in step S21 are the same characteristic level corresponding to the same output signal.

Fig. 3 is a schematic flow chart of another signal processing method according to an embodiment of the present disclosure.

Referring to fig. 3, in some embodiments, before the step of obtaining the second characteristic level corresponding to the current output signal of the video analog-to-digital converter, i.e. before step S21, the signal processing method further includes: step S31-step S33.

Step S31, obtaining an initial characteristic level corresponding to a current output signal of the video analog-to-digital converter, wherein the initial characteristic level comprises an initial synchronization level and an initial black level.

In step S31, when it is detected that a CVBS signal is input at the input end of the video analog-to-digital converter, the synchronization level and black level detection module may be used to detect a current output signal of the video analog-to-digital converter, and read values of the current synchronization level and black level according to the current output signal, so as to obtain an initial characteristic level corresponding to the current output signal.

And step S32, judging whether the initial characteristic level corresponding to the current output signal is in a stable state, if so, skipping to execute the step S21, otherwise, executing the step S33.

In some embodiments, determining whether the initial characteristic level corresponding to the current output signal is in a stable state includes: and judging whether the variation of the plurality of initial black levels continuously acquired is greater than or equal to a first variation threshold value or not, and judging whether the variation of the plurality of initial synchronization levels continuously acquired is greater than or equal to a second variation threshold value or not.

When the variation of the plurality of initial black levels continuously acquired is greater than or equal to the first variation threshold, or the variation of the plurality of initial sync levels continuously acquired is greater than or equal to the second variation threshold, it indicates that the signal amplitude of the currently input CVBS signal is too small, resulting in that the initial characteristic level corresponding to the currently output signal is unstable, i.e. not in a stable state, so step S23 is performed to perform a preliminary adjustment on the input CVBS signal.

When the variation of the plurality of continuously acquired initial black levels is smaller than a first variation threshold and the variation of the plurality of continuously acquired initial synchronization levels is greater than or equal to a second variation threshold, it indicates that the initial characteristic level corresponding to the current output signal is stable, that is, in a stable state, and it is not necessary to perform preliminary adjustment on the input CVBS signal.

Step S33, the currently input composite video broadcast signal is amplified according to the third gain value, and the process returns to step S31, where the third gain value is a value greater than 1 and less than 2.

Wherein the third gain value is a preconfigured gain value, and the third gain value may be configured to be 1.5, for example.

When the variation of the plurality of continuously acquired initial black levels is greater than or equal to the first variation threshold, or the variation of the plurality of continuously acquired initial synchronization levels is greater than or equal to the second variation threshold, it indicates that the signal amplitude of the currently input CVBS signal is too small, resulting in that the initial characteristic level corresponding to the currently output signal is unstable, i.e. not in a stable state, so step S23 is executed, and the currently input CVBS signal is subjected to overall amplification processing according to the third gain value, i.e. the currently input CVBS signal is integrally amplified to 1.5 times of the currently input composite video broadcast signal, so as to perform preliminary adjustment on the input CVBS signal, and improve the stability of the input signal.

After the currently input composite video broadcast signal is amplified in step S33, the characteristic level corresponding to the currently output signal is obtained again and it is determined whether the currently output signal is in the stable state, that is, the process returns to step S31 to obtain the characteristic level corresponding to the currently output signal after the amplification process until the currently input CVBS signal is adjusted to the stable state.

Fig. 4 is a flowchart illustrating an embodiment of step S12 in fig. 1.

Referring to fig. 4, in some embodiments, the step of adjusting the current input offset value of the video analog-to-digital converter to the target offset value according to the comparison result of the first sync level and the standard sync level, that is, step S12, may further include: step S41-step S44.

And step S40, judging whether the first synchronization level is greater than the standard synchronization level, if so, executing step S41, and if not, executing step S43.

When the first sync level is greater than the standard sync level, which means that the first sync level is larger than the standard sync level, in order to adjust the first sync level to the standard level (standard sync level) so that the first sync level meets the expected sync level range, steps S41 and S42 are performed to reduce the current input offset value of the video adc.

When the first sync level is less than the standard sync level, indicating that the first sync level is smaller than the standard sync level, in order to adjust the first sync level to the standard level so that the first sync level satisfies the expected sync level range, steps S43 and S44 are performed to increase the current input offset value of the video adc.

And S41, when the first synchronization level is larger than the standard synchronization level, acquiring a first difference value between the first synchronization level and the standard synchronization level.

Wherein the first difference is equal to the first sync level minus the standard sync level.

And step S42, when the current input offset value is greater than or equal to the first difference value, determining a target offset value according to the difference between the current input offset value and the first difference value, and adjusting the current input offset value to the target offset value.

In step S42, the target offset value is the difference between the current input offset value and the first difference value, for example, the current input offset value is 5, the first difference value is 4, and the target offset value is 1.

In step S42, when the current input offset value is greater than or equal to the first difference value, the adjustment gear (adjustment range) indicating the current input offset value can satisfy the target condition of adjusting the first sync level to the standard level so that the first sync level satisfies the expected sync level range, so that the target offset value can be determined according to the difference between the current input offset value and the first difference value, and the current input offset value is adjusted to the target offset value so that the adjusted detected first sync level can satisfy the expected sync level range.

When the current input offset value is smaller than the first difference value, the adjustment gear (adjustment amplitude range) of the current input offset value cannot meet the condition of adjusting the first synchronization level to the standard level, and at this time, the current input offset value can be adjusted to a lowest offset value, that is, the lowest offset value is used as a target offset value, and the current input offset value is adjusted to the target offset value, so that the first synchronization level detected after adjustment can reach a value closest to the standard level (standard synchronization level). Wherein, the lowest offset value refers to the smallest offset value in the adjustable offset value range of the video analog-to-digital converter.

And S43, when the first synchronization level is smaller than the standard synchronization level, acquiring a second difference value between the standard synchronization level and the first synchronization level.

Wherein the second difference is equal to the standard sync level minus the first sync level.

And S44, determining a target offset value according to the sum of the current input offset value and the second difference value, and adjusting the current input offset value to the target offset value.

In step S44, the target offset value is the sum of the current input offset value and the second difference value, for example, the current input offset value is 2, and the second difference value is 3, then the target offset value is 5.

In some embodiments, since there is an adjustment range limit for the input offset value of the video adc, when the target offset value determined in step S44 is greater than the maximum offset value in the range of the adjustable offset values of the video adc, the adjustment range (adjustment amplitude range) indicating that the adjustment range of the current input offset value cannot satisfy the condition for adjusting the first synchronization level to the standard level, at this time, the current input offset value may be adjusted to the maximum offset value, that is, the maximum offset value is used as the target offset value, and the current input offset value is adjusted to the newly determined target offset value, so that the adjusted detected first synchronization level can reach the value closest to the standard level (standard synchronization level).

When the target offset value determined in step S44 is smaller than the maximum offset value in the range of the adjustable offset values of the video adc, the adjustment gear (adjustment amplitude range) indicating the current input offset value can satisfy the target condition of adjusting the first sync level to the standard level, so that the first sync level satisfies the range of the expected sync level.

In some embodiments, before step S12, the signal processing method further includes: the current input offset value of the video analog-to-digital converter is read.

Fig. 5 is a flowchart illustrating an embodiment of step S13 in fig. 1.

Referring to fig. 5, in some embodiments, the black level threshold in the expected black level range includes a maximum black level threshold and a minimum black level threshold in the expected black level range, and the step of adjusting the current input gain value of the video analog-to-digital converter to the target gain value according to the comparison result of the first black level and the black level threshold in the expected black level range, i.e., step S13, may further include: step S51-step S53.

And S51, when the first black level is larger than the maximum black level threshold value in the expected black level range, reducing the current input gain value of the video analog-to-digital converter to obtain a target gain value.

When the first black level is larger than the maximum black level threshold value in the expected black level range, the signal amplitude of the current input CVBS is larger, so that the corresponding black level of the current output signal is larger, and therefore the current input gain value of the video analog-to-digital converter is subjected to reduction processing to obtain a target gain value; and when the first black level is larger than the maximum black level threshold value in the expected black level range, reducing the signal amplitude of the currently input CVBS by reducing the current input gain value of the video analog-to-digital converter, so as to reduce the black level corresponding to the current output signal, and thus enabling the black level corresponding to the current output signal to be adjusted to a value meeting the expected black level range.

And S52, when the first black level is smaller than the minimum black level threshold value in the expected black level range, increasing the current input gain value of the video analog-to-digital converter to obtain a target gain value.

When the first black level is smaller than the minimum black level threshold value in the expected black level range, the signal amplitude of the currently input CVBS is smaller, so that the corresponding black level of the currently output signal is smaller, and therefore the current input gain value of the video analog-to-digital converter is increased to obtain a target gain value; and when the first black level is less than the minimum black level threshold value in the expected black level range, increasing the signal amplitude of the currently input CVBS by increasing the current input gain value of the video analog-to-digital converter, so as to increase the black level corresponding to the currently output signal, so that the black level corresponding to the currently output signal can be adjusted to a value meeting the expected black level range.

In practical application, the gain value can be adjusted by adjusting the gain value gear of the video analog-to-digital converter, the gain value gear is increased, and the signal gain is reduced, namely the gain value is reduced, so that the signal amplitude is reduced; the gain value step is decreased and the signal gain is increased, i.e. the gain value is increased, so that the signal amplitude is increased. In step S51, when the first black level is greater than the maximum black level threshold in the expected black level range, 1 may be added to the current gain value step of the video analog-to-digital converter to reduce the current input gain value of the video analog-to-digital converter by 1 step, so as to obtain a target gain value; in step S52, when the first black level is less than the minimum black level threshold in the expected black level range, the current gain value of the video analog-to-digital converter may be decreased by 1 to increase the current input gain value of the video analog-to-digital converter by 1 step, so as to obtain the target gain value. The gain value corresponding to the specific gain value gear may be set according to an actual situation, which is not particularly limited in the embodiment of the present disclosure.

And S53, adjusting the current input gain value of the video analog-to-digital converter to a target gain value.

In some embodiments, before step S13, the signal processing method further includes: the current input gain value of the video analog-to-digital converter is read.

In some embodiments, in the case that the first sync level is greater than the standard sync level, when the current input offset value is less than the first difference value, that is, when an adjustment step (adjustment amplitude range) of the current input offset value cannot satisfy a condition for adjusting the first sync level to the standard level, after the first sync level is adjusted to a value closest to the standard level (standard sync level), a difference value of the adjusted first sync level and the standard sync level is recorded, and the current input offset value of the video analog-to-digital converter is adjusted according to the difference value. Illustratively, the current input offset value of the video analog-to-digital converter is updated by subtracting the product of the difference value and the adjustment coefficient from the current input offset value of the video analog-to-digital converter through a digital module, wherein the adjustment coefficient can be determined according to actual conditions.

According to the technical scheme of the signal processing method provided by the embodiment of the disclosure, an input Offset value (Offset) and an input Gain value (Gain) of a video analog-to-digital converter are subjected to automatic Gain Offset Control (Auto Gain Offset Control) according to a synchronization level and a black level corresponding to an input CVBS signal, so that the CVBS signal with abnormally changed signal amplitude is corrected, and image information (brightness, contrast, and chroma) in an output signal can be kept basically consistent with image information input by a standard CVBS signal (signal amplitude is 1V), thereby being beneficial to improving the consistency of the output image information of the video analog-to-digital converter and improving adverse effects on image display quality caused by abnormal changes in the amplitude of the input CVBS signal.

Further, when the amplitude difference of the signal output by the signal source is too large and exceeds the adjustment amplitude range of the input offset value of the video analog-to-digital converter, the input offset value of the video analog-to-digital converter is further adjusted, so that the display effect of the image information corresponding to the input CVBS signal is improved.

In practical application, according to the technical scheme provided by the embodiment of the disclosure, the video analog-to-digital converter can support signal input of the CVBS signals with the signal amplitude range of 0.5v to 2v, and by the signal processing method of the embodiment of the disclosure, the image display effect corresponding to the CVBS signals with the input signal amplitude range of 0.5v to 2v can be effectively improved, so that when the CVBS signals with different signal amplitudes are input to the video analog-to-digital converter, the output image information is basically consistent in brightness, contrast and chromaticity.

In practical tests, when the video analog-to-digital converter inputs CVBS signals with different signal amplitudes (such as 0.5V and 1V), the contrast of display pictures corresponding to output image information is basically not different, and the output code values are also basically consistent.

It is understood that the above-mentioned method embodiments of the present disclosure can be combined with each other to form a combined embodiment without departing from the logic of the principle, which is limited by the space, and the detailed description of the present disclosure is omitted. Those skilled in the art will appreciate that in the above methods of the specific embodiments, the specific order of execution of the steps should be determined by their function and possibly their inherent logic.

In addition, the present disclosure also provides a signal processing apparatus, a signal processing system, an electronic device, and a computer-readable storage medium, where the signal processing apparatus and the signal processing system are used to implement the signal processing method provided by the present disclosure, and both the electronic device and the computer-readable storage medium may be used to implement the signal processing method provided by the present disclosure, and corresponding technical solutions and descriptions and corresponding descriptions in the method sections are omitted for brevity.

Fig. 6 is a block diagram of a signal processing apparatus according to an embodiment of the present disclosure, and referring to fig. 6, an embodiment of the present disclosure provides a signal processing apparatus 600, where the signal processing apparatus is configured to perform signal processing on an input signal and an output signal of a video analog-to-digital converter, and the video analog-to-digital converter is configured to perform analog-to-digital conversion processing on an input composite video broadcast signal to obtain a corresponding output signal; the signal processing apparatus 600 includes: an acquisition module 601 and a fine tuning module 602.

The obtaining module 601 is configured to obtain a first characteristic level corresponding to a current output signal of the video analog-to-digital converter, where the first characteristic level includes a first synchronization level and a first black level.

A fine-tuning module 602 configured to: when the first synchronization level is not in the expected synchronization level range, adjusting the current input offset value of the video analog-to-digital converter to a target offset value according to the comparison result of the first synchronization level and the standard synchronization level; when the first black level is not in the expected black level range, adjusting the current input gain value of the video analog-to-digital converter to a target gain value according to the comparison result of the first black level and a black level threshold value in the expected black level range; the triggering acquisition module 601 executes a step of acquiring a first characteristic level corresponding to a current output signal of the video analog-to-digital converter; when the first sync level is within the expected sync level range and the first black level is within the expected black level range, a current target offset value and a current target gain value are determined.

Fig. 7 is a block diagram of another signal processing apparatus according to an embodiment of the disclosure.

Referring to fig. 7, in some embodiments, the signal processing apparatus 600 may further include a first coarse tuning module 603. The obtaining module 601 is further configured to obtain a second characteristic level corresponding to the current output signal of the video analog-to-digital converter before obtaining the first characteristic level corresponding to the current output signal of the video analog-to-digital converter, where the second characteristic level includes a second synchronization level and a second black level. The first coarse tuning module 603 is configured to: judging whether the difference value between the second black level and the second synchronous level meets a preset coarse tuning condition or not; and when the difference value between the second black level and the second synchronous level meets the preset rough adjustment condition, performing rough adjustment processing on the currently input composite video broadcast signal.

Wherein the preset rough adjustment conditions comprise: a difference between the second black level and the second sync level is greater than or equal to a first threshold; the difference between the second black level and the second sync level is less than or equal to a second threshold, which is less than the first threshold. The first coarse tuning module 603 is configured to: when the difference value between the second black level and the second synchronization level is greater than or equal to a first threshold value, performing reduction processing on the currently input composite video broadcast signal according to a first gain value, wherein the first gain value is a value greater than 0 and less than 1; and when the difference value between the second black level and the second synchronous level is less than or equal to a second threshold value, amplifying the currently input composite video broadcast signal according to a second gain value, wherein the second gain value is a value which is greater than 1 and less than 2.

In some embodiments, the signal processing apparatus 600 may further include a second coarse tuning module 604. The obtaining module 601 is further configured to obtain an initial characteristic level corresponding to the current output signal of the video analog-to-digital converter before obtaining a second characteristic level corresponding to the current output signal of the video analog-to-digital converter, where the initial characteristic level includes an initial synchronization level and an initial black level. The second coarse tuning module 604 is configured to: and when the variation of the plurality of continuously acquired initial black levels is greater than or equal to a first variation threshold, or the variation of the plurality of continuously acquired initial synchronization levels is greater than or equal to a second variation threshold, amplifying the currently input composite video broadcast signal according to a third gain value, wherein the third gain value is a value greater than 1 and less than 2.

In some embodiments, the fine tuning module 602 is configured to: when the first synchronization level is larger than the standard synchronization level, acquiring a first difference value between the first synchronization level and the standard synchronization level; when the current input offset value is greater than or equal to the first difference value, determining a target offset value according to the difference between the current input offset value and the first difference value, and adjusting the current input offset value to the target offset value; when the first synchronization level is smaller than the standard synchronization level, acquiring a second difference value between the standard synchronization level and the first synchronization level; and determining a target offset value according to the sum of the current input offset value and the second difference value, and adjusting the current input offset value to the target offset value.

In some embodiments, the fine tuning module 602 is configured to: when the first black level is larger than the maximum black level threshold value in the expected black level range, adding 1 to the current input gain value of the video analog-to-digital converter to obtain a target gain value; and when the first black level is smaller than the minimum black level threshold value in the expected black level range, subtracting 1 from the current input gain value of the video analog-to-digital converter to obtain a target gain value.

The signal processing apparatus provided in the embodiment of the present disclosure is used for implementing the signal processing method provided in the foregoing embodiment, and for specific description, reference may be made to relevant descriptions in the signal processing method of the foregoing embodiment, and details are not described here again.

In some embodiments, the above-mentioned functional modules may be integrated into a register to implement the relevant black level detection function, the sync level detection function, the analog gain and offset adjustment function, and the offset adjustment function of the digital module.

Fig. 8 is a block diagram of a signal processing system according to an embodiment of the present disclosure, and as shown in fig. 8, the embodiment of the present disclosure provides a signal processing system 800, where the signal processing system 800 includes: a video analog-to-digital converter 801 and a signal processing device 802.

The video analog-to-digital converter 801 is configured to perform analog-to-digital conversion on the CVBS signal input by the input end to obtain an output signal.

The signal processing apparatus 802 includes the signal processing apparatus provided in the foregoing embodiments, and for specific description of the signal processing apparatus, reference may be made to the description of the signal processing apparatus in the foregoing embodiments, and details are not described here.

Fig. 9 is a block diagram of an electronic device according to an embodiment of the present disclosure, and referring to fig. 9, an embodiment of the present disclosure provides an electronic device including: at least one processor 91; at least one memory 92, and one or more I/O interfaces 93 connected between the processor 91 and the memory 92; the memory 92 stores one or more computer programs executable by the at least one processor 91, and the one or more computer programs are executed by the at least one processor 81 to enable the at least one processor 91 to perform the signal processing method described above.

The disclosed embodiments also provide a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the above-mentioned signal processing method. The computer readable storage medium may be, among other things, a volatile or non-volatile computer readable storage medium.

The disclosed embodiments also provide a computer program product comprising computer readable code or a non-volatile computer readable storage medium carrying computer readable code, which when run in a processor of an electronic device, the processor in the electronic device performs the above-mentioned signal processing method.

It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer-readable storage media, which may include computer storage media (or non-transitory media) and communication media (or transitory media).

The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable program instructions, data structures, program modules or other data, as is well known to those skilled in the art. Computer storage media includes, but is not limited to, random Access Memory (RAM), read Only Memory (ROM), erasable Programmable Read Only Memory (EPROM), static Random Access Memory (SRAM), flash memory or other memory technology, portable compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by the computer. In addition, communication media typically embodies computer readable program instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.

The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a respective computing/processing device, or to an external computer or external storage device via a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. The network adapter card or network interface in each computing/processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in the respective computing/processing device.

Computer program instructions for carrying out operations of the present disclosure may be assembler instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, the electronic circuitry that can execute the computer-readable program instructions implements aspects of the present disclosure by utilizing the state information of the computer-readable program instructions to personalize the electronic circuitry, such as a programmable logic circuit, a Field Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA).

The computer program product described herein may be embodied in hardware, software, or a combination thereof. In an alternative embodiment, the computer program product is embodied in a computer storage medium, and in another alternative embodiment, the computer program product is embodied in a Software product, such as a Software Development Kit (SDK) or the like.

Various aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.

These computer-readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer-readable program instructions may also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer-readable medium storing the instructions comprises an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.

The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer, other programmable apparatus or other devices implement the functions/acts specified in the flowchart and/or block diagram block or blocks.

The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted in a generic and descriptive sense only and not for purposes of limitation. In some instances, features, characteristics and/or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics and/or elements described in connection with other embodiments, unless expressly stated otherwise, as would be apparent to one skilled in the art. Accordingly, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the disclosure as set forth in the appended claims.

Claims

1. A signal processing method is characterized by being used for a video analog-to-digital converter, wherein the video analog-to-digital converter is used for carrying out analog-to-digital conversion processing on an input composite video broadcast signal to obtain a corresponding output signal; the method comprises the following steps:

acquiring a first characteristic level corresponding to a current output signal of the video analog-to-digital converter, wherein the first characteristic level comprises a first synchronization level and a first black level;

when the first synchronization level is not in the expected synchronization level range, adjusting the current input offset value of the video analog-to-digital converter to a target offset value according to the comparison result of the first synchronization level and the standard synchronization level;

determining a current target offset value and a current target gain value when the first sync level is within an expected sync level range and the first black level is within an expected black level range;

before the obtaining of the first characteristic level corresponding to the current output signal of the video analog-to-digital converter, the method further includes:

acquiring a second characteristic level corresponding to a current output signal of the video analog-to-digital converter, wherein the second characteristic level comprises a second synchronous level and a second black level;

judging whether the difference value between the second black level and the second synchronous level meets a preset coarse adjustment condition or not;

and when the difference value between the second black level and the second synchronous level meets a preset coarse adjustment condition, performing coarse adjustment processing on the currently input composite video broadcast signal.

2. The signal processing method according to claim 1, wherein the determining whether the difference between the second black level and the second sync level satisfies a preset coarse adjustment condition comprises:

judging whether the difference value between the second black level and the second synchronous level meets any one of the following preset rough adjusting conditions:

a difference between the second black level and the second sync level is greater than or equal to a first threshold;

a difference between the second black level and the second sync level is less than or equal to a second threshold, which is less than the first threshold.

3. The signal processing method according to claim 2, wherein the performing coarse adjustment processing on the currently input composite video broadcast signal when the difference between the second black level and the second sync level satisfies a preset coarse adjustment condition comprises:

when the difference between the second black level and the second synchronization level is greater than or equal to a first threshold, performing reduction processing on the currently input composite video broadcast signal according to a first gain value, where the first gain value is a value greater than 0 and less than 1;

and when the difference value between the second black level and the second synchronous level is less than or equal to a second threshold value, amplifying the currently input composite video broadcast signal according to a second gain value, wherein the second gain value is a value greater than 1 and less than 2.

4. The method of claim 1, wherein before said obtaining a second characteristic level corresponding to a current output signal of the video adc, the method further comprises:

acquiring an initial characteristic level corresponding to a current output signal of the video analog-to-digital converter, wherein the initial characteristic level comprises an initial synchronization level and an initial black level;

and when the variation of the plurality of continuously acquired initial black levels is greater than or equal to a first variation threshold, or the variation of the plurality of continuously acquired initial synchronization levels is greater than or equal to a second variation threshold, amplifying the currently input composite video broadcast signal according to a third gain value, wherein the third gain value is a value greater than 1 and less than 2.

5. The method of claim 1, wherein the adjusting a current input offset value of the video ADC to a target offset value according to the comparison of the first sync level and a standard sync level comprises:

when the first synchronization level is greater than the standard synchronization level, acquiring a first difference value between the first synchronization level and the standard synchronization level; and

when the current input offset value is greater than or equal to the first difference value, determining the target offset value according to the difference between the current input offset value and the first difference value, and adjusting the current input offset value to the target offset value;

when the first synchronization level is smaller than the standard synchronization level, acquiring a second difference value between the standard synchronization level and the first synchronization level; and

and determining the target offset value according to the sum of the current input offset value and the second difference value, and adjusting the current input offset value to the target offset value.

6. The signal processing method of claim 1, wherein the adjusting the current input gain value of the video analog-to-digital converter to the target gain value according to the comparison result of the first black level and the black level threshold in the expected black level range comprises:

when the first black level is larger than the maximum black level threshold value in the expected black level range, reducing the current input gain value of the video analog-to-digital converter to obtain the target gain value;

and when the first black level is smaller than the minimum black level threshold value in the expected black level range, increasing the current input gain value of the video analog-to-digital converter to obtain the target gain value.

7. A signal processing device is characterized in that the signal processing device is used for carrying out signal processing on an input signal and an output signal of a video analog-to-digital converter, and the video analog-to-digital converter is used for carrying out analog-to-digital conversion processing on an input composite video broadcast signal to obtain a corresponding output signal; the device comprises:

a fine-tuning module configured to: when the first synchronization level is not in an expected synchronization level range, adjusting a current input offset value of the video analog-to-digital converter to a target offset value according to a comparison result of the first synchronization level and a standard synchronization level; when the first black level is not in the expected black level range, adjusting the current input gain value of the video analog-to-digital converter to a target gain value according to the comparison result of the first black level and a black level threshold value in the expected black level range; triggering the acquisition module to execute the step of acquiring a first characteristic level corresponding to a current output signal of the video analog-to-digital converter; determining a current target offset value and a current target gain value when the first sync level is within an expected sync level range and the first black level is within an expected black level range;

the signal processing device further comprises a first coarse tuning module, wherein the obtaining module is further configured to obtain a second characteristic level corresponding to the current output signal of the video analog-to-digital converter before obtaining a first characteristic level corresponding to the current output signal of the video analog-to-digital converter, and the second characteristic level comprises a second synchronization level and a second black level;

the first coarse tuning module is configured to: judging whether the difference value between the second black level and the second synchronous level meets a preset coarse adjustment condition or not; and when the difference value between the second black level and the second synchronous level meets a preset coarse adjustment condition, performing coarse adjustment processing on the currently input composite video broadcast signal.

8. The signal processing apparatus of claim 7, wherein the fine-tuning module is configured to:

9. The signal processing apparatus of claim 7, wherein the fine-tuning module is further configured to:

10. A signal processing system, comprising:

signal processing apparatus comprising a signal processing apparatus as claimed in any one of claims 7 to 9.