CN1149229A - Antenna booster-mixer circuit - Google Patents
Antenna booster-mixer circuit Download PDFInfo
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- CN1149229A CN1149229A CN96109497A CN96109497A CN1149229A CN 1149229 A CN1149229 A CN 1149229A CN 96109497 A CN96109497 A CN 96109497A CN 96109497 A CN96109497 A CN 96109497A CN 1149229 A CN1149229 A CN 1149229A
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- antenna
- amplifier
- supercharging
- signal
- selector switch
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
- H04N5/775—Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television receiver
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/78—Television signal recording using magnetic recording
- H04N5/782—Television signal recording using magnetic recording on tape
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B31/00—Arrangements for the associated working of recording or reproducing apparatus with related apparatus
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
Abstract
An antenna booster-mixer circuit is incorporated into a VTR (Video Tape Recorder) and comprises an antenna input terminal, an antenna output terminal, at least one boosted amplifier which is electrically connected between the terminals and uses a power supply in common with the VTR, and a signal by-pass circuit electrically connected in parallel with the amplifier. When the power supply for the VTR is turned on for signal recording or reproduction, a received signal supplied to the antenna input terminal is transmitted via the amplifier to the output terminal. When the power supply for the VTR is turned off, the received signal at the input terminal is outputted from the terminal through the by-pass circuit. The circuit prevents unnecessary power consumption.
Description
The present invention relates to insert and be used for the antenna booster-mixer circuit of video tape recorder, in particular in addition also can be between antenna input and output under the situation of video tape recorder power remove the antenna booster-mixer circuit of transmit antenna received signal.
In present eurovision broadcast system, the broadcast singal of being propagated in each channel is play by the UHF wave band.When inserting video tape recorder so that receiving this broadcast singal, usually television antenna is linked to each other with the video tape recorder antenna input, and the video tape recorder antenna output end links to each other so that this broadcast singal is received by television receiver with the input of television receiver.
In addition, antenna booster-mixer circuit is housed in video tape recorder.This antenna booster-mixer circuit has one at least and is used to amplify the amplifier for supercharging of antenna receiving signal, an antenna input, an antenna output end or the like.
In addition, the antenna that is connected to antenna input when TV signal receives and this received television signal when being displayed on the television receiver to receive image format, and this antenna booster-mixer circuit is connected the power supply of video tape recorder so that make amplifier for supercharging enter operating state.Then, the amplifier for supercharging that enters operating state amplifies received television signal and subsequently it is offered television receiver by antenna output end.On the contrary, when TV signal is received by antenna and this received television signal when videoeding machine and writing down, this antenna booster-mixer circuit is connected the power supply of video tape recorder so that make amplifier for supercharging enter operating state.Then, the amplifier for supercharging that enters operating state amplifies this received television signal.After this, this amplifying signal is branched to the tuner of video tape recorder so that provide it to this tuner, and signal such as required image extracts by demodulation and from this amplifying signal in this tuner, thereby the picture signal that is produced is recorded on the video tape recorder.Reset when needs signal (it is recorded on the video tape recorder) such as this image and when being presented at television receiver on to receive image format this replay signal, this replay signal puts on mixer stage by high-frequency modulator, so that form the signal that is equivalent to TV signal, offer television receiver then again.
Fig. 7 is a profile schematic diagram, and it has been described and has been used to receive based on the known receiving equipment (being video tape recorder) of eurovision broadcast system broadcast singal and the annexation between the television receiver.Fig. 8 has described the internal structure of video tape recorder shown in Figure 7.In Fig. 8, the structured flowchart of Fig. 8 A described television receiver and antenna booster-mixer circuit and and video tape recorder between dosage and annexation.Fig. 8 B is a circuit block diagram, and it has described the specific internal of antenna booster-mixer circuit shown in Fig. 8 A.
Shown in Fig. 7, Fig. 8 A and Fig. 8 B, video tape recorder (VTR) 41 comprises antenna input 53, antenna output end 54, antenna booster-mixer circuit 42 and playback circuitry 43.Antenna 44 is electrically connected with antenna input 53, and the antenna input 55 of television receiver 45 is electrically connected with antenna output end 54.Antenna booster-mixer circuit 42 has first coupling capacitance 58, first amplifier for supercharging 46, first inductance 57, first division device 47, second amplifier for supercharging 48, second inductance 58, second splitter 49, second coupling capacitance 59 and high frequency (RF) modulator 50.Playback circuitry 43 has recording playback unit 51 and tuner 52.
In antenna booster-mixer circuit 42 1 sides, first amplifier for supercharging 46 has input that links to each other with antenna input 53 by first coupling capacitance 56 and the output that links to each other with first division device 47 inputs.An output of first division device 47 links to each other with the input of second amplifier for supercharging 48, and its another output links to each other with the input of playback circuitry 43 1 side tuners 52.An input of second splitter 49 links to each other with the output of second amplifier for supercharging 48, and its another input links to each other with the output of high-frequency modulator 50, and its output links to each other with antenna output end 54 by second coupling capacitance 59.The input of high-frequency modulator 50 links to each other with the output of playback circuitry 43 1 side recording playback unit 51.The power supply of first amplifier for supercharging 46 is connected to power end 60 by first inductance 57, and the power supply of second amplifier for supercharging 48 links to each other with power end 60 by second inductance 58.In playback circuitry 43 1 sides, the input of recording playback unit 51 links to each other with the output of tuner 52.
The course of work of the antenna booster-mixer circuit 42 of said structure is as follows:
At first connect the power supply of video tape recorder 41 so that the source voltage of first and second amplifier for supercharging 46 and 48 is offered power end 60.Now, when received television signal was received by television receiver 45 with image format, the signal that is received by antenna 44 offered first amplifier for supercharging 46 of antenna booster-mixer circuit 42 from antenna input 53 via first coupling capacitance 56.Next, this received signal is amplified by first amplifier for supercharging 46, is provided for splitter 47 then, and this signal is divided into two parts there.One of this heading signal is admitted to second amplifier for supercharging 48 and amplifies.After this, this amplifying signal offers second coupling capacitance 59 by second splitter 49, then to receive the antenna input 55 that image format offers television receiver 45.When needs recorder signal and simultaneously carry out image to received signal when receiving on video tape recorder by television receiver 45, or when recorder signal on video tape recorder 41 and do not carry out image to received signal when receiving by television receiver 45, tuner 52 in the playback circuitry 43 plays the effect of another signal of being told by first division device 47 being carried out frequency translation and demodulation, so that when tuner 52 receives this signal, this signal transformation is become the picture signal that is fit to video recording, then this picture signal is delivered to recording playback unit 51 and carried out record.Next step, when need be to being recorded in the playback circuitry 43 that the picture signal on the recording playback unit 51 is reset and when utilizing television receiver 45 to receive these reproduced picture signals, 50 pairs of these replay signal of the high-frequency modulator in the antenna booster-mixer circuit 42 be modulated with frequency translation so that in the recording playback unit 51 and it are transformed into the received signal that is suitable for TV signal when resetting these picture signals.Received signal after this conversion is delivered to second coupling capacitance 59 by second splitter 49, and the antenna input 55 of delivering to television receiver 45 then is received with image format.
Therefore, the known antenna booster-mixer circuit 42 of above-mentioned structure can be realized three kinds of functions, be about to TV receiving signal and offer television receiver 45 with image format, TV receiving signal is offered video tape recorder 41 record a video, and the replay signal of video tape recorder 41 is offered television receiver 45 receive with image format.
There is a problem in this known antenna booster-mixer circuit 42, promptly have only first and second amplifier for supercharging 46 and 48 power supply separately to be used as the power supply of video tape recorder 41 jointly, that is to say the power connection of video tape recorder 41, then first and second amplifier for supercharging 46 and 48 power supply just can be connected, otherwise received signal just can not show on television receiver 45 as image.
Although this is because be used for the splitter that received signal resolves into other signal to be contained among the video tape recorder 41, and because this received signal is decayed in splitter significantly and the electric field of UHF wave band receiving broadcast signal and not very big, so will in antenna booster-mixer circuit 42, insert first and second amplifier for supercharging 46 and 48 compensating the huge decay of this received signal, thereby improve the quality that image shows.
On the other hand, in this known antenna booster-mixer circuit 42, problem below existing, promptly as mentioned above, because even the power supply that still must make video tape recorder 41 under the situation that only activates television receiver 45 keeps connecting, consume unnecessary power so in video tape recorder 41, contain, and thisly unfavorablely considering that energy-conservation not wishing in any case occurs.
As previously mentioned, the object of the present invention is to provide a kind of antenna booster-mixer circuit, this circuit had both made also can not have under the situation of disconnecting the video tape recorder power supply not using video tape recorder and had transmitted received signal significantly damply, thereby had avoided unnecessary energy consumption.
According to an aspect of the present invention,, provide an antenna booster-mixer circuit that places among the video tape recorder for achieving the above object, comprising: antenna input; Antenna output end; At least one amplifier for supercharging, this amplifier be connected between antenna input and the antenna output end and with the shared power supply of video tape recorder; And the signal bypass resistance in parallel with amplifier for supercharging.Wherein when the power connection of video tape recorder, be transferred to antenna output end by the signal (it has offered antenna input) that antenna received from amplifier for supercharging, and when the power remove of video tape recorder, the received signal that offers antenna input is exported from antenna output end by the signal bypass resistance.
According to above-mentioned aspect of the present invention, antenna booster-mixer circuit comprises at least one amplifier for supercharging, and the power supply of this amplifier is connected and turn-offed according to the break-make of video tape recorder power supply, and signal bypass resistance and this amplifier for supercharging are in parallel.When connecting the video tape recorder power supply with video tape recorder record or playback received signal, its corresponding amplifier for supercharging of the signal transmission pathway of antenna booster-mixer circuit is connected.At this moment, the received signal that offers antenna input is also stood required signal processing so that convert picture signal to subsequently by this amplifier for supercharging amplification.The playback circuitry that this picture signal is provided for video tape recorder carries out record.In other words, after the picture signal in being recorded in playback circuitry was reset, it will be through the necessary image signal processing so that convert received signal to, and then this received signal offers television receiver via antenna output end and resets with image format.Otherwise when turn-offing the video tape recorder power supply when only carrying out signal to receive, the transmission channel of antenna booster-mixer circuit and signal bypass resistance are connected.At this moment, the received signal that offers antenna input is directly delivered to antenna output end and is offered television receiver via this antenna output end subsequently by this signal bypass resistance and reproduced to receive image format.
Therefore, according to above-mentioned aspect of the present invention, can obtain such antenna booster-mixer circuit, even if it can big loss does not take place not offer television receiver with received signal under the situation of the power supply of disconnecting antenna booster-mixer circuit without video tape recorder recording playback signal (promptly only carrying out signal receives), thereby avoids unnecessary energy resource consumption.
By following explanation, the accompanying drawing in conjunction with describe preferred version of the present invention with straight reality example it will be apparent that above-mentioned and other purpose, characteristics and superiority of the present invention.
Brief Description Of Drawings:
The present invention will describe with reference to following accompanying drawing, wherein:
The block diagram of Fig. 1 has been described configuration and the annexation between antenna booster-mixer circuit of the present invention, video tape recorder and the television receiver;
Fig. 2 is the circuit sketch, and it has described according to the present invention first scheme of antenna booster-mixer circuit;
Fig. 3 is the circuit sketch, and it has described according to the present invention the alternative plan of antenna booster-mixer circuit;
Fig. 4 is the circuit sketch, and it has described according to the present invention third party's case of antenna booster-mixer circuit;
Fig. 5 has described the state that is used for first and second each elements of scheme illustrated in figures 1 and 2, the tabular of the expression form of this state for receiving, recording a video and reset;
Fig. 6 has described respectively being applied to the drain voltage/current characteristics of N passage field effect transistor grid-source voltage in first and second selector switches;
The annexation that the schematic diagram of Fig. 7 has been described video tape recorder, television receiver and has been used for eurovision broadcasting receiver antenna;
Fig. 8 is the circuit sketch, and it has described an example of antenna booster-mixer circuit in the video tape recorder shown in Figure 7.
Below with reference to accompanying drawing preferred version of the present invention is elaborated.
The block diagram of Fig. 1 has been described configuration and the annexation between antenna booster-mixer circuit of the present invention, video tape recorder and the television receiver.The circuit sketch of Fig. 2 has been described according to the present invention first scheme of antenna booster-mixer circuit.
As depicted in figs. 1 and 2, each video tape recorder (VTR) 1 comprises antenna booster-mixer circuit 2, playback circuitry 3, antenna input 14 and antenna output end 15.Antenna 4 joins with antenna input 14, and the antenna input of television receiver 5 and antenna output end 15 join.Each antenna booster-mixer circuit 2 shown in Fig. 1 and Fig. 2 comprises first coupling capacitance 19, first selector switch 6, first buffer resistance 21, second coupling capacitance 20, first amplifier for supercharging 7, first inductance 22, first division device 8, second amplifier for supercharging 9, second inductance 23, second splitter 10, the 3rd coupling capacitance 24, second buffer resistance 25, second selector switch 11, the 4th coupling capacitance 26, signal bypass resistance 12 and high frequency (RF) modulator 13.Playback circuitry 3 has recording playback unit 16 and tuner 17.In addition, each first selector switch 6 shown in Fig. 1 and Fig. 2 comprises the first switch N passage field effect transistor 6 (1), first switching diode 6 (2) and first resistance 6 (3), and each second selector switch 11 has field effect 11 (1), second switch diode 11 (2) and the 3rd resistor 11 (3) of second switch N passage.First division device 8 comprise first division part 8 (1) and second splitter 10 comprise second the division part 10 (1).Each signal bypass resistance 12 comprises first high resistance 12 (1), second high resistance 12 (2), the 5th coupling capacitance 12 (3), the 6th coupling capacitance 12 (4), the 5th resistance 12 (5) and bypass diode 12 (6).
In antenna booster-mixer circuit 2 one sides, the input of first selector switch 6 links to each other with antenna input 14 by first coupling capacitance 19, its first output links to each other with first buffer resistance 21 by second coupling capacitance 20 respectively with power end 27 with the input of first amplifier for supercharging 7 simultaneously, and its second output links to each other with the input of signal bypass resistance 12.The output of first amplifier for supercharging 7 links to each other with the input of first division device 8, and its power supply links to each other with power end 27 by first inductance 22.An output of first division device 8 links to each other with the input of second amplifier for supercharging 9, and its another output links to each other with the input of playback circuitry 3 one side tuners 17.The output of second amplifier for supercharging 9 links to each other with an input of second splitter 10, and its power supply links to each other with power end 27 by second inductance 23.Another input of second splitter 10 links to each other with the output of high-frequency modulator 13, and its output links to each other with the input of second selector switch 11 by the 3rd coupling capacitance 24.The first input end of second selector switch 11 links to each other with power end 27 by second buffer resistance 25, and its second input links to each other with the output of signal bypass resistance 12, and its output links to each other with antenna output end 15 by the 4th coupling capacitance 26.The input of high-frequency modulator 13 links to each other with the output of playback circuitry 3 one side recording playback unit 16.
In first selector switch 6, the source electrode of the first switched field effect pipe 6 (1) links to each other with the negative electrode of first coupling capacitance 19, first switching diode 6 (2) and an end of first resistance 6 (3), its grid links to each other with ground with the other end of first resistance 6 (3), and its drain D links to each other with the input of signal bypass resistance 12.The anode of first switching diode 6 (2) links to each other with second coupling capacitance 20.In second selector switch 11, the source electrode of second switch field effect transistor 11 (1) links to each other with the negative electrode of the 4th coupling capacitance 26, second switch diode 11 (2) and an end of the 3rd resistance 11 (3), its grid links to each other with ground with the other end of the 3rd resistance 11 (3), and its drain electrode links to each other with the output of signal bypass resistance 12.The negative electrode of second switch diode 11 (2) links to each other with the 3rd coupling capacitance 24.In signal bypass resistance 12, an end of first high resistance 12 (1) links to each other with the input of signal bypass resistance 12 and links to each other with the anode of bypass diode 12 (6) by the 5th coupling capacitance 12 (3), and its other end ground connection.The anode of bypass diode 12 (6) links to each other with power end 27 by the 5th resistance 12 (5) and links to each other with an end of second high resistance 12 (2) by the 6th coupling capacitance 12 (4), and its minus earth.One end of second high resistance 12 (2) links to each other with the output of signal bypass resistance 12, and its other end ground connection.In this case, the characteristic that is used for the first switch N passage field effect transistor 6 (1) of first selector switch 6 and is used for the second switch N passage field effect transistor 11 (1) of second selector switch 11 is provided by Fig. 6 respectively.In other words, these two field effect transistor have following characteristic respectively: as drain voltage (V
D) when increasing gradually, drain current (I
D) at this drain voltage (V
D) be low state during be proportional to drain voltage and increase.In addition, these two field effect transistor also have following characteristic: as drain voltage (V
D) during greater than the growth point, drain current (I
D) value according to grid-source voltage (V
GS) value and become constantly, that is to say, as grid-source voltage (V
GS) be 0 o'clock, drain current (I
D) steady state value reach maximum, and along with grid-source voltage (V
GS) be worth to become and bear drain current (I
D) steady state value reduce gradually.
In addition, the input of recording playback unit 16 links to each other with the output of playback circuitry 3 one side tuners 17.
The antenna booster-mixer circuit 2 of this scheme carries out work as follows under the said structure condition according to the present invention.
When the received signal that is received by antenna 4 under power supply or video tape recorder 1 power remove state is at first delivered to television receiver 5 by antenna booster-mixer circuit 2 (after this being referred to as " accepting state "), owing to do not provide any source voltage on the power end 27, then first and second selector switches 6 and 11 first and second switching diodes 6 (2) and 11 (2) are turned off.When first and second switching diodes 6 (2) and 11 (2) are turned off, the first and second switched field effect pipes 6 (1) and grid-source voltage (V of 11 (1)
GS) be biased to zero respectively.This moment, characteristic for example shown in Figure 6 was as grid-source voltage (V in first and second switching diodes 6 (2) and 11 (2)
GS) when being biased to zero, drain current (I
D) reach maximum.That is to say that the first and second switched field effect pipes 6 (1) and 11 (1) are switched on so that make first and second selector switches 6 and 11 switch to signal zero circuit passband 12.Now, when the signal that is received by antenna 4 is provided for the antenna input 14 of antenna booster-mixer circuit 2, this received signal is sent to antenna output end 15 by first selector switch 6, signal bypass resistance 12 and second selector switch 11, and this is because first and second selector switches 6 and 11 have been switched to the cause of signal bypass resistance 12.Next, this received signal is sent to the antenna input 18 of television receiver 5 so that reproduced or this received signal of resetting with image format by television receiver 5.Because the bypass diode 12 (6) that this moment, passive voltage put in power end 27 and the signal bypass resistance 12 is in cut-off state, then this received signal that puts on signal bypass resistance 12 inputs is transferred to the output of signal bypass resistance 12 with very little loss of signal by the 5th coupling capacitance 12 (3) and the 6th coupling capacitance 12 (4).
In addition, when the playback circuitry in the video tape recorder 13 is used to the signal that antenna 4 receives write down as picture signal (after this being referred to as " recording status "), or when playback of recorded in playback circuitry 3 picture signal and when this replay signal offered television receiver 5 as the image received signal (after this being referred to as " playback mode "), the power connection of video tape recorder 1 is so that provide source voltage for the power end 27 of antenna booster-mixer circuit 2.At this moment, forward bias (positive voltage) is applied to respectively between first and second switching diodes 6 (2) and 11 (2) of first and second selector switches 6 and 11 with the sun-cathode voltage form that is produced by power end 27 source voltages.Thereby first and second switching diodes 6 (2) and 11 (2) are respectively placed on conducting state.Like this, the first and second switched field effect pipes 6 (1) and 11 (1) are worked as follows, promptly along with grid-source voltage (V
GS) the negative bias value constantly increase, for instance, drain current (I
D) can reduce significantly by characteristic curve shown in Figure 6.Because grid-source voltage (V
GS) change according to the selection of first buffer resistance 21 and first resistance, 6 (3) resistances, so should select the resistance of first buffer resistance 21 and first resistance 6 (3) so that make grid-source voltage (V
GS) increase by possible negative direction.If carried out above-mentioned selection, then the first and second switched field effect pipes 6 (1) and 11 (1) are cut off so that make first and second selector switches 6 and 11 switch to first and second amplifier for supercharging 7 and 9 respectively.
Because first and second selector switches 6 and 11 were switched to first and second amplifier for supercharging 7 and 9 respectively when the signal that received when antenna 4 under recording status was sent to the antenna input 14 of antenna booster-mixer circuit 2, then this received signal is sent to first amplifier for supercharging 7 and first division device 8 from first selector switch 6, and through this splitter separated into two parts.After this, a received signal branch through first division device 8 is sent to antenna output end 15 by second amplifier for supercharging 9, second splitter 10 and second selector switch 11.Then, this signal is sent to the antenna input of television receiver 5 and is reproduced as the reception image.Meanwhile, be sent to the tuner 17 of playback circuitry 3 one sides through another received signal branch of first division device 8, so that convert the picture signal that is suitable for writing down to, this picture signal is sent to recording playback unit 16 and carries out record subsequently through frequency translation and demodulation for this received signal there.
When carrying out playback time by the recording playback unit in the playback circuitry 3 16 at playback mode hypograph signal, this picture signal in the high-frequency modulator 13 of antenna booster-mixer circuit 2 through ovennodulation and frequency translation so that be converted into the received signal that is suitable for TV signal.This received signal through conversion is sent to antenna output end 15 from second splitter 10 by second selector switch 11, delivers to the antenna input 18 of television receiver 5 then again, and after this this received signal is reset to receive image format by television receiver 5.
Therefore, antenna booster-mixer circuit 2 according to first scheme, received signal even at video tape recorder 1 power remove and do not have the energy to offer also can not produce big loss ground under the situation of antenna booster-mixer circuit 2 to be sent to television receiver 5 by signal bypass resistance 12, thus unnecessarily energy resource consumption do not produced.
According to the antenna booster-mixer circuit 2 of first scheme, compare with conventional antenna booster-mixer circuit shown in Fig. 8 B, can improve intermodulation distortion.
Next, the circuit diagram of Fig. 3 has been described according to the present invention the alternative plan of antenna booster-mixer circuit.In alternative plan, the circuit structure of first and second selector switches 6 that are used for first scheme and 11 has been carried out partly changing.
In Fig. 3, with the element of same configuration among Fig. 2 with same numerical reference and will omit its explanation.
As shown in Figure 3, the first switched field effect pipe 6 (1) in first selector switch 6 links to each other with ground by second resistance 6 (4), and does not resemble the direct ground connection of grid the first switched field effect pipe 6 (1) that is used for first scheme.In addition, second switch field effect transistor 11 (1) in second selector switch 11 by the 4th resistance 11 (4) ground connection, and does not resemble the direct ground connection of grid the second switch field effect transistor 11 (1) that is used for first scheme in the mode identical with the first switched field effect pipe 6 (1).
Since the operation principle of the alternative plan of said structure receive, write down and each state of resetting under all basic identical with aforementioned first scheme, so the course of work of alternative plan will not elaborated.
In this case, according to the antenna booster-mixer circuit 2 of alternative plan except have with the first scheme identical operations and effect also can provide and compare 11 to 22dB intermodulation distortion with conventional antenna booster-mixer circuit shown in Fig. 8 B and improve.Thereby can find, even under the situation that alternative plan and first scheme compare, the improvement degree of intermodulation distortion is also very remarkable.
Say that now Fig. 4 has described according to the present invention the circuit structure of antenna booster-mixer circuit third party case.In third party's case, be used for first scheme, first and second selector switches 6 and 11 and the circuit structure of signal bypass resistance 12 relative sections done change respectively.
In Fig. 4, with the element of same configuration among Fig. 2 with same numerical reference and will omit its explanation.
As shown in Figure 4, first selector switch 6 comprises the 3rd switching diode 6 (5) and the 4th switching diode 6 (6).The input of first selector switch 6 links to each other with antenna input 14 by first coupling capacitance 19, and by the 9th resistance 28 ground connection, its first output links to each other with the input of first amplifier for supercharging 7, and its second output links to each other with the input of signal bypass resistance 12.Second selector switch 11 comprises the 5th switching diode 11 (5) and the 6th switching diode 11 (6).The first input end of second selector switch 11 links to each other with the output of second splitter 10, its second input links to each other with the output of signal bypass resistance 12, and its output links to each other with antenna output end 15 by the 4th coupling capacitance 26 and passes through the tenth resistance 29 ground connection.Signal bypass resistance 12 comprises the 7th coupling capacitance 12 (7), the 6th resistance 12 (8), the second and the 3rd bypass diode 12 (9) and the 12 (10), the 7th resistance 12 (11), smoothing capacity 12 (12) and the 8th resistance 12 (13).In first selector switch 6, the anode of the 3rd switching diode 6 (5) links to each other with first amplifier for supercharging 7, and its negative electrode links to each other with the negative electrode of first coupling capacitance 19 with the 4th switching diode 6 (6).The anode of the 4th switching diode 6 (6) links to each other with the input of signal bypass resistance 12.In second selector switch 11, the anode of the 5th switching diode 11 (5) links to each other with second splitter 10, and its negative electrode links to each other with the negative electrode of the 4th coupling capacitance 26 with the 6th switching diode 11 (6).The anode of the 6th switching diode 11 (6) links to each other with the output of signal bypass resistance 12.In signal bypass resistance 12, the two ends of the 7th coupling capacitance 12 (7) link to each other with output with the input of signal bypass resistance 12 respectively.One end of the 6th resistance 12 (8) links to each other with an end of the 7th coupling capacitance 12 (7), and its other end links to each other with the Switching Power Supply end 30 of supplying with switching voltage.Second links to each other with an end of the 7th resistance 12 (11) and smoothing capacity 12 (12) respectively with 12 (10) anode with the 3rd bypass diode 12 (9), and its negative electrode then links to each other with the other end of the 7th coupling capacitance 12 (7).The other end of the 7th resistance 12 (11) links to each other with power end 27, and the other end ground connection of smoothing capacity 12 (12).The two ends of the 8th resistance 12 (13) link to each other with output with the input of signal bypass resistance 12 respectively.Point out that in passing what Switching Power Supply end 30 was applied is the positive polarity switching voltage under accepting state.Under record and playback mode, what applied on the Switching Power Supply end 30 is corresponding to earthy switching voltage.
Since the operation principle of third party's case of said structure receive, write down and each state of resetting under all basic identical with aforementioned first scheme, so the course of work of third party's case will not elaborated.
Yet, when the power supply of video tape recorder 1 is in off state, the 3rd switching diode 6 (5) in first selector switch 6 is reverse biased so that turn-offed by the positive polarity switching voltage at Switching Power Supply end 30 places (it provides by the 6th resistance 12 (8)), and the 4th switching diode 6 (6) by forward bias so that connected by this switching voltage.Thereby first selector switch 6 switches to signal bypass resistance 12.Because the 5th switching diode 11 (5) is reverse biased so that turn-offed by the positive polarity switching voltage at Switching Power Supply end 30 places (it provides by the 6th resistance 12 (8) and the 8th resistance 12 (13)), and the 6th switching diode 11 (6) connected by forward bias so that by this switching voltage, so second selector switch 11 also switches to signal bypass resistance 12.In addition, because the second and the 3rd bypass diode 12 (9) and 12 (10) in the signal bypass resistance 12 is reverse biased respectively down to being turn-offed by the voltage at power end 27 places (it provides by the 5th resistance 12 (8) and the 7th resistance 12 (11)), so the received signal that puts on signal bypass resistance 12 inputs is transferred to its output by the 7th coupling capacitance 12 (7) with less loss of signal.
Otherwise, when the power supply of video tape recorder 1 is in on-state, the voltage at Switching Power Supply end 30 places (it provides by the 6th resistance 12 (8)) is changed to earth potential, so that connected by the source voltage at power end 27 places (it is provided by the input of first amplifier for supercharging 7), and the 4th switching diode 6 (6) is reverse biased so that turn-offed by this source voltage the 3rd switching diode 6 (5) by forward bias.Thereby first selector switch 6 is switched to first and second amplifier for supercharging 7 and 9.Because the voltage (it provides by the 6th resistance 12 (8) and the 8th resistance 12 (13)) at Switching Power Supply end 30 places is set to earth potential, and the source voltage at power end 27 places is provided by second splitter 10 by second amplifier for supercharging 9, so the 6th switching diode 11 (6) is reverse biased so that be turned off the 5th switching diode 11 (5) so that be switched on by forward bias.As a result, second selector switch 11 also switches to first and second amplifier for supercharging 7 and 9.
According to above-mentioned third party's case, antenna booster-mixer circuit 2 can be used the mode identical with first scheme and obtain, it in addition video tape recorder 1 power supply be in off state and do not have the energy offer under the situation of this antenna booster-mixer circuit 2 also can with received signal by signal bypass resistance 12 no remarkable losses deliver to television receiver, thereby can avoid producing unnecessary energy resource consumption.
Fig. 5 has described and has been used for first state to each element of third party's case, and it provides according to reception, record and the playback mode form with tabulation.Fig. 5 A has provided the tabular about first and second schemes, and Fig. 5 B has provided the tabular about third party's case.
In first and second schemes shown in Fig. 5 A, video tape recorder 1 at first is switched under the recording playback state with antenna booster-mixer circuit 2 power supply separately, thereby first selector switch 6 and second selector switch 11 all are switched to first and second amplifier for supercharging 7 and 9.Under recording status, the part of received signal is sent to and is recorded on the playback circuitry 3 of video tape recorder 1, and residue received signal part then is sent to television receiver 5 and resets with image format.Under playback mode, all signals that reappeared by playback circuitry 3 all are sent to television receiver 5 and reset with image format.In addition, under accepting state, video tape recorder 1 and antenna booster-mixer circuit 2 power supply are separately disconnected, thereby first selector switch 6 and second selector switch 11 all are switched to signal bypass resistance 12.After this, whole received signals are sent to television receiver to receive the form reproduction of image via signal bypass resistance 12.
In the third party's case shown in Fig. 5 B, under the recording playback state, the power supply separately of video tape recorder 1 and antenna booster-mixer circuit 2 and then is switched on and Switching Power Supply end 30 is applied in corresponding earthy switching voltage, thereby first selector switch 6 and second selector switch 11 all are switched to first and second amplifier for supercharging 7 and 9.Under recording status, the part received signal is applied in and is recorded on the playback circuitry 3 of video tape recorder 1, and remaining part signal then is sent to television receiver 5 and resets to receive image format.Under playback mode, the whole signals that reappeared by playback circuitry 3 all are sent to television receiver to receive the image format reproduction.In addition, under accepting state, video tape recorder 1 and antenna booster-mixer circuit 2 power supply separately disconnect and Switching Power Supply end 30 is applied in the positive polarity switching voltage, thereby first selector switch 6 and second selector switch 11 all are switched to signal bypass resistance 12.After this, all received signals all are sent to television receiver 5 to receive the image format reproduction via signal bypass resistance 12.
As above-mentioned detailed description, according to the present invention, can obtain an antenna booster-mixer circuit, this circuit even be under the situation that off state and energy free offer antenna booster-mixer circuit at the video tape recorder power supply and also can received signal do not delivered to television receiver with not producing big loss by this antenna booster-mixer circuit, thus can prevent to produce unnecessary energy resource consumption.
In addition,, compare, can improve intermodulation distortion with conventional antenna booster-mixer circuit according to the present invention.
Although the present invention has been done detailed explanation, obviously for those persons skilled in the art, can not break away from that the essence of the present invention that proposes is wanted herein or the situation of scope under make many variations and improvement.
Claims (6)
1. the antenna booster-mixer circuit in the video tape recorder, it is characterized in that: it comprises antenna input, antenna output end, be connected between this antenna input and this antenna output end and with at least one amplifier for supercharging of the shared power supply of this video tape recorder, and the signal bypass resistance that is in parallel with this amplifier for supercharging, wherein when this video tape recorder power connection, the signal that antenna received (having put on this antenna input) is sent to this antenna output end from this amplifier for supercharging, and when this video tape recorder power remove, this received signal that puts on this antenna input is exported by this antenna output end by this signal bypass resistance.
2. according to the antenna booster-mixer circuit of claim 1, it is characterized in that: mixer stage is connected between this amplifier for supercharging and this antenna output end, and an input of this mixer stage and the output of this amplifier for supercharging join, its another input be used for the output that this video tape recorder replay signal is carried out the high-frequency modulator of high frequency modulated is joined, and its output and this antenna output end join.
3. according to the antenna booster-mixer circuit of claim 1 and 2, it is characterized in that: at least one that is used for switching with this amplifier for supercharging or this signal bypass resistance that the selector switch that is connected and this antenna input or output end joined, and this selector switch carries out the selectivity operation according to the on/off state of this amplifier for supercharging power supply.
4. according to the antenna booster-mixer circuit of claim 3, it is characterized in that: this selector switch comprises N passage field effect transistor, be connected to the biasing resistor between this field effect transistor grid source electrode, and the switching diode that joins of negative electrode and this field effect transistor source electrode, and the operation principle of this selector switch is as follows: the source electrode of field effect transistor joins with this antenna input or this antenna output end, the anode of this diode joins by the power supply that inputs or outputs end and buffer resistance and this amplifier for supercharging of this amplifier for supercharging, and the drain electrode of this field effect transistor and this signal bypass resistance join, wherein when this amplifier for supercharging power connection, this diode current flow and this field effect transistor are by so that make this selector switch switch to this amplifier for supercharging, and when this amplifier for supercharging power remove, this this selector switch of field effect transistor conducting switches to this signal bypass resistance thereby this diode ends.
5. according to the antenna booster-mixer circuit of claim 4, it is characterized in that: the setting of this N passage field effect transistor is that its grid is by resistance ground connection.
6. according to the antenna booster-mixer circuit of claim 3, it is characterized in that: this selector switch comprises the switching diode that two targets connect mutually altogether, the operation principle of this selector switch is as follows: this negative electrode that connects altogether to diode joins with this antenna input or this antenna output end, the anode of one of them diode joins by the power supply that this amplifier for supercharging inputs or outputs end and this amplifier for supercharging, the anode of another diode then joins with this signal bypass resistance, wherein when this amplifier for supercharging power connection, thereby one of them diode current flow and another diode switch to this amplifier for supercharging by this selector switch, otherwise, when this amplifier for supercharging power remove, thus wherein another diode also this selector switch of conducting switch to this signal bypass resistance.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22193395 | 1995-08-30 | ||
| JP221933/95 | 1995-08-30 | ||
| JP118961/96 | 1996-05-14 | ||
| JP11896196A JP3481388B2 (en) | 1995-08-30 | 1996-05-14 | Antenna booster mixer circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1149229A true CN1149229A (en) | 1997-05-07 |
| CN1094692C CN1094692C (en) | 2002-11-20 |
Family
ID=26456787
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN96109497A Expired - Fee Related CN1094692C (en) | 1995-08-30 | 1996-08-30 | Antenna booster-mixer circuit |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JP3481388B2 (en) |
| KR (1) | KR100211755B1 (en) |
| CN (1) | CN1094692C (en) |
| DE (1) | DE19634838B4 (en) |
| GB (1) | GB2305015B (en) |
| MY (1) | MY119494A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1111331C (en) * | 1999-02-05 | 2003-06-11 | 夏普公司 | Radio frequency modulator with isolation switch and signal route |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3481388B2 (en) * | 1995-08-30 | 2003-12-22 | アルプス電気株式会社 | Antenna booster mixer circuit |
| GB2313238A (en) * | 1996-05-14 | 1997-11-19 | Alps Electric Co Ltd | Antenna booster mixer circuit |
| JPH11164212A (en) * | 1997-11-28 | 1999-06-18 | Mitsumi Electric Co Ltd | Antenna booster circuit for vtr |
| KR20010013758A (en) * | 1998-04-16 | 2001-02-26 | 요트.게.아. 롤페즈 | Video recorder/reproducer apparatus |
| WO2009150625A1 (en) | 2008-06-13 | 2009-12-17 | Nxp B.V. | Rf switch for an rf splitter |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2162392A (en) * | 1984-07-26 | 1986-01-29 | Mohammad Khalid Amin | Television interface unit |
| DE3728381A1 (en) * | 1987-08-26 | 1989-03-09 | Thomson Brandt Gmbh | CIRCUIT ARRANGEMENT FOR DISTRIBUTING AN ANTENNA SIGNAL |
| EP0679025B1 (en) * | 1994-04-21 | 2000-03-22 | Philips Patentverwaltung GmbH | Circuit arrangement for the feeding of an antenna signal |
| JP3481388B2 (en) * | 1995-08-30 | 2003-12-22 | アルプス電気株式会社 | Antenna booster mixer circuit |
-
1996
- 1996-05-14 JP JP11896196A patent/JP3481388B2/en not_active Expired - Fee Related
- 1996-07-31 GB GB9616100A patent/GB2305015B/en not_active Expired - Fee Related
- 1996-08-09 MY MYPI96003278A patent/MY119494A/en unknown
- 1996-08-28 DE DE19634838A patent/DE19634838B4/en not_active Expired - Fee Related
- 1996-08-29 KR KR1019960036443A patent/KR100211755B1/en not_active IP Right Cessation
- 1996-08-30 CN CN96109497A patent/CN1094692C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1111331C (en) * | 1999-02-05 | 2003-06-11 | 夏普公司 | Radio frequency modulator with isolation switch and signal route |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1094692C (en) | 2002-11-20 |
| DE19634838A1 (en) | 1997-03-06 |
| JP3481388B2 (en) | 2003-12-22 |
| GB2305015A (en) | 1997-03-26 |
| KR970078433A (en) | 1997-12-12 |
| GB2305015B (en) | 1999-08-04 |
| DE19634838B4 (en) | 2004-07-08 |
| GB2305015A8 (en) | 1997-06-30 |
| KR100211755B1 (en) | 1999-08-02 |
| GB9616100D0 (en) | 1996-09-11 |
| JPH09130724A (en) | 1997-05-16 |
| MY119494A (en) | 2005-06-30 |
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| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
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| C14 | Grant of patent or utility model | ||
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20021120 Termination date: 20090930 |