CN114880748A

CN114880748A - Layout design method and related device thereof

Info

Publication number: CN114880748A
Application number: CN202210584585.0A
Authority: CN
Inventors: 符强; 何书涵
Original assignee: Beijing University of Posts and Telecommunications
Current assignee: Beijing University of Posts and Telecommunications
Priority date: 2022-05-27
Filing date: 2022-05-27
Publication date: 2022-08-09

Abstract

The application provides a layout design method and a related device thereof, relating to the field of computer graphics. The method comprises the following steps: acquiring a range to be designed; filling the inside of a to-be-designed range based on a plurality of predefined basic tiles to obtain at least one internal layout of the to-be-designed range, wherein the to-be-designed range under each internal layout comprises one or more areas obtained by dividing based on a plurality of tiles, the plurality of basic tiles comprise at least one basic tile with a dividing line, each basic tile with the dividing line comprises one dividing line intersected with the boundary of a tile, and the boundary of the one or more areas is obtained by connecting the dividing lines of the plurality of tiles filled in the to-be-designed range; and obtaining a layout diagram of the at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed. Therefore, the dependence of layout design on constraint conditions can be weakened, and a layout scheme can be provided more flexibly.

Description

Layout design method and related device thereof

Technical Field

The present application relates to the field of computer graphics, and in particular, to a layout design method and related apparatus.

Background

With the improvement of economic level, the quality requirement of people on living environment is also improved, and the design of indoor rooms of people and residential communities has personalized requirements. In order to meet the needs of people, it is becoming common to automatically generate a large number of layout design drawings by a computer to select a design that meets the needs of people.

At present, a method of generating a layout by a computer is known as follows: constraints, such as the outer boundary of the range to be designed, the number of rooms inside, the type of each room, the connection mode, and the like, are input manually, and a layout chart matching the input constraints is retrieved from the database. However, the layout in the database is limited, and not all the constraints are necessarily satisfied, so that a layout matching the constraints may not be obtained from the database. In some cases, for some range to be designed, the user may not be able to provide the exact constraint condition, and thus cannot obtain the corresponding layout from the database. Therefore, the above method for automatically generating a layout by a computer is greatly limited in application.

Disclosure of Invention

The application provides a layout design method and a related device thereof, so as to weaken the dependence of layout design on constraint conditions and provide a design scheme more flexibly.

In a first aspect, the present application provides a layout design method, including: acquiring a range to be designed; filling the inside of the range to be designed based on a predefined plurality of basic tiles to obtain at least one internal layout of the range to be designed, wherein the range to be designed under each internal layout comprises one or more areas obtained by dividing based on a plurality of tiles, the plurality of tiles are obtained by at least one basic tile in the plurality of basic tiles, the size of the plurality of basic tiles is smaller than the range to be designed, the plurality of basic tiles comprise at least one basic tile with dividing lines, each basic tile with dividing lines comprises one dividing line intersected with the boundary of a tile, and the boundary of the one or more areas is obtained by connecting the dividing lines of the plurality of tiles filled in the range to be designed; and obtaining a layout diagram of the at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed.

Therefore, the design range is filled through the multiple predefined basic tiles to obtain at least one different internal layout, and then at least one layout of the design range is obtained based on the different internal layouts and the outer boundary of the design range. Therefore, the design of the layout does not depend on the constraint condition strongly, the conventional layout design idea is broken through, the same range to be designed is divided in different modes through the predefined multiple basic tiles, richer layout designs are provided, the design does not depend on the existing layout design in reality, the accurate constraint condition is not required to be provided for a user, and the design scheme is provided for the user more flexibly.

With reference to the first aspect, in some possible implementations of the first aspect, the plurality of tiles includes: at least one base tile of the plurality of base tiles, and/or at least one tile transformed based on at least one base tile of the plurality of base tiles; the filling of the interior of the area to be designed based on a predefined plurality of base tiles comprises: filling the inside of the range to be designed based on the plurality of tiles from a starting position until the range to be designed is completely filled, and connecting the dividing lines of the adjacent tiles filled in the range to be designed; wherein the starting position is randomly selected or pre-specified.

With reference to the first aspect, in some possible implementations of the first aspect, the plurality of base tiles are the same size, and in the base tile with the partition line, an intersection point of the partition line and the boundary is located at a center of the boundary of the base tile.

With reference to the first aspect, in some possible implementations of the first aspect, each base tile corresponds to an encoding value, the number of bits of the encoding value is the same as the number of edges of the base tile, and each encoding bit in the encoding value corresponds to an edge of the base tile, for indicating whether a corresponding boundary is divided by a dividing line; and the coding values corresponding to any two basic tiles are different, and the values of the coding bits corresponding to the overlapping boundaries of the adjacent tiles are equal.

With reference to the first aspect, in some possible implementations of the first aspect, before obtaining a layout diagram of at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed, the method further includes: inputting the picture containing the range to be designed into a pre-trained first neural network, so as to analyze each pixel in the range to be designed through the first neural network, and obtain the foreground and the background in the range to be designed, wherein the first neural network is used for determining whether each pixel belongs to the foreground or the background; and obtaining the outer boundary of the range to be designed based on the foreground and the background in the range to be designed.

With reference to the first aspect, in some possible implementations of the first aspect, after obtaining a layout diagram of at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed, the method further includes: estimating the semantics of one or more regions in the range to be designed under each layout in at least one layout of the range to be designed; and obtaining at least one design scheme of the range to be designed based on each layout in the at least one layout and the semantics of one or more regions in the range to be designed under each layout.

With reference to the first aspect, in some possible implementation manners of the first aspect, the obtaining at least one design solution of the range to be designed based on each layout of the at least one layout and semantics of one or more regions in the range to be designed under each layout includes: determining other semantics of the one or more regions in the range to be designed under each layout based on predefined corresponding relation information and the semantics of the one or more regions in the range to be designed under each layout estimated by the second neural network; the correspondence information is used for indicating the correspondence of at least one group of regions, each group of regions comprises two regions with similar functions, and the semantics of the two regions in each group of regions are interchangeable; and obtaining a plurality of design schemes of the range to be designed based on the layout drawing of each layout in the at least one layout and a plurality of semantics of one or more regions in the range to be designed under each layout.

With reference to the first aspect, in some possible implementations of the first aspect, the semantics of two regions in each group of regions indicated in the correspondence information are the semantics of an indoor scene; or the semantics of two regions in each group of regions indicated in the correspondence information are respectively: the semantics of an indoor scene and the semantics of an outdoor scene.

In a second aspect, the present application provides a layout design apparatus, including: the device comprises an acquisition module and a processing module, wherein the acquisition module is used for acquiring a range to be designed; the processing module is used for filling the inside of the range to be designed based on a predefined plurality of basic tiles to obtain at least one internal layout of the range to be designed, wherein the range to be designed under each internal layout comprises one or more areas obtained by dividing based on a plurality of tiles, the plurality of tiles are obtained by at least one basic tile in the plurality of basic tiles, the size of the plurality of basic tiles is smaller than the range to be designed, the plurality of basic tiles comprise at least one basic tile with a dividing line, each basic tile with the dividing line comprises one dividing line intersected with the boundary of a tile, and the boundary of the one or more areas is obtained by connecting the dividing lines of the plurality of tiles filled in the range to be designed; and obtaining a layout diagram of the at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed.

In a third aspect, the present application provides a layout design apparatus, including a memory and a processor, where the memory is used to store a computer program, and the processor is used to call and execute the computer program, so that the apparatus implements the method in the first aspect and any possible implementation manner of the first aspect.

In a fourth aspect, the present application provides a chip system, which includes at least one processor and is configured to support implementation of the functions recited in the first aspect and any one of the possible implementation manners of the first aspect.

In one possible design, the system-on-chip further includes a memory to hold program instructions and data, the memory being located within the processor or external to the processor.

The chip system may be formed by a chip, and may also include a chip and other discrete devices.

In a fifth aspect, the present application provides a computer-readable storage medium having computer-readable instructions stored thereon, which, when executed by a computer, cause the computer to implement the first aspect and the method in any one of the possible implementations of the first aspect.

In a sixth aspect, the present application provides a computer program product comprising: computer program (also called code, or instructions), which when executed, causes the method of any of the possible implementations of the first aspect and the first aspect described above to be performed.

It should be understood that the second aspect to the sixth aspect of the present application correspond to the technical solutions of the first aspect of the present application, and the beneficial effects achieved by the aspects and the corresponding possible implementations are similar and will not be described again.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.

Fig. 1 is a scene schematic diagram of a layout design method provided in an embodiment of the present application;

FIG. 2 is a schematic flow chart diagram of a layout design method provided by an embodiment of the present application;

FIG. 3 is a schematic diagram of one example of a variety of base tiles provided by an embodiment of the present application;

FIG. 4 is an exemplary diagram of a plurality of tiles from a plurality of base tiles provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of another example of a plurality of base tiles provided by an embodiment of the present application;

FIG. 6 is a schematic diagram of a layout obtained using a method provided by an embodiment of the present application;

FIG. 7 is a schematic block diagram of a layout design apparatus provided by an embodiment of the present application;

fig. 8 is another schematic block diagram of a layout design apparatus provided in an embodiment of the present application.

With the above figures, there are shown specific embodiments of the present application, which will be described in more detail below. The drawings and written description are not intended to limit the scope of the inventive concepts in any manner, but rather to illustrate the concepts of the application by those skilled in the art with reference to specific embodiments.

Detailed Description

The technical solution in the present application will be described below with reference to the accompanying drawings.

The following detailed description of the embodiments of the present application, presented in the figures, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Before describing embodiments of the present application, first, a brief description of terms involved in the present application will be given.

1. Backtracking: backtracking, also known as heuristics, is a computer algorithm. The basic idea is as follows: starting from a certain state (initial state) of the problem, all 'states' which can be reached starting from this state are searched, when a path goes to the end (can not go forward any more), the path goes back by one step or a plurality of steps, starting from another possible 'state', the search is continued until all 'paths' (states) are explored. The method for continuously 'advancing' and continuously 'backtracking' to find the solution is called a 'backtracking method'.

2. RPLAN data set: is a large-scale data set composed of a large number of plane graphs.

3. Down-sampling: or down-sampling, is to sample a sample sequence once every several samples, and thus the new sequence is a down-sampling of the original sequence. The main purpose of downsampling is to fit the image to the size of the display area and to generate a thumbnail of the corresponding image.

4. And (3) upsampling: upsampling is the inverse of downsampling, also known as upsampling or image interpolation. The upsampling is based on the number of samples of the larger data size, and the number of samples of the smaller data size is generated in the same manner as the number of samples of the larger data size. The main purpose of upsampling is to magnify the original image so that it can be displayed on a higher resolution display device.

5. Shape opening operation: in mathematical morphology, the opening operation is defined as erosion followed by dilation. Namely, the image is corroded first, and then the corroded result is expanded. The expansion refers to the expansion of a highlight part in an image and the expansion of the field, the effect image has a highlight area larger than that of the original image, the adjacent area is replaced by a maximum value during operation, and the highlight area is increased; the erosion refers to erosion of a highlight part in an image, the field is reduced, an effect image has a highlight area smaller than that of an original image, an adjacent area is replaced by a minimum value during operation, and the highlight area is reduced. The morphological opening operation can be used for denoising and the original image is retained.

6. Form closure operation: in mathematical morphology, the closed operation is defined as dilation before erosion. Namely, the image is expanded, and then the expansion result is corroded. The effect of the morphological closing operation is to fuse the slightly connected image blocks, and if the disconnected objects exist in the image, the connection can be repaired by the method.

7. Douglas-Puck algorithm (Douglas-Peucker algorithm): also known as the larmer-douglas-pock algorithm, the iterative adaptation point algorithm, the split and merge algorithm. In digitization, the curve is sampled, i.e. a limited number of points are taken on the curve, the curve is changed into a broken line, and the original shape can be kept to a certain extent.

Fig. 1 is a schematic view of an application scenario applicable to the layout design method provided in the embodiment of the present application. As shown in FIG. 1, this scenario illustrates a computer device 110. Wherein the computer device 110 is capable of obtaining a layout based on the relevant data of the area to be designed.

It should be understood that the computer device 110 may be a server, or a cluster of servers, or a specially developed device for designing layouts, which is not limited in this application.

It should also be understood that the scenario shown in fig. 1 is only an example, and should not be used to limit the scenario to which the method provided in the present application is applicable.

The application provides a layout design method. The method and the device have the advantages that the to-be-designed range is filled through the predefined multiple basic tiles, so that at least one different internal layout is obtained, and then at least one layout of the to-be-designed range is obtained based on the different internal layouts and the outer boundary of the to-be-designed range. Therefore, the design of the layout does not depend on the constraint condition strongly, the conventional layout design idea is broken through, the same range to be designed is divided in different modes through the predefined multiple basic tiles, richer layout designs are provided, the design does not depend on the existing layout design in reality, the accurate constraint condition is not required to be provided for a user, and the design scheme is provided for the user more flexibly.

The layout design method provided by the embodiments of the present application will be described in detail below with reference to the accompanying drawings. The layout design method may be performed by a layout design apparatus. The layout design apparatus may include, for example and without limitation, the computer device of fig. 1, or a component (e.g., a chip, a system-on-a-chip, etc.) configured in a computer device.

Fig. 2 is a schematic flow chart diagram of a layout design method 200 provided in an embodiment of the present application. The individual steps in fig. 2 are explained in detail below.

And S210, acquiring a range to be designed.

The range to be designed is the range in which the layout design needs to be carried out.

As a possible embodiment, the user may input the picture including the range to be designed into the layout design apparatus, and the layout design apparatus may determine the range to be designed based on the received picture, for example, directly take the range shown in the picture as the range to be designed, or determine the range with the corresponding size in the picture as the range to be designed according to the size of the predetermined range to be designed.

The size of the range to be designed can be determined by a user, for example, the user inputs the size of the range to be designed in advance; or, the layout design device may also determine the size of the range to be designed, for example, the layout design device randomly generates the size of the range to be designed; still alternatively, the layout design apparatus may determine the range of values according to the size of the range to be designed, which is input by the user in advance.

It should be understood that the present application is not limited to the determination of the size of the range to be designed and the manner of obtaining the range to be designed.

S220, filling the interior of the to-be-designed range based on the predefined multiple basic tiles to obtain at least one interior layout of the to-be-designed range.

A tile may be understood as the smallest unit used to partition a range to be designed. The tiles in the embodiment of the application are wire frame block-shaped small areas which are generated based on a wave function collapse algorithm and accord with layout division characteristics. The wave function collapse algorithm is based on the connection rule of the small block areas, and the combination is carried out in a specific range, so that patterns which accord with the rule and have the same characteristics can be obtained. Since different scene layouts, such as city layouts and indoor layouts, can be combined by different wire-frame block-shaped small areas, at least one internal layout can be obtained by filling the interior of the design range based on tiles. The resulting layout based on tile filling may also be referred to as a layout based on a wave function collapse algorithm.

It is understood that the size of the base tile may be less than or equal to the range to be designed. Therefore, the number of tiles for dividing a range to be designed may be one or more. In general, tiles may be sized smaller to fill the area to be designed with multiple tiles. The tiles for multiple tiles may be the same type of tile or may be different types of tiles. So that a plurality of different layouts for the same range to be designed can be obtained.

To facilitate distinguishing between different tile types, a base tile is defined herein. One base tile may correspond to one type. A base tile can be flipped (e.g., base tile flipped horizontally or vertically), rotated (e.g., base tile rotated 90 °, 180 °, 270 °, etc.), etc., to obtain a plurality of different tiles that are derived from, and thus correspond to, the same type of base tile.

In other words, the plurality of tiles for filling the range to be designed described above include: at least one base tile of the plurality of base tiles, and/or at least one tile transformed based on the at least one base tile of the plurality of base tiles.

In an embodiment of the present application, the plurality of base tiles may include at least one base tile having a partition line. Optionally, the plurality of base tiles further includes base tiles without partition lines.

In the basic tiles with the division lines, the division lines of any two basic tiles correspond to the intersection point of the boundary, so that the use of any two basic tiles can be ensured, or when a plurality of tiles obtained by transforming any two basic tiles are used for filling a design-to-be-treated range, the division lines of adjacent tiles can be connected; in addition, in the same basic tile with the division lines, the division lines of any two basic tiles correspond to the intersection points of the boundaries, so that the same basic tile can be used, or when a plurality of tiles obtained by transforming the same basic tile are used for filling a design-treating range, the division lines of adjacent tiles can be connected.

FIG. 3 shows an example of a variety of base tiles.

As shown in fig. 3, a) to e) in fig. 3 show five base tiles of the same size, wherein the base tile shown in a) in fig. 3 has no dividing line; the base tile shown in c) of fig. 3 has a division line, and the base tiles shown in b), d) and e) of fig. 3 each have two mutually perpendicular and intersecting division lines.

The partition lines in the above-mentioned figure are all perpendicular to the boundary where the base tiles intersect, and the intersection points of the partition lines and the boundary where the base tiles intersect are all the middle points of the boundary of the base tiles. Wherein b) in fig. 3 is divided into two parts with different sizes by the dividing line, c) in fig. 3 is divided into two parts with the same size by the dividing line, d) in fig. 3 is divided into three parts by the dividing line, and e) in fig. 3 is divided into four parts with the same size. It should be understood that the size of the base tile can be set according to actual requirements, and meanwhile, the line width of each base tile is kept consistent in a plurality of base tiles. For example, the size of the above base tile may be set to 70 × 70 pixels and the line width may be set to 2 pixels.

Based on the various base tiles shown in fig. 3, a plurality of tiles may be obtained. FIG. 4 shows an example of a plurality of tiles resulting from the plurality of base tiles shown in FIG. 3.

It should be understood that the base tile is not limited to that shown in FIG. 3, for example FIG. 5 shows another example of a variety of base tiles. Based on the multiple base tiles shown in fig. 5, many different tiles can be obtained, and for brevity, the drawings are not repeated here.

The area to be designed is filled based on a plurality of tiles obtained from a plurality of basic tiles, so that the area to be designed can be completely covered. Since the area to be designed is filled based on one or more base tiles with partition lines, the resulting internal layout is divided into one or more areas for the same area to be designed. And the boundaries between these areas can be connected by the dividing lines of the tiles. In other words, the partition lines in the base tile act as boundaries.

It should be understood that the boundaries are merely for convenience in distinguishing between different regions and do not represent that the boundaries must be shown as lines in a layout diagram.

Optionally, based on the predefined multiple basic tiles, filling the interior of the to-be-designed range includes: and filling the interior of the range to be designed based on the plurality of tiles from the starting position until the range to be designed is completely filled, and connecting the dividing lines of the adjacent tiles filled in the range to be designed. Wherein the starting position may be randomly selected or pre-specified. In other words, the tile first placed at the starting position may also be randomly selected or pre-specified.

An example is that in a picture containing a scope to be designed, based on a starting position, a first tile is placed on the picture starting from the starting position, exemplarily, the upper left corner of the picture is taken as the starting position. The interior of the picture is filled with a plurality of tiles. If a tile cannot be connected to the dividing lines of other tiles around the tile no matter how the tile is turned or rotated when the tile is placed, the process of tracing back to the previous tile before filling the tile needs to be replaced until the picture is completely covered by a plurality of tiles. If the backtracking times exceed the preset times or backtracking to the initial position, the layout design fails, and the initial position needs to be reselected. It should be understood that the preset number of times may be set according to actual requirements, and may be 1000 times, for example. As described above, when the inside of the area to be designed is filled with tiles, the division lines between any two adjacent tiles are connected to each other, so that the boundary of the area can be obtained.

In one possible implementation, each base tile may be encoded as an encoded value having the same number of bits as the number of edges of the base tile. Illustratively, if the number of edges of the base tile is 4, then the number of bits of the encoded value is also 4. Each coded bit in the coded value corresponds to an edge of the base tile indicating a condition in which the edge corresponding to each coded bit in the base tile is partitioned. For example indicating whether or not it is divided by a dividing line, or may also indicate the location of the division. It should be understood that the partition lines have different partitions for any two base tiles, and the corresponding coding values of any two base tiles are also different.

For example, if the intersection point of the partition line and the edge of the tile is the midpoint, it may be indicated whether each edge of the tile is partitioned by the coding bits with different values, e.g., when a value of a certain coding bit is 0, it indicates that the edge corresponding to the coding bit in the base tile is not partitioned by the partition line; when the code bit is 1, it indicates that the edge corresponding to the code bit in the base tile is divided by the dividing line.

As an example, encoding each of the 5 base tiles shown in fig. 3 into one encoded value may result in the following encoded values: the base tile shown in a) in fig. 3 corresponds to an encoding value of (0, 0, 0, 0), the base tile shown in b) in fig. 3 corresponds to an encoding value of (1, 0, 0, 1), the base tile shown in c) in fig. 3 corresponds to an encoding value of (1, 0, 1, 0), the base tile shown in d) in fig. 3 corresponds to an encoding value of (1, 1, 0, 1), and the base tile shown in e) in fig. 3 corresponds to an encoding value of (1, 1, 1, 1). Taking b) in fig. 3 as an example, the edge corresponding to the coded bit having a value of 1 is divided by the dividing line.

It should also be understood that the values of the coded bits illustrated above and their expressed meanings are merely examples and should not be construed as limiting the application in any way. For example, it may be defined that when the value of the code bit is 0, the edge corresponding to the code bit in the base tile is divided by the dividing line, and when the value of the code bit is 1, the edge corresponding to the code bit in the base tile is not divided by the dividing line.

In this way, if the values of the coded bits corresponding to the overlapped edges of the adjacent tiles are equal when the tiles are filled in the range to be designed, the division lines of the two adjacent tiles are connected. For example, when the values of the coded bits corresponding to the overlapped edges of two adjacent tiles are both 1, it indicates that the partition lines of the two adjacent tiles are connected; when the values of the coded bits corresponding to the overlapping edges of the two adjacent tiles are both 0, it indicates that the overlapping edges of the two adjacent tiles are not divided, that is, the two adjacent tiles are combined into a larger area by splicing. Such padding is therefore allowed when the values of the corresponding coded bits of the coinciding edges of two adjacent tiles are equal. For another example, when the code bits corresponding to the overlapped edges of two adjacent tiles are different, for example, one is 0 and one is 1, it indicates that the overlapped edges of the two adjacent tiles are not divided in one tile and are divided in the other tile, that is, the dividing lines of the two adjacent tiles are not connected, and such filling is not allowed.

For another example, if the intersection of the partition line and the edge of the tile is not the midpoint, whether each edge of the tile is partitioned or not and the intersection position of the partition line and the edge may be indicated by coded bits of different values. For example, when a certain coded bit has a value of 00, it indicates that the edge corresponding to the coded bit in the base tile is not divided by the partition line; when the value of the coded bit is 01, 10 or 11, it indicates that the edge corresponding to the coded bit in the base tile is divided by the dividing line, and the values of the three coded bits correspond to three different intersection positions. The intersection position may be represented, for example, by a distance from a predefined reference point. If the coded bits corresponding to the overlapped edges of the adjacent tiles are equal to each other when the coded bits are filled in the plurality of tiles in the range to be designed, the division lines of the two adjacent tiles are connected. For brevity, no further description is provided herein by way of example.

It should be understood that determining whether a partition line between two adjacent tiles is connected by their corresponding encoded values is only one possible implementation, and the present application includes but is not limited to this.

In another possible implementation manner, whether the partition lines of two adjacent tiles are connected or not can be judged through the intersection point position of the partition lines of the two adjacent tiles and the boundary of the tiles. Specifically, if the dividing lines of two adjacent tiles are connected, the intersection points of the dividing lines with the overlapped edges on the two tiles should be the same intersection point. Therefore, whether the division lines of the two adjacent tiles are connected can be judged by judging whether the distances between the intersection points of the two division lines on the two tiles and the coincident edges and a certain reference point are the same. If the distance between the intersection point of the two dividing lines and the coincident edge on the two tiles and a certain reference point is equal and the direction of the intersection point is the same, the dividing lines of the two adjacent tiles are connected; if not, the division lines of the two adjacent tiles are not connected.

Based on the same concept as described above, a person skilled in the art can also make a simple transformation, resulting in more ways for determining whether the division lines of two adjacent tiles meet. This application includes but is not limited to.

S230, obtaining a layout diagram of at least one layout of the range to be designed based on at least one internal layout of the range to be designed and the outer boundary of the range to be designed.

By executing S220, the computer device may obtain at least one internal layout of the range to be designed, and further obtain a layout diagram of the at least one layout of the range to be designed, it is required to obtain an outer boundary of the range to be designed.

Optionally, the method further comprises: and inputting the picture containing the range to be designed into a pre-trained first neural network, analyzing each pixel in the range to be designed through the first neural network to obtain the foreground and the background in the range to be designed, wherein the first neural network is used for determining whether each pixel belongs to the foreground or the background.

The picture including the to-be-designed range may be a plurality of different internal layout diagrams of the same to-be-designed range obtained in S220. In other words, a plurality of different internal layouts obtained in S220 may be input into the first neural network to obtain the foreground and the background within the range to be designed, respectively. The first neural network can be obtained by training the neural network based on a historical image set marked with foreground and background.

Alternatively, the first neural network may be a picture segmentation network.

By way of example and not limitation, picture splitting networks include, for example and without limitation, a Unnet network, a Deeplab v3 network, and a picture cascading network (ICnet). The Unet network is of a U-shaped symmetrical structure, the first half structure is used for feature extraction, the second half structure is used for up-sampling, and the network is high in training speed; the deep b 3 network is a deep b network of the third version, and is obtained by upgrading on the basis of deep b v1 and deep b v2, and the network has a good segmentation effect and smoother segmentation edges.

The picture segmentation network can divide the picture into a plurality of specific areas with unique properties according to different segmentation modes. For example, the picture segmentation network may learn from the foreground and the background in the input historical image set, and may further distinguish the foreground and the background in the picture including the range to be designed.

For example, in the embodiment of the present application, after a picture including a range to be designed is input to the picture segmentation network, the picture segmentation network analyzes each pixel in the range to be designed. It should be understood that a picture containing a range to be designed includes a plurality of pixels, wherein each pixel may correspond to a foreground or a background, respectively. Aiming at each pixel in the picture containing the range to be designed, the picture segmentation network correspondingly outputs the probability that the pixel belongs to the foreground or the background, so that each pixel is determined to belong to the foreground or the background, and the foreground and the background in the range to be designed are further distinguished. It should be understood that the boundary that distinguishes the foreground and background within the range to be designed is referred to as the outer boundary of the range to be designed.

Two implementations of the picture segmentation network outputting pixels belonging to the foreground or the background are given below as examples.

In one possible implementation, the picture segmentation network may output two values for each pixel, where the two values are the probability that the pixel belongs to the foreground and the probability that the pixel belongs to the background. When the probability of the foreground is greater than or equal to the probability of the background, it may be determined that the pixel belongs to the foreground; when the probability of the foreground is smaller than that of the background, it can be determined that the pixel point belongs to the background.

In another possible implementation, the picture segmentation network may output, for each pixel, a probability that the pixel belongs to the foreground or a probability that the pixel belongs to the background. For example, the probability output by the picture segmentation network for each pixel is the probability that the pixel belongs to the foreground, and whether the pixel belongs to the foreground or not can be further determined according to the size relationship between the size of the probability and a preset threshold.

Illustratively, assuming that the preset threshold is 50%, when the picture segmentation network outputs a pixel, the probability is 70%, that is, 70% is the probability that the pixel belongs to the foreground. Since 70% is greater than 50%, the pixel is determined to belong to the foreground; if the probability of the image segmentation network for a certain pixel output is 50% or lower than 50%, and the probability is not greater than the preset threshold 50%, determining that the pixel does not belong to the foreground, that is, the pixel belongs to the background.

It should be understood that the above listed methods for determining whether each pixel belongs to the foreground or the background are merely examples, and the present application includes but is not limited thereto. The following describes a specific procedure of S230 with reference to the Unet network as an example of the picture segmentation network.

First, each picture in the RPLAN image set may be converted into a data set divided by a dividing line to obtain one or more regions, and each pixel in the data set is marked as a foreground or a background to obtain a processed data set. The processed data set is input into a Unet network, which can learn based on the processed data set.

Thereafter, the at least one internal layout for the area to be designed, obtained at S220, may be input into the trained Unet network. The Unet network acquires each pixel in an input layout diagram through down-sampling and up-sampling, segments each pixel, and judges whether each pixel belongs to a foreground or a background. Finally, a layout diagram in which the foreground is distinguished from the background by a boundary is output, wherein the boundary distinguishing the foreground from the background is an outer boundary.

In combination with the design of the internal layout of the range to be designed and the determination of the outer boundary, the wave function collapse algorithm and the neural network are combined, on one hand, the internal layout is determined through the wave function collapse algorithm, on the other hand, the outer boundary is determined through the neural network, so that various different layout diagrams can be obtained, and rich layout design is provided.

Based on the above process, a layout diagram of at least one layout of the range to be designed can be obtained. It will be appreciated that in the layout outputted based on the above process, the outer boundary may be an irregular-shaped boundary and there may be noisy or disconnected regions, so that the outer boundary of the irregular shape may be optimized before the layout is outputted.

Illustratively, the optimization process includes one or more of removing noise, repairing connections, and generating polygon boundaries.

Wherein, the noise point removal can be realized by morphological open operation. For example, morphological opening operation is performed on the layout to remove noise in the layout.

If the disconnected part exists in the layout chart, the disconnected part can be repaired. Repairing the connection may be accomplished by a morphological close operation. For example, a morphological closing operation is performed on a layout, such as a layout from which noise has been removed, to repair the layout.

The process of removing noise and repairing connections described above may be referred to as a refinement process. The refined picture may be further processed to fit the outer boundary into a polygon, i.e., to generate a polygon boundary.

The generation of the polygon boundaries may be implemented using the Douglas-Peucker algorithm.

Generating the polygon boundary based on the layout subjected to the thinning process may cause the layout before the thinning process to be excessively modified. Therefore, the calculation of the intersection ratio of the layout before the thinning processing and the layout after the polygon boundary is generated can be performed, and the scheme that the intersection ratio is lower than the preset ratio can be filtered. For example, if the preset ratio is 70%, the solution after generating the polygon boundary with the intersection ratio lower than 70% is filtered.

Based on the above process, a layout after optimization processing is obtained.

In the embodiment of the present application, the layout diagram may have different presentation forms.

For example, the layout may be a wire frame diagram, for example, a wire frame diagram generated by a wave function collapse algorithm; alternatively, the wire frame diagram may be generated by other algorithms, for example, a wire frame diagram generated by randomly generating some vertical lines directly on a white rectangle.

For another example, the layout may also be a color block diagram, and the regions are distinguished by color blocks of different colors.

It should be understood that the form of presentation of the layout is not limited to that listed above and is not listed here.

Based on the technical content, the range to be designed is filled through the predefined multiple basic tiles to obtain at least one different internal layout, and then at least one layout of the range to be designed is obtained based on the different internal layouts and the outer boundary of the range to be designed. Therefore, the design of the layout does not depend on the constraint condition strongly any more, the conventional layout design idea is broken through, the different modes of the same range to be designed are divided by the predefined multiple basic tiles, richer layout designs are provided, the design does not depend on the existing layout design in reality, the accurate constraint condition is not required to be provided for a user, and a design scheme is provided for the user more flexibly.

Optionally, as shown in fig. 2, the method further includes S240, estimating semantics of one or more regions within the range to be designed under each layout in at least one layout of the range to be designed.

The semantic estimation of each region can be realized by a pre-trained neural network (for the convenience of differentiation and explanation, denoted as a second neural network) or by the inference of simple rules.

The semantic estimation can be estimated based on a layout, and the layout can be a layout subjected to optimization processing or a layout which is not subjected to optimization processing; semantic estimation can also be based on the connected component after processing the layout (including optimized or unoptimized layouts). This is not a limitation of the present application.

The connected graph can be obtained by processing the layout graph in the following way: and (3) regarding each region of the layout as a node, representing the connection relation of each region in the layout by using a connecting line, and finally obtaining a connected graph which connects each node by using the connecting line.

In one possible implementation, the semantics of the one or more regions are estimated by a second neural network.

The second neural network can be obtained by training based on the semantic set of the historical region. The semantic set of the history region may be, for example, a connected graph set obtained by converting an RPLAN image set. Based on the learning of each region in the historical region semantic set and the corresponding semantics of each region, the semantics of each region in the layout can be estimated.

The second neural network may be a graph convolution network or another graph network. This application includes but is not limited to.

Illustratively, taking the second neural network as the graph convolution network as an example, the layout diagram of each layout in at least one layout of the range to be designed is input into the graph convolution network, and the graph convolution network carries out semantic estimation on each region in the layout diagram. For each region in the layout, when the graph convolution network selects the semantic estimated for the region, the semantic with the highest probability in all the semantics is output as the semantic of the region. For example, the graph convolution network includes 12 kinds of semantics after learning based on the semantics corresponding to each region in the historical region semantic set. Then, after the layout is input into the graph convolution network, the graph convolution network will estimate each region of the layout to belong to each of the 12 semantics, and accordingly, after each semantic is estimated, there is a probability that the region corresponds to the semantic. Finally, for each region, the semantic with the highest probability in all the semantics corresponding to the region is output as the semantic of the region. It should be understood that the above 12 semantics are only an example, and the application does not limit the type and number of semantics based on which semantic estimation is performed on the second neural network.

In combination with the design of the internal layout of the range to be designed, the determination of the outer boundary and the semantic estimation of the regions, it can be seen that by combining the wave function collapse algorithm with the neural network, on the one hand, the internal layout is determined by the wave function collapse algorithm, on the other hand, the outer boundary and the estimation semantics are determined by the neural network, so that a plurality of different layout diagrams and the semantic estimation of each region in each layout diagram can be obtained, and a rich layout design scheme is provided.

In another possible implementation, semantic estimation of one or more regions is achieved by reasoning on simple rules.

For example, the semantics are set according to the size of the area of the region. Illustratively, the region with the largest area among all the regions is set as a living room, and the region with the area smaller than the largest area is set as a bedroom. The above rules may be preset by a user, and it should be understood that the present application includes but is not limited to this.

Further, the method further comprises: and determining other semantics of the one or more regions in the range to be designed under each layout based on the predefined corresponding relation information and the semantics of the one or more regions in the range to be designed under each layout estimated by the second neural network.

Wherein the correspondence information is used to indicate the correspondence of at least one group of regions. The set of regions having correspondence relationship includes, for example, but not limited to, two regions having similarity, and the semantics of the two regions can be interchanged.

Exemplarily, the semantics of the two regions with similarity in each group of regions are the semantics of an indoor scene, and when the indoor scene is designed, the semantics of the two regions can be interchanged; or the semantics of the two regions with similarity in each group of regions are respectively the semantics of an indoor scene and the semantics of an outdoor scene, and when the outdoor scene is designed, the semantics of the indoor region in the group of regions can be replaced by the semantics of the outdoor region in the group of regions.

As an example, the functions of two regions in each group of regions have similarities.

For example, in an indoor scene design, both the main lying and the sub lying are used for sleeping, and the main lying and the sub lying have the similar functions, so that the semantics of the main lying and the sub lying can be interchanged. That is, the region whose semantic meaning is primary lying may be replaced with the region whose semantic meaning is secondary lying, and correspondingly, the region whose semantic meaning is secondary lying may be replaced with the region whose semantic meaning is primary lying.

For another example, the area sizes of the two regions in each group of regions have a similarity in proportion in the layout diagram.

For example, if the living room is an area with the largest area in the indoor scene and the square is an area with the largest area in the outdoor scene, the proportion of the living room in the indoor scene is similar to the proportion of the square in the outdoor scene. In this way, the semantics of the living room area in the indoor scene design can be replaced by the square in the outdoor scene design.

Based on the layout drawing of each layout in the at least one layout and the multiple semantics of one or more regions in the range to be designed under each layout, multiple design schemes of the range to be designed can be obtained. And through semantic conversion of the indoor scene and the outdoor scene, the scheme can be suitable for more scene designs, and a design scheme is more flexibly provided for users.

For better understanding of the method provided by the embodiments of the present application, fig. 6 shows a process of obtaining a layout diagram by using the method provided by the present application. As shown in fig. 6, filling the to-be-designed range based on multiple base tiles may result in at least one internal layout of the to-be-designed range. A) in fig. 6 shows an internal layout within the range to be designed. After the range to be designed including the internal layout is input to the first neural network, the outer boundary of the range to be designed is estimated by the first neural network, and b) in fig. 6 shows the outer boundary estimated by the first neural network. A layout of the area to be designed can thus be obtained. Inputting the layout into a second neural network to perform semantic estimation of the regions through the second neural network, so as to obtain semantic estimation of each region, wherein c) in fig. 6 shows the semantic of each region obtained through the estimation of the second neural network.

It should be understood that the internal layout that can be obtained by filling the design area based on the base tiles is not limited to the one shown in the figure, and there can be many other possible internal layouts. The range to be designed, including other internal layouts, can be input into the first neural network for outer boundary estimation.

It should also be understood that the layout diagram input to the second neural network is not limited to the one shown in the figure, and other layout diagrams of the range to be designed including other internal layouts can be obtained after the range to be designed is input to the first neural network. After the layout maps are input into the second neural network, semantic estimation of the regions can be carried out, so that semantic estimation of different regions under different layout maps can be obtained. Thus, a variety of layout designs are available.

Based on the scheme, by predefining the corresponding relation information, when the indoor scene is subjected to layout design, the semantics of two indoor areas with the corresponding relation can be interchanged, and a richer design scheme can be obtained for a user to select; in addition, the same layout design can be applied to different scenes according to semantic replacement between the regions with corresponding relations in different scenes, and the applicability of the design scheme is improved. Overall, a more flexible design may be provided.

The layout design apparatus provided in the embodiment of the present application will be described in detail below with reference to fig. 7 and 8.

Fig. 7 is a schematic block diagram of a layout design apparatus provided in an embodiment of the present application. The apparatus 700 may correspond to the layout design apparatus in the foregoing method embodiment, and may be a chip system, or may also be configured with a chip system, so as to implement the function of the layout design apparatus in the foregoing method embodiment. In the embodiment of the present application, the chip system may be composed of a chip, and may also include a chip and other discrete devices.

As shown in fig. 7, the apparatus 700 includes an obtaining module 710 and a processing module 720. The apparatus 700 may be used to implement the functionality of the layout design apparatus of the embodiment shown in fig. 2 described above. The obtaining module 710 is configured to obtain a range to be designed; the processing module 720 is configured to fill the inside of the to-be-designed range based on a plurality of predefined basic tiles to obtain at least one internal layout of the to-be-designed range, where the to-be-designed range under each internal layout includes one or more regions partitioned based on a plurality of tiles, the plurality of tiles obtain the size of the plurality of basic tiles from at least one basic tile of the plurality of basic tiles smaller than the to-be-designed range, the plurality of basic tiles include at least one basic tile with a partition line, each basic tile with a partition line includes one partition line intersecting with a tile boundary, and the boundaries of the one or more regions are connected by the partition lines of the plurality of tiles filled in the to-be-designed range; and obtaining a layout drawing of the at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed.

Optionally, the plurality of tiles comprises: at least one base tile in the plurality of base tiles, and/or at least one tile obtained by transformation based on at least one base tile in the plurality of base tiles; the processing module 720 is specifically configured to: filling the interior of the range to be designed based on the plurality of tiles from the starting position until the range to be designed is completely filled, and connecting the dividing lines of the adjacent tiles filled in the range to be designed; wherein the starting position is randomly selected or pre-specified.

Optionally, the plurality of base tiles are the same in size, and in the base tile with the partition line, the intersection point of the partition line and the boundary is the center of the boundary of the base tile.

Optionally, each base tile corresponds to an encoding value, the number of bits of the encoding value is the same as the number of edges of the base tile, and each encoding bit in the encoding value corresponds to an edge of the base tile for indicating whether the corresponding boundary is divided by the dividing line; the coding values corresponding to any two basic tiles are different, and the values of the coding bits corresponding to the overlapping boundaries of the adjacent tiles are equal.

Optionally, the processing module 720 is further configured to: inputting a picture containing a range to be designed into a pre-trained first neural network, analyzing each pixel in the range to be designed through the first neural network to obtain a foreground and a background in the range to be designed, wherein the first neural network is used for determining whether each pixel belongs to the foreground or the background; and obtaining the outer boundary of the range to be designed based on the foreground and the background in the range to be designed.

Optionally, the processing module 720 is further configured to: estimating the semantics of one or more regions in the range to be designed under each layout in at least one layout of the range to be designed; and obtaining at least one design scheme of the range to be designed based on each layout in the at least one layout and the semantics of one or more regions in the range to be designed under each layout.

Optionally, the processing module 720 is specifically configured to: determining other semantics of the one or more regions in the range to be designed under each layout based on the predefined corresponding relation information and the semantics of the one or more regions in the range to be designed under each layout estimated by the second neural network; the correspondence information is used for indicating the correspondence of at least one group of regions, each group of regions comprises two regions with similar functions, and the semantics of the two regions in each group of regions can be interchanged; and obtaining a plurality of design schemes of the range to be designed based on the layout drawing of each layout in the at least one layout and a plurality of semantics of one or more regions in the range to be designed under each layout.

Optionally, the semantics of the two regions in each group of regions indicated in the correspondence information are the semantics of the indoor scene; or the semantics of two regions in each group of regions indicated in the correspondence information are respectively: the semantics of an indoor scene and the semantics of an outdoor scene.

It should be understood that the module division of the apparatus in fig. 7 is only an example, different functional modules may be divided according to different functional requirements in practical application, the form and number of the division of the functional modules in practical application are not limited in any way, and fig. 7 does not limit the present application in any way.

The layout design apparatus 800 may be a chip system, or may also be an apparatus configured with a chip system to implement the functions of the layout design in the above method embodiments. In the embodiment of the present application, the chip system may be composed of a chip, and may also include a chip and other discrete devices.

As shown in fig. 8, the apparatus 800 may include at least one processor 810 for implementing the functions of the layout design apparatus in the methods provided by the embodiments of the present application.

Illustratively, when the layout design apparatus 800 is used to implement the functions of the layout design apparatus provided in the embodiments of the present application, the processor 810 may be configured to obtain the range to be designed; filling the inside of a to-be-designed range based on a plurality of predefined basic tiles to obtain at least one internal layout of the to-be-designed range, wherein the to-be-designed range under each internal layout comprises one or more areas obtained by dividing based on a plurality of tiles, the plurality of tiles are obtained by at least one basic tile in the plurality of basic tiles, the size of the plurality of basic tiles is smaller than that of the to-be-designed range, the plurality of basic tiles comprise at least one basic tile with a dividing line, each basic tile with the dividing line comprises one dividing line intersected with the boundary of the tile, and the boundary of one or more areas is obtained by connecting the dividing lines of the plurality of tiles filled in the to-be-designed range; and obtaining a layout diagram of the at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed. For details, reference is made to the detailed description in the method example, which is not repeated herein.

The apparatus 800 may also include at least one memory 820 that may be used to store program instructions and data, and the like. Processor 810 and memory 820 are coupled. The coupling in the embodiments of the present application is an indirect coupling or a communication connection between devices, units or modules, and may be an electrical, mechanical or other form for information interaction between the devices, units or modules. The processor 810 may cooperate with the memory 820. Processor 810 may execute program instructions stored in memory 820. At least one of the at least one memory may be included in the processor.

The layout design apparatus 800 may also include a communication interface 830 for communicating with other devices via a transmission medium so that the layout design apparatus 800 may communicate with other devices. The communication interface 830 may be, for example, a transceiver, an interface, a bus, a circuit, or a device capable of performing transceiving functions. The processor 810 can utilize the communication interface 830 to send and receive data and/or information and is configured to implement the methods performed by the computer device in the embodiments of the present application.

The embodiment of the present application does not limit the specific connection medium among the processor 810, the memory 820 and the communication interface 830. In fig. 8, the processor 810, the memory 820 and the communication interface 830 are connected by a bus 840 according to the embodiment of the present application. The bus 840 is represented by a thick line in fig. 8, and the connection between other components is merely illustrative and not intended to be limiting. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 8, but this is not intended to represent only one bus or type of bus.

The present application further provides a computer program product, the computer program product comprising: a computer program (also referred to as code, or instructions), which when executed, causes a computer to perform the method of the embodiment shown in fig. 2.

The present application also provides a computer-readable storage medium having stored thereon a computer program (also referred to as code, or instructions). When executed, the computer program causes a computer to perform the method of the embodiment shown in fig. 2.

It should be understood that the processor in the embodiments of the present application may be an integrated circuit chip having signal processing capability. In implementation, the steps of the above method embodiments may be performed by integrated logic circuits of hardware in a processor or instructions in the form of software. The processor may be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic device, or discrete hardware components. The various methods, steps, and logic blocks disclosed in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in a memory, and a processor reads information in the memory and completes the steps of the method in combination with hardware of the processor.

It will also be appreciated that the memory in the embodiments of the subject application may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The non-volatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. Volatile memory can be Random Access Memory (RAM), which acts as external cache memory. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), double data rate SDRAM, enhanced SDRAM, SLDRAM, Synchronous Link DRAM (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.

As used in this specification, the terms "unit," "module," and the like are intended to refer to a computer-related entity, either hardware, firmware, a combination of hardware and software, or software in execution.

Those of ordinary skill in the art will appreciate that the various illustrative logical blocks and steps (step) described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application. In the several embodiments provided in the present application, it should be understood that the disclosed apparatus, device and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

In the above embodiments, the functions of the functional units may be fully or partially implemented by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions (programs). The procedures or functions described in accordance with the embodiments of the present application are generated in whole or in part when the computer program instructions (programs) are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a Digital Versatile Disk (DVD)), or a semiconductor medium (e.g., a Solid State Disk (SSD)), among others.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A layout design method, comprising:

acquiring a range to be designed;

filling the inside of the range to be designed based on a predefined plurality of basic tiles to obtain at least one internal layout of the range to be designed, wherein the range to be designed under each internal layout comprises one or more areas obtained by dividing based on a plurality of tiles, the plurality of tiles are obtained by at least one basic tile in the plurality of basic tiles, the size of the plurality of basic tiles is smaller than the range to be designed, the plurality of basic tiles comprise at least one basic tile with dividing lines, each basic tile with dividing lines comprises one dividing line intersected with the boundary of a tile, and the boundary of the one or more areas is obtained by connecting the dividing lines of the plurality of tiles filled in the range to be designed;

and obtaining a layout diagram of the at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed.

2. The method of claim 1, wherein the plurality of tiles comprises: at least one base tile of the plurality of base tiles, and/or at least one tile transformed based on at least one base tile of the plurality of base tiles;

the filling the inside of the range to be designed based on a predefined plurality of base tiles comprises the following steps:

filling the inside of the range to be designed based on the plurality of tiles from a starting position until the range to be designed is completely filled, and connecting the dividing lines of the adjacent tiles filled in the range to be designed; wherein the starting position is randomly selected or pre-specified.

3. The method of claim 2 wherein the plurality of base tiles are the same size and wherein in the base tile with the partition line, the intersection of the partition line and the boundary is located at the center of the boundary of the base tile.

4. The method of claim 3 wherein each base tile corresponds to an encoded value having a number of bits that is the same as the number of edges of the base tile, each encoded bit in the encoded value corresponding to an edge of the base tile for indicating whether the corresponding boundary is divided by a partition line; and the coding values corresponding to any two basic tiles are different, and the values of the coding bits corresponding to the overlapping boundaries of the adjacent tiles are equal.

5. The method of claim 1, wherein before the obtaining of the layout map of the at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed, the method further comprises:

inputting the picture containing the range to be designed into a pre-trained first neural network, so as to analyze each pixel in the range to be designed through the first neural network, and obtain the foreground and the background in the range to be designed, wherein the first neural network is used for determining whether each pixel belongs to the foreground or the background;

and obtaining the outer boundary of the range to be designed based on the foreground and the background in the range to be designed.

6. The method according to any one of claims 1 to 5, wherein after obtaining the layout diagram of at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed, the method further comprises:

estimating, by a pre-trained second neural network, semantics of one or more regions within the range to be designed for each of at least one layout of the range to be designed;

and obtaining at least one design scheme of the range to be designed based on each layout in the at least one layout and the semantics of one or more regions in the range to be designed under each layout.

7. The method of claim 6, wherein obtaining at least one design solution for the area to be designed based on each layout of the at least one layout and semantics of one or more regions within the area to be designed for each layout comprises:

determining other semantics of the one or more regions in the range to be designed under each layout based on predefined corresponding relation information and the semantics of the one or more regions in the range to be designed under each layout estimated by the second neural network; the correspondence information is used for indicating the correspondence of at least one group of regions, each group of regions comprises two regions with similar functions, and the semantics of the two regions in each group of regions are interchangeable;

and obtaining a plurality of design schemes of the range to be designed based on the layout drawing of each layout in the at least one layout and a plurality of semantics of one or more regions in the range to be designed under each layout.

8. The method according to claim 7, wherein the semantics of two regions in each group of regions indicated in the correspondence information are the semantics of an indoor scene; or the semantics of two regions in each group of regions indicated in the correspondence information are respectively: the semantics of an indoor scene and the semantics of an outdoor scene.

9. A layout design apparatus, comprising:

the acquisition module is used for acquiring a range to be designed;

a processing module, configured to fill the inside of the to-be-designed range based on a predefined plurality of base tiles, to obtain at least one internal layout of the to-be-designed range, where the to-be-designed range under each internal layout includes one or more areas obtained by dividing based on a plurality of tiles, the plurality of tiles are obtained from at least one base tile in the plurality of base tiles, the size of the plurality of base tiles is smaller than the to-be-designed range, the plurality of base tiles include at least one base tile with a dividing line, each base tile with a dividing line includes a dividing line intersecting with a tile boundary, and the boundaries of the one or more areas are obtained by connecting the dividing lines of the plurality of tiles filled in the to-be-designed range; and obtaining a layout diagram of the at least one layout of the range to be designed based on the at least one internal layout of the range to be designed and the outer boundary of the range to be designed.

10. A computer-readable storage medium, having stored thereon a computer program, for causing a computer to perform the method of any of claims 1 to 8, when the computer program runs on the computer.