CN114859308A - Radar target simulator and calibration method thereof - Google Patents
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- CN114859308A CN114859308A CN202210807555.1A CN202210807555A CN114859308A CN 114859308 A CN114859308 A CN 114859308A CN 202210807555 A CN202210807555 A CN 202210807555A CN 114859308 A CN114859308 A CN 114859308A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/40—Means for monitoring or calibrating
- G01S7/4052—Means for monitoring or calibrating by simulation of echoes
- G01S7/406—Means for monitoring or calibrating by simulation of echoes using internally generated reference signals, e.g. via delay line, via RF or IF signal injection or via integrated reference reflector or transponder
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Abstract
The invention discloses a radar target simulator and a calibration method thereof, wherein the radar target simulator comprises the following components: the radar target simulator comprises a down-conversion unit, an intermediate frequency baseband processing unit, an up-conversion unit, a first radio frequency switch and a second radio frequency switch, wherein when the first radio frequency switch and the second radio frequency switch are switched to be connected, the radar target simulator is in a calibration mode. In a calibration mode, the intermediate frequency baseband processing unit generates and stores intermediate frequency signals, the intermediate frequency signals are processed by the up-conversion unit to form radio frequency signals, the radio frequency signals enter the down-conversion unit through the second radio frequency switch and the first radio frequency switch, the down-conversion unit processes the radio frequency signals to form intermediate frequency signals, and the intermediate frequency baseband processing unit performs cross-correlation processing on the stored intermediate frequency signals and the intermediate frequency signals generated by the down-conversion unit to obtain inherent delay of the radar target simulator. The invention can realize one-key calibration only by switching the working mode to the calibration mode, does not need complex operation and calculation, and has higher calibration precision.
Description
Technical Field
The invention relates to the technical field of radars, in particular to a radar target simulator and a calibration method thereof.
Background
The radar target simulator carries out signal processing and echo simulation through receiving signals of the radar, realizes performance and index testing of the tested radar, is convenient and fast, greatly saves development cycle and cost, and is widely applied to performance and index testing of modern radars. With the continuous development of radar technology, the measurement precision of radar distance is continuously improved, and the corresponding requirement on the distance simulation precision of a radar target simulator is also continuously improved.
The radar target simulation mainly carries out time delay on received signals to realize the distance simulation of the targets, determines the precision of the distance simulation on the time delay precision of the radar signals, and belongs to the key indexes of a radar target simulator. The rf devices, cables, ADCs, DACs have a certain inherent delay which determines the minimum distance of the target simulator, typically on the order of 1-2us, corresponding to a minimum simulation distance of 150-300m, subject to device characteristics. Accurate measurement of the minimum delay is required and then compensation is performed to ensure the absolute accuracy of the distance simulation.
The existing compensation method comprises the following steps: the delay of the intermediate frequency signal input and output by the intermediate frequency baseband unit of the dual-channel digital oscilloscope is adopted, then the delay of the radio frequency device is superposed, the delay can also change along with the change of the environmental temperature and the aging of the device, and the calibration is required to be carried out regularly. The existing calibration method has the problems of complex operation, requirement of expensive instruments (a radar excitation signal source and a high-speed oscilloscope) and low calibration precision.
Disclosure of Invention
The embodiment of the invention provides a radar target simulator and a calibration method thereof, which are used for solving the problems that the calibration method in the prior art is complex in operation, needs expensive instruments and is low in calibration precision.
In one aspect, an embodiment of the present invention provides a radar target simulator, including a down-conversion unit, an intermediate frequency baseband processing unit, an up-conversion unit, a first radio frequency switch, and a second radio frequency switch, where the second radio frequency switch has an input end and two output ends, where the input end is electrically connected to the up-conversion unit, and one of the output ends is used to output an echo signal, the first radio frequency switch has an output end and two input ends, where the output end is electrically connected to the down-conversion unit, and one of the input ends is used to input a radar excitation signal, and the other output end of the second radio frequency switch is electrically connected to the other input end of the first radio frequency switch;
when the first radio frequency switch and the second radio frequency switch are switched to be connected, the radar target simulator is in a calibration mode, in the calibration mode, the intermediate frequency baseband processing unit generates and stores intermediate frequency signals, the intermediate frequency signals generated by the intermediate frequency baseband processing unit are processed by the up-conversion unit to form radio frequency signals, the radio frequency signals enter the down-conversion unit through the second radio frequency switch and the first radio frequency switch, the down-conversion unit processes the radio frequency signals to form intermediate frequency signals, the intermediate frequency baseband processing unit performs cross-correlation processing on the stored intermediate frequency signals and the intermediate frequency signals generated by the down-conversion unit, and the time corresponding to the maximum cross-correlation value in a processing result is the inherent delay of the radar target simulator.
On the other hand, the embodiment of the invention also provides a calibration method of the radar target simulator, which comprises the following steps:
switching the radar target simulator to a calibration mode;
in a calibration mode, the intermediate frequency baseband processing unit generates and stores an intermediate frequency signal;
the up-conversion unit processes the intermediate frequency signal generated by the intermediate frequency baseband processing unit to form a radio frequency signal;
the radio frequency signal enters the down conversion unit through the second radio frequency switch and the first radio frequency switch;
the down-conversion unit processes the radio frequency signal to form an intermediate frequency signal;
and the intermediate frequency baseband processing unit performs cross-correlation processing on the stored intermediate frequency signals and the intermediate frequency signals generated by the down-conversion unit, and the time corresponding to the maximum cross-correlation value in a processing result is the inherent delay of the radar target simulator.
The radar target simulator and the calibration method thereof have the following advantages:
the invention adopts an online calibration method, is convenient and fast to operate, can realize one-key calibration only by switching the working mode to the calibration mode, does not need instruments such as an oscilloscope, a signal source and the like, and does not need complicated operation and calculation. The calibration can be performed at any temperature and time to compensate for system errors in real time for higher calibration accuracy.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic diagram of functional modules of a radar target simulator in the prior art;
FIG. 2 is a schematic diagram of a range simulation for a radar target simulator in the prior art;
FIG. 3 is a functional block diagram of a prior art radar target simulator during compensation;
FIG. 4 is a functional block diagram of a radar target simulator in a calibration mode according to an embodiment of the present invention;
fig. 5 is a functional block diagram of an if baseband processing unit according to an embodiment of the present invention;
fig. 6 is a functional block diagram of an up-conversion unit and a down-conversion unit according to an embodiment of the present invention;
FIG. 7 is a functional block diagram of a radar target simulator provided in an embodiment of the present invention in a simulation mode;
fig. 8 is a schematic diagram of two digital intermediate frequency signals IF1 and IF3 according to an embodiment of the present invention;
fig. 9 is a flowchart of a calibration method for a radar target simulator according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the prior art, as shown in fig. 1, a radar target simulator includes a down-conversion unit, an intermediate frequency baseband processing unit, an up-conversion unit, and a frequency synthesizer unit. The down-conversion unit converts the radar excitation signal into an intermediate frequency through frequency mixing, the intermediate frequency baseband unit collects an intermediate frequency signal through an ADC (analog-to-digital converter), then digital down-conversion is carried out to a baseband, delay modulation and Doppler modulation are carried out, digital up-conversion is carried out again, and the digital down-conversion is converted into an analog intermediate frequency signal through a DAC. The up-conversion unit converts the analog intermediate frequency signal into a radio frequency signal to generate a final echo signal. Radar target simulation primarily performs time delay on received signals to achieve range simulation of targets, as shown in fig. 2. The time delay precision of the radar signal determines the precision of distance simulation, and belongs to the key indexes of a radar target simulator. The rf devices, cables, ADCs, DACs have a certain inherent delay which determines the minimum distance of the target simulator, typically on the order of 1-2us, corresponding to a minimum simulation distance of 150-300m, subject to device characteristics.
In addition, the minimum delay needs to be measured accurately and then compensated to ensure the absolute accuracy of the distance simulation. That is, the set value of the intermediate frequency unit for the signal delay should be:
Δt ‘ =Δt-Δtmin
in the formula: Δ t ‘ And setting the actual delay of the intermediate frequency baseband processing unit, wherein delta tmin is the inherent delay of the system, and delta t is a theoretical delay value obtained by calculation and conversion according to the distance.
It is obvious that the accuracy and stability of the compensation determine the distance simulation accuracy of the radar target simulator. As shown in fig. 3, the conventional compensation method is: and detecting the delay of the intermediate frequency signals input and output by the intermediate frequency baseband processing unit by adopting a two-channel digital oscilloscope, and then superposing the delay of the radio frequency device. However, since the delay changes with the change of the ambient temperature and the aging of the device, the delay needs to be calibrated regularly. The existing calibration method has the problems of complex operation, need of expensive instruments (a radar excitation signal source and a high-speed oscilloscope) and low compensation precision.
Aiming at the problems in the prior art, the invention provides the radar target simulator capable of carrying out online calibration, the radar target simulator can be switched between a simulation mode and a calibration mode through switching the radio frequency switch, the radar target simulator can automatically finish calibration in the calibration mode, extra manual operation and equipment are not needed, and the calibration precision is higher.
Fig. 4 is a functional block diagram of a radar target simulator in a calibration mode according to an embodiment of the present invention. The embodiment of the invention provides a radar target simulator, which comprises a down-conversion unit, an intermediate frequency baseband processing unit, an up-conversion unit, a first radio frequency switch and a second radio frequency switch, wherein the second radio frequency switch is provided with an input end and two output ends, the input end is electrically connected with the up-conversion unit, one of the output ends is used for outputting an echo signal, the first radio frequency switch is provided with an output end and two input ends, the output end is electrically connected with the down-conversion unit, one of the input ends is used for inputting a radar excitation signal, and the other output end of the second radio frequency switch is electrically connected with the other input end of the first radio frequency switch;
when the first radio frequency switch and the second radio frequency switch are switched to be connected, the radar target simulator is in a calibration mode, in the calibration mode, the intermediate frequency baseband processing unit generates and stores intermediate frequency signals, the intermediate frequency signals generated by the intermediate frequency baseband processing unit are processed by the up-conversion unit to form radio frequency signals, the radio frequency signals enter the down-conversion unit through the second radio frequency switch and the first radio frequency switch, the down-conversion unit processes the radio frequency signals to form intermediate frequency signals, the intermediate frequency baseband processing unit performs cross-correlation processing on the stored intermediate frequency signals and the intermediate frequency signals generated by the down-conversion unit, and the time corresponding to the maximum cross-correlation value in a processing result is the inherent delay of the radar target simulator.
Exemplarily, in the calibration mode, the whole radar target simulator is a loop, and external signal access and output are not needed, so that expensive calibration equipment is not needed, and after the working mode is switched, the radar target simulator automatically starts to be calibrated without manual operation, so that the operation efficiency is improved. Meanwhile, the FPGA is used for processing signals and measuring inherent delay, so that the measurement result has higher precision.
In the embodiment of the present invention, the first radio frequency switch and the second radio frequency switch may both adopt a radio frequency switch with a signal of ADRF5020, and control terminals of the first radio frequency switch SPDT1 and the second radio frequency switch SPDT2 may be electrically connected to the intermediate frequency baseband processing unit, and the intermediate frequency baseband processing unit controls switching states of the first radio frequency switch and the second radio frequency switch.
In a possible embodiment, the system further comprises a frequency synthesizer unit, and the frequency synthesizer unit is used for providing a required local oscillator signal to the down-conversion unit and the up-conversion unit and providing a required clock signal to the intermediate frequency baseband processing unit.
In one possible embodiment, the if baseband processing unit includes: an ADC (analog-to-digital converter) for converting an input intermediate frequency signal into a digital signal; the FPGA (field programmable gate array) is electrically connected with the output end of the ADC and used for generating and storing digital intermediate frequency signals and performing cross-correlation processing on the digital signals obtained by the conversion of the ADC and the stored digital intermediate frequency signals; and the DAC (digital-to-analog converter) is electrically connected with the output end of the FPGA and is used for converting the digital intermediate-frequency signals generated by the FPGA into analog intermediate-frequency signals.
Illustratively, as shown in fig. 5, the FPGA may generate a digital sine signal by using a DDS (direct digital frequency synthesis) algorithm, and pulse-modulate the digital sine signal to generate a digital intermediate frequency signal. The clock frequency of the DDS algorithm is 200MHz, the frequency of the generated digital sine signal is 50MHz, and then the DDS algorithm is subjected to pulse modulation to obtain a digital intermediate frequency signal, wherein the pulse width is 0.5us, and the pulse period is 10 us. The digital intermediate frequency signal is divided into two paths, one path (IF 1) is stored in BRAM of FPGA, and the other path (IF 2) is transmitted to DAC by using LVDS interface and converted to obtain analog intermediate frequency signal. The DAC can adopt AD9122, the maximum conversion rate is 1200MSPS, the resolution is 16 bits, 4 times of interpolation is configured in actual work, and then the conversion rate is 200MSPSx4=800 MSPS.
The analog intermediate frequency signal is converted into a radio frequency signal of an X wave band after being converted by the up-conversion unit, and then is converted into an intermediate frequency of 62.5MHz by the second radio frequency switch SPDT2, the first radio frequency switch SPDT1 and the down-conversion unit, and is input to the intermediate frequency baseband processing unit.
The ADC in the intermediate frequency baseband processing unit samples the radio frequency signal, the ADC can adopt AD9643, the sampling rate works at 200MSPS, the resolution is 14 bits, the digital intermediate frequency signal (IF 3) is obtained by sampling, then the digital intermediate frequency signal is transmitted to the FPGA by utilizing an LVDS interface and then is stored in a BRAM inside the FPGA, the storage length comprises 2 complete cycles, and the length is as follows: 20us x 200MSPS = 4K.
IF1 and IF3 signals are shown in fig. 8, the FPGA performs cross-correlation calculation on the IF3 and the IF1 stored in the BRAM, the clock frequency can adopt 200MHz, the delay corresponding to the maximum value of the cross-correlation signal is taken as the inherent delay of the system, and the delay measurement resolution is better than one clock cycle: 1/200MSPS =5ns, corresponding to a distance of 0.65 m. Meanwhile, after the calibration work is finished, the inherent delay is configured into system parameters for compensation, and the compensation step =5ns × 0.15m/ns =0.65m, so that high-precision calibration is realized.
In a possible embodiment, the if baseband processing unit further includes: and the phase-locked loop is used for converting the input clock signal into the clock signal required by the ADC, the FPGA and the DAC.
Illustratively, the clock signal input to the phase locked loop is also provided by the frequency synthesizer unit.
In a possible embodiment, the down-conversion unit mixes the input radio frequency signal and the local oscillator signal by using a mixer to generate an intermediate frequency signal; the up-conversion unit also adopts a mixer to mix the input intermediate frequency signal and the local oscillation signal to generate a radio frequency signal.
Illustratively, the structure of the mixer is as shown in fig. 6, and the local oscillator signals required by the down-conversion unit and the up-conversion unit are provided by the frequency synthesizer unit.
After the calibration operation is completed, the radar target simulator may be switched back to simulation mode, as shown in fig. 7, for normal radar target simulation operation. In a normal simulation mode, the intermediate frequency baseband processing unit controls the first radio frequency switch SPDT1 to be connected to a radar excitation signal input port, the second radio frequency switch SPDT2 is connected to an echo output port, the intermediate frequency baseband processing unit collects input intermediate frequency signals through an ADC (analog-to-digital converter), stores the collected signals, simulates and generates a target with specified speed and distance according to parameter setting, carries out time delay and Doppler modulation processing, and carries out playback on the processed signals by adopting a DAC (digital-to-analog converter) and outputs the modulated analog intermediate frequency signals.
An embodiment of the present invention further provides a calibration method for a radar target simulator, as shown in fig. 9, the method includes:
switching the radar target simulator to a calibration mode;
in a calibration mode, the intermediate frequency baseband processing unit generates and stores an intermediate frequency signal;
the up-conversion unit processes the intermediate frequency signal generated by the intermediate frequency baseband processing unit to form a radio frequency signal;
the radio frequency signal enters the down-conversion unit through the second radio frequency switch and the first radio frequency switch;
the down-conversion unit processes the radio frequency signal to form an intermediate frequency signal;
and the intermediate frequency baseband processing unit performs cross-correlation processing on the stored intermediate frequency signals and the intermediate frequency signals generated by the down-conversion unit, and the time corresponding to the maximum cross-correlation value in a processing result is the inherent delay of the radar target simulator.
Illustratively, because a single measurement has more or less errors, the measurement of the intrinsic delay can be repeated for multiple times in the calibration mode, and the values obtained by the multiple measurements are averaged to be used as the final intrinsic delay, so as to reduce the measurement error as much as possible and improve the measurement accuracy.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. A radar target simulator is characterized by comprising a down-conversion unit, an intermediate frequency baseband processing unit, an up-conversion unit, a first radio frequency switch and a second radio frequency switch, wherein the second radio frequency switch is provided with an input end and two output ends, the input end is electrically connected with the up-conversion unit, one output end is used for outputting echo signals, the first radio frequency switch is provided with an output end and two input ends, the output end is electrically connected with the down-conversion unit, one input end is used for inputting radar excitation signals, and the other output end of the second radio frequency switch is electrically connected with the other input end of the first radio frequency switch;
when the first radio frequency switch and the second radio frequency switch are switched to a connected state, the radar target simulator is in a calibration mode, in the calibration mode, the intermediate frequency baseband processing unit generates and stores intermediate frequency signals, the intermediate frequency signals generated by the intermediate frequency baseband processing unit form radio frequency signals after being processed by the up-conversion unit, the radio frequency signals enter the down-conversion unit through the second radio frequency switch and the first radio frequency switch, the down-conversion unit processes the radio frequency signals to form intermediate frequency signals, the intermediate frequency baseband processing unit performs cross-correlation processing on the stored intermediate frequency signals and the intermediate frequency signals generated by the down-conversion unit, and the time corresponding to the maximum cross-correlation value in a processing result is the inherent delay of the radar target simulator.
2. The radar target simulator of claim 1, wherein the control terminals of the first rf switch and the second rf switch are electrically connected to the if baseband processing unit, and the if baseband processing unit controls the switching states of the first rf switch and the second rf switch.
3. The radar target simulator of claim 1, further comprising an frequency synthesizer unit, wherein the frequency synthesizer unit is configured to provide a required local oscillator signal and a required clock signal of the if baseband processing unit to the down-conversion unit and the up-conversion unit.
4. The radar target simulator of claim 1, wherein the if baseband processing unit comprises:
an ADC for converting an input intermediate frequency signal into a digital signal;
the FPGA is electrically connected with the output end of the ADC and used for generating and storing a digital intermediate frequency signal and performing cross-correlation processing on the digital signal obtained by the conversion of the ADC and the stored digital intermediate frequency signal;
and the DAC is electrically connected with the output end of the FPGA and is used for converting the digital intermediate frequency signal generated by the FPGA into an analog intermediate frequency signal.
5. The radar target simulator of claim 4, wherein the if baseband processing unit further comprises:
and the phase-locked loop is used for converting the input clock signal into the clock signal required by the ADC, the FPGA and the DAC.
6. The radar target simulator of claim 4, wherein the FPGA generates a digital sine signal by using a DDS algorithm, and the digital sine signal is pulse-modulated to generate the digital intermediate frequency signal.
7. The radar target simulator of claim 4, wherein the ADC and the DAC are electrically connected to the FPGA through LVDS interfaces respectively.
8. The radar target simulator of claim 1, wherein the down-conversion unit mixes an input radio frequency signal with a local oscillator signal by using a mixer to generate an intermediate frequency signal; the up-conversion unit also adopts a mixer to mix the input intermediate frequency signal and the local oscillation signal to generate a radio frequency signal.
9. A method of calibrating a radar target simulator, comprising:
switching the radar target simulator to a calibration mode;
in a calibration mode, the intermediate frequency baseband processing unit generates and stores an intermediate frequency signal;
the up-conversion unit processes the intermediate frequency signal generated by the intermediate frequency baseband processing unit to form a radio frequency signal;
the radio frequency signal enters a down conversion unit through a second radio frequency switch and a first radio frequency switch;
the down-conversion unit processes the radio frequency signal to form an intermediate frequency signal;
and the intermediate frequency baseband processing unit performs cross-correlation processing on the stored intermediate frequency signals and the intermediate frequency signals generated by the down-conversion unit, and the time corresponding to the maximum cross-correlation value in a processing result is the inherent delay of the radar target simulator.
10. The method of claim 9, wherein the measuring of the intrinsic delay is repeated a plurality of times in the calibration mode, and the average of the values obtained from the plurality of measurements is used as the final intrinsic delay.
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Cited By (1)
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Application publication date: 20220805 |