CN114826962A - Link fault detection method, device, equipment and machine readable storage medium - Google Patents
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- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/06—Management of faults, events, alarms or notifications
- H04L41/0631—Management of faults, events, alarms or notifications using root cause analysis; using analysis of correlation between notifications, alarms or events based on decision criteria, e.g. hierarchy, tree or time analysis
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
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Abstract
The present disclosure provides a link failure detection method, apparatus, device and machine-readable storage medium, the method comprising: judging whether the target PCIE equipment supports the MCTP or not; sending a state acquisition command to target PCIE equipment supporting an MCTP protocol; trying to receive a feedback message, and judging the state of a PCIE link related to the target PCIE equipment according to the result of receiving the feedback message; the feedback message is sent by the target PCIE device in response to the state acquisition command after receiving the state acquisition command. According to the technical scheme, the state acquisition command is sent to the PCIE equipment supporting the MCTP, whether the PCIE link has the fault or not is judged in a protocol communication mode, if the feedback message cannot be normally received, the fault of the PCIE link is shown to be abnormal, the fault detection process is simplified, and the method is visual, convenient and efficient.
Description
Technical Field
The present disclosure relates to the field of communications technologies, and in particular, to a method, an apparatus, a device, and a machine-readable storage medium for detecting a link failure.
Background
The BMC (Baseboard Management Controller) may perform operations such as firmware upgrade and checking of a device on the machine in a state where the machine is not powered on.
Management Component Transport Protocol (MCTP) is a media independent protocol for communicating with intelligent devices within a platform management subsystem of a managed computer system. The protocol is independent of the underlying physical bus and the "data link" layer messages on the bus, i.e., messages that define only the transport layer, and for the underlying transport layer, transport layer messages that are considered to be the protocol itself.
PCIE (peripheral component interconnect Express) is a high-speed serial computer expansion bus standard, belongs to high-speed serial point-to-point double-channel high-bandwidth transmission, and connected equipment distributes independent channel bandwidth and does not share bus bandwidth, and mainly supports functions of active power management, error reporting, end-to-end reliable transmission, hot plug, quality of service (QOS) and the like.
NCSI (Network Controller Sideband Interface) is an industry standard defined by the distributed management task force for Sideband Interface Network controllers that support out-of-band management of servers.
A scheme for detecting PCIE exception by a server sends out interrupt or exception when discovering hardware error through MCA hardware mechanism. Through MCA, the system can detect hardware errors, such as system bus errors, ECC errors, parity errors, cache errors, TLB errors and the like, and the MCA hardware mechanism needs to record and analyze the existing errors in processing, so that the process is complex and the efficiency is low.
Disclosure of Invention
In view of the above, the present disclosure provides a link failure detection method, a link failure detection device, an electronic device, and a machine-readable storage medium, so as to improve the problem of low failure detection efficiency.
The specific technical scheme is as follows:
the present disclosure provides a link failure detection method, applied to a BMC device, the method including: judging whether the target PCIE equipment supports the MCTP or not; sending a state acquisition command to target PCIE equipment supporting an MCTP protocol; trying to receive a feedback message, and judging the state of a PCIE link related to the target PCIE equipment according to the result of receiving the feedback message; the feedback message is a feedback message sent by the target PCIE equipment in response to the state acquisition command after receiving the state acquisition command.
As a technical solution, the sending a state acquisition command to a target PCIE device supporting an MCTP protocol, attempting to receive a feedback packet, and determining, according to a result of receiving the feedback packet, a state of a PCIE link associated with the target PCIE device includes: if the feedback message receiving fails, re-executing the step of sending the state acquisition command to the target PCIE equipment supporting the MCTP protocol after the preset delay, and recording the result of the failure of the feedback message receiving; and if the recorded failure result of receiving the feedback message reaches the specified times, judging that the state of the PCIE link associated with the target PCIE equipment is abnormal.
As a technical solution, the sending a state acquisition command to a target PCIE device supporting an MCTP protocol includes: encapsulating a message of a specified protocol containing a state acquisition command through an MCTP protocol, and sending the message to target PCIE equipment supporting the MCTP protocol; the specified protocol comprises NCSI protocol or PLDM protocol or VDM protocol.
As a technical solution, the attempting to receive a feedback packet and determining, according to a result of receiving the feedback packet, a state of a PCIE link associated with a target PCIE device includes: and if the state of the PCIE link related to the target PCIE equipment is judged to be abnormal, reporting an alarm.
The present disclosure also provides a link failure detection device, which is applied to BMC equipment, and the device includes: the protocol module is used for judging whether the target PCIE equipment supports the MCTP or not; the command module is used for sending a state acquisition command to target PCIE equipment supporting an MCTP protocol; the processing module is used for trying to receive the feedback message and judging the state of a PCIE link related to the target PCIE equipment according to the result of receiving the feedback message; the feedback message is a feedback message sent by the target PCIE equipment in response to the state acquisition command after receiving the state acquisition command.
As a technical solution, the sending a state acquisition command to a target PCIE device supporting an MCTP protocol, attempting to receive a feedback packet, and determining a state of a PCIE link associated with the target PCIE device according to a result of receiving the feedback packet includes: if the feedback message receiving fails, re-executing the step of sending the state acquisition command to the target PCIE equipment supporting the MCTP protocol after the preset delay, and recording the result of the failure of the feedback message receiving; and if the recorded failure result of receiving the feedback message reaches the specified times, judging that the state of the PCIE link associated with the target PCIE equipment is abnormal.
As a technical solution, the sending a state acquisition command to a target PCIE device supporting an MCTP protocol includes: encapsulating a message of a specified protocol containing a state acquisition command through an MCTP protocol, and sending the message to target PCIE equipment supporting the MCTP protocol; the specified protocol comprises NCSI protocol or PLDM protocol or VDM protocol.
As a technical solution, the attempting to receive a feedback packet and determining, according to a result of receiving the feedback packet, a state of a PCIE link associated with a target PCIE device includes: and if the state of the PCIE link related to the target PCIE equipment is judged to be abnormal, reporting an alarm.
The present disclosure also provides an electronic device including a processor and a machine-readable storage medium storing machine-executable instructions executable by the processor, the processor executing the machine-executable instructions to implement the aforementioned link failure detection method.
The present disclosure also provides a machine-readable storage medium having stored thereon machine-executable instructions that, when invoked and executed by a processor, cause the processor to implement the aforementioned link failure detection method.
The technical scheme provided by the disclosure at least brings the following beneficial effects:
the method comprises the steps of sending a state acquisition command to PCIE equipment supporting an MCTP protocol, judging whether a PCIE link has an abnormal fault in a protocol communication mode, and if the PCIE link cannot normally receive a feedback message, indicating that the PCIE link has the abnormal fault, simplifying a fault detection process, and being visual, convenient and efficient.
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In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings used in the embodiments of the present disclosure or the technical solutions in the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present disclosure, and other drawings can be obtained by those skilled in the art according to the drawings of the embodiments of the present disclosure.
FIG. 1 is a flow diagram of a link failure detection method in one embodiment of the present disclosure;
FIG. 2 is a block diagram of a link failure detection apparatus in one embodiment of the present disclosure;
fig. 3 is a hardware configuration diagram of an electronic device in an embodiment of the present disclosure.
Detailed Description
The terminology used in the embodiments of the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used in this disclosure and the claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein is meant to encompass any and all possible combinations of one or more of the associated listed items.
It is to be understood that although the terms first, second, third, etc. may be used herein to describe various information in the embodiments of the present disclosure, such information should not be limited by these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present disclosure. Depending on the context, moreover, the word "if" as used may be interpreted as "at … …" or "when … …" or "in response to a determination".
The disclosure provides a link fault detection method and device, an electronic device and a machine-readable storage medium, so as to improve the problem of low efficiency of the fault detection.
The specific technical scheme is as follows.
In one embodiment, the present disclosure provides a link failure detection method applied to a BMC device, the method including: judging whether the target PCIE equipment supports the MCTP or not; sending a state acquisition command to target PCIE equipment supporting an MCTP protocol; trying to receive a feedback message, and judging the state of a PCIE link related to the target PCIE equipment according to the result of receiving the feedback message; the feedback message is a feedback message sent by the target PCIE equipment in response to the state acquisition command after receiving the state acquisition command.
Specifically, as shown in fig. 1, the method comprises the following steps:
step S11, determining whether the target PCIE device supports the MCTP protocol;
step S12, sending a state acquisition command to a target PCIE device supporting the MCTP protocol;
step S13, trying to receive the feedback packet, and determining the state of the PCIE link associated with the target PCIE device according to a result of receiving the feedback packet.
The method comprises the steps of sending a state acquisition command to PCIE equipment supporting an MCTP protocol, judging whether a PCIE link has an abnormal fault in a protocol communication mode, and if the PCIE link cannot normally receive a feedback message, indicating that the PCIE link has the abnormal fault, simplifying a fault detection process, and being visual, convenient and efficient.
In an embodiment, the sending a state acquisition command to a target PCIE device supporting an MCTP protocol, attempting to receive a feedback packet, and determining, according to a result of receiving the feedback packet, a state of a PCIE link associated with the target PCIE device includes: if the feedback message receiving fails, re-executing the step of sending the state acquisition command to the target PCIE equipment supporting the MCTP protocol after the preset delay, and recording the result of the failure of the feedback message receiving; and if the recorded failure result of receiving the feedback message reaches the specified times, judging that the state of the PCIE link associated with the target PCIE equipment is abnormal.
In an embodiment, the sending a status acquisition command to a target PCIE device supporting an MCTP protocol includes: encapsulating a message of a specified protocol containing a state acquisition command through an MCTP protocol, and sending the message to target PCIE equipment supporting the MCTP protocol; the specified protocol comprises NCSI protocol or PLDM protocol or VDM protocol.
In one embodiment, the attempting to receive the feedback packet and determining, according to a result of receiving the feedback packet, a state of a PCIE link associated with the target PCIE device includes: and if the state of the PCIE link related to the target PCIE equipment is judged to be abnormal, reporting an alarm.
In one embodiment, the BMC is connected to the PCH through a PCIE bus, the PCH is connected to a PCIE bus controller of the CPU, and the CPU hangs down the PCIE device. The BMC communicates with the PCIE device through the PCIE link. The BMC encapsulates the NCSI or PLDM or VDM protocol message on the basis of the protocol message, then sends the message to the PCH through the PCIE link, the PCH forwards the message to the equipment through the PCIE controller, and the equipment processes the message after receiving the message and transmits a response to the BMC.
Taking a network card supporting an NCSI OVER MCTP protocol as an example, firstly, the BMC sets EID (end ID) to each network card as the identity number of the BMC; then, the BMC sends a state acquisition command of NCSI OVER MCTP to the network card, if the command of acquiring the link status of the network card is sent, after the network card receives the command, the network card responds to the BMC through the PCIE link, if the link status of the response port is up or down, and after receiving the response of the network card, the BMC can judge that the PCIE link and the equipment are normal. If the PCIE link is abnormal or the PCIE device is abnormal in this process, the command interaction process fails, that is, the feedback packet cannot be received. In order to avoid the situation of misjudgment caused by link jitter, the abnormality of the link or the equipment can be confirmed through the failure of multiple MCTP command interactions, for example, after the feedback message is received for the first time and fails, the state acquisition command is sent again at an interval of 5 seconds, and if the state acquisition command is repeated for three times and the feedback message cannot be received normally for three times, the PCIE link is considered to be abnormal.
In an embodiment, the present disclosure also provides a link failure detection apparatus, as shown in fig. 2, applied to a BMC device, the apparatus including: the protocol module 21 is configured to determine whether the target PCIE device supports an MCTP protocol; the command module 22 is configured to send a state acquisition command to a target PCIE device supporting the MCTP protocol; the processing module 23 is configured to attempt to receive a feedback packet, and determine, according to a result of receiving the feedback packet, a state of a PCIE link associated with the target PCIE device; the feedback message is a feedback message sent by the target PCIE equipment in response to the state acquisition command after receiving the state acquisition command.
In an embodiment, the sending a state acquisition command to a target PCIE device supporting an MCTP protocol, attempting to receive a feedback packet, and determining, according to a result of receiving the feedback packet, a state of a PCIE link associated with the target PCIE device includes: if the feedback message receiving fails, re-executing the step of sending the state acquisition command to the target PCIE equipment supporting the MCTP protocol after the preset delay, and recording the result of the failure of the feedback message receiving; and if the recorded failure result of receiving the feedback message reaches the specified times, judging that the state of the PCIE link associated with the target PCIE equipment is abnormal.
In an embodiment, the sending a status acquisition command to a target PCIE device supporting an MCTP protocol includes: encapsulating a message of a specified protocol containing a state acquisition command through an MCTP protocol, and sending the message to target PCIE equipment supporting the MCTP protocol; the specified protocol comprises NCSI protocol or PLDM protocol or VDM protocol.
In one embodiment, the attempting to receive the feedback packet and determining, according to a result of receiving the feedback packet, a state of a PCIE link associated with the target PCIE device includes: and if the state of the PCIE link related to the target PCIE equipment is judged to be abnormal, reporting an alarm.
The device embodiments are the same or similar to the corresponding method embodiments and are not described herein again.
In an embodiment, the present disclosure provides an electronic device, including a processor and a machine-readable storage medium, where the machine-readable storage medium stores machine-executable instructions executable by the processor, and the processor executes the machine-executable instructions to implement the foregoing link failure detection method, and from a hardware level, a schematic diagram of a hardware architecture may be as shown in fig. 3.
In one embodiment, the present disclosure provides a machine-readable storage medium having stored thereon machine-executable instructions that, when invoked and executed by a processor, cause the processor to implement the aforementioned link failure detection method.
Here, a machine-readable storage medium may be any electronic, magnetic, optical, or other physical storage device that can contain or store information such as executable instructions, data, and so forth. For example, the machine-readable storage medium may be: a RAM (random Access Memory), a volatile Memory, a non-volatile Memory, a flash Memory, a storage drive (e.g., a hard drive), a solid state drive, any type of storage disk (e.g., an optical disk, a dvd, etc.), or similar storage medium, or a combination thereof.
The systems, devices, modules or units described in the above embodiments may be implemented by a computer chip or an entity, or by a product with certain functions. A typical implementation device is a computer, which may take the form of a personal computer, laptop computer, cellular telephone, camera phone, smart phone, personal digital assistant, media player, navigation device, email messaging device, game console, tablet computer, wearable device, or a combination of any of these devices.
For convenience of description, the above devices are described as being divided into various units by function, and are described separately. Of course, the functionality of the various elements may be implemented in the same one or more software and/or hardware implementations in practicing the disclosure.
As will be appreciated by one of skill in the art, embodiments of the present disclosure may be provided as a method, system, or computer program product. Accordingly, the present disclosure may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present disclosure may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and so forth) having computer-usable program code embodied therein.
The present disclosure is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the disclosure. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Furthermore, these computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
As will be appreciated by one skilled in the art, embodiments of the present disclosure may be provided as a method, system, or computer program product. Accordingly, the present disclosure may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present disclosure may take the form of a computer program product embodied on one or more computer-usable storage media (which may include, but is not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The above description is only an embodiment of the present disclosure, and is not intended to limit the present disclosure. Various modifications and variations of this disclosure will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure should be included in the scope of the claims of the present disclosure.
Claims (10)
1. A link failure detection method is applied to a BMC device, and comprises the following steps:
judging whether the target PCIE equipment supports the MCTP or not;
sending a state acquisition command to target PCIE equipment supporting an MCTP protocol;
trying to receive a feedback message, and judging the state of a PCIE link related to the target PCIE equipment according to the result of receiving the feedback message;
the feedback message is a feedback message sent by the target PCIE equipment in response to the state acquisition command after receiving the state acquisition command.
2. The method of claim 1, wherein the sending a state acquisition command to a target PCIE device supporting an MCTP protocol, attempting to receive a feedback packet, and determining a state of a PCIE link associated with the target PCIE device according to a result of receiving the feedback packet includes:
if the feedback message receiving fails, re-executing the step of sending the state acquisition command to the target PCIE equipment supporting the MCTP protocol after the preset delay, and recording the result of the failure of the feedback message receiving;
and if the recorded failure result of receiving the feedback message reaches the specified times, judging that the state of the PCIE link associated with the target PCIE equipment is abnormal.
3. The method of claim 1, wherein sending a status acquisition command to a target PCIE device supporting an MCTP protocol comprises:
encapsulating a message of a specified protocol containing a state acquisition command through an MCTP protocol, and sending the message to target PCIE equipment supporting the MCTP protocol;
the specified protocol comprises NCSI protocol or PLDM protocol or VDM protocol.
4. The method of claim 1, wherein the attempting to receive the feedback packet and determining the state of the PCIE link associated with the target PCIE device according to a result of receiving the feedback packet comprises:
and if the state of the PCIE link related to the target PCIE equipment is judged to be abnormal, reporting an alarm.
5. A link failure detection device applied to a BMC (baseboard management controller) device is characterized by comprising:
the protocol module is used for judging whether the target PCIE equipment supports the MCTP or not;
the command module is used for sending a state acquisition command to target PCIE equipment supporting an MCTP protocol;
the processing module is used for trying to receive the feedback message and judging the state of a PCIE link related to the target PCIE equipment according to the result of receiving the feedback message;
the feedback message is a feedback message sent by the target PCIE equipment in response to the state acquisition command after receiving the state acquisition command.
6. The apparatus of claim 5, wherein the sending a state acquisition command to a target PCIE device supporting an MCTP protocol, attempting to receive a feedback packet, and determining a state of a PCIE link associated with the target PCIE device according to a result of receiving the feedback packet comprises:
if the feedback message receiving fails, re-executing the step of sending the state acquisition command to the target PCIE equipment supporting the MCTP protocol after the preset delay, and recording the result of the failure of the feedback message receiving;
and if the recorded failure result of receiving the feedback message reaches the specified times, judging that the state of the PCIE link associated with the target PCIE equipment is abnormal.
7. The apparatus of claim 5, wherein the sending the status acquisition command to the target PCIE device supporting the MCTP protocol comprises:
encapsulating a message of a specified protocol containing a state acquisition command through an MCTP protocol, and sending the message to target PCIE equipment supporting the MCTP protocol;
the specified protocol comprises NCSI protocol or PLDM protocol or VDM protocol.
8. The apparatus of claim 5, wherein the attempting to receive the feedback packet and determining, according to a result of receiving the feedback packet, a state of a PCIE link associated with the target PCIE device includes:
and if the state of the PCIE link related to the target PCIE equipment is judged to be abnormal, reporting an alarm.
9. An electronic device, comprising: a processor and a machine-readable storage medium storing machine-executable instructions executable by the processor to perform the method of any one of claims 1 to 4.
10. A machine-readable storage medium having stored thereon machine-executable instructions which, when invoked and executed by a processor, cause the processor to implement the method of any of claims 1-4.
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Cited By (1)
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| CN116582471A (en) * | 2023-07-14 | 2023-08-11 | 珠海星云智联科技有限公司 | PCIE equipment, PCIE data capturing system and server |
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