CN114697249B - Chip, control method thereof, computer-readable storage medium, and electronic device - Google Patents

Chip, control method thereof, computer-readable storage medium, and electronic device Download PDF

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CN114697249B
CN114697249B CN202011621973.9A CN202011621973A CN114697249B CN 114697249 B CN114697249 B CN 114697249B CN 202011621973 A CN202011621973 A CN 202011621973A CN 114697249 B CN114697249 B CN 114697249B
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routing
transmitted
dynamic information
routing path
data packet
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CN114697249A (en
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吴斯奇
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Priority to PCT/CN2021/135799 priority patent/WO2022143020A1/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/70Routing based on monitoring results
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/302Route determination based on requested QoS
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/109Integrated on microchip, e.g. switch-on-chip
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/50Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The present application relates to a chip, a control method thereof, a computer-readable storage medium, and an electronic device, the chip including: the route monitoring module is used for acquiring the data transmission request and the dynamic information of each route node; and the central processing module is used for determining a routing path according to the data transmission request and the dynamic information, and configuring a corresponding routing node based on the routing path so as to carry out data transmission through the corresponding routing node. Therefore, network blocking can be effectively reduced, bandwidth utilization rate is improved, and flexibility and reusability of a network topology structure are improved.

Description

Chip, control method thereof, computer-readable storage medium, and electronic device
Technical Field
The present disclosure relates to the field of integrated circuits, and in particular, to a chip, a control method thereof, a computer readable storage medium, and an electronic device.
Background
As the application requirements of the system on chip SOC (System On Chip) become more abundant and complex, the Multi-core on chip mpssoc (Multi-processor System On Chip) has become a necessary trend of development, and as the system performance requirements become higher, the interconnect architecture between processor cores must be able to provide services with lower latency and high throughput, while having good scalability. Conventional centralized interconnection architecture based on bus has been difficult to meet the performance requirements of the present system, while network on chip NOC (Network On Chip) based on message exchange is gradually becoming the preferred interconnection architecture for communication between processor cores, and as NOC technology is continuously developed, various network topologies of NOCs, mainly including general network topologies and customized network topologies, are proposed in the related art.
Fig. 1 is a general network topology proposed in the related art, in which routing nodes are connected through local interconnection lines, each routing node is connected to a local IP core through a network interface, and a data packet is transmitted in each routing node to transmit the data packet from a source IP core to a destination IP core, but in the process of transmitting the data packet, the next routing node for transmitting the data packet only depends on whether the next routing node is idle, so that a transmission route is easily blocked, and the overall utilization rate of the transmission route is not high.
Fig. 2 is a system-level customized network topology proposed in the related art, which is configured to customize a certain routing rule according to a specific system architecture and scene requirements, for example, a routing node can only transmit outgoing packets from up to down to left and right, and can only transmit outgoing packets from up to right to left, or give different rules according to parity columns. Because the customization mode can make a certain limit on the flexibility of bus application, the customization mode cannot be directly used among various projects, and once the topology structure is determined, the data flow direction is determined, and cannot be dynamically adjusted, so that the selectivity of the data flow is limited to a certain extent, and the transmission efficiency is affected.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a chip, a control method thereof, a computer-readable storage medium, and an electronic device that can reduce network congestion, improve bandwidth utilization, and improve flexibility and reusability of a network topology.
A chip, comprising:
the route monitoring module is used for acquiring the data transmission request and the dynamic information of each route node;
and the central processing module is used for determining a routing path according to the data transmission request and the dynamic information, and configuring a corresponding routing node based on the routing path so as to carry out data transmission through the corresponding routing node.
A control method of a chip, comprising the steps of:
acquiring data transmission requests and dynamic information of each routing node;
and determining a routing path according to the data transmission request and the dynamic information, and configuring a corresponding routing node based on the routing path so as to carry out data transmission through the corresponding routing node.
A computer-readable storage medium having stored thereon a control program of a chip, which when executed by a processor, implements the steps of the control method of a chip described above.
An electronic device comprises the chip.
The chip, the control method thereof, the computer readable storage medium and the electronic equipment are used for transmitting data through the corresponding routing nodes by acquiring the data transmission request and the dynamic information of each routing node, determining the routing path according to the data transmission request and the dynamic information and configuring the corresponding routing nodes based on the routing path. Therefore, optimized route suggestions are made for the data transmission of each routing node from the global view of the bus, network congestion can be effectively reduced, the bandwidth utilization rate is improved, and the flexibility and reusability of a network topology structure are improved.
Drawings
Fig. 1 is a general network topology proposed in the related art;
FIG. 2 is a system level customized network topology as proposed in the related art;
FIG. 3 is a schematic diagram of a chip in one embodiment;
FIG. 4 is a schematic diagram of path planning for a chip in one embodiment;
FIG. 5 is a schematic diagram of dynamic path adjustment of a chip in one embodiment;
FIG. 6 is a schematic diagram of security control of a chip in one embodiment;
FIG. 7 is a flow chart of a method of controlling a chip in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In one embodiment, referring to FIG. 3, a chip is provided, the chip comprising: a route monitoring module 10 and a central processing module 20.
The route monitoring module 10 is configured to obtain a data transmission request and dynamic information of each routing node R; the central processing module 20 is configured to determine a routing path according to the data transmission request and the dynamic information, and configure a corresponding routing node R based on the routing path, so as to perform data transmission through the corresponding routing node R.
Specifically, referring to fig. 3, the chip may include a plurality of routing nodes R, where each routing node R is connected by a local interconnect (solid line in the figure), and a part of the routing nodes R is connected to one or more local components through a network interface component NIU (Network Interface Unit) to form a mesh network-on-chip bus, where the local components may be, but are not limited to, a CPU (Central Processing Unit, a central processing unit), a DMA (Direct Memory Access ), an APB (Advanced Peripheral Bus, a peripheral bus), an AHB (Advanced High Performance Bus, an advanced high-performance bus), and the like. When data transmission is performed between different local components, the local component of the source end can pack the data to be transmitted to generate a data packet, the data packet is injected into a routing node R connected with the data packet through a network interface component NIU, then the data packet is transmitted through other routing nodes R in the network-on-chip bus, and finally the data packet reaches the local component of the destination end.
In order to realize orderly transmission of data packets among the routing nodes R, avoid causing network congestion, improve network bandwidth utilization rate, flexibility of network structure, reusability and the like, a routing monitoring module 10 can be arranged in an on-chip network bus (such as the central position of the on-chip network bus) as a routing monitoring and control center and is responsible for collecting and monitoring information of each routing node R in the on-chip network bus, including data transmission requests and dynamic information, wherein the data transmission requests include, but are not limited to, a source end, a destination end, the size of the data packets, priority information and transmission delay tolerance time of the data packets to be transmitted; the dynamic information includes information of a data packet to be transmitted and quality of service (Quality of Service, qoS) information of a routing node, wherein the information of the data packet to be transmitted includes, but is not limited to, information of a source end, a destination end, a data packet size, priority information, a previous routing node and a next routing node R of the data packet to be transmitted. After obtaining the data transmission request and the dynamic information of each routing node R, the route monitoring module 10 directly sends the data transmission request to the central processing module 20 located on the network-on-chip bus, and gathers and packages the collected dynamic information of each routing node R with a timestamp, and sends the collected dynamic information to the central processing module 20 located on the network-on-chip bus.
The central processing module 20 may be a local component with data processing capability, such as a CPU, added to the network-on-chip bus, or a local component with data processing capability, such as a CPU, on the network-on-chip bus, which is not limited herein. After receiving the information of each routing node R, the central processing module 20 selects different transmission rules and algorithms from the global view of the current bus, makes an optimized routing suggestion for the data packet of each routing node R, and distributes the optimized routing suggestion to each routing node R, so as to achieve the purpose of central control of each routing node R in the network-on-chip bus. Specifically, the central processing module 20 determines a routing path according to the data transmission request and the dynamic information, and distributes the routing path to the corresponding routing node R through the routing monitoring module 10, and configures the corresponding routing node R to perform data transmission through the corresponding routing node R.
In the example, by acquiring the information of each routing node in the network-on-chip bus and carrying out routing path planning from the global system angle based on the information of each routing node, the management and control of the routing are improved from local to system level, so that network congestion can be effectively reduced, the bandwidth utilization rate is improved, and the flexibility and reusability of the network topology structure are improved. Meanwhile, because the path planning is realized by the central processing module arranged on the network bus on chip, the hardware resource occupation of the routing monitoring module arranged in the network bus on chip can be effectively reduced, the influence of the routing monitoring module on the area of the network bus on chip and the power consumption is reduced, and when the central processing module adopts a local component with data processing capacity on the original network bus such as a CPU, no extra hardware cost is introduced, and the central processing module can perform more complex and flexible operation according to the load of the central processing module, and once the hardware is designed, the hardware is difficult to change and lacks flexibility.
In one embodiment, the central processing module 20 is specifically configured to, when determining a routing path according to a data transmission request and dynamic information: acquiring a source end and a destination end of a data packet to be transmitted according to a data transmission request; and determining a routing path meeting a preset condition according to the dynamic information of the routing node between the source terminal and the destination terminal, and generating the routing path according to the routing path meeting the preset condition.
Specifically, before data transmission, the local component at the source end firstly packages the data to be transmitted to form a data packet, then injects the data packet into the routing node R connected with the data packet through the network interface component NIU, then the routing node R sends a data transmission request to the routing monitoring module 10 after receiving the data packet to be transmitted, and the routing monitoring module 10 sends the data transmission request and the dynamic information of each routing node R acquired in real time to the central processing module 20 after receiving the data transmission request. After receiving the data transmission request, the central processing module 20 obtains the source end and the destination end of the data packet to be transmitted from the data transmission request, performs path planning according to the dynamic information of the routing node R between the source end and the destination end, so as to obtain a routing path meeting the preset condition, and generates the routing path according to the routing path meeting the preset condition. The preset conditions include, but are not limited to, shortest transmission time, least routing nodes and best transmission signal.
For example, as shown in fig. 4, assuming that the local component a is a source end and the local component C is a destination end, when transmitting a packet from the source end to the destination end, before transmitting the packet, a routing path may be planned according to dynamic information of routing nodes, such as routing nodes Router1 to Router6, between the source end and the destination end, and when planning, a shortest routing path (a direct connection path shown as R1 in the figure) between the routing nodes Router1 to Router3 may be obtained first, and whether the routing path is used or not is determined, and if not used, the routing path is taken as a current shortest routing path; if so, a shortest route path other than the path (e.g., R2 or R3 in the figure) is acquired, and it is determined whether the path is used, and if not, the path is taken as the current shortest route path. Then, the central processing module 20 generates a routing path according to the current shortest routing path, including identification information of each routing node on the current shortest routing path, and sends the routing path to the routing monitoring module 10, and the routing monitoring module 10 distributes the routing path to the corresponding routing node R to transmit the data packet to be transmitted through the corresponding routing node R.
In this embodiment, the routing path planning is performed from the global system perspective according to the dynamic information of the source end, the destination end and all routing nodes between the source end and the destination end of the data packet to be transmitted, instead of the routing path planning from the routing perspective or the bus perspective, so that network congestion can be effectively reduced, and the bandwidth utilization rate can be improved.
In one embodiment, the central processing module 20 is further configured to dynamically adjust the routing path according to dynamic information during the data transmission process.
As an example, the central processing module 20 is specifically configured to, when dynamically adjusting the routing path according to the dynamic information: determining the path service condition between the current routing node of the data packet to be transmitted and the next routing node according to the dynamic information; if the route is used, acquiring an unused route from the current route node to the next route node of the data packet to be transmitted according to the dynamic information; the routing paths are adjusted based on the unused routing paths.
That is, in the data transmission process, if it is determined that the path between the current routing node of the data packet to be transmitted and the next routing node is used according to the dynamic information, the unused routing path between the current routing node of the data packet to be transmitted and the next routing node is obtained again according to the dynamic information, and the data transmission is performed based on the unused routing path, so as to ensure that the data packet to be transmitted can be transmitted in time.
For example, referring to fig. 4, assuming that the routing node where the data packet to be transmitted is currently located is Router1, and the next routing node determined based on the data packet transmission is Router3 and the routing path is R1, during the data packet transmission, if the path R1 is used, the central processing module 20 re-plans the path according to the dynamic information of the routing node. As an example, the central processing module 20 calculates a recommended path, such as R2 or R3, according to QoS information of the data packet to be transmitted, in combination with the transmission conditions of the current data packets on the routing nodes Router1, router2 and Router6 and the priorities of the data packets as path planning conditions, so that the data packet to be transmitted at the routing node Router1 can immediately start to be transmitted on the path R2 or R3 without waiting on the path R1, thereby effectively improving network utilization and transmission bandwidth. Of course, the dynamic flexible adjustment of the routing path may also be performed based on other dynamic information, and is not limited herein.
In this embodiment, in the data transmission process, the dynamic and flexible planning is performed on the routing path from the global system perspective and the current congestion degree of the network according to the dynamic information of the routing node, so that the network utilization rate and the transmission bandwidth can be effectively improved.
As another example, the central processing module 20 is specifically configured to, when dynamically adjusting the routing path according to the dynamic information: determining that a plurality of data packets to be transmitted exist in one processing period of a routing node and need to be transmitted through the same routing path according to the dynamic information, and acquiring the priority of each data packet to be transmitted according to the dynamic information; and clearing the same routing path in advance according to the priority of each data packet to be transmitted.
Further, the central processing module 20 is specifically configured to, when the same routing path is cleared in advance according to the priority of each data packet to be transmitted: and prohibiting the data packets to be transmitted with low priority from being transmitted through the same routing path in advance.
For example, referring to fig. 5, in one processing cycle of the routing node, if there are multiple packets to be transmitted through the same routing path, for example, the packets to be transmitted of the routing node Router1 are transmitted to the routing node Router3 via the path R1, the packets to be transmitted of the routing node Router2 are transmitted to the routing node Router3 via the path R2 and the path R1, and the packets to be transmitted of the routing node Router6 are transmitted to the routing node Router3 via the path R3 and the path R1, at this time, the priority of each packet to be transmitted is obtained, and if the priority of the packets to be transmitted of the routing node Router1 is highest, the packets to be transmitted of the routing node Router2 and the packets to be transmitted of the routing node Router6 are managed to other routing paths in advance, and the path R1 is cleared and locked in advance, so as to ensure that the packets to be transmitted to the routing node Router3 with the highest priority.
In other words, if there is a packet to be transmitted with higher priority and higher real-time performance that needs to be transmitted on the path R1, the central processing module 20 will empty the path R1 in advance, such as to control the packet to be transmitted with lower priority to other routing paths in advance (the packet being transmitted will continue to be transmitted), empty and lock the path R1 in advance, so as to ensure that the subsequent packet with higher priority and higher real-time performance can be transmitted with low latency.
In this embodiment, dynamic transmission control is performed according to the priority of the data packet to be transmitted, so as to ensure that the data packet with higher subsequent priority and higher real-time performance can be transmitted with low delay.
In one embodiment, the central processing module 20 is further configured to perform security management and control on the routing node corresponding to the routing path during the data transmission process.
Further, the central processing module 20 is specifically configured to, when performing security management and control on the routing node corresponding to the routing path: and when the running time or the running state of the chip meets the preset condition, controlling the routing node in the safety control state to disable the unsafe data packet. The running state includes, but is not limited to, a secure start running state and an unauthorized secure access state.
That is, during the data transmission process, the central processing module 20 also obtains the operation time or the operation state of the whole chip, and then dynamically and safely controls each routing node based on the operation time or the operation state. For example, during certain time periods or operating states, access rights of certain local components (e.g., master GPU, etc.) to other local components (e.g., slave SRAM, DDR, etc.) may be flexibly restricted, e.g., blacklisted master access to slave devices may be restricted.
As an example, referring to fig. 6, when the local component E needs to access the local component C, during an initialization period after a secure start period, the routing node Router3 will start a secure management mechanism, for example, implement access restriction by using SWTICH (switch) in the routing node Router3, prohibit the local component E in the blacklist from accessing from various paths until after initialization or after checking the local component E, and via re-authorization of the central processing module 20, the routing node Router3 releases the access restriction on the local component E in the blacklist, thereby restricting access to the slave device by the master device in the blacklist, and ensuring security of data transmission.
As another example, referring to fig. 6, during system operation, if some local components (e.g., master GPU) are found to be alerted to some unauthorized secure address access, access by the local components (e.g., master GPU) to some local components (e.g., slave SRAM, etc.) within the bus is disabled.
In this embodiment, the security of the entire network-on-chip bus may be ensured by performing dynamic security management and control according to the running time or running state of the chip. That is, the central processing module can perform more operations of cross conditions, such as superimposing factors of security, power supply and the like of the whole network into dynamic control of the routing node, so as to schedule and safely control the network-on-chip bus from a system angle instead of a routing angle or a bus angle.
In summary, the chip of the embodiment of the invention obtains the information of each routing node in the on-chip network bus through the routing monitoring module, determines the routing path from the global angle of the system based on the information of each routing node through the central processing module and dynamically adjusts the routing path, so that the management and control of the routing are improved from local to system level, thereby effectively reducing network blockage, improving the bandwidth utilization rate and improving the flexibility and reusability of the network topology. Meanwhile, global flow control is performed through a central processing module on the network-on-chip bus, and under the cost of no large hardware cost and complexity, dynamic flow control, safety control, power consumption control and the like can be performed on data packets from the global angle of the system according to more cross conditions through soft and hard combination by means of the computing capability of the central processing module such as a CPU.
In one embodiment, a method for controlling a chip is provided, and referring to fig. 7, the method for controlling a chip includes the following steps:
step S702, obtain the data transmission request and dynamic information of each routing node. The data transmission request includes, but is not limited to, a source end, a destination end, a data packet size, priority information and transmission delay tolerance time of a data packet to be transmitted; the dynamic information includes information of a data packet to be transmitted and service quality information of a routing node, wherein the data packet information to be transmitted includes, but is not limited to, a source end, a destination end, a data packet size, priority information and identification information of a next routing node of the data packet to be transmitted.
Step S704, determining a routing path according to the data transmission request and the dynamic information, and configuring a corresponding routing node based on the routing path to perform data transmission through the corresponding routing node.
In one embodiment, determining a routing path based on a data transmission request and dynamic information includes: acquiring a source end and a destination end of a data packet to be transmitted according to a data transmission request; and determining a routing path meeting a preset condition according to the dynamic information of the routing node between the source terminal and the destination terminal, and generating the routing path according to the routing path meeting the preset condition.
In one embodiment, the method for controlling a chip further includes: and in the data transmission process, dynamically adjusting the routing path according to the dynamic information.
In one embodiment, dynamically adjusting the routing path based on the dynamic information includes: determining the path service condition between the current routing node of the data packet to be transmitted and the next routing node according to the dynamic information; if the route is used, acquiring an unused route from the current route node to the next route node of the data packet to be transmitted according to the dynamic information; the routing paths are adjusted based on the unused routing paths.
In another embodiment, dynamically adjusting the routing path based on the dynamic information includes: determining that a plurality of data packets to be transmitted exist in one processing period of a routing node and need to be transmitted through the same routing path according to the dynamic information, and acquiring the priority of each data packet to be transmitted according to the dynamic information; and clearing the same routing path in advance according to the priority of each data packet to be transmitted.
In one embodiment, the forwarding of the same routing path according to the priority of each data packet to be transmitted includes: and prohibiting the data packets to be transmitted with low priority from being transmitted through the same routing path in advance.
In one embodiment, the method for controlling a chip further includes: and in the data transmission process, carrying out safety control on the routing nodes corresponding to the routing paths.
In one embodiment, performing security management and control on a routing node corresponding to a routing path includes: and when the running time or the running state of the chip meets the preset condition, controlling the routing node in the safety control state to disable the unsafe data packet. The running state includes, but is not limited to, a secure start running state and an unauthorized secure access state.
Specific limitations regarding the control method of the chip may be referred to above as limitations on the chip, and will not be described herein.
In one embodiment, a computer-readable storage medium is provided, on which a control program of a chip is stored, which when executed by a processor implements the steps of the control method of the chip described above.
In one embodiment, an electronic device is provided that includes the chip described above.
The chip, the control method thereof, the computer readable storage medium and the electronic equipment are used for transmitting data through the corresponding routing nodes by acquiring the data transmission request and the dynamic information of each routing node, determining the routing path according to the data transmission request and the dynamic information and configuring the corresponding routing nodes based on the routing path. Therefore, the data packet of each routing node is provided with the optimized routing proposal from the global perspective of the bus, so that the network congestion can be effectively reduced, the bandwidth utilization rate can be improved, and the flexibility and reusability of the network topology structure can be improved.
Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the various embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), memory bus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples merely represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the invention. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.

Claims (11)

1. A chip, comprising:
the route monitoring module is used for acquiring data transmission requests and dynamic information of each route node, wherein the data transmission requests comprise priority information of data packets to be transmitted; the dynamic information comprises information of a data packet to be transmitted and service quality information of a routing node, and the information of the data packet to be transmitted comprises priority information of the data packet to be transmitted;
the central processing module is used for determining a routing path according to the data transmission request and the dynamic information, and configuring a corresponding routing node based on the routing path so as to perform data transmission through the corresponding routing node;
the central processing module is further configured to:
in the data transmission process, dynamically adjusting the routing path according to the dynamic information;
the central processing module is specifically configured to, when dynamically adjusting the routing path according to the dynamic information:
determining that when a plurality of data packets to be transmitted exist in one processing period of a routing node and are required to be transmitted through the same routing path according to the dynamic information, acquiring the priority of each data packet to be transmitted according to the dynamic information;
the same routing path is cleared in advance according to the priority of each data packet to be transmitted;
the central processing module is further configured to:
in the data transmission process, carrying out safety control on the routing nodes corresponding to the routing paths;
when the running time or running state of the chip meets preset conditions, controlling a routing node in a safe control state to disable a non-safe data packet;
the operating state includes at least one of a secure boot operating state and an unauthorized secure access state.
2. The chip of claim 1, wherein the central processing module is specifically configured to: and distributing the routing paths to corresponding routing nodes through the routing monitoring module.
3. The chip according to claim 1, wherein the central processing module is configured to, when determining a routing path according to the data transmission request and the dynamic information:
acquiring a source end and a destination end of a data packet to be transmitted according to the data transmission request;
and determining a routing path meeting a preset condition according to the dynamic information of the routing node between the source end and the destination end, and generating the routing path according to the routing path meeting the preset condition.
4. The chip of claim 1, wherein the central processing module is further configured to, when dynamically adjusting the routing path according to the dynamic information:
determining the path service condition between the current routing node of the data packet to be transmitted and the next routing node according to the dynamic information;
if the route is used, acquiring an unused route from the current route node of the data packet to be transmitted to the next route node according to the dynamic information;
and adjusting the routing path according to the unused routing path.
5. The chip of claim 1, wherein the central processing module is configured to, when the same routing path is cleared in advance according to the priority of each data packet to be transmitted:
and prohibiting the data packets to be transmitted with low priority from being transmitted through the same routing path in advance.
6. The chip control method is characterized by comprising the following steps of:
acquiring data transmission requests and dynamic information of each routing node; wherein the data transmission request comprises priority information of a data packet to be transmitted; the dynamic information comprises information of a data packet to be transmitted and service quality information of a routing node, and the information of the data packet to be transmitted comprises priority information of the data packet to be transmitted;
determining a routing path according to the data transmission request and the dynamic information, and configuring a corresponding routing node based on the routing path so as to perform data transmission through the corresponding routing node;
in the data transmission process, dynamically adjusting the routing path according to the dynamic information;
the dynamically adjusting the routing path according to the dynamic information includes:
determining that when a plurality of data packets to be transmitted exist in one processing period of a routing node and are required to be transmitted through the same routing path according to the dynamic information, acquiring the priority of each data packet to be transmitted according to the dynamic information;
the same routing path is cleared in advance according to the priority of each data packet to be transmitted;
in the data transmission process, carrying out safety control on the routing nodes corresponding to the routing paths;
when the running time or running state of the chip meets preset conditions, controlling a routing node in a safe control state to disable a non-safe data packet;
the operating state includes at least one of a secure boot operating state and an unauthorized secure access state.
7. The method according to claim 6, wherein the determining a routing path according to the data transmission request and the dynamic information comprises:
acquiring a source end and a destination end of a data packet to be transmitted according to the data transmission request;
and determining a routing path meeting a preset condition according to the dynamic information of the routing node between the source end and the destination end, and generating the routing path according to the routing path meeting the preset condition.
8. The method according to claim 6, wherein the dynamically adjusting the routing path according to the dynamic information further comprises:
determining the path service condition between the current routing node of the data packet to be transmitted and the next routing node according to the dynamic information;
if the route is used, acquiring an unused route from the current route node of the data packet to be transmitted to the next route node according to the dynamic information;
and adjusting the routing path according to the unused routing path.
9. The method for controlling a chip according to claim 6, wherein the step of forwarding the same routing path according to the priority of each data packet to be transmitted includes:
and prohibiting the data packets to be transmitted with low priority from being transmitted through the same routing path in advance.
10. A computer-readable storage medium, on which a control program of a chip is stored, characterized in that the control program, when executed by a processor, implements the steps of the control method of a chip as claimed in any one of claims 6 to 9.
11. An electronic device comprising a chip as claimed in any one of claims 1-5.
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