CN114695137A - Electronic panel, spliced electronic device and manufacturing method thereof - Google Patents
Electronic panel, spliced electronic device and manufacturing method thereof Download PDFInfo
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- CN114695137A CN114695137A CN202110944632.3A CN202110944632A CN114695137A CN 114695137 A CN114695137 A CN 114695137A CN 202110944632 A CN202110944632 A CN 202110944632A CN 114695137 A CN114695137 A CN 114695137A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
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- Manufacturing & Machinery (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The present disclosure provides an electronic panel, a tiled electronic device and a method for manufacturing the same. The manufacturing method of the spliced electronic device comprises the following steps. Providing a first electronic panel, wherein the first electronic panel comprises a plurality of first bumps and a plurality of first wires, and the plurality of first bumps and the plurality of first wires are arranged on the side surface of the first electronic panel. Providing a second electronic panel, wherein the second electronic panel comprises a plurality of second bumps and a plurality of second wires, and the plurality of second bumps and the plurality of second wires are disposed on a side surface of the second electronic panel. The first electronic panel is coupled with the second electronic panel through the first bumps and the second bumps. And forming a plurality of conductive elements so that the plurality of first wires and the plurality of second wires are electrically connected through the plurality of conductive elements after the first electronic panel and the second electronic panel are coupled. The electronic panel, the splicing electronic device and the manufacturing method thereof disclosed by the embodiment of the disclosure can have the effects of self-alignment, self-connection or easier splicing.
Description
Technical Field
The present disclosure relates to electronic panels, electronic devices, and methods for manufacturing the same, and more particularly, to an electronic panel, an electronic device, and a method for manufacturing the same, which can have self-alignment, self-connection, or easy-to-splice effects.
Background
Electronic devices or tiled electronic devices have been widely used in mobile phones, televisions, monitors, tablet computers, vehicle displays, wearable devices, and desktop computers. With the rapid development of electronic devices, the quality requirements for electronic devices are higher.
Disclosure of Invention
The present disclosure provides an electronic panel, a splicing electronic device and a method for manufacturing the same, which can have self-alignment (self-alignment), self-connection (self-connection) or easier splicing effects.
According to an embodiment of the present disclosure, a method for manufacturing a tiled electronic device includes the following steps. First, a first electronic panel is provided. The first electronic panel comprises a plurality of first bumps and a plurality of first wires, and the plurality of first bumps and the plurality of first wires are arranged on the side surface of the first electronic panel. Then, a second electronic panel is provided. The second electronic panel comprises a plurality of second bumps and a plurality of second wires, and the plurality of second bumps and the plurality of second wires are arranged on the side surface of the second electronic panel. Then, the first electronic panel is coupled with the second electronic panel through the first bumps and the second bumps. Finally, a plurality of conductive elements are formed, so that the plurality of first wires and the plurality of second wires are electrically connected through the plurality of conductive elements after the first electronic panel and the second electronic panel are coupled.
According to an embodiment of the present disclosure, an electronic panel includes a substrate, a plurality of electronic components, a plurality of magnetic bumps, and a plurality of conductive wires. The substrate has a first surface and a side surface adjacent to the first surface. A plurality of electronic components are arranged on the first surface. The plurality of magnetic bumps are arranged on the side surface. The plurality of wires are arranged on the side surface and electrically connected to the plurality of electronic elements.
According to an embodiment of the present disclosure, a tiled electronic device includes a first electronic panel and a second electronic panel. The first electronic panel comprises a plurality of first magnetic bumps, a plurality of first wires and a plurality of conductive elements. The plurality of first magnetic bumps and the plurality of first wires are arranged on the side surface of the first electronic panel. The second electronic panel comprises a plurality of second magnetic bumps and a plurality of second wires, wherein the plurality of second magnetic bumps and the plurality of second wires are arranged on the side surface of the second electronic panel adjacent to the first electronic panel. The plurality of conductive elements are arranged between the first electronic panel and the second electronic panel. The plurality of first magnetic bumps are respectively attracted with the plurality of corresponding second magnetic bumps, and the plurality of first wires are respectively electrically connected with the plurality of second wires through the plurality of conductive elements.
Drawings
The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.
Fig. 1A to fig. 1C are schematic perspective or top views illustrating a manufacturing method of a tiled electronic device according to an embodiment of the disclosure;
fig. 2A to 2C are schematic perspective or top views illustrating a method for manufacturing a tiled electronic device according to another embodiment of the disclosure;
FIG. 3 is a schematic top view of a tiled electronic device according to another embodiment of the present disclosure;
FIG. 4 is a schematic top view of a tiled electronic device according to another embodiment of the present disclosure;
fig. 5A to 5B are schematic perspective or top views illustrating a manufacturing method of a tiled electronic device according to another embodiment of the disclosure;
fig. 6 is a perspective view of a first composite element and a second composite element according to another embodiment of the disclosure.
Description of the reference numerals
10. 10a, 10b, 10c, 10 d: splicing the electronic devices;
100. 100 d: a first electronic panel;
101: a side surface;
110. 210: a first substrate;
111: a first surface;
112. 212, and (3): a side surface;
120. 220, and (2) a step of: an electronic component;
130. 230: a second substrate;
131. 231: a side surface;
140. 140 b: a first bump;
140d, 140 e: a first magnetic bump;
150: a first conductive line;
160. 160 e: a first composite element;
200. 200 d: a second electronic panel;
201: a side surface;
240. 240 b: a second bump;
240d, 240 e: a second magnetic bump;
250: a second conductive line;
260. 260 e: a second composite element;
300: a conductive liquid;
310: conductive particles;
320: a conductive element;
320a, 330 e: a first conductive element;
320b, 340 e: a second conductive element;
350: a film carrier plate;
h1, H2, H3: height.
Detailed Description
The present disclosure may be understood by reference to the following detailed description taken in conjunction with the accompanying drawings, in which it is noted that, for the sake of clarity and brevity of the drawings, the various drawings in the present disclosure depict only some of the electronic devices and are not necessarily drawn to scale. In addition, the number and size of the elements in the figures are merely illustrative and are not intended to limit the scope of the present disclosure.
In the following specification and claims, the words "comprise", "comprising", "includes" and "including" are open-ended words that should be interpreted as meaning "including, but not limited to …".
It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers may be present (not directly). In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or film layer, there are no intervening elements or film layers present between the two.
Although the terms "first," "second," and "third" … may be used to describe various components, the components are not limited by this term. This term is used only to distinguish a single component from other components within the specification. The same terms may not be used in the claims, but instead first, second, and third … may be substituted for the elements in the claims in the order in which they are presented. Therefore, in the following description, a first constituent element may be a second constituent element in the claims.
As used herein, the term "about," "substantially," "approximately" generally refers to within 10%, or within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of a given value or range. The amounts given herein are approximate, that is, the meanings of "about", "substantially" and "approximately" may be implied without specifically stating "about", "substantially" and "approximately".
In some embodiments of the present disclosure, terms such as "connected," "interconnected," and the like, with respect to bonding, connecting, and the like, may refer to two structures being in direct contact, or may also refer to two structures not being in direct contact, unless otherwise specified, with respect to the structure between which they are disposed. And the terms coupled and connected should also be construed to include both structures being movable or both structures being fixed. Furthermore, the term "coupled" encompasses any direct and indirect electrical connection.
The electronic device of the present disclosure may be applied to, but not limited to, a display device, an antenna device, a sensing device, a light-emitting device, a touch device, or a splicing device. The electronic device may include a bendable electronic device. The exterior of the electronic device may be rectangular, circular, polygonal, shaped with curved edges, or other suitable shapes. The electronic devices may include passive devices and active devices, such as capacitors, resistors, inductors, diodes, transistors, etc. The diode may comprise a light emitting diode or a photodiode. The electronic device may include, for example, a Light Emitting Diode (LED), a liquid crystal (liquid crystal), a fluorescent (fluorescent), a phosphorescent (phosphor), a Quantum Dot (QD), other suitable materials, or a combination thereof, but is not limited thereto. The light emitting diode may include, for example, an Organic Light Emitting Diode (OLED), an inorganic light emitting diode (inorganic light-emitting diode), a submillimeter light emitting diode (mini LED), a micro LED (micro LED), a Quantum Dot (QD) light emitting diode (QDLED), other suitable materials, or any combination thereof, but is not limited thereto. The electronic device may also include, for example, but is not limited to, a tiled electronic device. The antenna device may be, for example, a liquid crystal antenna, but is not limited thereto. The antenna device may include, for example, but is not limited to, an antenna splicing device. It should be noted that the electronic device can be any permutation and combination of the foregoing, but not limited thereto. In addition, the exterior of the electronic device may be rectangular, circular, polygonal, a shape with curved edges, or other suitable shapes. The electronic device may have a peripheral system such as a drive system, a control system, a light source system, a shelf system …, etc. to support the electronic device, the antenna device, or the splicing device.
It is to be understood that the following illustrative embodiments may be implemented by replacing, recombining, and mixing features of several different embodiments without departing from the spirit of the present disclosure. Features of the various embodiments may be combined and matched as desired, without departing from the spirit or ambit of the invention.
Reference will now be made in detail to the exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.
Fig. 1A to fig. 1C are schematic perspective or top views illustrating a manufacturing method of a tiled electronic device according to an embodiment of the disclosure. For clarity and convenience of illustration, fig. 1B and 1C omit certain elements of the electronic device 10. In this embodiment, the method for manufacturing the tiled electronic device 10 includes the following steps:
first, referring to fig. 1A and fig. 1B, a first electronic panel 100 is provided. The first electronic panel 100 has a side surface 101 surrounding the periphery of the first electronic panel 100. The first electronic panel 100 includes a first substrate 110, a plurality of electronic components 120, a second substrate 130, a plurality of first bumps 140, and a plurality of first conductive wires 150. The first substrate 110 has a first surface 111 facing the second substrate 130 and a side surface 112 adjacent to the first surface 111. The side surface 112 may surround the first substrate 110. The first substrate 110 includes a driving circuit (not shown) such as a transistor, a scan line, a data line, etc., but is not limited thereto. The first substrate 110 can be regarded as a driving substrate, electrically connected to the electronic device 120, and driving the electronic device 120 to emit light. In the embodiment, the first substrate 110 may be a rigid substrate, a flexible substrate, or a combination thereof. For example, the material of the first substrate 110 may include glass, quartz, sapphire (sapphire), ceramic, Polycarbonate (PC), Polyimide (PI), polyethylene terephthalate (PET), other suitable substrate materials, or a combination thereof, but is not limited thereto.
The electronic elements 120 are disposed on the first surface 111 and between the first substrate 110 and the second substrate 130. The electronic component 120 may include light emitting diodes of different colors, such as, but not limited to, red light emitting diodes, green light emitting diodes, and/or blue light emitting diodes.
The second substrate 130 is disposed on the first surface 111 of the first substrate 110 and the electronic element 120. The second substrate 130 has a side surface 131, and the side surface 131 may surround the periphery of the second substrate 130. The side surface 131 of the second substrate 130 and the side surface 112 of the first substrate 110 may constitute the side surface 101 of the first electronic panel 100. The second substrate 130 includes, but is not limited to, a color filter layer (such as, but not limited to, a red filter layer, a green filter layer, a blue filter layer, or other suitable color filter layer) (not shown) and/or a wavelength conversion unit (such as, but not limited to, a quantum dot, a phosphor, other suitable material, or a combination thereof) (not shown). The second substrate 130 can be regarded as an optical substrate to convert the light emitted by the electronic element 120 into red light, green light, blue light or other colors of light, but not limited thereto. In this embodiment, the material of the second substrate 130 may be the same as or similar to the material of the first substrate 110, and thus is not described herein again.
The first bumps 140 are disposed on the side surface 101 of the first electronic panel 100 (i.e., the side surface 112 of the first substrate 110 and the side surface 131 of the second substrate 130). The plurality of first bumps 140 may be dispersed on the side surface 101 of the first electronic panel 100. Each of the first bumps 140 may extend from the side surface 112 of the first substrate 110 to the side surface 131 of the second substrate 130. In the present embodiment, since the first bump 140 may protrude from the side surface 101 toward a direction away from the first electronic panel 100, the first bump 140 may be regarded as a protrusion having a height H1. Here, the height H1 is, for example, the maximum height of the first bump 140 measured in the vertical direction of the side surface 101. In the embodiment, the profile of the first bump 140 may be, for example, a semi-circle, but the disclosure does not limit the shape of the profile of the first bump 140. In addition, in the embodiment, since the material of the first bump 140 may include a photoresist mixed with magnetic particles, a glue material, a paste material, or a combination thereof, the first bump 140 may be regarded as a first magnetic bump, i.e., a first magnetic bump disposed on the side surface 101 of the first electronic panel 100.
The first conductive lines 150 are disposed on the side surface 101 of the first electronic panel 100 (i.e., the side surface 112 of the first substrate 110 and the side surface 131 of the second substrate 130). The plurality of first conductive lines 150 may be dispersed on the side surface 101 of the first electronic panel 100. Each of the first conductive lines 150 may extend from the side surface 112 of the first substrate 110 to the side surface 131 of the second substrate 130. In the present embodiment, the first conductive line 150 may be a trace (side wire) formed on the side surface 101 and has a height H2. Here, the height H2 is, for example, the maximum height of the first wire 150 measured in the vertical direction of the side surface 101. In the present embodiment, the plurality of first conductive wires 150 may be electrically connected to the first substrate 110, so that the plurality of first conductive wires 150 may be electrically connected to the plurality of electronic elements 120. In the present embodiment, the material of the first conductive line 150 may include, but is not limited to, silver paste, metal-containing ink, metal-containing photoresist, metal material (including copper, aluminum, molybdenum, gold, titanium, or alloys thereof), other suitable conductive material, or combinations thereof. The plurality of first conductive lines 150 may be formed by printing, spraying, sputtering, evaporating or plating, but not limited thereto.
Then, please continue to refer to fig. 1A and fig. 1B, a second electronic panel 200 is provided. The second electronic panel 200 is substantially the same as or similar to the first electronic panel 100. That is to say, the second electronic panel 200 also includes the first substrate 210, the plurality of electronic components 220, the second substrate 230, the plurality of second bumps 240 and the plurality of second wires 250, and the configuration of the first substrate 210, the plurality of electronic components 220, the second substrate 230, the plurality of second bumps 240 and the plurality of second wires 250 of the second electronic panel 200 may be substantially the same as or similar to the configuration of the first substrate 110, the plurality of electronic components 120, the second substrate 130, the plurality of first bumps 140 and the plurality of first wires 150 of the first electronic panel 100, and therefore, the description thereof is omitted. The second bumps 240 and the second wires 250 are disposed on the side surface 201 of the second electronic panel 200 (i.e., the side surface 212 of the first substrate 210 and the side surface 231 of the second substrate 230). The material of the second bump 240 contains magnetic particles and can be regarded as a second magnetic bump, i.e., a second magnetic bump disposed on the side surface 201 of the second electronic panel 200. The second bump 240 has a height H1. The second wires 250 may be electrically connected to the electronic elements 220. The second wire 250 has a height H2.
Then, referring to fig. 1B, the first electronic panel 100 and the second electronic panel 200 are coupled or spliced by the first bumps 140 and the second bumps 240. Specifically, in the present embodiment, since the first bump 140 (i.e., the first magnetic bump) and the second bump 240 (i.e., the second magnetic bump) both include magnetic materials, the first bump 140 (i.e., the first magnetic bump) can be aligned with the corresponding second bump 240 (i.e., the second magnetic bump), and the first bump 140 (i.e., the first magnetic bump) and the corresponding second bump 240 (i.e., the second magnetic bump) can magnetically couple the first electronic panel 100 and the second electronic panel 200, so as to achieve the effect of self-alignment (self-alignment), self-connection (self-connection) or easier splicing. In addition, since the height H1 of the first bump 140 (i.e., the first magnetic bump) and the second bump 240 (i.e., the second magnetic bump) can be greater than the height H2 of the first conductive line 150 and the second conductive line 250, when the first electronic panel 100 is spliced or coupled with the second electronic panel 200, the first bump 140 (i.e., the first magnetic bump) can be aligned with and first contacts the corresponding second bump 240 (i.e., the second magnetic bump) by a magnetic method, so as to ensure that the first conductive line 150 can also be aligned with the corresponding second conductive line 250, and ensure that the first conductive line 150 can be electrically connected to the corresponding second conductive line 250 in a subsequent step.
Next, with reference to fig. 1B, after the first electronic panel 100 and the second electronic panel 200 are coupled, the conductive liquid 300 is filled in the joint between the side surface 101 of the first electronic panel 100 and the side surface 201 of the second electronic panel 200. The conductive liquid 300 includes surface-modified conductive particles 310. The surface-modified conductive particles 310 may be sensitive to an electric field, and may be polarized and arranged in the electric field under the action of the electric field. In some embodiments, the conductive particles 310 that are polarized under the action of the electric field and can be self-assembled and arranged may also be first fabricated into a film material, and attached to the side surface 101 of the first electronic panel 100 or the side surface 201 of the second electronic panel 200 in an attaching manner, and then, after the electric field is applied to the electrodes (such as the first conductive wires 150 or the second conductive wires 250) on the side surface 101 or the side surface 201, the conductive particles 310 can still be self-arranged and conducted along the direction of the electric field, so as to form the conductive element.
Finally, referring to fig. 1C, a plurality of conductive elements 320 are formed, such that the plurality of first conductive lines 150 and the plurality of second conductive lines 250 can be electrically connected through the plurality of conductive elements 320 after the first electronic panel 100 and the second electronic panel 200 are coupled. Specifically, the method of forming the plurality of conductive elements 320 may, for example, include the steps of: the conductive element 320 is formed by filling the conductive liquid 300 between the side surface 101 of the first electronic panel 100 and the side surface 201 of the second electronic panel 200, applying voltages to the plurality of first wires 150 and the plurality of second wires 250 through the first substrate 110 and the first substrate 210, respectively, so that the conductive particles 310 in the conductive liquid 300 can be gathered between the plurality of first wires 150 and the plurality of second wires 250, and then curing and self-assembling (self-assembly) the conductive particles 310 gathered between the plurality of first wires 150 and the plurality of second wires 250 after removing the liquid in the conductive liquid 300 by baking, pumping, depressurizing or other processes. Thus, the electronic device 10 of the present embodiment is completed.
In short, in the present embodiment, the electronic device 10 may include a first electronic panel 100 and a second electronic panel 200. The first electronic panel 100 includes a plurality of first bumps 140 (i.e., first magnetic bumps) and a plurality of first conductive wires 150, wherein the plurality of first bumps 140 (i.e., first magnetic bumps) and the plurality of first conductive wires 150 are disposed on the side surface 101 of the first electronic panel 100. The second electronic panel 200 includes a plurality of second bumps 240 (i.e., second magnetic bumps) and a plurality of second conductive lines 250, wherein the plurality of second bumps 240 (i.e., second magnetic bumps) and the plurality of second conductive lines 250 are disposed on the second electronic panel 200 adjacent to the side surface 201 of the first electronic panel 100. The first bumps 140 (i.e., the first magnetic bumps) are respectively attracted to the corresponding second bumps 240 (i.e., the second magnetic bumps), and the first wires 150 are respectively electrically connected to the second wires 250.
Although the first electronic panel 100 (the second electronic panel 200) of the present embodiment may include the second substrate 130 (or the second substrate 230) as an optical substrate, the disclosure is not limited thereto. That is, in some embodiments, the second substrate may be disposed as needed without being additionally disposed.
Although the conductive elements 320 are formed after the first electronic panel 100 and the second electronic panel 200 are coupled in the method for manufacturing the tiled electronic device 10 of the present embodiment, the present disclosure does not limit the sequence of the above steps. That is, in some embodiments, a plurality of conductive elements may be formed first, and then the first electronic panel and the second electronic panel are coupled, as shown in fig. 2A to fig. 2C.
In the method for manufacturing the electronic device 10 of the present embodiment, although the first bump 140 of the first electronic panel 100 and the second bump 240 of the second electronic panel 200 are coupled or spliced by magnetic force, the coupling or splicing manner between the electronic panels is not limited in the present disclosure. That is, in some embodiments, the first electronic panel and the second electronic panel may be coupled or joined in other manners, for example, the engaging surface of the first bump and the engaging surface of the second bump are complementary in shape to couple or join the first electronic panel and the second electronic panel, as shown in fig. 3 and 4.
Other examples will be listed below for illustration. It should be noted that the following embodiments follow the reference numerals and parts of the contents of the foregoing embodiments, wherein the same reference numerals are used to indicate the same or similar elements, and the description of the same technical contents is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.
Fig. 2A to 2C are schematic perspective or top views illustrating a method for manufacturing a tiled electronic device according to another embodiment of the disclosure. The embodiment shown in fig. 2A to 2C is similar to the embodiment shown in fig. 1A to 1C, and therefore, the same elements are denoted by the same reference numerals, and the details thereof will not be repeated. The difference between the embodiment shown in fig. 2A to 2C and the embodiment shown in fig. 1A to 1C is that in the method for manufacturing the tiled electronic device 10a of the present embodiment, the step of forming the plurality of conductive elements (i.e., the plurality of first conductive elements 320a and the plurality of second conductive elements 320b) is before the step of coupling the first electronic panel 100 and the second electronic panel 200.
Specifically, referring to fig. 2A, in the present embodiment, a plurality of patterned first conductive elements 320a (or a plurality of patterned second conductive elements 320b) are formed on the thin film carrier 350, so that the pattern (pattern) of the plurality of first conductive elements 320a (or the plurality of patterned second conductive elements 320b) may be the same as the pattern of the plurality of first conductive lines 150 (or the plurality of patterned second conductive lines 250). The plurality of first conductive elements 320a (or the plurality of second conductive elements 320b) have a height H3. The height H3 is, for example, the maximum height of the first conductive elements 320a (or the second conductive elements 320b) measured along the vertical direction of the film carrier 350. in the embodiment, the material of the first conductive elements 320a and the second conductive elements 320b may include a photoresist mixed with metal particles or metal fragments, wherein the material of the metal particles or metal fragments may be, for example, silver, copper, gold, titanium, palladium, platinum, other suitable metal materials or alloys thereof.
Then, referring to fig. 2B, the plurality of first conductive elements 320a (or the plurality of second conductive elements 320B) on the film carrier 350 are aligned with and attached to the plurality of first conductive lines 150 (or the plurality of second conductive lines 250) of the first electronic panel 100 (or the second electronic panel 200). Next, after the first conductive element 320a (or the second conductive element 320b) is fixed on the first conductive line 150 (or the second conductive line 250) by, for example, heating, the film carrier 350 is removed. At this time, a plurality of first conductive elements 320a are formed on the plurality of first conductive lines 150, and a plurality of second conductive elements 320b are formed on the plurality of second conductive lines 250.
Then, referring to fig. 2C, the first electronic panel 100 and the second electronic panel 200 are coupled or spliced by the first bumps 140 and the second bumps 240. In the embodiment, since the height H3 of the first conductive element 320a and the second conductive element 320b may be greater than or equal to the height H1 of the first bump 140 and the second bump 240, when the first electronic panel 100 and the second electronic panel 200 are spliced and the first bump 140 is aligned with the corresponding second bump 240, it is ensured that the first conductive element 320a is also aligned with and contacts the corresponding second conductive element 320b, so that the first conductive wire 150 and the second conductive wire 250 can be electrically connected through the first conductive element 320a and the second conductive element 320b after splicing. In some embodiments, the first conductive element 320a and the second conductive element 320b may have compressibility, and thus, when the height H3 of the first conductive element 320a and the second conductive element 320b is greater than the height H1 of the first bump 140 and the second bump 240, the first bump 140 and the second bump 240 may be attracted to each other by pressurizing the first conductive element 320a and the second conductive element 320 b. Thus, the spliced electronic device 10a of the present embodiment is completed.
Fig. 3 is a schematic top view of a tiled electronic device according to another embodiment of the disclosure. Fig. 4 is a schematic top view of a tiled electronic device according to another embodiment of the disclosure. Referring to fig. 1C and fig. 3, or fig. 2C and fig. 4, the electronic device 10b of fig. 3 is substantially similar to the electronic device 10 of fig. 1C, and the electronic device 10C of fig. 4 is substantially similar to the electronic device 10a of fig. 2C, so that the same and similar components in the two embodiments are not repeated here. The tiled electronic device 10b of fig. 3 differs from the tiled electronic device 10a and the tiled electronic device 10c of fig. 4 differs from the tiled electronic device 10a primarily in that in the tiled electronic device 10b of fig. 3 and the tiled electronic device 10c of fig. 4, the first plurality of bumps 140b and the second plurality of bumps 240b couple the first electronic panel 100 and the second electronic panel 200 through complementary bonding surfaces.
Specifically, referring to fig. 3 and 4, the first bump 140b and the second bump 240b may be a first magnetic bump and a second magnetic bump containing magnetic particles, respectively. The first protrusion 140b (i.e., the first magnetic protrusion) and the second protrusion 240b (i.e., the second magnetic protrusion) may have three-dimensional engaging surfaces, respectively. The three-dimensional engaging surface can be a concave surface or a convex surface, but not limited thereto, as long as the three-dimensional engaging surface of the first protrusion 140b (i.e. the first magnetic protrusion) can be complementary to the three-dimensional engaging surface of the second protrusion 240b (i.e. the second magnetic protrusion). In the present embodiment, at the joint between the first electronic panel 100 and the second electronic panel 200, the first bumps 140b (i.e., the first magnetic bumps) and the corresponding second bumps 240b (i.e., the second magnetic bumps) should have complementary joint surfaces, respectively, and the first bumps 140b (i.e., the first magnetic bumps) and the corresponding second bumps 240b (i.e., the second magnetic bumps) should be arranged alternately with each other. Therefore, at the joint between the first electronic panel 100 and the second electronic panel 200, when the joint surface of the first bump 140b (i.e., the first magnetic bump) is a concave surface, the joint surface of the second bump 240b (i.e., the second magnetic bump) is a convex surface complementary to the concave surface, so as to ensure that the first bump 140 (i.e., the first magnetic bump) can be aligned with the second bump 240 (i.e., the second magnetic bump), thereby achieving the effects of self-alignment, self-connection, or easier joint.
In the present embodiment, the first bump 140b and the second bump 240b may be a first magnetic bump and a second magnetic bump containing magnetic particles, respectively, but not limited thereto. That is, in some embodiments, the first bump and the second bump may not have magnetism, as long as the joint surface of the first bump and the joint surface of the second bump are complementary.
In some embodiments, at the splice between the first electronic panel and the second electronic panel, the first bumps (i.e., the first magnetic bumps) may include first bumps having concave surfaces and first bumps having convex surfaces (not shown), and the second bumps (i.e., the second magnetic bumps) may include second bumps having concave surfaces and second bumps having convex surfaces (not shown). The first bumps having the concave surfaces and the first bumps having the convex surfaces may be alternately arranged with each other in an extending direction of side surfaces of the first electronic panel (i.e., the side surfaces of the first substrate and the side surfaces of the second substrate), and the second bumps having the concave surfaces and the second bumps having the convex surfaces may be alternately arranged with each other in an extending direction of side surfaces of the second electronic panel (i.e., the side surfaces of the first substrate and the side surfaces of the second substrate). The first bump with the concave surface can be aligned and complemented with the second bump with the convex surface, and the first bump with the convex surface can be aligned and complemented with the second bump with the concave surface, so that the effects of self-alignment, self-connection or easier splicing are achieved.
Fig. 5A to 5B are schematic perspective or top views illustrating a manufacturing method of a tiled electronic device according to another embodiment of the disclosure. The embodiment shown in fig. 5A to 5B is similar to the embodiment shown in fig. 2A to 2C, and therefore, the same elements are denoted by the same reference numerals, and the details thereof will not be repeated. The difference between the embodiment shown in fig. 5A to 5B and the embodiment shown in fig. 2A to 2C is that in the manufacturing method of the electronic device 10d of the present embodiment, the first magnetic bump 140d and the first conductive element 330 are combined into the first composite element 160, and the second magnetic bump 240d and the second conductive element 340 are combined into the second composite element 260.
Specifically, referring to fig. 5A, in the present embodiment, a plurality of first composite elements 160 or a plurality of second composite elements 260 are formed on a film carrier 350. The first composite elements 160 are formed by embedding the first magnetic bumps 140d in the first conductive elements 330, respectively, such that the first conductive elements 330 can surround the first magnetic bumps 140 d. The second composite element 260 is formed by embedding a plurality of second magnetic bumps 240d into a plurality of second conductive elements 340, respectively, such that the second conductive elements 340 can surround the second magnetic bumps 240 d.
Next, the plurality of first composite components 160 on the film carrier 350 are aligned and attached to the plurality of first wires 150 on the side surface 101 of the first electronic panel 100d, and the plurality of second composite components 260 on the film carrier 350 are aligned and attached to the plurality of second wires 250 on the side surface 201 of the second electronic panel 200 d. Then, after the first composite component 160 is fixed on the side surface 101 of the first electronic panel 100d and the second composite component 260 is fixed on the side surface 201 of the second electronic panel 200d, the film carrier 350 is removed.
Then, referring to fig. 5B, the first electronic panel 100d and the second electronic panel 200d are coupled or spliced by the first composite elements 160 and the second composite elements 260. In the embodiment, since the first composite element 160 has the first magnetic bump 140d and the second composite element 260 has the second magnetic bump 240d, the first composite element 160 can be aligned with the second composite element 260, and the first composite element 160 and the second composite element 260 can couple the first electronic panel 100d and the second electronic panel 200d through magnetic force, so as to achieve the effect of self-alignment, self-connection, or easier splicing.
In addition, since the first composite element 160 has the first conductive element 330 covering the first magnetic bump 140d, and the second composite element 260 has the second conductive element 340 covering the second magnetic bump 240d, when the first electronic panel 100d and the second electronic panel 200d are spliced and the first composite element 160 is aligned with the corresponding second composite element 260, it can be ensured that the first conductive element 330 is also aligned with and contacts the corresponding second conductive element 340, so that the first electronic panel 100d and the second electronic panel 200d can be electrically connected with each other through the first conductive element 330 and the second conductive element 340 after being spliced. Thus, the spliced electronic device 10d of the present embodiment has been manufactured.
Fig. 6 is a perspective view of a first composite element and a second composite element according to another embodiment of the disclosure. Referring to fig. 5A and fig. 6, the first composite element 160e and the second composite element 260e of the present embodiment are similar to the first composite element 160 and the second composite element 260 of fig. 5A, but the main differences are: the first magnetic bump 140e of the first composite element 160e is disposed side by side with the first conductive element 330e, and the second magnetic bump 240e of the second composite element 260e is disposed side by side with the second conductive element 340 e.
Specifically, referring to fig. 6, in the present embodiment, the first composite element 160e is formed by combining the first magnetic bump 140e and the first conductive element 330e, and the second composite element 260e is formed by combining the second magnetic bump 240e and the second conductive element 340 e. One of the first magnetic bumps 140e and one of the first conductive elements 330e of the first magnetic bumps 330e are in contact with each other, and one of the second magnetic bumps 240e and one of the second conductive elements 340e of the second magnetic bumps 240e are in contact with each other.
In summary, in the electronic panel, the electronic device and the method for manufacturing the same according to the embodiments of the disclosure, since the first bump of the first electronic panel and the second bump of the second electronic panel can be aligned by magnetic force or complementary bonding surfaces, the first electronic panel and the second electronic panel can be coupled or spliced, and thus the electronic panel, the electronic device and the method can have self-alignment, self-connection or easier splicing effects. In addition, in some embodiments, since the heights of the first bump and the second bump may be greater than the heights of the first conductive line and the second conductive line, when the first electronic panel is spliced or coupled with the second electronic panel, the first bump may be aligned and first contacted to the corresponding second bump through a magnetic force or a complementary joint surface, so as to ensure that the first conductive line may also be aligned with the corresponding second conductive line, and ensure that the first conductive line may be electrically connected to the corresponding second conductive line in a subsequent step. In addition, in some embodiments, since the heights of the first conductive element and the second conductive element may be greater than or equal to the heights of the first bump and the second bump, when the first electronic panel is spliced with the second electronic panel and the first bump is aligned with the corresponding second bump, it can be ensured that the first conductive element is also aligned with and contacts the corresponding second conductive element, so that the first conductive wire and the second conductive wire can be electrically connected through the first conductive element and the second conductive element after being spliced.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present disclosure, and not for limiting the same; while the present disclosure has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present disclosure.
Claims (18)
1. A method for manufacturing a tiled electronic device, comprising:
providing a first electronic panel, wherein the first electronic panel comprises a plurality of first bumps and a plurality of first wires, and the plurality of first bumps and the plurality of first wires are arranged on the side surface of the first electronic panel;
providing a second electronic panel, wherein the second electronic panel comprises a plurality of second bumps and a plurality of second wires, and the plurality of second bumps and the plurality of second wires are arranged on the side surface of the second electronic panel;
coupling the first electronic panel with the second electronic panel through the plurality of first bumps and the plurality of second bumps; and
forming a plurality of conductive elements so that the plurality of first wires and the plurality of second wires are electrically connected through the plurality of conductive elements after the first electronic panel is coupled with the second electronic panel.
2. The method of manufacturing of claim 1, wherein the step of forming the plurality of conductive elements is after the step of coupling the first electronic panel with the second electronic panel.
3. The method of manufacturing of claim 2, wherein the step of forming the plurality of conductive elements comprises:
filling a conductive liquid between the side surface of the first electronic panel and the side surface of the second electronic panel; and
and applying voltage to the plurality of first wires and the plurality of second wires to enable the conductive particles in the conductive liquid to gather between the plurality of first wires and the plurality of second wires.
4. The method of manufacturing of claim 1, wherein the step of forming the plurality of conductive elements is prior to the step of coupling the first electronic panel with the second electronic panel.
5. The method of claim 4, wherein the step of forming a plurality of conductive elements comprises:
forming a plurality of first conductive elements on the plurality of first conductive lines, respectively; and
forming a plurality of second conductive elements on the plurality of second conductive lines, respectively.
6. The method of claim 1, wherein the first bumps and the second bumps are configured to magnetically couple the first electronic panel and the second electronic panel.
7. The method of claim 6, wherein the first bumps and the second bumps couple the first electronic panel and the second electronic panel through complementary bonding surfaces.
8. An electronic panel, comprising:
a substrate having a first surface and a side surface adjacent to the first surface;
a plurality of electronic components disposed on the first surface;
a plurality of magnetic bumps disposed on the side surface;
and the leads are arranged on the side surface and are electrically connected to the electronic elements.
9. The electronic panel of claim 8, wherein each of the plurality of magnetic bumps has a three-dimensional engaging surface.
10. The electronic panel of claim 8, wherein the magnetic bumps comprise a plurality of first bumps having concave surfaces and a plurality of first bumps having convex surfaces, and the plurality of first bumps having concave surfaces and the plurality of first bumps having convex surfaces are alternately arranged in an extending direction of the side surface.
11. The electronic panel of claim 8, further comprising a plurality of conductive elements disposed on the plurality of conductive lines.
12. The electronic panel of claim 11, wherein the plurality of magnetic bumps are embedded in the plurality of conductive elements, respectively.
13. The electronic panel of claim 11, wherein one of the plurality of magnetic bumps and one of the plurality of conductive elements contact each other.
14. A tiled electronic device, comprising:
a first electronic panel including a plurality of first magnetic bumps and a plurality of first conductive lines, wherein the plurality of first magnetic bumps and the plurality of first conductive lines are disposed on a side surface of the first electronic panel;
a second electronic panel including a plurality of second magnetic bumps and a plurality of second conductive lines, wherein the plurality of second magnetic bumps and the plurality of second conductive lines are disposed on a side surface of the second electronic panel adjacent to the first electronic panel; and
a plurality of conductive elements disposed between the first electronic panel and the second electronic panel;
the plurality of first magnetic bumps are respectively attracted with the plurality of second magnetic bumps corresponding to the plurality of first magnetic bumps, and the plurality of first wires are respectively electrically connected with the plurality of second wires through the plurality of conductive elements.
15. The tiled electronic device of claim 14, wherein the first plurality of magnetic bumps and the corresponding second plurality of magnetic bumps each have a complementary engagement surface.
16. The splicing electronic device of claim 14, wherein the plurality of conductive elements comprises a plurality of first conductive elements disposed on the plurality of first conductive lines.
17. The tiled electronic device of claim 16, wherein the first plurality of magnetic bumps are embedded within the first plurality of conductive elements, respectively.
18. The tiled electronic device of claim 16, wherein one of the plurality of first magnetic bumps and one of the plurality of first conductive elements are in contact with each other.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US17/542,506 US20220206546A1 (en) | 2020-12-30 | 2021-12-06 | Electronic panel, tiling electronic device, and manufacturing method thereof |
| US18/522,044 US20240094787A1 (en) | 2020-12-30 | 2023-11-28 | Tiling electronic device and manufacturing method thereof |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US202063131803P | 2020-12-30 | 2020-12-30 | |
| US63/131,803 | 2020-12-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114695137A true CN114695137A (en) | 2022-07-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110944632.3A Pending CN114695137A (en) | 2020-12-30 | 2021-08-17 | Electronic panel, spliced electronic device and manufacturing method thereof |
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| Country | Link |
|---|---|
| CN (1) | CN114695137A (en) |
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2021
- 2021-08-17 CN CN202110944632.3A patent/CN114695137A/en active Pending
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