CN114566461A - Semiconductor device deep back hole manufacturing method and device based on front and back side through holes - Google Patents
Semiconductor device deep back hole manufacturing method and device based on front and back side through holes Download PDFInfo
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- CN114566461A CN114566461A CN202210198731.6A CN202210198731A CN114566461A CN 114566461 A CN114566461 A CN 114566461A CN 202210198731 A CN202210198731 A CN 202210198731A CN 114566461 A CN114566461 A CN 114566461A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 69
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 45
- 238000005530 etching Methods 0.000 claims abstract description 75
- 238000000034 method Methods 0.000 claims abstract description 70
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 229910052751 metal Inorganic materials 0.000 claims abstract description 31
- 239000002184 metal Substances 0.000 claims abstract description 31
- 239000010410 layer Substances 0.000 claims abstract description 30
- 239000011241 protective layer Substances 0.000 claims abstract description 16
- 239000011248 coating agent Substances 0.000 claims abstract description 14
- 238000000576 coating method Methods 0.000 claims abstract description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 14
- 238000001259 photo etching Methods 0.000 claims description 9
- 239000000853 adhesive Substances 0.000 claims description 7
- 230000001070 adhesive effect Effects 0.000 claims description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 238000000227 grinding Methods 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 238000009713 electroplating Methods 0.000 abstract description 9
- 238000001020 plasma etching Methods 0.000 abstract description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 37
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 37
- 238000010586 diagram Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 239000012495 reaction gas Substances 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
Abstract
The invention discloses a method and a device for manufacturing a deep back hole of a semiconductor device based on front and back through holes, belonging to the technical field of semiconductor manufacturing, and comprising the steps of etching a first back hole on a substrate for completing a front device, and preparing a first metal layer in the first back hole; coating a protective layer on the front side of the substrate, and thinning the back side of the substrate; and etching the back surface of the substrate to form a second back hole until the first back hole is exposed, so that the deep back hole is manufactured. According to the invention, the first back hole and the second back hole are respectively etched on the front surface and the back surface of the device so as to realize the manufacture of the deep back hole, so that the etching yield and efficiency are ensured, and the difficulty in manufacturing the deep back hole is greatly reduced; meanwhile, a first metal layer and a second metal layer are respectively manufactured in the first back hole and the second back hole, so that the connection difficulty of the deep back hole electroplating circuit is reduced; on the basis of the through holes on the front side and the back side, the morphology of the photoresist and the plasma etching conditions are controlled, and the problem of side etching of the substrate is effectively solved.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a method and a device for manufacturing a deep back hole of a semiconductor device based on front and back through holes.
Background
The gallium arsenide-based semiconductor device is widely applied to the fields of communication, radar, space technology and the like by virtue of excellent performances such as high power, low noise and the like. The appearance and depth of the back hole directly affect the quality and radio frequency characteristics of the chip, so that the preparation of the back hole is one of the key processes for manufacturing the GaAs MMIC, and the back hole is used for providing direct and effective grounding for active and passive devices on the surface. The field effect tube source end through hole is grounded, so that heat can be better dissipated, the grounding performance of the source end can be improved, and parasitic inductance caused by grounding metal through the back hole is very small. With the continuous progress and development of gallium arsenide devices, the through hole grounding mode penetrating through the front and back surfaces of the devices is widely concerned, the technology effectively reduces grounding inductance, greatly improves the heat dissipation capacity of the devices and circuits, improves the integration density of the circuits, and has wide application prospect.
In the manufacturing process of a deep back hole (larger than 100 μm) of a semiconductor device, on one hand, the requirements on the thickness and the appearance of photoetching and the electroplating capacity are high, on the other hand, etching is also a particularly critical process, and especially how to control the edge of the hole and the over-etching of GaAs in the hole is a process difficulty, so that edge collapse and side etching cause adverse effects on the performance and the reliability of the device, how to effectively improve the yield and the efficiency of deep hole etching, reduce side etching, and reduce the manufacturing difficulty in the deep hole process is a technical problem which needs to be solved urgently at present.
Disclosure of Invention
The invention aims to solve the problems of low yield and efficiency of deep back hole etching of a semiconductor device and high working and manufacturing difficulty in the prior art, and provides a method and a device for manufacturing a deep back hole of a semiconductor device based on front and back through holes.
The purpose of the invention is realized by the following technical scheme: the method for manufacturing the deep back hole of the semiconductor device based on the through holes on the front side and the back side comprises the following steps:
etching the front surface of the semiconductor device to form a first back hole;
coating a protective layer on the front surface of the semiconductor device;
bonding a temporary substrate on the front surface of the semiconductor device, and thinning the semiconductor device substrate;
and etching the back surface of the semiconductor device until the first back hole is exposed to form a second back hole, so that the deep back hole is manufactured.
In an example, the method further comprises:
after the first back hole is formed, preparing a first metal layer in the first back hole;
and etching the back surface of the semiconductor device until the first metal layer is exposed to form a second back hole.
In one example, the forming of the second back hole further comprises:
and manufacturing a back gold process on the back surface of the semiconductor device.
In one example, the etching on the front surface of the semiconductor device to form the first back hole specifically includes:
photoetching the front side of the semiconductor device to form a first back hole pattern;
and etching the front surface of the semiconductor device based on the first back hole pattern to form a first back hole.
In one example, the depth of the first back hole is 80-150 μm.
In one example, before the etching on the front surface of the semiconductor device to form the first back hole, the method further includes:
manufacturing a front surface process of a semiconductor device;
and coating photoresist on the front surface of the semiconductor device which is subjected to the front surface process.
In one example, the thinning process of the semiconductor device substrate specifically includes:
coating adhesive on the protective layer, and bonding with the temporary substrate under the action of high temperature;
and thinning the semiconductor device substrate by adopting a mechanical grinding method and/or a chemical polishing method.
In one example, the etching on the back surface of the semiconductor device until the first back hole is exposed, and the forming the second back hole specifically includes:
photoetching the back of the thinned semiconductor device to form a second back hole pattern;
and etching the back surface of the semiconductor device based on the second back hole pattern until the first back hole is exposed to form a second back hole.
In one example, the depth of the second back hole is 30-120 μm.
It should be further noted that, the technical features corresponding to the above-mentioned deep back hole preparation examples of each semiconductor device may be combined with each other or replaced to form a new technical solution.
The invention further comprises a semiconductor device, wherein the semiconductor device is formed by adopting the method for manufacturing the deep back hole of the semiconductor device based on the front and back through holes in any one or more examples.
Compared with the prior art, the invention has the beneficial effects that:
1. in one example, the first back hole and the second back hole are respectively etched on the front surface and the back surface of the device, so that the deep back hole is manufactured, the etching yield and efficiency are ensured, and the manufacturing difficulty of the deep back hole is greatly reduced; meanwhile, the first metal layer and the second metal layer are respectively manufactured in the first back hole and the second back hole, so that the circuit connection difficulty of the deep back hole is reduced.
2. In one example, the manufacturing of the 240-micron deep back hole is realized by etching the first back hole and the second back hole which are both 120 microns, and the plasma etching conditions are strictly controlled in the manufacturing of the first back hole and the second back hole, so that the problem of side etching is effectively solved, and the good device performance is ensured.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention.
FIG. 1 is a diagram illustrating the etching result of a photoresist in the prior art;
FIG. 2 is a diagram illustrating an etching result at an etching pressure of 2.26Pa according to an example of the present invention;
FIG. 3 is a diagram illustrating an etching result when the etching pressure is 2.93Pa in an example of the present invention;
FIG. 4 is a diagram illustrating the etching result when the etching bias power is 350W in one example of the present invention;
FIG. 5 is a graph illustrating the etching result when the etching bias power is 400W in one example of the present invention;
FIG. 6 is a flow chart of a method in an example of the invention;
fig. 7 is a schematic diagram of a resulting front side device in an example of the invention;
FIG. 8 is a schematic illustration of forming a first back hole in an example of the invention;
FIG. 9 is a schematic diagram of forming a first metal layer in an example of the invention;
FIG. 10 is a schematic diagram of forming a protective layer in an example of the invention;
FIG. 11 is a schematic view of a substrate bonded to a temporary substrate via an adhesive in accordance with an example of the present invention;
FIG. 12 is a graph illustrating the thinning results in one example of the invention;
FIG. 13 is a schematic view of obtaining a deep back hole in an example of the present invention;
FIG. 14 is a schematic diagram of a second metal layer obtained in an example of the present invention;
FIG. 15 is a graph of the results of a preferred exemplary etch of the present invention.
In the figure: gallium arsenide substrate 1, front device 2, photoresist 3, first back hole pattern 41, second back hole pattern 42, first back hole 51, second back hole 52, first metal layer 61, second metal layer 62, protective layer 7, adhesive 8, and temporary substrate 9.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that directions or positional relationships indicated by "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like are directions or positional relationships described based on the drawings, and are only for convenience of description and simplification of description, and do not indicate or imply that the device or element referred to must have a specific orientation, be configured and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly stated or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
In the prior art, when deep hole etching is performed on a semiconductor device, the adopted process conditions are as follows: the photoresist is PR2, and the etching result is shown in FIG. 1, wherein the etched topography is irregular and the depth can not meet the requirement. On the basis of the original etching process, the etching conditions under different pressures are analyzed, as shown in fig. 2-3. Wherein the pressure of fig. 2 and 3 is 2.26Pa and 2.93Pa, respectively, and the bias power is 350W. The comparison result shows that under the condition of keeping other conditions unchanged, the etching of the side wall is more and more serious along with the increase of the pressure intensity; the protection of the side wall is damaged, and the reaction gas is mainly used for side etching, so that the side etching is aggravated directly, and further longitudinal etching cannot be continued. The reason for this is presumed to be that as the pressure increases, the density of molecules increases, the probability of collision between molecules increases, and the sidewall etching becomes severe. In order to increase the directionality of the plasma and reduce the lateral etching, the etching conditions of different bias powers are analyzed while the pressure is reduced, and as a result, as shown in fig. 4-5, the bias power of fig. 4 is 350W, the bias power of fig. 5 is 400W, and the etching conditions corresponding to fig. 4 and 5 are both 1.5 Pa. With the increase of the bias power, the directionality of the plasma is enhanced, the kinetic energy is increased, and the reactive etching gas quantity at the bottom is increased along with the deepening of the etching depth. Therefore, although the lateral etching exists, the etching can still reach the bottom, as shown in FIG. 5. However, as can be seen from fig. 4-5, as the bias power increases, the etching of the sidewall of the deep hole still exists and cannot be completely eliminated. Because the reaction gas and the reaction product at the bottom reach a balance, the collision probability between the product and the reactant increases with the increase of the etching depth, especially when the etching is close to the bottom, and the etching of the side wall is easily caused. In order to solve the problem of side etching, the invention adopts a front-back double-sided etching method to solve the problems that the thickness and the appearance cannot be met by a single photoresist, and the side etching is caused by long-time etching and the like.
In an example, the method for manufacturing a deep back hole of a semiconductor device based on front and back through holes is applicable to the deep back hole of all semiconductor devices, and a specific embodiment of the present invention is partially described by specifically using a method for manufacturing a deep back hole of a gallium arsenide-based device, as shown in fig. 6, and specifically includes the following steps:
s1: etching the front surface of the gallium arsenide device to form a first back hole;
s2: coating a protective layer on the front surface of the gallium arsenide device; specifically, a polymer protective layer is coated on the front surface of the wafer with the first back hole on the front surface finished, and is used for protecting the front surface pattern of the device.
S3: bonding a temporary substrate on the front surface of the gallium arsenide device, and thinning the back surface of the gallium arsenide device;
s4: and etching the back surface of the gallium arsenide device until the first back hole is exposed to form a second back hole, so that the deep back hole is manufactured. Wherein, the first back hole and the second back hole form a deep back hole.
In the example, the first back hole and the second back hole are respectively etched on the front side and the back side of the device, so that the deep back hole is manufactured, namely the deep back hole is manufactured in a segmented mode.
In one example, the method further comprises a front side via metallization process, specifically comprising:
a metal process for preparing a first metal layer and a first back hole in the first back hole by adopting an electroplating process; and preparing a metal layer in the first back hole to realize circuit connection, wherein the circuit connection can be completed by adopting an electroplating process. In this example, based on the same technical concept of deep back hole fabrication, the first metal layer and the second metal layer are fabricated in the first back hole and the second back hole, respectively, so that the difficulty of deep back hole circuit connection is reduced.
In one example, forming the second back hole further comprises:
and (4) manufacturing a back gold process on the back surface of the semiconductor device, namely preparing a second metal layer in the second back hole by adopting an electroplating process.
In one example, the etching on the front surface of the gallium arsenide device to form the first back hole specifically includes:
s11: photoetching the front surface of the gallium arsenide device which is subjected to the front surface process to form a first back hole pattern;
s12: and etching the front surface of the gallium arsenide device based on the first back hole pattern to form a first back hole. More specifically, the depth of the first back hole is 80-150 μm, the size of the top of the first back hole is 40-100 μm, and the size of the bottom of the first back hole is 30-90 μm. After the photoresist is removed and the surface and the hole are cleaned after the first through hole is finished, the circuit connection is finished by adopting an electroplating process, and the first metal layer is prepared. To ensure the circuit connection effect, the first metal layer can extend to the surface (front surface) of the GaAs substrate.
Further, the "photoresist" in the photoresist removal after the first through hole is completed is specifically a photoresist, and the coating of the photoresist belongs to a device front surface manufacturing process. In one example, the front side process of the gallium arsenide device further comprises:
s01: and (3) a process for manufacturing the front surface of the gallium arsenide substrate, namely manufacturing a device and a circuit on the front surface of the gallium arsenide substrate to obtain a front surface device. As an option, each graphic layer in the front surface device may be used as an alignment mark for a subsequent back hole etching process, and preferably, the metal graphic layer in the front surface device is used as an alignment mark for a subsequent process.
S02: and coating photoresist on the front surface of the gallium arsenide device subjected to the front surface process to be used as a protective layer so as to protect the gallium arsenide device on the front surface.
In one example, the thinning process performed on the back surface of the gallium arsenide device specifically includes:
s31: coating an adhesive on the protective layer, and bonding the protective layer and the temporary substrate under the action of high temperature; specifically, a layer of relatively thick adhesive is coated on the front surface of the wafer coated with the polymer protective layer, and is bonded with a temporary substrate such as a sapphire substrate under the action of high temperature, and the temporary substrate is used as a support of a subsequent thinning process, so that a gallium arsenide device is prevented from being damaged in the thinning process.
S32: and thinning the substrate of the gallium arsenide device by adopting a mechanical grinding method and a chemical polishing method and processing the surface. Specifically, the thinned thickness is determined according to the depth requirements of deep back holes of different devices, the maximum thickness of the invention can reach 240 mu m, and the invention can realize the manufacture of the deep back holes of 240 mu m on the basis of ensuring the device performance of the gallium arsenide device.
In one example, the etching on the back surface of the gallium arsenide device to form the second back hole specifically includes:
s41: forming a second back hole pattern on the thinned gallium arsenide device substrate by utilizing photoetching; specifically, before the second back hole pattern is formed by photoetching, a certain metal layer based on the front device is used as an alignment mark, so that the second back hole pattern is aligned with the first back hole pattern, and the offset of the side wall of the deep back hole finally formed based on the first back hole and the second back hole is ensured to be less than 2 um.
S42: and etching the gallium arsenide device substrate based on the second back hole pattern to form a second back hole. More specifically, the depth of the second back hole is 30-120 μm, and the specific value depends on the depth of the front first back hole and the final thickness of the gallium arsenide substrate; the hole top size of first back of the body hole is 40 ~ 100um, and hole bottom size is 30 ~ 90 um. After the second through hole is removed, the surface and the hole are cleaned, circuit connection is completed by adopting an electroplating process, and the second metal layer is prepared. To ensure the circuit connection effect, the second metal layer may extend to the surface (back surface) of the gaas substrate.
The preferable examples of the present invention are obtained by combining the above examples, and specifically include the following steps:
s1': manufacturing a device and a circuit on the front surface of the gallium arsenide substrate 1 to obtain a front surface device 2;
s2': coating photoresist 3 on the front surface of the gallium arsenide device subjected to the front surface process, as shown in fig. 7;
s3': photoetching and forming a first back hole pattern 41 on the front surface of the gallium arsenide device subjected to the front surface process, and etching and forming a first back hole 51 on the front surface of the gallium arsenide device based on the first back hole pattern 41, as shown in fig. 8;
s4': preparing a first metal layer 61 by using an electroplating process, as shown in fig. 9;
s5': coating a protective layer 7 on the front surface of the gallium arsenide device, as shown in fig. 10;
s6': coating an adhesive 8 on the protective layer 7, and bonding with the temporary substrate 9 under the action of high temperature, as shown in fig. 11;
s7': and thinning the back of the gallium arsenide device as shown in fig. 12;
s8': forming a second back hole 52 on the back surface of the gallium arsenide substrate 1 by photolithography and etching so that the second back hole 52 is connected to the first back hole 51 to form a deep back hole, as shown in fig. 13;
s9': and (3) adopting an electroplating process to manufacture a back gold process, namely preparing a second metal layer 62, and finishing the manufacture of the gallium arsenide deep hole process device, as shown in fig. 14.
In one example, the first back hole and the second back hole formed by etching are both 120 μm, that is, the etching depth of the front surface and the back surface of the device is 120 μm, and a window without side etching is larger at the depth, so that the stability requirement of the process is met; the final deep back hole formed by the device is 240 μm, and the edge of the through hole (deep back hole) has no etched trace, so as to realize smooth connection of the metal wires (first metal layer, second metal layer). In the process, the etching pressure corresponding to the front side and the back side is 1.5Pa, the bias power is 400W, and the obtained deep back hole simulation result is shown in FIG. 15.
It should be further noted that fig. 1-5 and fig. 15 are schematic diagrams of simulation results, which are used for illustration and do not further limit the scope of the present invention.
The invention also comprises a semiconductor device, wherein the semiconductor device is used for manufacturing the deep back hole by adopting the gallium arsenide device deep back hole preparation method based on the front and back through holes formed by any one or a combination of a plurality of examples.
The above detailed description is for the purpose of describing the invention in detail, and it should not be construed that the detailed description is limited to the description, and it will be apparent to those skilled in the art that various modifications and substitutions can be made without departing from the spirit of the invention.
Claims (10)
1. The method for manufacturing the deep back hole of the semiconductor device based on the through holes on the front side and the back side is characterized by comprising the following steps of: the method comprises the following steps:
etching the front surface of the semiconductor device to form a first back hole;
coating a protective layer on the front surface of the semiconductor device;
bonding a temporary substrate on the front surface of the semiconductor device, and thinning the semiconductor device substrate;
and etching the back surface of the semiconductor device until the first back hole is exposed to form a second back hole, so that the deep back hole is manufactured.
2. The method for manufacturing the deep back hole of the semiconductor device based on the front and back through holes as claimed in claim 1, wherein: the method further comprises the following steps:
after the first back hole is formed, preparing a first metal layer in the first back hole;
and etching the back surface of the semiconductor device until the first metal layer is exposed, and forming a second back hole.
3. The method for manufacturing the deep back hole of the semiconductor device based on the front and back through holes as claimed in claim 1, wherein: after the second back hole is formed, the method further comprises the following steps:
and manufacturing a back gold process on the back surface of the semiconductor device.
4. The method for manufacturing the deep back hole of the semiconductor device based on the front and back through holes as claimed in claim 1, wherein: the step of etching the front surface of the semiconductor device to form the first back hole specifically comprises the following steps:
photoetching the front side of the semiconductor device to form a first back hole pattern;
and etching the front surface of the semiconductor device based on the first back hole pattern to form a first back hole.
5. The method for manufacturing the deep back hole of the semiconductor device based on the front and back through holes as claimed in claim 1, wherein: the depth of the first back hole is 80-150 mu m.
6. The method for manufacturing the deep back hole of the semiconductor device based on the front and back through holes as claimed in claim 1, wherein: the method comprises the following steps before etching the front surface of the semiconductor device to form the first back hole:
manufacturing a front surface process of a semiconductor device;
and coating photoresist on the front surface of the semiconductor device which is subjected to the front surface process.
7. The method for manufacturing the deep back hole of the semiconductor device based on the front and back through holes as claimed in claim 1, wherein: the thinning treatment of the semiconductor device substrate specifically comprises the following steps:
coating an adhesive on the protective layer, and bonding the protective layer and the temporary substrate under the action of high temperature;
and thinning the semiconductor device substrate by adopting a mechanical grinding method and/or a chemical polishing method.
8. The method for manufacturing the deep back hole of the semiconductor device based on the front and back through holes as claimed in claim 1, wherein: etching the back surface of the semiconductor device until the first back hole is exposed, and forming the second back hole specifically comprises:
photoetching the back of the thinned semiconductor device to form a second back hole pattern;
and etching the back surface of the semiconductor device based on the second back hole pattern until the first back hole is exposed to form a second back hole.
9. The method for manufacturing the deep back hole of the semiconductor device based on the front and back through holes as claimed in claim 1, wherein the method comprises the steps of: the depth of the second back hole is 30-120 mu m.
10. A semiconductor device, characterized in that: the semiconductor device is manufactured into the deep back hole by adopting the method for manufacturing the semiconductor device deep back hole based on the front and back side through holes according to any one of claims 1 to 9.
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