CN114556107A - Sample analysis system and sample scheduling method thereof - Google Patents
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Abstract
A sample scheduling method of a sample analysis system, the sample analysis system comprising at least two cascaded sample analyzers, the scheduling method comprising: acquiring identification information of a sample to be detected; determining a test item of the sample to be tested according to the identification information of the sample to be tested; according to the test items, finding out selectable sample analyzers which can execute the test items in the sample analysis system; determining the waiting time required for the sample to be tested to enter the optional sample analyzer for testing according to the state information of the optional sample analyzer; and determining the scheduling plan of the sample to be tested according to the waiting time, thereby improving the scheduling efficiency.
Description
The invention relates to the field of medical instruments, in particular to a sample analysis system and a sample scheduling method thereof.
In the current sample analysis system, a biochemical analyzer system and an immunoassay analyzer system are responsible for testing a sample (specimen) to be tested on a sample rack, and when the sample rack is scheduled, as long as the biochemical analyzer system/the immunoassay analyzer has the capability of processing the sample to be tested, the sample rack is planned and scheduled to a front-end track of a corresponding analyzer.
The current technology has the following main disadvantages:
for a common type of test, i.e., a plurality of analyzers capable of processing the sample to be tested, the sample rack may be dispatched to the front end of the analyzer that does not satisfy the start-up test condition. The sample rack may be dispatched to an analyzer that meets the conditions for initiating the test, but the sample rack is not preferentially dispatched to an analyzer that can immediately initiate the test. In general, existing scheduling is inefficient.
Disclosure of Invention
The invention mainly provides a sample analysis system and a sample scheduling method thereof.
According to a first aspect, there is provided in one embodiment a method of scheduling samples of a sample analysis system comprising at least two cascaded sample analyzers, the scheduling method comprising:
acquiring identification information of a sample to be detected;
determining a test item of the sample to be tested according to the identification information of the sample to be tested;
according to the test items, finding out optional sample analyzers capable of executing the test items in the sample analysis system;
determining the waiting time required for the sample to be tested to enter the optional sample analyzer for testing according to the state information of the optional sample analyzer;
and determining the scheduling plan of the sample to be tested according to the waiting time.
According to a second aspect, an embodiment provides a method of scheduling samples of a sample analysis system, the sample analysis system comprising at least two cascaded sample analyzers, the scheduling method comprising:
acquiring test items of a sample to be tested and state information of an optional sample analyzer; the selectable sample analyzer is a sample analyzer capable of executing the test item in the sample analysis system;
and determining the scheduling plan of the sample to be tested according to the state information of the optional sample analyzer.
According to a third aspect, there is provided in one embodiment a sample analysis system comprising:
the input module is used for receiving a sample to be detected put in by a user and acquiring identification information of the sample to be detected;
the system comprises at least two cascaded sample analyzers, a sample analyzer and a sample analyzer, wherein the at least two cascaded sample analyzers are used for testing samples to be tested;
a track for connecting the sample analyzer and an input module;
the scheduling device is used for scheduling the sample to be tested through the track according to the scheduling plan of the sample to be tested;
the processor is used for determining a test item of the sample to be tested according to the identification information of the sample to be tested, which is acquired by the input module, and finding out an optional sample analyzer capable of executing the test item in the sample analysis system according to the test item; and determining the scheduling plan of the sample to be tested according to the state information of the optional sample analyzer.
According to a fourth aspect, there is provided in an embodiment a sample analysis system comprising:
a memory for storing a program;
a processor for executing the program stored by the memory to implement the method as described above.
According to a fifth aspect, an embodiment provides a computer readable storage medium comprising a program executable by a processor to implement the method as described above.
According to the sample analysis system and the sample scheduling method thereof of the embodiment, the test items of the sample to be tested and the state information of the optional sample analyzer are obtained; and determining the scheduling plan of the sample to be tested according to the state information of the optional sample analyzer, thereby improving the scheduling efficiency.
FIG. 1 is a block diagram of a sample analysis system according to an embodiment;
FIG. 2 is a block diagram of a sample analysis system according to an embodiment;
FIG. 3 is a flow diagram of a sample scheduling method according to an embodiment;
FIG. 4 is a flow diagram of a sample scheduling method according to an embodiment;
FIG. 5 is a detailed flowchart of step 22 in FIG. 4;
fig. 6 is a flowchart of a sample scheduling method according to an embodiment.
The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).
In some embodiments, the sample analysis system includes a plurality of sample analyzers 10 cascaded to form a pipelined test system. Referring to fig. 1 and 2, to better test samples in a streamlined fashion, in some embodiments of a sample analysis system in which a plurality of sample analyzers are cascaded, it may further include one or more of an input module 20, a pre-processing module 30, a track 40, a scheduling device 50, and a post-processing module 60. It should be noted that three sample analyzers are shown in fig. 1, and two sample analyzers are shown in fig. 2, which are only for illustration, and are not intended to limit the number of sample analyzers in the sample analysis system to two or three.
The sample analyzer 10 is used to perform a test on a sample. In the sample analysis system of the present application, the number of the sample analyzers 10 connected in cascade is at least two. These sample analyzers 10 may be the same type of analyzer, such as all biochemical analyzers or all immunological analyzers, or may be different types of analyzers, such as biochemical analyzers, immunological analyzers, blood coagulation analyzers, etc. This may be configured according to the needs of the user and the department.
The input module 20 may be used to receive a sample to be tested placed by a user. In some embodiments, the input module 20 may also obtain identification information of the sample to be tested. A user may put a sample to be tested into the input module 20, and the input module 20 may scan a label, such as a barcode or a two-dimensional code, on the sample to be tested through a scanning device, for example, to obtain identification information of the sample to be tested. The identification information is used as the unique identification of the sample to be tested and at least associated with the test item of the sample to be tested. The identification information may include, for example, a sample number, a sample category, sample source information, and the like.
The preprocessing module 30 is configured to preprocess the to-be-detected sample received by the input module 20. Generally, after a user puts a sample into the input module 20, the input module 20 scans the sample, the scheduling device 50 then schedules the sample into the pre-processing module 30 for pre-processing, and the pre-processed sample is then scheduled into the corresponding sample analyzer 10 from the pre-processing module 30 for testing. The pre-processing module 30 may include one or more of a centrifuge module, a serum detection module, a decapping module, and a dispensing module. The preprocessing module 30 generally has a preprocessing flow: the centrifugal module receives the sample scheduled by the input module 20 and centrifuges the sample; the serum detection module detects serum of the centrifuged sample, judges whether the serum can be used for subsequent measurement, and if the serum is insufficient or the quality is unqualified, the serum cannot be used for subsequent measurement; and if the detection is passed, the sample is dispatched to the cover removing module, the cover of the sample is removed by the cover removing module, if the dispensing module exists, the dispensing module divides the sample with the cover removed, then the divided sample is dispatched to the corresponding sample analyzer 10 for measurement, and if the dispensing module does not exist, the sample is dispatched from the cover removing module to the corresponding sample analyzer 10 for measurement. It should be noted that the preprocessing module 30 is not required, and the sample analysis system of some embodiments may not include the preprocessing module 30, for example, fig. 1 is an example, and the sample analysis system of some embodiments may also include the preprocessing module 30, for example, fig. 2 is an example.
The rails 40 are used to connect the devices together. For example, the track 40 connects the input module 20 with a plurality of sample analyzers 10 such that samples can be dispatched from the input module 20 to each of the sample analyzers 10 for testing via the track 40. In some examples including the pre-processing module 30 and the post-processing module 60, the track 40 is connected to the input module 20, the pre-processing module 30, each sample analyzer 10, and the post-processing module 60 in sequence.
The scheduling device 50 is used to schedule samples through the track 40, such as from the input module 20 to the sample analyzer 10, such as from one sample analyzer 10 to another sample analyzer 10.
The post-processing module 60 is used to complete post-processing of the sample. The post-treatment modules 60 include one or more of a membrane addition/capping module, a refrigerated storage module, and a membrane removal/capping module. The membrane/capping module is used to membrane or cap the sample. The refrigeration storage module is used for storing samples. The stripping/decapping module is used to strip or decap the sample. One typical post-processing flow for the post-processing module 60 is: after all items needing to be measured of the sample are sucked in the corresponding sample analyzer 10, the sample is dispatched to a film adding/covering module, the film adding/covering module is used for adding films or covering the measured sample, and then the sample is dispatched to a refrigeration storage module for storage; if the sample requires retesting, the sample is dispatched from the refrigerated storage module, stripped or decapped in a stripping/decapping module, and then dispatched to the corresponding sample analyzer 10 for testing. It is noted that the post-processing module 60 is not required, and the sample analysis system of some embodiments may not include the post-processing module 60, such as fig. 1 is an example, and the sample analysis system of some embodiments may also include the post-processing module 60, such as fig. 2 is an example.
The human-computer interaction device 80 is used for human-computer interaction, namely receiving input and output visual information of a user; the input of the user can be received by a keyboard, an operating button, a mouse, a track ball and the like, and a touch screen integrated with a display can also be adopted; the display can be used for outputting visual information.
In the sample analysis system provided by the present application, each sample analyzer or module may further be provided with a module buffer, the track 40 may also have a track buffer, and the whole track 40 may be a circular track. The buffer is used for buffering samples so as to flexibly schedule the samples.
The above is a description of some of the structures of the sample analysis system of some embodiments of the present application. The signal connections between the sample analyzers and the modules in the sample analysis system are not shown in fig. 1 and 2, and in fact, in the sample analysis system, the processor 70 is connected with the sample analyzers 10, the input module 20, the preprocessing module 30, the track 40, the scheduling device 50, the post-processing module 60, the human-computer interaction device 80, and the like.
The processor 70 is a control center of the sample analysis system, and is configured to manage and control various analyzers and modules of the sample analysis system, so as to implement a streamlined test of a sample. The processor 70 of the present application may be provided separately from the sample analyzer (the scheduling method of the present application is performed by a processor other than the sample analyzer), may be a processor in one sample analyzer (the scheduling method of the present application is performed by a processor of one sample analyzer), or may be a processor in a plurality of sample analyzers (the scheduling method of the present application is performed by cooperation of processors of a plurality of sample analyzers). The scheduling method of the processor 70 for the samples, as shown in fig. 3, includes the following steps:
step 1, the processor 70 obtains the test items of the sample to be tested and the state information of the optional sample analyzer corresponding to the sample to be tested. The selectable sample analyzer is a sample analyzer capable of executing a test item corresponding to a sample to be tested in the sample analysis system. The selectable sample analyzer corresponding to the sample to be tested may be designated by the user via the human-computer interaction device 80, or may be determined by the processor 70 according to the test item, the latter being employed in the present embodiment. For example, as shown in fig. 4, the present step includes:
And 2, determining a scheduling plan of the sample to be tested by the processor 70 according to the state information of the optional sample analyzer. The status information is a status reflected by the sample analyzer 10, visible to the naked eye of the user or visible through the screen of the human interaction device 80, and is basically a hardware status of the sample analyzer, as shown in tables 1 and 2 below.
Table 1: various status information of an immunoassay analyzer and corresponding start-up test adjustments thereof
Status information | Conditions for start-up test |
Is not initialized | Fail |
Is unknown | Fail |
Idle (unstable temperature) | Fail |
Idle (dust cover open) | Fail |
Reagent loading (free lower cover) | Fail |
Stop | Fail |
Recovery | Fail |
In shutdown | Fail |
Shutdown | Fail |
Free up | Success |
Testing | Success |
Reagent load (cover closing or opening in test) | Wait |
Incubation | Wait |
Test (dust cover open) | Fail |
Test (temperature instability) | Fail |
Automatic effect detection (starting every 4 hours) | Success |
Automatic mixing | Wait |
Drainage of condensed water (invisible to the user)) | Wait |
Automatic daily cleaning | Fail |
Debugging | Fail |
Basic performance | Fail |
Maintenance | Fail |
Diagnosis of | Fail |
Table 2: various status information of biochemical analyzer and corresponding start test adjustment thereof
Status information | Conditions for start-up test |
Is not initialized | Fail |
Is unknown | Fail |
Initialization | Fail |
Recovery | Fail |
Stop | Fail |
Idle (unstable temperature) | Fail |
Test (temperature instability) | Fail |
In shutdown | Fail |
Shutdown | Fail |
Reagent loading (free lower cover) | Fail |
Incubation | Wait |
Free up | Success |
Testing | Success |
Reagent load (closing cover or opening in test) | Wait |
Sample loading | Wait |
Dormancy | Wait |
Wake-up | Wait |
Residual detection | Fail |
Debugging | Fail |
Basic performance | Fail |
Maintenance | Fail |
Diagnosis of | Fail |
The processor 70 may indirectly determine the scheduling plan of the sample to be tested according to the state information, or may directly determine the scheduling plan of the sample to be tested according to the state information, which is described in detail in the present application through two embodiments.
In the first embodiment, the processor 70 indirectly determines the scheduling plan of the sample to be measured according to the state information. Specifically, as shown in fig. 4, step 2 includes:
table 3: switching the various states of the different analyzers to the first time required to process the sample
Therefore, the processor 70 can know the corresponding first time Ts according to the state of the optional sample analyzer. The application provides a sample analysis system, if adopt single sample to transport, then second time Tl is 0, if adopt sample frame transportation, the quantity of the sample of reserving on the front end track can be known to treater 70 according to the sample position on the sample frame that is currently handling, because the time of testing the sample is fixed, consequently can calculate according to the required time of test and the quantity of reserving the sample and obtain second time Tl. After obtaining the first time Ts and the second time Tl, the processor 70 calculates a waiting time Tw required for the sample to be tested to enter the selectable sample analyzer for testing according to at least the first time Ts and the second time Tl, for example, Tw is Ts + Tl. In this embodiment, the waiting time Tw is calculated by taking the preparation time into account, and the processor 70 obtains the preparation time required before the test of the sample to be tested. The preparation time includes: and at least one of a time Tt required for transporting the sample To be detected from the buffer area To the front rail sample adding position of the optional sample analyzer and a reserved allowance time To. In this embodiment, the preparation time includes Tt and To. The processor 70 adds the first time Ts and the second time Tl and then subtracts the preparation time To obtain the waiting time Tw, i.e., Tw ═ Ts + Tl-Tt-To. Therefore, the obtained waiting time takes the conditions of the analyzer end and the sample end into consideration, and the accuracy is high.
At step 223, processor 70 disables testing of the sample to be tested. For the analyzer, the first threshold time Tx is a threshold used to determine whether the sample to be tested has a test significance, in other words, a threshold used to screen out an optional analyzer that does not have a test condition. For example, the "start test condition" in tables 1 and 2 is the state corresponding to "Fail", the first time corresponding to these states is relatively large (24h), and the waiting time Tw obtained in this case is also large and has no measurement value, so that all the selectable sample analyzers need to test the sample to be tested, and the waiting time exceeds the first threshold time Tx, the test of the sample to be tested is discarded. The first threshold time Tx may be set according to practical circumstances, typically in hours.
In step 224, the processor 70 transfers the sample to be tested to the buffer area to wait. If the sample to be tested is in the buffer area, no action is taken. The buffer may be a track buffer or a buffer of a sample analyzer.
Therefore, the scheduling planning of the sample to be tested is determined according to the waiting time by calculating the waiting time, and the scheduling efficiency is improved.
In the second embodiment, in the present embodiment, the processor 70 directly determines the scheduling plan of the sample to be tested according to the state information. Specifically, as shown in fig. 6, step 2 includes:
step 21', the processor 70 determines the test priority corresponding to the status information according to the status information of the optional sample analyzer. For example, the processor 70 determines the test priority of the optional sample analyzer as high when the state information is the idle state or the normal test state; when the state information is a state which can be tested only after the current state needs to be switched, determining the test priority of the selectable sample analyzer as a middle level; and when the state information is the state in which the test cannot be performed, determining the test priority of the optional sample analyzer to be low. As shown in table 3, the states of reagent loading (uncovering), reagent loading (closing), automatic mixing, automatic effect detection, condensed water drainage, dormancy, awakening, incubation, sample loading, and the like all belong to states that can be tested only after the current state needs to be switched. The other states are states in which the test cannot be performed (that is, states in which the test condition is not satisfied), except for an idle state, a normal test state, and a state in which the test cannot be performed until the current state is switched.
Step 22', the processor 70 determines a scheduling plan of the samples to be tested according to the test priorities. And if at least two optional sample analyzers exist, selecting the optional sample analyzer with the highest test priority as the target sample analyzer of the sample to be tested. For example, when the test priorities of the selectable sample analyzers are all low, the processor 70 invalidates the test of the sample to be tested. When the test priority of at least one of the selectable sample analyzers is high, the processor 70 uses the selectable sample analyzer with the high test priority as the target sample analyzer of the sample to be tested, and randomly selects one or selects the nearest one of the selectable sample analyzers as the target sample analyzer. When the test priority of the optional sample analyzer is not higher than the high level, and the test priority of at least one optional sample analyzer is middle level, the processor 70 transfers the sample to be tested to the buffer area to wait through the scheduling device 50. Thus, the efficiency of sample testing can be improved.
Those skilled in the art will appreciate that all or part of the functions of the various methods in the above embodiments may be implemented by hardware, or may be implemented by computer programs. When all or part of the functions of the above embodiments are implemented by a computer program, the program may be stored in a computer-readable storage medium, and the storage medium may include: a read only memory, a random access memory, a magnetic disk, an optical disk, a hard disk, etc., and the program is executed by a computer to realize the above functions. For example, the program may be stored in a memory of the device, and when the program in the memory is executed by the processor, all or part of the functions described above may be implemented. In addition, when all or part of the functions in the above embodiments are implemented by a computer program, the program may be stored in a storage medium such as a server, another computer, a magnetic disk, an optical disk, a flash disk, or a removable hard disk, and may be downloaded or copied to a memory of a local device, or may be version-updated in a system of the local device, and when the program in the memory is executed by a processor, all or part of the functions in the above embodiments may be implemented.
Reference is made herein to various exemplary embodiments. However, those skilled in the art will recognize that changes and modifications may be made to the exemplary embodiments without departing from the scope hereof. For example, the various operational steps, as well as the components used to perform the operational steps, may be implemented in differing ways depending upon the particular application or consideration of any number of cost functions associated with operation of the system (e.g., one or more steps may be deleted, modified or incorporated into other steps).
Additionally, as will be appreciated by one skilled in the art, the principles herein may be reflected in a computer program product on a computer readable storage medium, which is pre-loaded with computer readable program code. Any tangible, non-transitory computer-readable storage medium may be used, including magnetic storage devices (hard disks, floppy disks, etc.), optical storage devices (CD-ROMs, DVDs, Blu Ray disks, etc.), flash memory, and/or the like. These computer program instructions may be loaded onto a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions which execute on the computer or other programmable data processing apparatus create means for implementing the functions specified. These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including means for implementing the function specified. The computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified.
While the principles herein have been illustrated in various embodiments, many modifications of structure, arrangement, proportions, elements, materials, and components particularly adapted to specific environments and operative requirements may be employed without departing from the principles and scope of the present disclosure. The above modifications and other changes or modifications are intended to be included within the scope of this document.
The foregoing detailed description has been described with reference to various embodiments. However, one skilled in the art will recognize that various modifications and changes may be made without departing from the scope of the present disclosure. Accordingly, the disclosure is to be considered in an illustrative and not a restrictive sense, and all such modifications are intended to be included within the scope thereof. Also, advantages, other advantages, and solutions to problems have been described above with regard to various embodiments. However, the benefits, advantages, solutions to problems, and any element(s) that may cause any element(s) to occur or become more pronounced are not to be construed as a critical, required, or essential feature or element of any or all the claims. As used herein, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, system, article, or apparatus. Furthermore, the term "coupled," and any other variation thereof, as used herein, refers to a physical connection, an electrical connection, a magnetic connection, an optical connection, a communicative connection, a functional connection, and/or any other connection.
Those skilled in the art will recognize that many changes may be made to the details of the above-described embodiments without departing from the underlying principles of the invention. Accordingly, the scope of the invention should be determined from the following claims.
Claims (21)
- A method of scheduling samples for a sample analysis system comprising at least two cascaded sample analyzers, the method comprising:acquiring identification information of a sample to be detected;determining a test item of the sample to be tested according to the identification information of the sample to be tested;according to the test items, finding out optional sample analyzers capable of executing the test items in the sample analysis system;determining the waiting time required for the sample to be tested to enter the optional sample analyzer for testing according to the state information of the optional sample analyzer;and determining the scheduling plan of the sample to be tested according to the waiting time.
- A method of scheduling samples for a sample analysis system comprising at least two cascaded sample analyzers, the method comprising:acquiring test items of a sample to be tested and state information of an optional sample analyzer; the selectable sample analyzer is a sample analyzer capable of executing the test item in the sample analysis system;and determining the scheduling plan of the sample to be tested according to the state information of the optional sample analyzer.
- The method of claim 2, wherein determining the schedule of the samples to be tested based on the status information of the selectable sample analyzers comprises:determining the waiting time required for the sample to be tested to enter the optional sample analyzer for testing according to the state information of the optional sample analyzer;and determining the scheduling plan of the sample to be tested according to the waiting time.
- The method of claim 1 or 3, wherein determining the scheduling plan for the sample to be tested based on the latency comprises:and if at least two optional sample analyzers exist, selecting the optional sample analyzer with the shortest waiting time as the target sample analyzer of the sample to be detected.
- The method of claim 2, wherein determining the schedule of the samples to be tested based on the status information of the selectable sample analyzers comprises:determining a test priority corresponding to the state information according to the state information of the selectable sample analyzer;and if at least two optional sample analyzers exist, selecting the optional sample analyzer with the highest test priority as the target sample analyzer of the sample to be tested.
- The method of claim 1 or 3, wherein determining the scheduling plan for the sample to be tested based on the latency comprises:comparing the waiting time with a first threshold time and a second threshold time, wherein the second threshold time is less than the first threshold time;when all waiting time is longer than a first threshold value time, the test of the sample to be tested is abandoned; and/or the presence of a gas in the gas,when at least one waiting time is less than or equal to a second threshold time, selecting the selectable sample analyzer with the shortest waiting time as a target sample analyzer of the sample to be detected; and/or the presence of a gas in the gas,and when at least one waiting time is less than or equal to a first threshold time and greater than a second threshold time, conveying the sample to be tested to a buffer area for waiting.
- The method of claim 1 or 3, wherein determining the wait time required for the sample to be tested to enter the alternative sample analyzer for testing based on the status information of the alternative sample analyzer comprises:obtaining a first time required for the selectable sample analyzer to switch from a current state to be capable of immediately processing a sample and a second time required for the selectable sample analyzer to finish processing the sample remained on the front-end track according to the state information of the selectable sample analyzer;and calculating the waiting time required by the sample to be tested to enter the optional sample analyzer for testing according to at least the first time and the second time.
- The method of claim 7, wherein calculating the wait time required for the sample to be tested to enter the alternative sample analyzer for testing based on at least the first time and the second time comprises:acquiring the preparation time required before a sample to be tested is tested; the preparation time includes: at least one of time required for transporting the sample to be detected from the buffer area to the front-end track sample adding position of the optional sample analyzer and reserved allowance time;and subtracting the preparation time after adding the first time and the second time to obtain the waiting time.
- The method of claim 5, wherein determining a test priority corresponding to the status information based on the status information of the selectable sample analyzers comprises:if the state information comprises an idle state or a normal test state, determining that the corresponding test priority is high;if the state information comprises a state which can be tested only after the current state needs to be switched, determining that the corresponding test priority is a middle level;and if the state information comprises the state which can not be tested, determining that the corresponding test priority is low.
- The method of claim 9, further comprising:when the test priority of at least one optional sample analyzer is high, taking the optional sample analyzer with the high test priority as a target sample analyzer of the sample to be tested; and/or the presence of a gas in the gas,when the test priority of the selectable sample analyzers does not have a high level and the test priority of at least one selectable sample analyzer is a medium level, conveying the sample to be tested to a buffer area for waiting; and/or the presence of a gas in the gas,and when the test priorities of the optional sample analyzers are all low, the test of the sample to be tested is cancelled.
- A sample analysis system, comprising:the input module is used for receiving a sample to be detected put in by a user and acquiring identification information of the sample to be detected;the system comprises at least two cascaded sample analyzers, a sample analyzer and a sample analyzer, wherein the at least two cascaded sample analyzers are used for testing samples to be tested;a track for connecting the sample analyzer and an input module;the scheduling device is used for scheduling the sample to be tested through the track according to the scheduling plan of the sample to be tested;the processor is used for determining a test item of the sample to be tested according to the identification information of the sample to be tested, which is acquired by the input module, and finding out an optional sample analyzer capable of executing the test item in the sample analysis system according to the test item; and determining the scheduling plan of the sample to be tested according to the state information of the optional sample analyzer.
- The system of claim 11, wherein the processor determining the schedule of the samples to be tested based on the status information of the selectable sample analyzers comprises:determining the waiting time required for the sample to be tested to enter the optional sample analyzer for testing according to the state information of the optional sample analyzer;and determining the scheduling plan of the sample to be tested according to the waiting time.
- The system of claim 12, wherein the processor determining the schedule of the samples to be tested based on the latency includes:and if at least two optional sample analyzers exist, selecting the optional sample analyzer with the shortest waiting time as the target sample analyzer of the sample to be detected.
- The system of claim 11, wherein the processor determining the schedule of the samples to be tested based on the status information of the selectable sample analyzers comprises:determining a test priority corresponding to the state information according to the state information of the selectable sample analyzer;and if at least two optional sample analyzers exist, selecting the optional sample analyzer with the highest test priority as the target sample analyzer of the sample to be tested.
- The system of claim 12, wherein the processor determining the schedule of the samples to be tested based on the latency includes:comparing the waiting time with a first threshold time and a second threshold time, wherein the second threshold time is less than the first threshold time;when all waiting time is longer than a first threshold value time, the test of the sample to be tested is abandoned; and/or the presence of a gas in the gas,when at least one waiting time is less than or equal to a second threshold time, selecting the selectable sample analyzer with the shortest waiting time as a target sample analyzer of the sample to be detected; and/or the presence of a gas in the gas,and when at least one waiting time is less than or equal to a first threshold time and greater than a second threshold time, conveying the sample to be tested to a buffer area for waiting through the scheduling device.
- The system of claim 12, wherein the processor determining the wait time required for the sample to be tested to enter the alternative sample analyzer for testing based on the status information of the alternative sample analyzer comprises:obtaining a first time required for the selectable sample analyzer to switch from a current state to be capable of immediately processing a sample and a second time required for the selectable sample analyzer to finish processing the sample remained on the front-end track according to the state information of the selectable sample analyzer;and calculating the waiting time required by the sample to be tested to enter the optional sample analyzer for testing according to at least the first time and the second time.
- The system of claim 16, wherein the processor calculating a wait time required for the sample to be tested to enter the selectable sample analyzer for testing based on at least the first time and the second time comprises:acquiring the preparation time required before a sample to be tested is tested; the preparation time includes: at least one of the time required for transporting the sample to be tested from the buffer area to the front-end track sample adding position of the optional sample analyzer and the reserved allowance time;and subtracting the preparation time after adding the first time and the second time to obtain the waiting time.
- The system of claim 14, wherein the processor determining a test priority corresponding to the status information based on the status information of the target sample analyzer comprises:if the state information comprises an idle state or a normal test state, determining that the corresponding test priority is high;if the state information comprises a state which can be tested only after the current state needs to be switched, determining that the corresponding test priority is a middle level;and if the state information comprises the state which can not be tested, determining that the corresponding test priority is low.
- The system of claim 18, wherein the processor is further configured to:when the test priority of at least one optional sample analyzer is middle, the sample to be tested is conveyed to a buffer area to wait; and/or the presence of a gas in the gas,and when the test priorities of the optional sample analyzers are all low, the test of the sample to be tested is cancelled.
- A sample analysis system, comprising:a memory for storing a program;a processor for executing the memory-stored program to implement the method of any one of claims 1-10.
- A computer-readable storage medium, characterized by comprising a program executable by a processor to implement the method of any one of claims 1-10.
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