CN114513171B - S-band low-noise amplifier based on HEMT - Google Patents
S-band low-noise amplifier based on HEMT Download PDFInfo
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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Abstract
The invention discloses an S-band low-noise amplifier based on HEMT, and relates to the technical field of microwave radio frequency circuits. The two-stage HEMT circuit is adopted for amplification, the two-stage bias circuit adopts resistor voltage division, the two-stage bias circuit adopts choke inductance and bypass capacitance, radio frequency signals can be prevented from entering a direct current path, the anti-interference performance is better, the stabilizing circuit of the two-stage HEMT grid is added, the stabilizing coefficient Stabfact of the whole amplifier circuit is far greater than 1, the stability of the circuit is better, the input matching part follows the minimum noise coefficient matching principle, the output part follows the maximum transmission power matching principle for matching, the Gain of the whole two-stage low-noise amplifier circuit is more than 28dB, the noise coefficient NF is more than 1.5, the input voltage standing wave ratio VSWR1 is more than 2.0, the output voltage standing wave ratio VSWR2 is more than 2.0, the Gain of the signals is larger, the interference is less, the Gain is flat, the stability is good, and the matching performance is good.
Description
Technical Field
The invention relates to the technical field of microwave radio frequency circuits, in particular to an S-band low-noise amplifier based on HEMTs.
Background
With the continuous development of wireless communication technology, microwave and radio frequency circuits have been widely used. The low noise amplifier is an important component of the radio frequency receiver, is positioned at the forefront end of the receiver, has the main functions of amplifying signals received by an antenna and introducing less noise, and has the main performance indexes that: lower noise figure, proper gain, matching of input and output impedance, higher stability coefficient, etc.
The S wave band is a low-frequency wave band of electromagnetic waves, has a frequency range of about 2-4GHz, and is widely applied to wireless communication systems such as satellite positioning, radar, bluetooth, wireless local area network and the like. High electron mobility transistor (high electron mobility transistor, HEMT) devices are increasingly being used because of their superior performance, such as high speed, low power consumption, low noise, etc. The existing S-band low-noise amplifier has the problems of high noise coefficient, lower gain, insufficient stability and the like.
Disclosure of Invention
In order to solve the problems, the invention provides a low-noise amplifier based on an HEMT (high Electron mobility transistor) S-band, which realizes the performances of low noise coefficient, higher gain, flatness, high stability coefficient and the like of the low-noise amplifier.
In order to achieve the above object, the present invention adopts the following technical scheme: a HEMT-based S-band low noise amplifier comprising: the input matching circuit, the first-stage transistor amplifier circuit, the first-stage grid bias circuit, the first-stage drain bias circuit, the first-stage stabilized power supply, the interstage matching circuit, the second-stage transistor amplifier circuit, the second-stage grid bias circuit, the second-stage drain bias circuit, the second-stage stabilized power supply and the output-stage matching circuit;
one end of the input matching circuit is connected with the input end of the radio frequency signal, the input matching circuit, the first-stage grid bias circuit and the first-stage transistor amplifier circuit are sequentially connected, the first-stage transistor amplifier circuit and the first-stage drain bias circuit are connected, the first-stage drain bias circuit is connected with the first-stage stabilized voltage supply, the first-stage transistor amplifier circuit is connected with the interstage matching network, the interstage matching circuit, the second-stage grid bias circuit and the second-stage transistor amplifier circuit are sequentially connected, the second-stage transistor amplifier circuit and the second-stage drain bias circuit are connected, the second-stage transistor amplifier circuit is connected with the output-stage matching circuit, the output-stage matching circuit is connected with the second-stage drain bias circuit, and the second-stage stabilized voltage supply is connected with the second-stage drain bias circuit;
the input matching circuit includes: the input port terminal 1, the capacitor C1, the interface Tee1, the microstrip line TL10, the input port terminal 1, the capacitor C1, the interface Tee1 and the microstrip line TL1 are connected in sequence; the spare port of the interface Tee1 is connected with a microstrip line TL10, the microstrip line TL1 is connected with one end of a microstrip line TL2 and one end of an inductor L1 in a first-stage grid bias circuit, and the other end of the input port Term1 is grounded;
the first stage gate bias circuit includes a capacitance: inductance L1, capacitance C2, resistance R1, resistance R2; the other end of the inductor L1, one end of the capacitor C2, one end of the resistor R1 and one end of the resistor R2 are connected with the same connecting point, wherein the resistors R1 and R2 have the function of bias voltage division, and the other ends of the capacitor C2 and the resistor R1 are grounded;
the first stage transistor amplifier circuit includes: microstrip lines TL2, TL3, TL4, TL5, TL6, TL7, TL8, TL9, TL11, TL12, TL13, TL14, TL15, capacitances C3, C4, C5, inductances L2, L3, L4, high electron mobility transistor HEMT1; one end of the microstrip line TL2 is an input end of the first-stage transistor amplifier circuit; the microstrip lines TL2, TL3 and the inductor L2 are sequentially connected, and the inductor L2 is connected with the grid electrode of the HEMT1 and one end of the capacitor C4; the other end of the capacitor C4 is connected with the drain electrode of the high electron mobility transistor HEMT1 and one end of the inductor L4 in a common connection mode, and the other end of the inductor L4 is connected with one end of the capacitor C5 and one end of the microstrip line TL 14; microstrip lines TL11, TL12, TL13, TL4, TL5, TL6, TL7, TL8 and TL9 are sequentially connected, the initial section of the microstrip line TL11 is grounded, one end of a capacitor C3 is connected with the common contact point of the microstrip line TL3 and an inductor L2, the other end of the capacitor C3 is connected with the common contact point of the microstrip lines TL4 and TL5, and the other end of the capacitor C5 is connected with the common contact point of the microstrip lines TL6 and TL 5; one end of the inductor L3 is connected with the common connection point of the TL13 and the TL4, the other end of the inductor L3 is connected with the source electrode of the HEMT1 and one end of the inductor L5, and the other end of the inductor L5 is connected with the common connection point of the microstrip lines TL6 and TL 7; the other end of the microstrip line TL14 is connected with one end of a microstrip line TL15, and the other end of the microstrip line TL15 is the output end of the first-stage transistor amplifier circuit;
the first stage drain bias circuit includes: resistor R3, capacitor C14, inductor L6; one end of the inductor L6 is commonly connected with the other end of the microstrip line TL15 of the first-stage amplifier circuit and one end of the capacitor C6 of the interstage matching circuit; the other end of the inductor L6 is connected with one end of the capacitor C14, one end of the resistor R3 is connected with the other end of the capacitor C14 in a common mode, and the other end of the capacitor C14 is grounded; the other end of the resistor R3 is connected with the other end of the resistor R2 and one end of the first-stage regulated power supply V_Dc1, and the other end of the power supply V_Dc1 is grounded;
the inter-stage matching circuit includes: capacitors C6, C13, microstrip lines TL16, TL17, TL30, TL31, junctions Tee2, tee4; the capacitor C6, the microstrip line TL16, the connector Tee2, the capacitor C13, the connector Tee4 and the microstrip line TL30 are sequentially connected, the microstrip line TL17 is connected with the spare port of the connector Tee2, the microstrip line TL31 is connected with the spare port of the connector Tee4, and the microstrip line TL30 is connected with the input end of the second-stage amplifier circuit and one end of the inductor L12 of the second-stage grid bias circuit;
the second stage gate bias circuit includes: capacitor C12, resistor R5, resistor R6, inductor L12; the other end of the inductor L12 is commonly connected with one end of a capacitor C12, a resistor R6 and one end of a resistor R5, wherein the resistors R5 and R6 have the functions of bias voltage division, and the other ends of the capacitor C12 and the resistor R6 are grounded;
the second-stage transistor amplifier circuit has the same structure as the first-stage transistor amplifier circuit, and the output end is commonly connected with one end of an inductor L7 in the second-stage drain bias circuit and one end of a capacitor C7 in the output matching network;
the second stage drain bias circuit includes: resistor R4, capacitor C10, inductor L7; the other end of the inductor L7 is commonly connected with one end of the resistor R4 and one end of the capacitor C10; the other end of the resistor R4 is commonly connected with the other end of the resistor R5 and one end of the power supply V_DC2, the other end of the capacitor C10 is grounded, and the other end of the power supply V_DC2 is grounded;
the output matching network includes: an output port terminal 2, a capacitor C7, an interface Tee3, a microstrip line TL21 and a microstrip line TL24; the capacitor C7, the microstrip line TL21, the interface Tee3 and the output port terminal 2 are sequentially connected, and the microstrip line TL24 is connected with the spare port of the interface Tee 3.
The beneficial effects of the invention are as follows:
the invention provides a low-noise amplifier based on HEMT (high Electron mobility transistor), which is used for improving the stability of the amplifier, increasing the signal gain and reducing the noise; the method comprises the following steps: the two-stage HEMT circuit is adopted for amplification, the two-stage bias circuit adopts resistor voltage division, the two-stage bias circuit adopts choke inductance and bypass capacitance, radio frequency signals can be prevented from entering a direct current path, the anti-interference performance is better, the stabilizing circuit of the two-stage HEMT grid is added, the stabilizing coefficient Stabfact of the whole amplifier circuit is far greater than 1, the stability of the circuit is better, the input matching part follows the minimum noise coefficient matching principle, the output part follows the maximum transmission power matching principle for matching, the Gain of the whole two-stage low-noise amplifier circuit is more than 28dB, the noise coefficient NF is more than 1.5, the input voltage standing wave ratio VSWR1 is more than 2.0, the output voltage standing wave ratio VSWR2 is more than 2.0, the Gain of the signals is larger, the interference is less, the Gain is flat, the stability is good, and the matching performance is good.
Drawings
FIG. 1 is a schematic circuit diagram of a HEMT-based two-stage low noise amplifier of the present invention;
FIG. 2 is a signal plot of the gain S21 of the present invention;
FIG. 3 is a graph of an input voltage standing wave ratio VSWR1 versus an output voltage standing wave ratio VSWR2 of the present invention;
FIG. 4 is a graph of the noise figure NF and the minimum noise figure NFmin of the present invention;
FIG. 5 is a graph of the stability factor Stabfact of the present invention.
Detailed Description
The technical scheme provided by the invention is further described in detail below with reference to the accompanying drawings.
The circuit structure of the S-band low-noise amplifier based on HEMT is shown in figure 1, and the low-noise amplifier comprises an input matching circuit, a first-stage transistor amplifier circuit, a first-stage grid bias circuit, a first-stage drain bias circuit, a first-stage stabilized voltage supply, an interstage matching circuit, a second-stage transistor amplifier circuit, a second-stage grid bias circuit, a second-stage drain bias circuit, a second-stage stabilized voltage supply and an output-stage matching circuit.
One end of the input matching circuit is connected with the input end of the radio frequency signal, the input matching circuit, the first-stage grid electrode biasing circuit and the first-stage transistor amplifier circuit are sequentially connected, the first-stage transistor amplifier circuit and the first-stage drain electrode biasing circuit are connected, the first-stage drain electrode biasing circuit is connected with the first-stage stabilized voltage supply, the first-stage transistor amplifier circuit is connected with the inter-stage matching network, the inter-stage matching circuit, the second-stage grid electrode biasing circuit and the second-stage transistor amplifier circuit are sequentially connected, the second-stage transistor amplifier circuit is connected with the second-stage drain electrode biasing circuit, the second-stage transistor amplifier circuit is connected with the output-stage matching circuit, the output-stage matching circuit is connected with the second-stage drain electrode biasing circuit, and the second-stage stabilized voltage supply is connected with the second-stage drain electrode biasing circuit.
One end of the input matching circuit is connected with the input end of the radio frequency signal, the input matching circuit, the first-stage grid electrode biasing circuit and the first-stage transistor amplifier circuit are sequentially connected, the first-stage transistor amplifier circuit and the first-stage drain electrode biasing circuit are connected, the first-stage drain electrode biasing circuit is connected with the first-stage stabilized voltage supply, the first-stage transistor amplifier circuit is connected with the inter-stage matching network, the inter-stage matching circuit, the second-stage grid electrode biasing circuit and the second-stage transistor amplifier circuit are sequentially connected, the second-stage transistor amplifier circuit is connected with the second-stage drain electrode biasing circuit, the second-stage transistor amplifier circuit is connected with the output-stage matching circuit, the output-stage matching circuit is connected with the second-stage drain electrode biasing circuit, and the second-stage stabilized voltage supply is connected with the second-stage drain electrode biasing circuit.
The input matching network comprises an input port terminal 1, a capacitor C1, an interface Tee1, microstrip lines TL1 and TL10, wherein the lower end of the interface Tee1 is connected with the microstrip line TL10, the microstrip line TL1 is connected with a microstrip line TL2 in a first-stage grid bias circuit, and the other end of the input port terminal 1 is grounded.
The first-stage grid bias circuit comprises a capacitor C2, resistors R1 and R2, an inductor L1 and a capacitor C2, wherein the resistors R1 and R2 are sequentially connected, the resistors R1 and R2 have the function of bias voltage division, and the other ends of the capacitor C2 and the resistor R1 are grounded.
The first stage transistor amplifier circuit comprises microstrip lines TL2, TL3, TL4, TL5, TL6, TL7, TL8, TL9, TL11, TL12, TL13, TL14, TL15, capacitors C3, C4 and C5, inductors L2, L3 and L4, and a high electron mobility transistor HEMT1, wherein the microstrip lines TL2 and TL3 are connected with the inductor L2, the right end of the inductor L2 is connected with the upper end of the capacitor C4, the grid electrode of the high electron mobility transistor HEMT1 is connected, the lower end of the capacitor C4 is connected with the drain electrode of the high electron mobility transistor HEMT1, the left end of the inductor L4 is connected with the lower end of the capacitor C5, the upper end of the capacitor C5 is connected with the left end of the microstrip line TL6, the microstrip line TL14 is connected with the microstrip line TL15, the microstrip lines TL4, TL5, TL6, TL7, TL8 and TL9 are sequentially connected, the microstrip lines TL4, TL13, TL12 and TL11 are sequentially connected, the upper end of the capacitor C3 is connected with the right end of the microstrip line TL4, the lower end is connected with the right end of the microstrip line TL3, the left end of the inductor L3 is connected with the microstrip line TL13, the right end is connected with the source electrode of the HEMT1, the left end of the inductor L5 is connected, the right end of the inductor L5 is connected with the microstrip line TL7, and the microstrip lines TL9 and TL11 are grounded.
The first-stage drain bias circuit comprises a resistor R3, a capacitor C14 and an inductor L6, wherein the lower end of the inductor L6 is connected with a microstrip line TL15 of the first-stage amplifier circuit and a capacitor C6 of the interstage matching circuit, the upper end of the inductor L6 is connected with the capacitor C14, the resistor R3 is connected, and the other end of the capacitor C14 is grounded. The first-stage stabilized power supply V_Dc1 is connected with the first-stage drain bias circuit resistor R3 and the first-stage grid bias circuit resistor R2, and the other end of the power supply V_Dc1 is grounded.
The interstage matching circuit comprises capacitors C6 and C13, microstrip lines TL16 and TL17, TL30 and TL31, connectors Tee2 and Tee4, a capacitor C6, a microstrip line TL16, a connector Tee2, a capacitor C13 and a connector Tee4 microstrip line TL30 which are sequentially connected, the microstrip line TL17 is connected with the lower end of the connector Tee2, the microstrip line TL31 is connected with the lower end of the connector Tee4, and the microstrip line TL30 is connected with the microstrip line TL29 of the second-stage amplifier circuit and the upper end of an inductor L12 of the second-stage gate bias circuit.
The second-stage grid bias circuit comprises a capacitor C12, resistors R5 and R6, an inductor L12 and a capacitor C12, wherein the resistors R6 and R5 are sequentially connected, the resistors R5 and R6 have the function of bias voltage division, and the other ends of the capacitor C12 and the resistor R6 are grounded.
The second stage transistor amplifier circuit comprises microstrip lines TL18, TL19, TL20, TL22, TL23, TL25, TL26, TL27, TL28, TL29, TL32, TL33, TL34, capacitors C3, C4, C5, inductors L2, L3 and L4, a high electron mobility transistor HEMT2, wherein the microstrip lines TL29 and TL28 are connected with an inductor L11, the left end of the inductor L11 is connected with the lower end of a capacitor C9, the grid electrode of the high electron mobility transistor HEMT2 is connected, the upper end of the capacitor C9 is connected with the drain electrode of the high electron mobility transistor HEMT1, the right end of the inductor L8, the left end of the inductor L8 is connected with the upper end of the capacitor C8, the right end of the microstrip line TL23 is connected, the lower end of the capacitor C8 is connected with the right end of the microstrip line TL32, the microstrip line TL23 is connected with the microstrip line TL22, the microstrip lines TL34, TL33, TL32, TL27, TL26 and TL25 are sequentially connected, the microstrip lines TL34, TL18, TL16 and TL20 are sequentially connected, the lower end of the capacitor C11 is connected with the left end of the microstrip line TL34, the upper end is connected with the left end of the microstrip line TL28, the right end of the inductor L9 is connected with the microstrip line TL18, the left end is connected with the source electrode of the HEMT2, the right end of the inductor L10 is connected, the left end of the inductor L10 is connected with the microstrip line TL27, and the microstrip lines TL20 and TL25 are grounded.
The second-stage drain bias circuit comprises a resistor R4, a capacitor C10 and an inductor L7, wherein the upper end of the inductor L7 is connected with a microstrip line TL22 of the second-stage amplifier circuit and the capacitor C7 of the output-stage matching circuit, the lower end of the inductor L7 is connected with the capacitor C10, the resistor R4 is connected, and the other end of the capacitor C10 is grounded. The first-stage stabilized power supply V_DC2 is connected with the second-stage drain bias circuit resistor R4 and the second-stage grid bias circuit resistor R5, and the other end of the power supply V_DC2 is grounded.
The output matching network comprises an output port terminal 2, a capacitor C7, an interface Tee3, microstrip lines TL21 and TL24, wherein the lower end of the interface Tee3 is connected with the microstrip line TL24, and the other end of the output port terminal 2 is grounded.
In this embodiment, as shown in fig. 1, HEMT-based two-stage low noise amplifier has HEMT-based HEMT1 and HEMT2 which are PHEMT transistors of AVAGO company, and the first-stage and second-stage regulated power supplies v_dc1 and v_dc2 are direct current constant voltage power supplies with a size of 5V.
The elements composing the HEMT-based two-stage low noise amplifier are as follows:
the resistance r1=38Ω, r2=337 Ω, r3=50Ω, r4=50Ω, r5=337 Ω, r6=38Ω.
Inductance l1=3.9nh, l2=0.7nh, l3=0.15nh, l4=1.0nh, l5=0.15nh, l6=22nh, l7=22nh, l8=1.0nh, l9=0.15nh, l10=0.15nh, l11=0.7nh, l12=3.9 nH.
Capacitance c1=22 pF, c2=1.2pf, c3=0.1pf, c4=0.18pf, c5=0.13pf, c6=22pf, c7=22pf, c8=0.13pf, c9=0.18pf, c10=10pf, c11=0.1pf, c12=1.2pf, c13=22pf, c14=10pf.
As shown in fig. 2, the HEMT-based two-stage low noise amplifier provided in this embodiment has a signal gain curve obtained by simulation at a frequency of 2.45GHz, and has a gain s21= 28.625dB, and has a good amplification performance.
As shown in fig. 3, the two-stage low noise amplifier based on HEMT provided in this embodiment simulates a graph of an input voltage standing wave ratio VSWR1 and an output voltage standing wave ratio VSWR2 obtained at a frequency of 2.45GHz, where the input voltage standing wave ratio VSWR 1=1.570, and the output voltage standing wave ratio VSWR 2=1.321, and the matching is good.
As shown in fig. 4, the two-stage low noise amplifier based on HEMT provided in this embodiment simulates a graph of a noise factor NF and a minimum noise factor NFmin obtained at a frequency of 2.45GHz, where the noise factor nf=1.258, and the minimum noise factor nfmin=1.140, and the noise factor is smaller.
As shown in fig. 5, the HEMT-based two-stage low noise amplifier provided in this embodiment is a graph of stability coefficient Stabfact obtained by simulation at a frequency of 2.45GHz, the stability coefficient stabfact=2.204 >1, and the circuit stability is high.
The invention provides a low-noise amplifier based on HEMT (high Electron mobility transistor), which is used for improving the stability of the amplifier, increasing the signal gain and reducing the noise; the two-stage HEMT circuit is adopted for amplification, the two-stage bias circuit adopts resistor voltage division, the two-stage bias circuit adopts choke inductance and bypass capacitance, radio frequency signals can be prevented from entering a direct current path, the anti-interference performance is better, the stabilizing circuit of the two-stage HEMT grid is added, the stabilizing coefficient Stabfact of the whole amplifier circuit is far greater than 1, the stability of the circuit is better, the input matching part follows the minimum noise coefficient matching principle, the output part follows the maximum transmission power matching principle for matching, the Gain of the whole two-stage low-noise amplifier circuit is more than 28dB, the noise coefficient NF is more than 1.5, the input voltage standing wave ratio VSWR1 is more than 2.0, the output voltage standing wave ratio VSWR2 is more than 2.0, the Gain of the signals is larger, the interference is less, the Gain is flat, the stability is good, and the matching performance is good. In summary, the low-noise amplifier based on the S-band of the HEMT provided by the invention has the advantages of good amplification performance, good matching, small noise coefficient, high circuit stability and the like.
While the invention has been described in terms of specific embodiments, any feature disclosed in this specification may be replaced by alternative features serving the equivalent or similar purpose, unless expressly stated otherwise; all of the features disclosed, or all of the steps in a method or process, except for mutually exclusive features and/or steps, may be combined in any manner.
Claims (1)
1. A HEMT-based S-band low noise amplifier comprising: the input matching circuit, the first-stage transistor amplifier circuit, the first-stage grid bias circuit, the first-stage drain bias circuit, the first-stage stabilized power supply, the interstage matching circuit, the second-stage transistor amplifier circuit, the second-stage grid bias circuit, the second-stage drain bias circuit, the second-stage stabilized power supply and the output-stage matching circuit;
one end of the input matching circuit is connected with the input end of the radio frequency signal, the input matching circuit, the first-stage grid bias circuit and the first-stage transistor amplifier circuit are sequentially connected, the first-stage transistor amplifier circuit and the first-stage drain bias circuit are connected, the first-stage drain bias circuit is connected with the first-stage stabilized voltage supply, the first-stage transistor amplifier circuit is connected with the interstage matching network, the interstage matching circuit, the second-stage grid bias circuit and the second-stage transistor amplifier circuit are sequentially connected, the second-stage transistor amplifier circuit and the second-stage drain bias circuit are connected, the second-stage transistor amplifier circuit is connected with the output-stage matching circuit, the output-stage matching circuit is connected with the second-stage drain bias circuit, and the second-stage stabilized voltage supply is connected with the second-stage drain bias circuit;
the input matching circuit includes: the input port terminal 1, the capacitor C1, the interface Tee1, the microstrip line TL10, the input port terminal 1, the capacitor C1, the interface Tee1 and the microstrip line TL1 are connected in sequence; the spare port of the interface Tee1 is connected with a microstrip line TL10, the microstrip line TL1 is connected with one end of a microstrip line TL2 and one end of an inductor L1 in a first-stage grid bias circuit, and the other end of the input port Term1 is grounded;
the first stage gate bias circuit includes a capacitance: inductance L1, capacitance C2, resistance R1, resistance R2; the other end of the inductor L1, one end of the capacitor C2, one end of the resistor R1 and one end of the resistor R2 are connected with the same connecting point, wherein the resistors R1 and R2 have the function of bias voltage division, and the other ends of the capacitor C2 and the resistor R1 are grounded;
the first stage transistor amplifier circuit includes: microstrip lines TL2, TL3, TL4, TL5, TL6, TL7, TL8, TL9, TL11, TL12, TL13, TL14, TL15, capacitances C3, C4, C5, inductances L2, L3, L4, high electron mobility transistor HEMT1; one end of the microstrip line TL2 is an input end of the first-stage transistor amplifier circuit; the microstrip lines TL2, TL3 and the inductor L2 are sequentially connected, and the inductor L2 is connected with the grid electrode of the HEMT1 and one end of the capacitor C4; the other end of the capacitor C4 is connected with the drain electrode of the high electron mobility transistor HEMT1 and one end of the inductor L4 in a common connection mode, and the other end of the inductor L4 is connected with one end of the capacitor C5 and one end of the microstrip line TL 14; microstrip lines TL11, TL12, TL13, TL4, TL5, TL6, TL7, TL8 and TL9 are sequentially connected, the initial section of the microstrip line TL11 is grounded, one end of a capacitor C3 is connected with the common contact point of the microstrip line TL3 and an inductor L2, the other end of the capacitor C3 is connected with the common contact point of the microstrip lines TL4 and TL5, and the other end of the capacitor C5 is connected with the common contact point of the microstrip lines TL6 and TL 5; one end of the inductor L3 is connected with the common connection point of the TL13 and the TL4, the other end of the inductor L3 is connected with the source electrode of the HEMT1 and one end of the inductor L5, and the other end of the inductor L5 is connected with the common connection point of the microstrip lines TL6 and TL 7; the other end of the microstrip line TL14 is connected with one end of a microstrip line TL15, and the other end of the microstrip line TL15 is the output end of the first-stage transistor amplifier circuit;
the first stage drain bias circuit includes: resistor R3, capacitor C14, inductor L6; one end of the inductor L6 is commonly connected with the other end of the microstrip line TL15 of the first-stage amplifier circuit and one end of the capacitor C6 of the interstage matching circuit; the other end of the inductor L6 is connected with one end of the capacitor C14, one end of the resistor R3 is connected with the other end of the capacitor C14 in a common mode, and the other end of the capacitor C14 is grounded; the other end of the resistor R3 is connected with the other end of the resistor R2 and one end of the first-stage regulated power supply V_Dc1, and the other end of the power supply V_Dc1 is grounded;
the inter-stage matching circuit includes: capacitors C6, C13, microstrip lines TL16, TL17, TL30, TL31, junctions Tee2, tee4; the capacitor C6, the microstrip line TL16, the connector Tee2, the capacitor C13, the connector Tee4 and the microstrip line TL30 are sequentially connected, the microstrip line TL17 is connected with the spare port of the connector Tee2, the microstrip line TL31 is connected with the spare port of the connector Tee4, and the microstrip line TL30 is connected with the input end of the second-stage amplifier circuit and one end of the inductor L12 of the second-stage grid bias circuit;
the second stage gate bias circuit includes: capacitor C12, resistor R5, resistor R6, inductor L12; the other end of the inductor L12 is commonly connected with one end of a capacitor C12, a resistor R6 and one end of a resistor R5, wherein the resistors R5 and R6 have the functions of bias voltage division, and the other ends of the capacitor C12 and the resistor R6 are grounded;
the second-stage transistor amplifier circuit has the same structure as the first-stage transistor amplifier circuit, and the output end is commonly connected with one end of an inductor L7 in the second-stage drain bias circuit and one end of a capacitor C7 in the output matching network;
the second stage drain bias circuit includes: resistor R4, capacitor C10, inductor L7; the other end of the inductor L7 is commonly connected with one end of the resistor R4 and one end of the capacitor C10; the other end of the resistor R4 is commonly connected with the other end of the resistor R5 and one end of the power supply V_DC2, the other end of the capacitor C10 is grounded, and the other end of the power supply V_DC2 is grounded;
the output matching network includes: an output port terminal 2, a capacitor C7, an interface Tee3, a microstrip line TL21 and a microstrip line TL24; the capacitor C7, the microstrip line TL21, the interface Tee3 and the output port terminal 2 are sequentially connected, and the microstrip line TL24 is connected with the spare port of the interface Tee 3.
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