CN114442924A - Control method and device of irregular controller - Google Patents
Control method and device of irregular controller Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
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Abstract
The invention discloses a control method and a control device of an irregular controller, wherein the reliability of MRAM storage is enhanced by applying the irregular controller in an MRAM memory, and the influence of the outside on the damage of the MRAM memory controller can be optimized by adopting the irregular controller; the main controller and the auxiliary controller are adopted to monitor and manage the same MRAM storage block together, and the reliability of storage can be improved by using MRAM storage in a severe environment; increasing interaction signals between a main controller and an auxiliary controller stored by an MRAM (magnetic random access memory), sending signals to the auxiliary controller when the main controller executes tasks normally, and judging whether the auxiliary controller needs to assist the work of the main controller or not by the auxiliary controller according to feedback signals of the main controller; by means of logic judgment, if the auxiliary controller does not receive the signal from the main controller for more than three times, the auxiliary controller will be used as the main controller of the MRAM memory block to complete the next work.
Description
Technical Field
The present invention relates to the technical field of irregular controllers, and in particular, to a method and an apparatus for controlling an irregular controller.
Background
The MRAM memory has the advantages of a nonvolatile characteristic, a high read/write speed and the like as a novel memory. Compared with the traditional memory and other novel nonvolatile memories, the memory has the radiation-resistant characteristic. When the memory application is in a strong interference environment, it will resist the radiation condition, and the controller of MRAM is mostly composed of CMOS tube. The controller composed of these CMOS transistors cannot resist radiation well. Meanwhile, Flash storage is punctured by specific interference such as laser, and the storage unit of the MRAM can resist strong interference of the laser. The foregoing illustrates that MRAM has a certain resistance to interference from external sources relative to other memories. However, the controller of the MRAM is composed of CMOS transistors, which is vulnerable to damage to the memory controller caused by external interference.
Generations of MRAM memory cells are made of metallic materials, which effectively help MRAM to resist high radiation, to operate under extreme temperature conditions, and to tamper with internal information. Most of the current large-scale integrated circuits of the controller are Si-based, interference sources are reflected and transmitted when Si is incident from air, and the transmitted light part is absorbed by the Si to generate photoelectric effect and photothermal effect. Causing the memory controller to be affected and not continue to control MRAM memory operations, which results in a two-terminal phenomenon. The problem of irreparable memory control materials requires the addition of irregular memory controller operations. While also considering memory area issues. This requires a measure of the operation of the memory control MRAM memory module and the overall area of the memory chip of the overall MRAM. If the controller is excessively increased, the chip area is directly too large, and the advantages of the MRAM memory chip are reduced.
Disclosure of Invention
The invention aims to provide a control method and a control device of an irregular controller, wherein the main controller and an auxiliary controller are adopted to control the same MRAM memory block, and the irregular controller can optimize the influence of the external damage on the MRAM memory controller.
A control method of an irregular controller, comprising:
the system completes initialization, and the chip is powered on;
the control module sets and outputs different state machines through the register, analyzes and executes the command from the processing module;
the control module comprises a main controller and an auxiliary controller, and the auxiliary controller judges whether the main controller finishes executing the command and sends a signal to the auxiliary controller;
and if the main controller sends a signal to the auxiliary controller, the auxiliary controller continuously monitors the main controller.
Further preferably, the method further comprises: and if the task is overtime and the signal of the main controller is not received, the auxiliary controller directly executes the command.
Further preferably, the method further comprises: and if the main controller cannot work normally, the auxiliary controller directly executes the command.
Further preferably, the method further comprises: and if the command is directly executed by the auxiliary controller for more than three times, the auxiliary controller continuously executes the command and sends a signal to a new auxiliary controller.
As a further preference, the system completes initialization including clearing all of the internal state machine and configuration mode registers and configuration extension registers.
Preferably, the control module transmits the data of the storage module to the storage control module through the sense amplifier and the data processing in sequence and then to the I/O bus.
Preferably, the main controller and the auxiliary controller receive commands of the processing module at the same time, the main controller executes the commands after receiving the commands, and the auxiliary controller is only responsible for receiving the commands but not executing the commands.
The control device of the irregular controller comprises the control method of the irregular controller, and further comprises a control module and a processing module, wherein the control module is used for analyzing and executing commands from the processing module; the control module comprises a main controller and an auxiliary controller:
the main controller is in signal connection with the processing module and is used for receiving the command of the processing module, executing the command and sending a signal to the auxiliary controller after the command is finished;
the auxiliary controller is in signal connection with the processing module and is used for receiving the command of the processing module and the signal of the main controller.
Preferably, the auxiliary controller is further configured to determine whether a signal is received from the main controller:
if the task is overtime and still does not receive the signal of the main controller, the auxiliary controller directly executes the command;
if the main controller can not work normally, the auxiliary controller directly executes the command;
and if the command is directly executed by the auxiliary controller for more than three times, the auxiliary controller continuously executes the command and sends a signal to a new auxiliary controller.
As a further preferred option, the control module further includes a state machine, a configuration mode register, and a configuration extension register, and after the system is initialized, the state machine, the configuration mode register, and the configuration extension register are all cleared; the configuration mode register and the configuration extension register are used for setting and outputting different state machines.
An electronic device, comprising:
a memory and one or more processors;
wherein the memory is communicatively coupled to the one or more processors and stores instructions executable by the one or more processors, and when the instructions are executed by the one or more processors, the electronic device is configured to implement the method of any of the above embodiments.
A computer-readable storage medium having stored thereon computer-executable instructions operable, when executed by a computing device, to implement the method of any of the above embodiments.
A computer program product comprising a computer program stored on a computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, are operable to carry out the method of any of the above embodiments.
The technical scheme has the following advantages or beneficial effects:
the control method and the control device of the irregular controller enhance the reliability of MRAM storage by applying the irregular controller in the MRAM storage, and the irregular controller can optimize the influence of the outside on the damage of the MRAM storage controller; the main controller and the auxiliary controller are adopted to monitor and manage the same MRAM storage block together, and the reliability of storage can be improved by using MRAM storage in a severe environment; increasing interaction signals between a main controller and an auxiliary controller stored by an MRAM (magnetic random access memory), sending signals to the auxiliary controller when the main controller executes tasks normally, and judging whether the auxiliary controller needs to assist the work of the main controller or not by the auxiliary controller according to feedback signals of the main controller; by means of logic judgment, if the auxiliary controller does not receive the signal from the main controller for more than three times, the auxiliary controller will be used as the main controller of the MRAM memory block to complete the next work.
Drawings
FIG. 1 is a flow chart illustrating a control method of an irregular controller according to the present invention;
FIG. 2 is a schematic structural diagram of a control device of an irregular controller according to the present invention;
fig. 3 is a flow chart of the irregular controller monitoring operation of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
MRAM completes the writing work inside MRAM by switching the free layer by a magnetic field or a current. The read operation obtains whether the stored data is 0 or 1 by monitoring the high and low resistance states of the memory cell. The memory cells of MRAM are based on metal materials, which makes MRAM more radiation resistant than conventional memory. The read-write principle of MRAM and the memory cell material make MRAM memory have high reliability and fast read-write capability. This poses a challenge to the reliability of the memory controller.
Referring to fig. 1 and 3, a control method of an irregular controller includes:
the system completes initialization, and the chip is powered on;
the control module sets and outputs different state machines through the register, analyzes the command from the processing module and executes the command;
the control module comprises a main controller and an auxiliary controller, and the auxiliary controller judges whether the main controller finishes executing the command and sends a signal to the auxiliary controller;
if the main controller sends a signal to the auxiliary controller, the auxiliary controller continuously monitors the main controller;
if the task is overtime and still does not receive the signal of the main controller, the auxiliary controller directly executes the command;
if the main controller can not work normally, the auxiliary controller directly executes the command;
and if the command is directly executed by the auxiliary controller for more than three times, the auxiliary controller continuously executes the command and sends a signal to a new auxiliary controller.
The main controller and the auxiliary controller receive CPU instructions at the same time, and the auxiliary controller monitors the task execution condition of the main controller after receiving signals. If the primary controller times out and no feedback is given, the secondary controller will execute the command.
The invention adopts a logic judgment mode, and if the main controller does not execute the post-command signal to the auxiliary controller for more than three times. The MRAM memory chip can confirm that the primary controller is destroyed, and the secondary controller will convert the primary controller to complete the management of the MRAM memory block.
Further, in a preferred embodiment of the control method of an irregular controller according to the present invention, the system completes initialization including clearing all of the internal state machine, the configuration mode register, and the configuration extension register.
Further, in a preferred embodiment of the control method of the irregular controller according to the present invention, the control module sequentially processes data of the memory module through the sense amplifier and the data processing module to the I/O bus, and transmits the data to the memory control module.
Further, in a preferred embodiment of the control method of the irregular controller according to the present invention, the main controller and the auxiliary controller simultaneously receive a command from the processing module, the main controller executes the command after receiving the command, and the auxiliary controller is only responsible for receiving the command but not executing the command.
The invention monitors and manages the same MRAM memory block through the main controller and the auxiliary controller. When the MRAM memory is interfered by interference sources such as external radiation or laser, the MRAM memory cell can effectively resist the damage caused by external environment. However, the memory controller of MRAM is mainly composed of CMOS, which causes the memory controller to be affected and maliciously damaged by external interference sources. The irregular controller of the invention can optimize the damage phenomenon of an external source to the memory.
The invention adopts the main controller and the auxiliary controller to monitor and control the same MRAM storage. The method can optimize the stability problem of MRAM storage, respond to CPU instructions in real time, and avoid losing internal data. An irregular memory controller may enhance the reliability of MRAM storage.
Finishing the storage initialization work of the controller and the MRAM, wherein a stable period of time exists after the chip is electrified, the stable period of time does not receive the command of the controller, and the initialization is controlled to clear all the internal state machine, the configuration mode register and the configuration extension register;
after initialization is completed, each controller needs to confirm the MRAM storage block which is responsible for each controller, since both the CPU and the MRAM storage unit can only execute a single task, the situation that tasks are overlapped does not exist, the controllers are set through internal registers to output different state machines, and the controllers analyze and execute commands from the CPU. The controller processes the data of the storage unit to an I/O bus through the sensitive amplifier and the data in sequence and transmits the data to the storage controller;
in order to prevent the situation that the controller cannot work, the auxiliary controller is adopted to monitor the working situation of the main controller, the main controller and the auxiliary controller can simultaneously receive the command of the CPU, the main controller can execute the command after receiving the command, and the auxiliary controller is only responsible for receiving the command but not executing the command: when the controller completes the command, the controller sends a signal to the auxiliary controller, and the auxiliary controller does not need to give feedback after receiving the signal;
if the task is overtime and still does not receive the command of the main controller, the auxiliary controller directly executes the work;
if the main controller works normally, the auxiliary controller continuously monitors; if the main controller can not work normally, the auxiliary controller can directly execute the work;
if the main controller still does not execute the command to the CPU more than three times, the MRAM memory block in charge of the main controller is charged by the auxiliary controller for the next work, and the auxiliary controller is changed into the main controller by initialization.
Referring to fig. 2, a control apparatus of an irregular controller includes the above control method of an irregular controller, and further includes a control module 1 and a processing module 2, where the control module 1 is configured to parse and execute a command from the processing module 2; the control module 1 comprises a main controller 11 and an auxiliary controller 12:
the main controller 11 is in signal connection with the processing module 2, and is configured to receive a command from the processing module 2, execute the command, and send a signal to the auxiliary controller 12 after the command is completed;
the auxiliary controller 12 is in signal connection with the processing module 2, and is configured to receive the command of the processing module 2 and the signal of the main controller 11, and when the main controller 11 completes the command, the signal is sent to the auxiliary controller 12, and at this time, the auxiliary controller 12 does not need to give feedback after receiving the command. If the task times out and still does not receive the command from the primary controller 11, the secondary controller 12 will directly perform this task. .
Further, in a preferred embodiment of the control device of the irregular controller according to the present invention, the auxiliary controller 12 is further configured to determine whether a signal from the main controller 11 is received:
if the task is overtime and still does not receive the signal of the main controller 11, the auxiliary controller 12 will directly execute the command;
if the main controller 11 cannot work normally, the auxiliary controller 12 will directly execute the command;
if the secondary controller 12 will directly execute the command more than three times, the secondary controller 12 continues to execute the command and sends a signal to the new secondary controller.
Further, in a preferred embodiment of the control device of the irregular controller of the present invention, the control module 1 further includes a state machine, a configuration mode register, and a configuration extension register, and after the system is initialized, all of the state machine, the configuration mode register, and the configuration extension register are cleared; the configuration mode register and the configuration extension register are used for setting and outputting different state machines.
The invention adopts the irregular storage controller to control the MRAM, thereby preventing a certain controller from generating problems. The MRAM memory multi-controller architecture uses the QSPI protocol as the master control protocol. Since the QSPI protocol has multiple IOs, one of which writes, the remaining I/Os can control the read operation of at most three MRAM memory blocks. The present invention controls four or more MRAM memory blocks through such an off-spec controller. The first storage controller, the second storage controller and the third storage controller respectively control one MRAM storage block. And when the main control MRAM storage does not work, performing read-write management on other MRAM storage blocks. The state machine of the memory controller completes the work of receiving commands, analyzing the commands, executing the commands and the like on the operation of the memory array.
The invention controls the same MRAM storage block by applying an irregular MRAM storage controller structure and adopting a main controller and an auxiliary controller. The CPU transmits commands to be executed to the main controller and the auxiliary controller simultaneously. The main controller receives the command and then analyzes and executes the command, and the auxiliary controller only receives the command but does not execute the command. In the process of executing the command by the main controller, the auxiliary controller can confirm whether the current main controller completes the working condition of the command or not through the internal interaction signal of the main/auxiliary controller. If the primary controller receives commands only but does not execute, the primary controller will not transmit signals to the secondary controller. When the secondary controller does not receive a signal from the main controller after time-out, the secondary controller completes a CPU command that the main controller does not execute. If the secondary controller performs more than three operations of the primary controller, the MRAM memory may internally confirm that the primary controller is not in a single abnormal condition but has been corrupted. Because the MRAM is made of metal materials and can resist interference of laser, radiation and the like, the irregular controller adopted by the invention can optimize the influence of the external damage on the MRAM memory controller.
An electronic device, comprising:
a memory and one or more processors;
wherein the memory is communicatively coupled to the one or more processors and has stored therein instructions executable by the one or more processors, the electronic device operable to implement the method as any one of the above when the instructions are executed by the one or more processors.
In particular, the processor and the memory may be connected by a bus or other means, such as by a bus connection. The processor may be a Central Processing Unit (CPU). The Processor may also be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, or a combination thereof.
The memory, as a non-transitory computer readable storage medium, may be used to store non-transitory software programs, non-transitory computer executable programs, and modules, such as the cascaded progressive network in the embodiments of the present application. The processor executes various functional applications and data processing of the processor by executing non-transitory software programs/instructions and functional modules stored in the memory.
The memory may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created by the processor, and the like. Further, the memory may include high speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes memory located remotely from the processor, and such remote memory may be coupled to the processor via a network, such as through a communications interface. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
A computer-readable storage medium having stored thereon computer-executable instructions operable, when executed by a computing device, to implement a method as in any above.
The foregoing computer-readable storage media include physical volatile and nonvolatile, removable and non-removable media implemented in any manner or technology for storage of information such as computer-readable instructions, data structures, program modules or other data. The computer-readable storage medium specifically includes, but is not limited to, a USB flash drive, a removable hard drive, a Read-Only Memory (ROM), a Random Access Memory (RAM), an erasable programmable Read-Only Memory (EPROM), an electrically erasable programmable Read-Only Memory (EEPROM), flash Memory or other solid state Memory technology, a CD-ROM, a Digital Versatile Disk (DVD), an HD-DVD, a Blue-Ray or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer.
While the subject matter described herein is provided in the general context of execution in conjunction with the execution of an operating system and application programs on a computer system, those skilled in the art will recognize that other implementations may also be performed in combination with other types of program modules. Generally, program modules include routines, programs, components, data structures, and other types of structures that perform particular tasks or implement particular abstract data types. Those skilled in the art will appreciate that the subject matter described herein may be practiced with other computer system configurations, including hand-held devices, multiprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers, and the like, as well as distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.
Those of ordinary skill in the art will appreciate that the various illustrative elements and method steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to perform all or part of the steps of the method according to the embodiments of the present application.
In summary, the method and the device for controlling the irregular controller enhance the reliability of the MRAM storage by applying the irregular controller to the MRAM memory, and the irregular controller can optimize the influence of the outside on the damage of the MRAM memory controller; the main controller and the auxiliary controller are adopted to monitor and manage the same MRAM storage block together, and the reliability of storage can be improved by using MRAM storage in a severe environment; increasing interaction signals between a main controller and an auxiliary controller stored by an MRAM (magnetic random access memory), sending signals to the auxiliary controller when the main controller executes tasks normally, and judging whether the auxiliary controller needs to assist the work of the main controller or not by the auxiliary controller according to feedback signals of the main controller; by means of logic judgment, if the auxiliary controller does not receive the signal from the main controller for more than three times, the auxiliary controller will be used as the main controller of the MRAM memory block to complete the next work.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
In the description of the present invention, it is to be understood that the terms "upper", "lower", "front", "rear", and the like, which indicate orientations or positional relationships, are based on the orientations or positional relationships shown in the drawings, are only for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.
Claims (12)
1. A control method of an irregular controller, comprising:
the system completes initialization, and the chip is powered on;
the control module sets and outputs different state machines through the register, analyzes and executes the command from the processing module;
the control module comprises a main controller and an auxiliary controller, and the auxiliary controller judges whether the main controller finishes executing the command and sends a signal to the auxiliary controller;
and if the main controller sends a signal to the auxiliary controller, the auxiliary controller continuously monitors the main controller.
2. The control method of an irregular controller according to claim 1, further comprising: and if the task is overtime and the signal of the main controller is not received, the auxiliary controller directly executes the command.
3. The control method of an irregular controller according to claim 1, further comprising: and if the main controller cannot work normally, the auxiliary controller directly executes the command.
4. A control method of an irregular controller according to claim 2 or claim 3, further comprising: and if the command is directly executed by the auxiliary controller for more than three times, the auxiliary controller continuously executes the command and sends a signal to a new auxiliary controller.
5. The method of claim 1, wherein the system performing initialization comprises clearing all of the internal state machine and configuration mode registers and configuration extension registers.
6. The method as claimed in claim 1, wherein the control module transmits the data of the memory module to the memory control module via the sense amplifier, the data processing module and the I/O bus in sequence.
7. The method as claimed in claim 1, wherein the primary controller and the secondary controller receive commands from the processing module at the same time, the primary controller executes the commands after receiving the commands, and the secondary controller only receives the commands but does not execute the commands.
8. A control device of an irregular controller, comprising the control method of the irregular controller as claimed in claims 1-7, characterized by further comprising a control module (1) and a processing module (2), wherein the control module (1) is used for analyzing and executing the command from the processing module (2); the control module (1) comprises a main controller (11) and an auxiliary controller (12):
the main controller (11) is in signal connection with the processing module (2) and is used for receiving the command of the processing module (2), executing the command and sending a signal to the auxiliary controller (12) after the command is finished;
the auxiliary controller (12) is in signal connection with the processing module (2) and is used for receiving commands of the processing module (2) and signals of the main controller (11).
9. The control device of an irregular controller according to claim 8, wherein the secondary controller (12) is further configured to determine whether a signal is received from the primary controller (11):
if the task is overtime and the signal of the main controller (11) is not received, the auxiliary controller (12) directly executes the command;
if the main controller (11) can not work normally, the auxiliary controller (12) directly executes the command;
if the secondary controller (12) is to directly execute the command more than three times, the secondary controller (12) continues to execute the command and sends a signal to a new secondary controller.
10. The control device of an irregular controller according to claim 8, wherein the control module (1) further comprises a state machine, a configuration mode register and a configuration extension register, and after the system is initialized, the state machine, the configuration mode register and the configuration extension register are all cleared; the configuration mode register and the configuration extension register are used for setting and outputting different state machines.
11. An electronic device, comprising:
a memory and one or more processors;
wherein the memory is communicatively coupled to the one or more processors and has stored therein instructions executable by the one or more processors, the instructions, when executed by the one or more processors, operable by the electronic device to implement the method of any of claims 1-7.
12. A computer-readable storage medium having stored thereon computer-executable instructions operable, when executed by a computing device, to implement the method of any of claims 1-7.
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