CN114363112A - Bus networking system and bus arbitration method - Google Patents
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Abstract
The invention relates to a system structure of bus arbitration, in particular to a bus networking system and a bus arbitration method applicable to a local area network, and discloses the bus networking system and the bus arbitration method.
Description
Technical Field
The present invention relates to a bus arbitration system structure, and more particularly, to a bus networking system and a bus arbitration method for a local area network.
Background
In engineering application, a small local area network is usually formed by networking in a field bus mode, commonly used buses such as an RS-485 bus, a CAN bus and the like have better bus arbitration, so that bus collision CAN be effectively prevented, but the system forming cost is relatively higher, the RS-485 bus is simple in structure and low in cost, but only a master-slave structure system CAN be formed, and the real-time performance and the reliability are poor. And the modern intelligent cell is required to form a field bus system with simple networking protocol, high real-time reliability, long transmission distance and low cost.
Therefore, a solution to the above problem is urgently needed.
Disclosure of Invention
The invention aims to provide a bus networking system and a bus arbitration method, which simplify a networking structure and further reduce networking cost.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a bus networking system adapted for use in a local area network, comprising:
each processor is connected with one driver and is connected with the bus through the driver;
wherein a number of the processors each have a unique native address;
the processors can receive data and transmit data;
when the bus applies, the processor sets the bus acquisition success flag when the data containing the local address information received by the processor is consistent with the sent data containing the local address information.
According to the bus networking system applicable to the local area network, the processor is directly connected with the bus by combining the driver, the processor is set to have a unique local address and CAN receive and send data, and whether the processor CAN successfully acquire the bus or not is achieved by judging whether the received data containing the local address information is consistent with the sent data containing the local address information or not, so that the arrangement of a controller in CAN bus application in the prior art is reduced, the networking structure is simplified, and the reliability is high.
Further, the processor comprises a bus arbitration module, wherein the bus arbitration module is used for receiving the information containing the local address and judging whether the information containing the local address is consistent with the sent information containing the local address.
Further, the bus arbitration module includes:
a data receiving end for receiving data;
the data transmitting end is used for transmitting data.
Further, the processor includes:
the interrupt module is connected with the driver and used for starting interrupt when data is not sent and closing interrupt when the current processor initiates data communication when competing for the bus.
As a preferred aspect of the present invention, there is also provided a bus arbitration method applied to the above-described bus networking system, the bus arbitration method including the steps of:
setting a bus occupation detection mechanism;
the control node occupies the bus according to the bus occupation detection mechanism;
the bus occupation detection mechanism indicates that a node to be sent with data monitors the busy and idle state of a bus firstly, if the bus is not busy, the node occupies the bus and sends the data and sets an interrupt module to be in a closed state, and after the node finishes sending the data and sets the interrupt module to be in an open state, if the bus is busy, the node waits for a preset time and then monitors whether the bus is busy again.
Further, the busy-idle state of the monitoring bus is to detect whether the interrupt end of the interrupt module is turned on, if so, the bus is busy, and if so, the bus is idle.
Furthermore, when a node on the bus applies for the bus to send data, the waiting time is set, and if the waiting time is exceeded, the node fails to apply for the bus.
Further, when the plurality of nodes on the bus transmit data and the node to transmit the data detects that the bus is busy, each node waits for a preset time and then detects whether the bus is busy again.
Furthermore, when a plurality of nodes on the bus send data simultaneously, dividing the local address into a plurality of bytes according to data bits for sending, and when the received data is different from the sent data when each byte is sent, the node fails to compete for the bus; after all bytes are sent, the node with the small address code of the local address occupies the bus.
For a better understanding and practice, the invention is described in detail below with reference to the accompanying drawings.
Drawings
Fig. 1 is a block diagram of the structure of a bus networking system in the present embodiment;
fig. 2 is a block diagram showing the configuration of one node of the bus networking system in the present embodiment, which is composed of a processor and a driver;
FIG. 3 is a flowchart of the steps of a bus arbitration method in the present embodiment;
fig. 4 is a flowchart relating to data transmission in the present embodiment;
fig. 5 is an arbitration flow chart concerning the bus arbitration module in the present embodiment, with regard to data being sent simultaneously by a plurality of nodes.
Detailed Description
In order to better illustrate the invention, the invention is described in further detail below with reference to the accompanying drawings.
It should be understood that the embodiments described are only some embodiments of the present application, and not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without any creative effort belong to the protection scope of the embodiments in the present application.
The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the present application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the application, as detailed in the appended claims. In the description of the present application, it is to be understood that the terms "first," "second," "third," and the like are used solely to distinguish one from another and are not necessarily used to describe a particular order or sequence, nor are they to be construed as indicating or implying relative importance. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
Further, in the description of the present application, "a plurality" means two or more unless otherwise specified. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.
In engineering application, a small local area network is usually formed by networking in a field bus mode, commonly used buses such as an RS-485 bus, a CAN bus and the like have better bus arbitration, so that bus collision CAN be effectively prevented, but the system forming cost is relatively higher, the RS-485 bus is simple in structure and low in cost, but only a master-slave structure system CAN be formed, and the real-time performance and the reliability are poor. And the modern intelligent cell is required to form a field bus system with simple networking protocol, high real-time reliability, long transmission distance and low cost.
Therefore, the technical problem actually solved by the present invention is how to improve on the basis of CAN bus networking to simplify the structure of networking.
As an illustrative example in the present embodiment, as shown in fig. 1, a bus networking system suitable for a local area network includes:
the system comprises a plurality of processors 1, a bus 3 and a plurality of control modules, wherein each processor 1 is connected with a driver 2 and is connected with the bus through the driver;
wherein, a plurality of the processors 1 all have unique local addresses;
a plurality of processors 1 can receive data and transmit data;
when the bus is applied, the processor 1 sets the bus acquisition success flag when the received data containing the local address information is consistent with the sent data containing the local address information.
In this embodiment, the processor is a processor having a universal asynchronous serial communication interface, for example, a microprocessor of AT89S51 series, the processor is directly connected to a CAN bus driver unit, the driver is used for driving a CAN bus, for example, the driver is a driver unit based on PCA82C250, a data receiving end and a data sending end of the processor are connected to the bus through the driver, so as to form a connection structure similar to the CAN bus, and the connection mode with the CAN bus is different in that the use of a controller is reduced, so that the networking structure is simplified.
In the bus networking system applicable to the local area network in the embodiment, the processor 1 is directly connected with the bus 3 by combining the driver, the processor 1 is set to have a unique local address and CAN receive and send data, and whether the processor 1 CAN successfully acquire the bus is realized by judging whether the received data containing the local address information is consistent with the sent data containing the local address information or not, so that the setting of a controller in the CAN bus application in the prior art is reduced, the networking structure is simplified, and the reliability is high.
In this embodiment, as shown in fig. 2, the processor 1 includes a bus arbitration module 11, and the bus arbitration module 11 is configured to receive the information containing the local address and determine whether the information is consistent with the sent information containing the local address.
The bus arbitration is completed by a bus arbitration module 11, after the bus networking system is completed, the bus networking system allocates a local address for each processor, the local addresses are independent and unique, each processor is connected with a corresponding driver to form a node, namely, the bus networking system allocates a local address for each node, the address of the node is transmitted when the bus is applied, when the received data is consistent with the transmitted data, namely, the data transmitted on the bus is not conflicted, meanwhile, the node occupies the bus, and then the node transmits other data according to the protocol requirement of an upper module of the node.
In addition, the bus arbitration module 11 comprises
A data receiving end 111 for receiving data;
a data sender 112, configured to send data.
The bus arbitration module is matched with the driver to form a bus interface circuit similar to a CAN bus.
In this embodiment, as shown in fig. 2, the processor includes:
an interrupt module 12, wherein the interrupt module 12 is connected to the driver 2, and the interrupt module 12 is configured to turn on an interrupt when no data is transmitted and turn off the interrupt when a data communication is initiated when a current processor contends for a bus.
Setting the bus acquisition success flag as described above means that when a node occupies the bus, the interrupt end 121 of the interrupt module corresponding to the node turns off the interrupt.
As an illustrative example of the present embodiment, as shown in fig. 3, there is also provided a bus arbitration method applied in the bus networking system as described above, the bus arbitration method including the steps of:
step S1: setting a bus occupation detection mechanism;
step S2: the control node occupies the bus according to the bus occupation detection mechanism;
the bus occupation detection mechanism indicates that a node to be sent with data monitors the busy and idle state of a bus firstly, if the bus is not busy, the node occupies the bus and sends the data and sets an interrupt module to be in a closed state, and after the node finishes sending the data and sets the interrupt module to be in an open state, if the bus is busy, the node waits for a preset time and then monitors whether the bus is busy again.
The interrupt end of the interrupt module is connected with the data receiving end of the processor or the bus arbitration module, the bus arbitration module judges the busy/idle state of the bus by judging the level state of the interrupt end of the interrupt module, when the interrupt end is detected to be low level, the bus is indicated as a mark for setting the bus busy, and when the bus is in the idle state, the bus is idle, and the interrupt end of the interrupt module is at high level.
In summary, the node starts the interrupt when no data is sent, and contends for the bus and initiates the data communication type interrupt at the current node.
The busy and idle state of the monitoring bus is to detect whether the interrupt end of the interrupt module is opened, if the interrupt end is in the open state, the bus is busy, and if the interrupt end is in the closed state, the bus is idle.
And under the condition that the interrupt of the interrupt module is started, after waiting for a certain time for anti-shake confirmation low level, confirming that the bus is occupied, and setting a bus busy mark by the corresponding processor.
The purpose of determining the anti-jitter is to avoid the influence on the reliability of data transmission caused by misjudgment due to level fluctuation.
First, the waiting timer in the present embodiment is described as a prior art, which is a delay element that functions to trigger at a certain time point or trigger at intervals.
As shown in fig. 4, when a node on the bus applies for the bus to send data, a waiting time is set, and if the waiting time is exceeded, the node fails to apply for the bus.
When the bus is busy, a waiting timer is set in the judgment program, the timing time is set according to the requirements of different upper-layer communication protocols, and if the waiting time is exceeded, the node applies for the bus to fail.
Whether the bus occupied by the node is successful or not is judged by the bus arbitration module subsequently, if the bus of the node is successfully acquired, other data are sent according to the protocol requirement of the upper layer module of the node
As shown in fig. 5, when a plurality of nodes on a bus send data, and a node to send the data detects that the bus is busy, each node waits for a preset time and then detects whether the bus is busy again.
On the other hand, when a plurality of nodes on the bus send data simultaneously, the local address is divided into a plurality of bytes according to data bits to be sent, and when the received data is different from the sent data when each byte is sent, the node fails to compete for the bus; after all bytes are sent, the node with the small address code of the local address occupies the bus.
If a plurality of nodes contend for the bus, the starting time of sending the address of the node is basically consistent, which inevitably causes that the received data is different from the sent data, and the sending conflicts. For example, the local address is divided into 8 bytes according to bits and sent, starting from the highest bit, 0FFH is sent if 1, and 00H is sent if 0;
setting the priority of different nodes to obtain bus, receiving bus data at the same time, when the bus is received and transmitted differently, the bus is failed in competition, automatically quitting competition, after finishing transmitting 8 bytes, the node with high priority obtains bus, and occupies bus, setting the successful bus obtaining mark, and transmitting other data according to the upper protocol requirement.
For example, as shown in fig. 5, when the bus data is received simultaneously, if the data bit of the local address ADDR is 1, the byte 0FFH is transmitted, and if the data bit is 0, the byte 00H is transmitted, and after it is determined whether the data bits are equal to each other, if they are not equal to each other, the node exits from the bus contention, and if they are equal to each other, the node acquires the bus.
Variations and modifications to the above-described embodiments may occur to those skilled in the art, which fall within the scope and spirit of the above description. Therefore, the present invention is not limited to the specific embodiments disclosed and described above, and some modifications and variations of the present invention should fall within the scope of the claims of the present invention. Furthermore, although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.
Claims (9)
1. A bus networking system adapted for use in a local area network, comprising:
each processor is connected with one driver and is connected with the bus through the driver; and is
The driver is used for driving the bus to work;
wherein a number of the processors each have a unique native address;
the processors can receive data and transmit data;
when the bus applies, the processor sets the bus acquisition success flag when the data containing the local address information received by the processor is consistent with the sent data containing the local address information.
2. The bus networking system of claim 1, wherein the processor comprises:
and the bus arbitration module is used for receiving the data containing the local address information and judging whether the data is consistent with the sent data containing the local address information.
3. The bus networking system of claim 2, wherein the bus arbitration module comprises:
a data receiving end for receiving data;
the data transmitting end is used for transmitting data.
4. The bus networking system of claim 1, wherein the processor comprises:
the interrupt module is connected with the driver and used for starting interrupt when data is not sent and closing interrupt when the current processor competes for the bus to initiate data communication.
5. A bus arbitration method applied to the bus networking system according to any one of claims 1 to 4, characterized by comprising the steps of:
setting a bus occupation detection mechanism;
the control node occupies the bus according to the bus occupation detection mechanism;
the bus occupation detection mechanism indicates that a node to be sent with data monitors the busy and idle state of a bus firstly, if the bus is not busy, the node occupies the bus and sends the data and sets an interrupt module to be in a closed state, and after the node finishes sending the data and sets the interrupt module to be in an open state, if the bus is busy, the node waits for a preset time and then monitors whether the bus is busy again.
6. The method of claim 5, wherein the busy-idle status of the snoop bus is:
detecting whether an interrupt end of an interrupt module is started;
if the state is the opening state, the bus is busy;
if the status is off, the bus is idle.
7. The bus arbitration method of claim 5, wherein: when a node on the bus applies for the bus to send data, the waiting time is set, and if the waiting time is exceeded, the node fails to apply for the bus.
8. The bus arbitration method of claim 5, wherein: when a plurality of nodes on the bus send data, and the nodes sending the data detect that the bus is busy, each node waits for a preset time respectively and then detects whether the bus is busy again.
9. The bus arbitration method of claim 5, wherein: when a plurality of nodes on a bus send data simultaneously, dividing a local address into a plurality of bytes according to data bits and sending the bytes;
when the received data is different from the sent data every time a byte is sent, the node fails to compete for the bus;
after all bytes are sent, the node with the small address code of the local address occupies the bus.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210275895.4A CN114363112A (en) | 2022-03-21 | 2022-03-21 | Bus networking system and bus arbitration method |
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| CN202210275895.4A CN114363112A (en) | 2022-03-21 | 2022-03-21 | Bus networking system and bus arbitration method |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101645897A (en) * | 2009-09-07 | 2010-02-10 | 中兴通讯股份有限公司 | Method and system for realizing competitive mechanism |
| CN102411550A (en) * | 2011-08-24 | 2012-04-11 | 四川九洲电器集团有限责任公司 | I2C bus controlled device based apparatus and method |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101645897A (en) * | 2009-09-07 | 2010-02-10 | 中兴通讯股份有限公司 | Method and system for realizing competitive mechanism |
| CN102411550A (en) * | 2011-08-24 | 2012-04-11 | 四川九洲电器集团有限责任公司 | I2C bus controlled device based apparatus and method |
Non-Patent Citations (1)
| Title |
|---|
| 李谦: "基于485总线的高速多主从模式总线节点设计与实现", 《科技视界》 * |
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Application publication date: 20220415 |