CN114361262B - Schottky diode with deep groove and production method thereof - Google Patents
Schottky diode with deep groove and production method thereof Download PDFInfo
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- CN114361262B CN114361262B CN202111664477.6A CN202111664477A CN114361262B CN 114361262 B CN114361262 B CN 114361262B CN 202111664477 A CN202111664477 A CN 202111664477A CN 114361262 B CN114361262 B CN 114361262B
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Abstract
The invention provides a Schottky diode with deep grooves and a production method thereof, wherein the Schottky diode comprises cathode metal, a silicon substrate arranged at the upper end of the cathode metal, a silicon epitaxial layer arranged at the upper end of the silicon substrate, anode metal arranged at the upper end of the silicon epitaxial layer and a silicon dioxide protective layer, the silicon epitaxial layer comprises at least two silicon wafers which are sequentially stacked from top to bottom, a plurality of grooves are formed in the silicon epitaxial layer, the depth of each groove is not less than 20 mu m, polycrystalline silicon is filled in each groove, and the polycrystalline silicon is connected to the lower end of the anode metal. The Schottky diode and the production method thereof can manufacture the groove with the depth not less than 20 mu m and greatly improve the reverse voltage blocking capability of the Schottky diode.
Description
Technical Field
The invention relates to the technical field of Schottky diodes, in particular to a Schottky diode with a deep groove and a production method thereof.
Background
Schottky diodes are named by their inventor schottky doctor and are generally referred to as planar schottky barrier diodes. Since the generation of planar schottky diodes, attention has been drawn. The planar Schottky diode has excellent high-frequency characteristics and lower forward starting voltage, and the unique properties enable the planar Schottky diode to have greater application potential in a plurality of fields such as solar batteries, switching power supplies, automobiles, mobile phones and the like. However, under reverse bias, the effect of the mirror force to lower the potential barrier results in the disadvantage of poor blocking capability of the planar schottky diode.
The groove type Schottky diode is invented on the basis of a plane type diode by utilizing the MOS effect of metal-semiconductor-silicon. The method is mainly characterized in that the grooves are pinched off in advance through the MOS effect along with the rise of reverse voltage, the electric field strength is reduced to zero before reaching the silicon surface, the surface breakdown is avoided, and the blocking capability is improved. In addition, compared with a planar diode, the planar diode has other incomparable advantages, which are mainly shown in that the ESD and surge current resistance is enhanced, the chip area is smaller, and under the same substrate and metal conditions, the reverse leakage current is lower, Vf is lower, and the like.
At present, the following problems are ubiquitous in trench schottky diodes: firstly, as shown in fig. 1, due to the limitation of the etching process, the depth of the groove is generally not higher than 15um, so that the reverse voltage blocking capability of the groove is insufficient; secondly, as shown in fig. 2, since the etching process is performed from top to bottom on the silicon epitaxial layer, the depth of the trench is limited by the width of the trench, if the depth of the trench needs to be increased, the width of the trench needs to be increased to 7-10 um, however, the trench is too wide, the active region is sacrificed, and the forward characteristic of the trench schottky diode is affected; and thirdly, if the conventional etching process is adopted for groove etching, the depth of the groove reaches 20um, and the section structure of the formed groove is a truncated cone-shaped structure with a large upper part and a small lower part as shown in fig. 3 and is not a standard cylindrical structure, and the structure also has the problem that the forward characteristic of the groove type Schottky diode is influenced by too wide groove.
Disclosure of Invention
In view of the above problems, the present invention provides a schottky diode with a deep trench and a method for manufacturing the schottky diode, which can manufacture a trench with a depth of not less than 20 μm and greatly improve the reverse voltage blocking capability of the schottky diode.
In order to achieve the purpose, the invention is solved by the following technical scheme:
a Schottky diode with deep grooves comprises cathode metal, a silicon substrate arranged at the upper end of the cathode metal, a silicon epitaxial layer arranged at the upper end of the silicon substrate, anode metal arranged at the upper end of the silicon epitaxial layer and a silicon dioxide protective layer, wherein the silicon epitaxial layer comprises at least two silicon wafers which are sequentially stacked from top to bottom, a plurality of grooves are formed in the silicon epitaxial layer, the depth of each groove is not lower than 20 mu m, polycrystalline silicon is filled in the grooves, and the polycrystalline silicon is connected to the lower end of the anode metal.
Specifically, the width of the groove is 0.3-0.5 μm.
Specifically, a P-type guard ring is further formed at the upper end of the silicon epitaxial layer, and the P-type guard ring is located below the edge of the anode metal.
Specifically, the silicon epitaxial layer is formed by sequentially growing and laminating a plurality of silicon wafers, each silicon wafer is etched to form a plurality of sub-grooves, and each groove is formed by a plurality of sub-grooves on the same vertical line.
Specifically, the trenches are distributed in a rectangular array in the silicon epitaxial layer.
Specifically, the bottom of the groove is of a round bottom structure.
A production method of a Schottky diode comprises the following steps:
s1, preparing materials: preparing a silicon substrate;
s2, manufacturing a silicon epitaxial layer: growing a first layer of silicon wafer on a silicon substrate, growing a masking layer on the upper end of the first layer of silicon wafer, forming sub-grooves after photoetching and etching, filling polycrystalline silicon in the sub-grooves, removing the masking layer, and finishing the manufacture of the rest silicon wafer, the sub-grooves and the polycrystalline silicon on the first layer of silicon wafer according to the number of the silicon wafers and the steps;
s3, manufacturing a silicon dioxide protective layer: growing a silicon dioxide protective layer on the upper end of the silicon epitaxial layer, and etching to remove the middle part of the silicon dioxide protective layer so as to form a hollow groove in the middle part of the silicon dioxide protective layer;
s4 preparation of cathode metal and anode metal: and depositing a layer of anode metal in the hollow groove, and depositing a layer of cathode metal at the lower end of the silicon substrate.
Specifically, after step S3 is completed, boron needs to be diffused into the upper end of the silicon epitaxial layer, so that a P-type guard ring is formed below the edge of the anode metal.
The invention has the beneficial effects that:
according to the Schottky diode with the deep groove and the production method thereof, silicon wafers are manufactured in a layered mode, the grooves are etched and filled with polycrystalline silicon, after a plurality of silicon wafers are stacked, the depth of the groove formed by combining the grooves is not less than 20 micrometers, so that the depth of the groove is prolonged, drift electrons in a reverse drift region can be effectively depleted by utilizing the conductive polycrystalline silicon filled in the groove, an electric field of the drift region is uniformly distributed, and the reverse voltage blocking capability of the Schottky diode is improved to a large extent.
Drawings
Fig. 1 is a schematic structural diagram of a first trench schottky diode in the prior art.
Fig. 2 is a schematic structural diagram of a second trench schottky diode in the prior art.
Fig. 3 is a schematic structural diagram of a third trench schottky diode in the prior art.
Fig. 4 is a first structural diagram of the schottky diode of embodiment 1.
Fig. 5 is a second schematic structural diagram of the schottky diode of embodiment 1.
Fig. 6 is a production flow chart of the schottky diode of example 1.
The reference signs are: cathode metal 1, silicon substrate 2, silicon epitaxial layer 3, silicon wafer 31, sub-groove 311, trench 32, polysilicon 33, anode metal 4, silicon dioxide protective layer 5 and P-type guard ring 6.
Detailed Description
The present invention will be described in further detail with reference to examples and drawings, but the embodiments of the present invention are not limited thereto.
Example 1
As shown in fig. 4-5:
a Schottky diode with a deep groove comprises a cathode metal 1, a silicon substrate 2 arranged at the upper end of the cathode metal 1, a silicon epitaxial layer 3 arranged at the upper end of the silicon substrate 2, an anode metal 4 arranged at the upper end of the silicon epitaxial layer 3 and a silicon dioxide protective layer 5, wherein the silicon epitaxial layer 3 comprises three silicon wafers 31 which are sequentially stacked from top to bottom, a plurality of grooves 32 are formed in the silicon epitaxial layer 3, the depth of each groove 32 is not lower than 20 mu m, polycrystalline silicon 33 is filled in each groove 32, and the polycrystalline silicon 33 is connected to the lower end of the anode metal 4.
Preferably, the width of the trench 32 is 0.3-0.5 μm, the width of the trench 32 is small, the occupation of the trench 32 is reduced, the area proportion of an active region in the silicon epitaxial layer 3 is reduced, and the influence of the trench 32 on the forward conduction of the schottky diode is reduced.
Preferably, a P-type guard ring 6 is further formed on the upper end of the silicon epitaxial layer 3, and the P-type guard ring 6 is located below the edge of the anode metal 4.
Preferably, the silicon epitaxial layer 3 is formed by sequentially growing and laminating three silicon wafers 31, each silicon wafer 31 is etched to form a plurality of sub-grooves 311, and each groove 32 is formed by a plurality of sub-grooves 311 on the same vertical line.
Preferably, trenches 32 are distributed in a rectangular array within silicon epitaxial layer 3.
Preferably, the bottom of the trench 32 is a rounded bottom structure, and the breakdown voltage of the rounded bottom trench 32 can be improved compared with that of the conventional right-angle trench TMBS device while maintaining the same leakage current and forward on-state voltage.
As shown in fig. 6:
a production method of a Schottky diode comprises the following steps:
s1, preparing materials: preparing a silicon substrate 2;
s2 manufacturing silicon epitaxial layer 3: growing a first layer of silicon wafer 31 on a silicon substrate 2, growing a masking layer on the upper end of the first layer of silicon wafer 31, forming a sub-slot 311 after photoetching and etching, filling polycrystalline silicon 33 in the sub-slot 311, removing the masking layer, growing a second layer of silicon wafer 31 on the first layer of silicon wafer 31, growing the masking layer on the upper end of the second layer of silicon wafer 31, forming the sub-slot 311 after photoetching and etching, filling polycrystalline silicon 33 in the sub-slot 311, removing the masking layer, growing a third layer of silicon wafer 31 on the second layer of silicon wafer 31, growing the masking layer on the upper end of the third layer of silicon wafer 31, forming the sub-slot 311 after photoetching and etching, filling polycrystalline silicon 33 in the sub-slot 311, removing the masking layer, forming a silicon epitaxial layer 3 after stacking the three layers of silicon wafers 31, forming a slot 32 together with the sub-slots 311 on the same vertical line, wherein the depth of the slot 32 is not less than 20 μm, the depth of the slot 32 is prolonged, and the conductive polycrystalline silicon 33 filled in the slot 32 is utilized, drift electrons in the reverse drift region can be effectively exhausted, the electric field of the drift region is uniformly distributed, and the reverse voltage blocking capability of the Schottky diode is improved to a greater extent;
s3 manufacturing a silicon dioxide protective layer 5: growing a silicon dioxide protective layer 5 on the upper end of the silicon epitaxial layer 3, etching to remove the middle part of the silicon dioxide protective layer 5, forming a hollow groove in the middle part of the silicon dioxide protective layer 5, and diffusing boron on the upper end of the silicon epitaxial layer 3 to form a P-type guard ring 6 below the edge of the anode metal 4;
s4, cathode metal 1 and anode metal 4: and depositing a layer of anode metal 4 in the hollow groove, and depositing a layer of cathode metal 1 at the lower end of the silicon substrate 2.
The above examples only show 1 embodiment of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (5)
1. The Schottky diode with the deep groove is characterized by comprising a cathode metal (1), a silicon substrate (2) arranged at the upper end of the cathode metal (1), a silicon epitaxial layer (3) arranged at the upper end of the silicon substrate (2), an anode metal (4) arranged at the upper end of the silicon epitaxial layer (3) and a silicon dioxide protective layer (5), wherein the silicon epitaxial layer (3) comprises at least two silicon wafers (31) which are sequentially stacked from top to bottom, a plurality of grooves (32) are formed in the silicon epitaxial layer (3), the depth of each groove (32) is not less than 20 mu m, polycrystalline silicon (33) is filled in each groove (32), and the polycrystalline silicon (33) is connected to the lower end of the anode metal (4);
the width of the groove (32) is 0.3-0.5 mu m;
a P-type guard ring (6) is further formed at the upper end of the silicon epitaxial layer (3), and the P-type guard ring (6) is located below the edge of the anode metal (4);
the silicon epitaxial layer (3) is formed by sequentially growing and laminating a plurality of silicon wafers (31), each silicon wafer (31) forms a plurality of sub-grooves (311) after being etched, and each groove (32) is formed by a plurality of sub-grooves (311) on the same vertical line.
2. Schottky diode with deep trenches according to claim 1, characterized in that the trenches (32) are distributed in a rectangular array within the epitaxial layer (3) of silicon.
3. Schottky diode with deep trench according to claim 1, characterized in that the bottom of the trench (32) is a round bottom structure.
4. A method of producing a schottky diode according to any of claims 1 to 3, comprising the steps of:
s1, preparing materials: preparing a silicon substrate (2);
s2 production of silicon epitaxial layer (3): growing a first layer of silicon wafer (31) on a silicon substrate (2), growing a masking layer on the upper end of the first layer of silicon wafer (31), forming a sub-groove (311) after photoetching and etching, filling polycrystalline silicon (33) in the sub-groove (311), removing the masking layer, and finishing the manufacture of the rest silicon wafer (31), the sub-groove (311) and the polycrystalline silicon (33) on the first layer of silicon wafer (31) according to the number of the silicon wafers (31) and the steps;
s3 production of silica protective layer (5): growing a silicon dioxide protective layer (5) on the upper end of the silicon epitaxial layer (3), and etching to remove the middle part of the silicon dioxide protective layer (5) so as to form a hollow groove in the middle part of the silicon dioxide protective layer (5);
s4 production of cathode metal (1) and anode metal (4): and depositing a layer of anode metal (4) in the hollow groove, and depositing a layer of cathode metal (1) at the lower end of the silicon substrate (2).
5. The method of claim 4 for producing the schottky diode as described in any one of claims 1 to 3, wherein after the step S3, it is further required to diffuse boron into the upper end of the silicon epitaxial layer (3) to form the P-type guard ring (6) under the edge of the anode metal (4).
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005142335A (en) * | 2003-11-06 | 2005-06-02 | Fuji Electric Holdings Co Ltd | Method of manufacturing semiconductor element |
| CN106298975A (en) * | 2015-05-29 | 2017-01-04 | 北大方正集团有限公司 | A kind of Schottky diode and manufacture method |
| CN106463546A (en) * | 2014-05-12 | 2017-02-22 | 罗姆股份有限公司 | Semiconductor device and semiconductor device manufacturing method |
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| US7285433B2 (en) * | 2003-11-06 | 2007-10-23 | General Electric Company | Integrated devices with optical and electrical isolation and method for making |
| DE102007004320A1 (en) * | 2007-01-29 | 2008-07-31 | Infineon Technologies Ag | Semiconductor component i.e. metal oxide semiconductor transistor, has dielectric layer arranged between drift zone and drift control zone, where drift zone includes varying doping and/or varying material composition based on dielectric |
| JP4670915B2 (en) * | 2008-08-08 | 2011-04-13 | ソニー株式会社 | Semiconductor device |
| US8551867B2 (en) * | 2010-12-30 | 2013-10-08 | Suzhou Silikron Semicoductor Co., Ltd | Mesa edge shielding trench Schottky rectifier and method of manufacture thereof |
| US9327965B2 (en) * | 2013-03-15 | 2016-05-03 | Versana Micro Inc | Transportation device having a monolithically integrated multi-sensor device on a semiconductor substrate and method therefor |
| CN104779293B (en) * | 2015-04-17 | 2018-06-19 | 上海华虹宏力半导体制造有限公司 | The manufacturing method of groove-shaped super-junction device |
| US10304971B2 (en) * | 2016-07-16 | 2019-05-28 | Champion Microelectronic Corp. | High speed Schottky rectifier |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2005142335A (en) * | 2003-11-06 | 2005-06-02 | Fuji Electric Holdings Co Ltd | Method of manufacturing semiconductor element |
| CN106463546A (en) * | 2014-05-12 | 2017-02-22 | 罗姆股份有限公司 | Semiconductor device and semiconductor device manufacturing method |
| CN106298975A (en) * | 2015-05-29 | 2017-01-04 | 北大方正集团有限公司 | A kind of Schottky diode and manufacture method |
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