CN114296642A

CN114296642A - Method for processing TRIM instruction in solid state disk and solid state disk

Info

Publication number: CN114296642A
Application number: CN202111534497.1A
Authority: CN
Inventors: 朱千叶; 方解; 李佳威; 陈长春; 李国超
Original assignee: Hefei Datang Storage Technology Co ltd
Current assignee: Hefei Datang Storage Technology Co ltd
Priority date: 2021-12-15
Filing date: 2021-12-15
Publication date: 2022-04-08

Abstract

The embodiment of the application discloses a method for processing a TRIM instruction in a solid state disk and the solid state disk. The method comprises the following steps: receiving a TRIM instruction to be executed; taking a TRIM instruction to be executed as data to be written, and writing the data to be written into the NAND of the solid state disk; the TRIM instructions in the NAND are executed in write order.

Description

Method for processing TRIM instruction in solid state disk and solid state disk

Technical Field

The embodiment of the application relates to the field of data storage, and in particular relates to a method for processing a TRIM instruction in a solid state disk and the solid state disk.

Background

Solid State Disks (SSD), also called Solid State drives, are hard disks made of an array of Solid State electronic memory chips. SSDs store data in NAND and hold data in fixed-size pages (called pages), and organize and arrange the pages in blocks. The SSD can perform read and write operations on pages separately, but delete erase data can only be operated in units of blocks, and cannot perform erase on a single page. The SSD needs to delete erase to the data in the block first, and then can write the new data into the page; that is, since overwriting cannot be performed in the same storage space, if an operating system deletes a certain file, it is necessary to erase the data in the SSD, so that the TRIM technique is applied,

the TRIM instruction is a technical instruction belonging to the ATA8-ACS specification that functions to allow the operating system to notify the SSD of the extent of invalid data. The generation background of the TRIM instruction is related to the characteristics of NAND stored data in the SSD, the operating system sends the TRIM instruction to the SSD to tell the SSD which data need to be erased and the range of the data, the operating system can do other things afterwards, and the SSD erases the data according to the TRIM instruction, so that the operating system and the SSD can operate in parallel, and the overall performance of the system is improved.

In practical applications, how to respond to the TRIM instruction timely and accurately is a very important problem, and a corresponding solution is urgently needed to be proposed.

Disclosure of Invention

In order to solve any technical problem, an embodiment of the present application provides a method for processing a TRIM instruction in a solid state disk and the solid state disk.

To achieve the purpose of the embodiment of the present application, an embodiment of the present application provides a method for processing a TRIM instruction in a solid state disk, including:

receiving a TRIM instruction to be executed;

taking a TRIM instruction to be executed as data to be written, and writing the data to be written into the NAND of the solid state disk;

the TRIM instructions in the NAND are executed in write order.

A storage medium having a computer program stored therein, wherein the computer program is arranged to perform the method as described above when executed.

An electronic device comprising a memory having a computer program stored therein and a processor arranged to execute the computer program to perform the method as described above.

A solid state disk is provided with the electronic device.

One of the above technical solutions has the following advantages or beneficial effects:

the TRIM instruction requested to be executed by the host is written into the NAND as the data requested to be stored, so that the probability of TRIM instruction loss caused by abnormal power failure is reduced, the TRIM instruction information can be executed in the power-on reconstruction process, the write-in amplification rate is reduced, and the product performance is improved.

Additional features and advantages of the embodiments of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the embodiments of the application. The objectives and other advantages of the embodiments of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

The accompanying drawings are included to provide a further understanding of the embodiments of the present application and are incorporated in and constitute a part of this specification, illustrate embodiments of the present application and together with the examples of the embodiments of the present application do not constitute a limitation of the embodiments of the present application.

Fig. 1 is a flowchart of a processing method of a TRIM instruction in a solid state disk according to an embodiment of the present disclosure;

FIG. 2 is a schematic diagram of data storage in NAND according to an embodiment of the present application;

FIG. 3 is a flowchart of a method for storing a TRIM instruction according to an embodiment of the present disclosure;

FIG. 4 is a flowchart illustrating a method for reconstructing a TRIM instruction according to an embodiment of the present disclosure;

FIG. 5 is a diagram of a table for determining the last written L2P in a NAND according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application more apparent, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. It should be noted that, in the embodiments of the present application, features in the embodiments and the examples may be arbitrarily combined with each other without conflict.

In the process of implementing the present application, the inventor conducts technical analysis on the related art, and finds that the related art has at least the following problems, including:

if the SSD is abnormally powered down and a TRIM instruction is not executed before the abnormal power down, and after the SSD is powered up again, the part of the TRIM instruction is not restored and executed, the data range included in the TRIM instruction in the SSD is not marked as invalid data, so that erase cannot be performed, and the storage space is reduced. Therefore, how to store the information of the TRIM instruction is to be solved urgently under the condition that the power is supplied again after the abnormal power failure.

Based on the above analysis, the embodiments of the present application provide the following solutions, including:

fig. 1 is a flowchart of a processing method of a TRIM instruction in a solid state disk according to an embodiment of the present disclosure. As shown in fig. 1, the method includes:

step 101, receiving a TRIM instruction to be executed;

step 102, taking a TRIM instruction to be executed as data to be written, and writing the data to be written into a NAND of the solid state disk;

step 103, the TRIM instructions in the NAND are executed according to the writing sequence.

In the above process, the TRIM instruction is written into the NAND as data, so that the probability of TRIM instruction loss caused by abnormal power failure is reduced, and the TRIM instruction information can be executed in the process of power-on reconstruction, thereby reducing the write-in amplification rate in the process of performing a large amount of garbage recovery actions and improving the product performance.

According to the method provided by the embodiment of the application, the TRIM instruction requested to be executed by the host is written into the NAND as the data requested to be stored, so that the probability of TRIM instruction loss caused by abnormal power failure is reduced, the TRIM instruction information can be executed in the power-on reconstruction process, the write-in amplification rate is reduced, and the product performance is improved.

The method provided by the embodiments of the present application is explained as follows:

in one exemplary embodiment, the executing TRIM instructions in NAND in write order includes:

periodically updating an address mapping table of the NAND;

reading a TRIM instruction in the NAND according to the updated address mapping table;

executing a TRIM instruction in the NAND.

The address mapping table L2P of the NAND records a correspondence table of logical addresses and physical addresses in the NAND. The TRIM instruction is written into the NAND as data, reading and executing of the TRIM instruction can be completed according to the NAND in the address mapping table, the TRIM instruction can be timely and accurately executed, the write-in amplification rate is reduced in GC operation execution, and product performance is improved.

The L2P table in the FTL algorithm records the physical position of data in the NAND, and after the abnormal power failure is electrified again, how to quickly find the data in the abnormal power failure in the reconstruction process and store the physical position in the NAND is important, and how to find the position, the L2P table in which the written data is recorded is the basis for solving the problem.

In an exemplary embodiment, if the TRIM instruction to be executed in the updated address mapping table is successfully written into the NAND of the solid state disk, the updated address mapping table is written into the NAND.

The NAND address mapping table can be periodically written into the NAND, and the TRIM instruction stored in the NAND can be recorded in time.

Through the method, the TRIM instruction to be executed can be determined according to the address mapping table in the NAND, and when abnormal power failure occurs, the TRIM instruction can be restored based on the address mapping table.

In one exemplary embodiment, the method further comprises:

after abnormal power failure occurs, in the solid state disk initialization process, acquiring an address mapping table written in the NAND for the last time to obtain a target mapping table;

restoring the TRIM instruction stored in the NAND according to the address information in the target mapping table;

and processing the TRIM instruction obtained by the restoration operation.

The last written address mapping table in the NAND is a stable and latest address mapping table, the data in the NAND determined according to the address information in the address mapping table is also stable data, the last written address mapping table in the NAND is used as a target mapping table, the TRIM instruction which is written successfully last in the NAND is determined according to the address information in the target mapping table, the response is carried out on the TRIM instruction which is written successfully last, the occurrence of TRIM instruction loss in the abnormal power failure process in the prior art is reduced, and the normal processing of the TRIM instruction under the abnormal power failure condition is ensured.

In one exemplary embodiment, the determination of the TRIM instruction stored in the NAND comprises:

determining a target address for storing a TRIM instruction in the NAND from address information of a target mapping table;

and reading the data stored in the target address to obtain the TRIM instruction stored in the NAND.

The target address is obtained by determining which physical addresses stored in the NAND in the target mapping table are TRIM instructions, and then the data of the target address is read to obtain the TRIM instruction to be executed, so that the obtaining efficiency of the TRIM instruction is improved.

In an exemplary embodiment, the check field of each piece of data in the NAND records tag information of the piece of data, wherein the tag information is used for indicating whether the type of the data is a TRIM instruction;

the determining the target address of the NAND storing the TRIM instruction from the address information of the target mapping table includes:

determining a physical address corresponding to each logical address in a target mapping table;

acquiring a check domain of each data corresponding to each physical address;

and obtaining a target address for storing the TRIM instruction in the NAND according to the tag information in the check field of each piece of data.

The data format of each piece of data in the NAND comprises a data field and a check field, wherein the data field is used for storing data to be written, and the check field is usually used for storing check information of the data to be written. The check domain is expanded and used, and whether the data type of the data to be written is the TRIM instruction or not is recorded, so that the TRIM instruction can be determined according to the tag information of the check domain, and the identification efficiency of the TRIM instruction is improved.

FIG. 2 is a schematic diagram of data storage in NAND according to an embodiment of the present disclosure. As shown in fig. 2, each piece of data in the NAND includes a data field and a parity field, and the TRIM command is written as data and host write data together, and only the parity field is marked differently, so that the sequence of the write data is ensured and any TRIM information is not lost.

Fig. 3 is a flowchart of a method for storing a TRIM instruction according to an embodiment of the present disclosure. As shown in fig. 3, the method is applied in an environment where the SSD normally operates, and the method includes:

step 301, performing write operation on data issued by a host, wherein the data comprises data to be stored and a TRIM instruction to be executed;

wherein, the TRIM instruction comprises N groups lca set needing invalidation;

the TRIM instruction is stored into a page of the NAND as data, and is recorded as TRIM in the tag information of the check field; for data to be stored, recording the data in the tag information of the check field as data;

step 302, writing a TRIM instruction into a page of the NAND according to the instruction sequence of the host;

step 303, judging whether the TRIM instruction to be executed is successfully written into the NAND;

if the write is successful, go to step 304; otherwise, proceed to step 303.

If abnormal power failure occurs, only part of data in one TRIM instruction is written, and the L2P table has corresponding address information, the TRIM instruction to be executed is not written successfully, and the complete data of the TRIM instruction is not written, the data of the TRIM instruction is unstable data, and the unstable data can be discarded after being powered on again.

Step 304, update L2P table and write updated L2P table information into NAND.

According to the method provided by the embodiment of the application, the TRIM instruction is stored in the NAND as the data to be written, and the storage position of the TRIM instruction is recorded by using the L2P table, so that the physical position of the TRIM data in the NAND can be conveniently and quickly found in the starting process after abnormal power failure.

Fig. 4 is a flowchart of a method for reconstructing a TRIM instruction according to an embodiment of the present disclosure. As shown in fig. 4, the method is applied in an environment where the SSD is started after abnormal power down, and the method includes:

step 401: after power-on, a root module of the system block is initialized;

the system block stores root information and configuration information, abnormal power failure or normal power on and off is reconstructed, and the information is used in the initialization process of the FW so as to quickly find the L2P table.

Step 402: load the L2P table of the last write;

in step 403, the following operations are sequentially performed on each logical address entry in the L2P table, including:

step 4031, determine the physical address of the NAND corresponding to each logical address;

step 4032, page data corresponding to the physical address is found in the NAND;

4033, judging whether the page data is a TRIM instruction or not according to the label information of the page data;

the page data with the tag of the data _ tag is not a TRIM instruction, and the page data with the tag of the TRIM _ tag is a TRIM instruction;

if yes, returning to the step 4031 to scan the next logical address in the L2P table;

if yes, go to step 4034;

step 4034, the TRIM instruction is executed, and after the TRIM is executed, the process also returns to step 4031, 1 to scan the next logical address in the L2P table.

And so on until the last logical address of the L2P table is scanned.

The method provided by the embodiment of the application is based on the last write-in L2P table processing, the TRIM instruction is rapidly restored to the state before the abnormal power failure after the abnormal power failure is electrified again, and the TRIM instruction information is guaranteed to be executed, so that the write-in amplification rate is reduced in the process of carrying out a large amount of garbage recycling actions, and the performance is improved.

FIG. 5 is a diagram of a table for determining the last written L2P in a NAND according to an embodiment of the present application. As shown in fig. 5, there are root, load pb, list VB and other modules in the system block of the SSD, and these modules will record root information and some configuration information, during the initialization process, the FW version is started according to the root module, during the FW start, the list VB module is loaded according to the relevant algorithm in the load pb module, and there is a field VB list in the list VB module, wherein the queue data structure head in the list VB module stores the last L2P table in the program process, and the recorded data in the L2P table are all stored in the page of the NAND.

It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.

Claims

1. A method for processing a TRIM instruction in a solid state disk is characterized by comprising the following steps:

receiving a TRIM instruction to be executed;

the TRIM instructions in the NAND are executed in write order.

2. The method of claim 1, wherein executing the TRIM instructions in NAND in write order comprises:

periodically updating an address mapping table of the NAND;

executing a TRIM instruction in the NAND.

3. The method of claim 2,

and if the TRIM instruction to be executed in the updated address mapping table is successfully written into the NAND of the solid state disk, writing the updated address mapping table into the NAND.

4. The method of claim 3, further comprising:

and processing the TRIM instruction obtained by the restoration operation.

5. The method as claimed in claim 4, wherein the restoring the TRIM instruction stored in the NAND according to the address information in the target mapping table comprises:

6. The method of claim 5, wherein:

the check field of each piece of data in the NAND records the tag information of the piece of data, wherein the tag information is used for indicating whether the type of the data is a TRIM instruction;

acquiring a check domain of each data corresponding to each physical address;

7. A storage medium, in which a computer program is stored, wherein the computer program is arranged to perform the method of any of claims 1 to 6 when executed.

8. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, and wherein the processor is arranged to execute the computer program to perform the method of any of claims 1 to 6.

9. A solid state disk, characterized in that an electronic device according to claim 8 is provided.