CN114153560A - Virtual interrupt processing method, device, equipment and medium - Google Patents
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Abstract
The application relates to a virtual interrupt processing method, a device, equipment and a medium, wherein when a waiting state list does not contain a to-be-processed virtual interrupt request in an inactivated state, a first to-be-replaced virtual interrupt request with the lowest priority in a plurality of to-be-processed virtual interrupt requests is determined, and when the priority of a target virtual interrupt request is higher than that of the first to-be-replaced virtual interrupt request, the first to-be-replaced virtual interrupt request is replaced by the target virtual interrupt request, so that the target virtual interrupt request with the higher priority is prevented from waiting outside the waiting state list for a long time, the delay of high-priority virtual interrupt can be shortened, the response efficiency of the high-priority virtual interrupt is improved, and the overall real-time performance and reliability of a system are improved.
Description
Technical Field
The present invention relates to the field of data processing, and in particular, to a method, an apparatus, a device, and a medium for virtual interrupt processing.
Background
A virtual interrupt is an interrupt mechanism that implements an interrupt using a time-division data bus, i.e., an interrupt signal is handled in a message-passing manner through the data bus on a time-sharing basis. For product functions implemented using virtual interrupt technology, a virtual interrupt mechanism needs to be utilized to support the processing of virtual interrupt requests. In the related art, a waiting state list may be set, and when a new virtual interrupt request is received, the new virtual interrupt request is stored in a storable position of the waiting state list, and if the waiting state list is full, the new virtual interrupt request is queued, and after one virtual interrupt request in the waiting state list is processed, the queued virtual interrupt request is stored in the waiting state list, which causes a delay in processing of virtual interrupt requests outside the waiting state list, and affects the real-time performance and reliability of the entire system.
Disclosure of Invention
In order to solve the above technical problems, the present invention provides a method, an apparatus, a device, and a medium for virtual interrupt processing, which can reduce the processing delay of part of virtual interrupt requests, and greatly improve the real-time performance and reliability of the whole system.
In order to achieve the object of the above application, the present application provides a virtual interrupt processing method, including:
responding to a target virtual interrupt request, and acquiring a waiting state list and states of a plurality of virtual interrupt requests to be processed in the waiting state list;
when the waiting state list does not contain the to-be-processed virtual interrupt requests in the inactivated state, determining a first to-be-replaced virtual interrupt request with the lowest priority in the plurality of to-be-processed virtual interrupt requests;
replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request.
In one possible implementation, before replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request, the method further includes:
acquiring a target identity and a target service scene of the target virtual interrupt request, and a first interrupt mapping table, wherein the first interrupt mapping table represents the corresponding relation between the identity and the priority of the virtual interrupt request under different service scenes;
and determining the priority corresponding to the target virtual interrupt request from the first interrupt mapping table according to the target identity and the target service scene.
In one possible implementation, before replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request, the method further includes:
acquiring a target identity of the target virtual interrupt request and a second interrupt mapping table, wherein the second interrupt mapping table represents the corresponding relation between the identity of the virtual interrupt request and the priority;
and determining the priority of the corresponding target virtual interrupt request from the second interrupt mapping table according to the target identity.
In one possible implementation, the method further includes:
processing the virtual interrupt request to be processed in the waiting state list;
changing the state of the pending virtual interrupt requests processed in the wait state list to an inactive state.
In one possible implementation, the method further includes:
when the waiting state list comprises a to-be-processed virtual interrupt request in an inactivated state, determining a second to-be-replaced virtual interrupt request based on the to-be-processed virtual interrupt request in the inactivated state;
replacing the second to-be-replaced virtual interrupt request with the target virtual interrupt request.
In one possible implementation manner, the determining a first to-be-replaced virtual interrupt request with a lowest priority among the plurality of to-be-processed virtual interrupt requests includes:
determining a virtual interrupt request to be processed with the lowest priority according to the priority of the virtual interrupt request to be processed in the waiting state list;
when the number of the to-be-processed virtual interrupt requests with the lowest priority is at least two, selecting one to-be-processed virtual interrupt request from the at least two to-be-processed virtual interrupt requests with the lowest priority as the first to-be-replaced virtual interrupt request.
In one possible implementation, the replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request includes:
determining a target location of the first to-be-replaced virtual interrupt request in the wait state list;
deleting the first to-be-replaced virtual interrupt request in the waiting state list;
writing the target virtual interrupt request to the target location in the wait state list.
In one possible implementation, before replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request, the method further includes:
and storing the first virtual interrupt request to be replaced in a memory.
In one possible implementation, the method further includes:
and when the priority of the target virtual interrupt request is lower than that of the first to-be-replaced virtual interrupt request, storing the target virtual interrupt request into a memory.
Another aspect of the present application further provides a virtual interrupt processing apparatus, including:
a waiting state list obtaining module, configured to respond to a target virtual interrupt request, and obtain a waiting state list and states of multiple to-be-processed virtual interrupt requests in the waiting state list;
a to-be-replaced virtual interrupt request determining module, configured to determine, when the to-be-processed virtual interrupt request in an inactive state is not included in the waiting state list, a to-be-replaced virtual interrupt request with a lowest priority among the multiple to-be-processed virtual interrupt requests;
a replacement module, configured to replace the virtual interrupt request to be replaced with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the virtual interrupt request to be replaced.
Another aspect of the present application also provides an electronic device, including:
a processor;
a memory for storing the processor-executable instructions;
wherein the processor is configured to execute the instructions to implement the virtual interrupt processing method described above.
Another aspect of the present application also provides a computer-readable storage medium, wherein when the instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the virtual interrupt processing method described above.
The application has the following beneficial effects:
according to the method and the device, when the waiting state list does not contain the to-be-processed virtual interrupt requests in the inactivated state, the first to-be-replaced virtual interrupt request with the lowest priority in the plurality of to-be-processed virtual interrupt requests is determined, and when the priority of the target virtual interrupt request is higher than that of the first to-be-replaced virtual interrupt request, the first to-be-replaced virtual interrupt request is replaced by the target virtual interrupt request, so that the target virtual interrupt request with the higher priority is prevented from waiting outside the waiting state list for a long time, the time delay of high-priority virtual interrupt can be shortened, the response efficiency of high-priority virtual interrupt is improved, and the real-time performance of the whole system is improved.
Drawings
In order to more clearly illustrate the technical solutions of the present application, the drawings needed for the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic diagram of a virtual interrupt processing application scenario provided in an embodiment of the present application;
fig. 2 is a flowchart of a virtual interrupt processing method according to an embodiment of the present application;
fig. 3 is a flowchart of a method for determining a priority corresponding to a target virtual interrupt request according to an embodiment of the present disclosure;
FIG. 4 is a flowchart illustrating a method for determining a priority corresponding to a target virtual interrupt request according to another embodiment of the present disclosure;
fig. 5 is a flowchart of a virtual interrupt processing method according to another embodiment of the present application;
fig. 6 is a flowchart of a virtual interrupt processing method according to another embodiment of the present application;
fig. 7 is a flowchart of a method for determining a first to-be-replaced virtual interrupt request according to an embodiment of the present application;
fig. 8 is a flowchart of a method for replacing a first to-be-replaced virtual interrupt request according to an embodiment of the present application;
FIG. 9 is a flowchart of a virtual interrupt processing method according to another embodiment of the present application;
fig. 10 is a flowchart of a virtual interrupt processing method according to another embodiment of the present application;
fig. 11 is a schematic structural diagram of a virtual interrupt processing apparatus according to an embodiment of the present disclosure;
fig. 12 is a block diagram of an electronic device for virtual interrupt handling according to an embodiment of the present application.
Detailed Description
In order to make those skilled in the art better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or server that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In order to implement the technical solution of the present application, so that more engineering workers can easily understand and apply the present application, the working principle of the present application will be further described with reference to specific embodiments.
The application can be applied to the field of data processing. Referring to fig. 1, fig. 1 is an application scenario diagram of a virtual Interrupt Processing method according to an embodiment of the present application, and as shown in fig. 1, the application scenario may at least include a GIC (general Interrupt Controller) 1, a virtual machine monitor 2, a vPE (virtual Processing Element) 3, an IAR (instruction access Register) 4, a List Register (LR) 5, and a virtual machine system 6. The GIC1 may include a physical CPU interface 11, a virtual control module 12, and a virtual CPU interface 13. The physical CPU interface 11 receives an external physical interrupt request, and sends the physical interrupt request to the virtual machine monitor 2. Virtual machine monitor 2 obtains the identity and priority of the physical interrupt request from IAR4 and forwards the physical interrupt request to the currently running vPE 3. The virtual CPU interface 13 of the GIC1 is connected to the LR 5. The virtual machine monitor 2 may write the virtual interrupt request associated with the physical interrupt request into the corresponding memory space of the LR5 by using the virtual interrupt processing method in the present application. Specifically, after the virtual machine monitor 2 writes the virtual interrupt request associated with the physical interrupt request into the corresponding storage space of the LR5, the vPE3 determines, through the virtual CPU interface 13, the virtual interrupt request that needs to be currently processed from the LR5, and the virtual control module 12 sends the virtual interrupt request to the virtual machine system 6 through the virtual CPU interface 13. And the virtual interrupt request in LR5 is processed by virtual machine system 6.
In addition, it should be noted that fig. 1 shows only one application scenario provided by the present disclosure, and in practical applications, other application scenarios may also be included, for example, more virtual machine systems may be included.
It should be noted that the following figures show a possible sequence of steps, and in fact do not limit the order that must be followed. Some steps may be performed in parallel without being dependent on each other. User information (including but not limited to user device information, user personal information, user behavior information, etc.) and data (including but not limited to data for presentation, training, etc.) to which the present disclosure relates are both information and data that are authorized by the user or sufficiently authorized by various parties.
Fig. 2 is a flowchart illustrating a virtual interrupt handling method according to an example embodiment, which may be applied to a virtual machine monitor, as shown in fig. 2, including the steps of:
in step S201, in response to a target virtual interrupt request, a wait state list and states of a plurality of pending virtual interrupt requests in the wait state list are acquired.
In this embodiment of the present specification, the target virtual interrupt request may refer to a virtual interrupt request corresponding to a physical interrupt request received by a physical CPU interface. The wait state list includes a plurality of pending virtual interrupt requests, and the wait state list is stored in the LR. The state of the virtual interrupt request to be processed comprises an activated state and an inactivated state, the state of the virtual interrupt request to be processed which is not processed by the virtual machine system is the activated state, and the state of the processed virtual interrupt request to be processed is the inactivated state.
In step S202, when the pending virtual interrupt request in the inactive state is not included in the wait state list, a first pending virtual interrupt request having a lowest priority among the plurality of pending virtual interrupt requests is determined.
In this embodiment of the present specification, a plurality of to-be-processed virtual interrupt requests may be prioritized according to importance levels, and the more important to-be-processed virtual interrupt requests have higher priorities. For example, in the case of automatic driving, the priority of the pending virtual interrupt request with respect to automatic driving control is higher than the priority of the pending virtual interrupt request with respect to entertainment control. When the waiting state list does not contain the to-be-processed virtual interrupt requests in the inactivated state, the fact that all the to-be-processed virtual interrupt requests in the waiting state list are to-be-processed virtual interrupts which are not processed by the virtual machine system is represented. The priority of each to-be-processed virtual interrupt request in the waiting state list is obtained, and a first to-be-replaced virtual interrupt request with the lowest priority is determined based on the priority of each to-be-processed virtual interrupt request.
In step S203, the first to-be-replaced virtual interrupt request is replaced with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request.
In this embodiment of the present description, the priority of the target virtual interrupt request may be obtained first, and the priority of the target virtual interrupt request may be compared with the priority of the first to-be-replaced virtual interrupt request. And if the comparison result shows that the priority of the target virtual interrupt request is higher than that of the first to-be-replaced virtual interrupt request, replacing the first to-be-replaced virtual interrupt request by using the target virtual interrupt request.
By obtaining a wait state list and states of a plurality of pending virtual interrupt requests in the wait state list in response to a target virtual interrupt request, when the pending virtual interrupt in the inactive state is not included in the wait state list, determining a first pending virtual interrupt request having a lowest priority among the plurality of pending virtual interrupt requests, when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request, replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request to replace the virtual interrupt request with the lowest priority in the waiting state list with the virtual interrupt request with the high priority outside the waiting state list, the delay of the high-priority virtual interrupt request outside the waiting state list can be shortened, and the response rate of the high-priority virtual interrupt request is improved, so that the real-time performance of the whole system is improved.
In an exemplary embodiment, in consideration of the influence of different service scenarios on the same virtual interrupt request, as shown in fig. 3, when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request, before replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request, the method may further include:
in step S301, a target id and a target service scenario of the target virtual interrupt request, and a first interrupt mapping table are obtained.
In this embodiment of the present description, the first interrupt mapping table represents a correspondence between an identity and a priority of a virtual interrupt request in different service scenarios. For example, the identifier of the virtual interrupt request related to player control in the vehicle is 111, the identifier of the virtual interrupt request related to sunroof control is 222, the service scenario 1 is a reverse scenario, the service scenario 2 is a scenario of a vehicle braking state, and the structure of the first interrupt mapping table may be as shown in table 1:
TABLE 1
The priorities in table 1 become higher in order from 3 to 1. In the service scene 1, in response to the virtual interrupt request with the identity identifier of 111, the player can perform a reverse collision avoidance alarm; in service scenario 2, in response to the virtual interrupt request with the identity identifier 111, the player may play music; in service scenarios 1 and 2, the skylights can be opened and closed in response to the virtual interrupt request with the id 222. According to different service scenes, the corresponding relation between the identity and the priority of the virtual interrupt request is established, the priority of the virtual interrupt request can be reasonably set, and the overall safety of the system is improved.
In step S302, a priority corresponding to the target virtual interrupt request is determined from the first interrupt mapping table according to the target identity and the target service scenario.
By acquiring the target identity and the target service scene of the target virtual interrupt request and the first interrupt mapping table, and determining the priority corresponding to the target virtual interrupt request from the first interrupt mapping table according to the target identity and the target service scene, the accuracy of priority determination can be improved for the target virtual interrupt request, and the overall safety of the system can be improved.
In an exemplary embodiment, for a virtual interrupt request with a priority that is not different in different service scenarios, in view of processing efficiency, as shown in fig. 4, when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request, before replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request, the method may further include:
in step S401, a target id of the target virtual interrupt request and a second interrupt mapping table are obtained.
In this embodiment of the present specification, the second interrupt mapping table represents a correspondence between an identity and a priority of the virtual interrupt request. The structure of the second interrupt mapping table may be as shown in table 2:
TABLE 2
| Virtual interrupt request identity | Priority level |
| 111 | 1 |
| 222 | 2 |
| 333 | 3 |
| 444 | 4 |
The priority in table 2 becomes higher in order from 4 to 1, that is, the priority of the virtual interrupt request 444, the virtual interrupt request 333, the virtual interrupt request 222, and the virtual interrupt request 111 becomes higher in order.
In step S402, the priority of the corresponding target virtual interrupt request is determined from the second interrupt mapping table according to the target id.
In this embodiment of the present specification, the identity and the priority of the virtual interrupt request in the second interrupt mapping table have a corresponding relationship, and the priority of the target virtual interrupt request may be determined according to the target identity.
By acquiring the target identity of the target virtual interrupt request and the second interrupt mapping table and determining the priority of the corresponding target virtual interrupt request from the second interrupt mapping table according to the target identity, the priority of the target virtual interrupt request can be quickly determined, the processing efficiency of priority determination is improved, and the response speed of the whole system is improved.
In an exemplary embodiment, as shown in fig. 5, the method may further include:
in step S501, the pending virtual interrupt request in the pending status list is processed.
In this embodiment, the processing order of the virtual interrupt requests to be processed in the wait state list may be determined by the virtual machine system. In practical application, the virtual machine system can process the to-be-processed virtual interrupt request with higher priority preferentially.
In step S502, the status of the pending virtual interrupt request processed in the wait status list is changed to an inactive status.
In this embodiment, for a processed pending virtual interrupt request, the state may be changed to an inactive state.
By processing the virtual interrupt request to be processed in the waiting state list, the state of the virtual interrupt request to be processed in the waiting state list is changed into an inactivated state, and whether the virtual interrupt request to be processed is processed or not can be reflected in time.
In an exemplary embodiment, as shown in fig. 6, the method may further include:
in step S601, when the pending virtual interrupt request in the inactive state is included in the wait state list, a second to-be-replaced virtual interrupt request is determined based on the pending virtual interrupt request in the inactive state.
In this embodiment, the pending virtual interrupt request in the inactive state in the wait state list may be at least one. And when one to-be-processed virtual interrupt request in the inactivated state is available, taking the to-be-processed virtual interrupt request in the inactivated state as a second to-be-replaced virtual interrupt request. When the number of the to-be-processed virtual interrupt requests in the inactivated state is at least two, randomly determining one of the to-be-processed virtual interrupt requests in the inactivated state as a second to-be-replaced virtual interrupt request, or determining the lowest priority of the to-be-processed virtual interrupt requests as the second to-be-replaced virtual interrupt request.
In step S602, the second to-be-replaced virtual interrupt request is replaced with the target virtual interrupt request.
In this embodiment of this specification, the second to-be-replaced virtual interrupt request may be deleted from the wait state list, and then the target virtual interrupt request may be written into a corresponding position of the second to-be-replaced virtual interrupt request in the wait state list.
When the waiting state list contains the to-be-processed virtual interrupt request in the inactivated state, the target virtual interrupt request is used for replacing the to-be-processed virtual interrupt request in the inactivated state, and the overall response speed of the system can be improved.
In an exemplary embodiment, as shown in fig. 7, determining a first pending virtual interrupt request of the plurality of pending virtual interrupt requests having a lowest priority may include:
in step S701, a pending virtual interrupt request with the lowest priority is determined according to the priority of the pending virtual interrupt requests in the wait state list.
In this embodiment of the present specification, the priorities of the to-be-processed virtual interrupt requests in the waiting state list may be sorted, the lowest priority of the to-be-processed virtual interrupt requests in the waiting state list is determined according to the sorting, and the to-be-processed virtual interrupt request corresponding to the lowest priority in the waiting state list is determined.
In step S702, when there are at least two pending virtual interrupt requests with the lowest priority, one pending virtual interrupt request is selected from the at least two pending virtual interrupt requests with the lowest priority as a first pending virtual interrupt request.
In this embodiment of the present specification, when there are at least two to-be-processed virtual interrupt requests with the lowest priority, one to-be-processed virtual interrupt request may be randomly selected from the at least two to-be-processed virtual interrupt requests with the lowest priority as the first to-be-replaced virtual interrupt request, or one to-be-processed virtual interrupt request may be selected from the at least two to-be-processed virtual interrupt requests with the lowest priority as the first to-be-replaced virtual interrupt request according to the time when the to-be-processed virtual interrupt request is added to the wait state list. Specifically, when the time for adding the to-be-processed virtual interrupt request into the waiting state list is selected, the adding time may be sorted, and the to-be-processed virtual interrupt request with the latest adding time and the lowest priority is used as the first to-be-replaced virtual interrupt request.
The method comprises the steps of determining a to-be-processed virtual interrupt request with the lowest priority according to the priorities of the to-be-processed virtual interrupt requests in a waiting state list, and when the to-be-processed virtual interrupt request with the lowest priority is at least two, selecting one to-be-processed virtual interrupt request from the at least two to-be-processed virtual interrupt requests with the lowest priority as a first to-be-replaced virtual interrupt request, so that the first to-be-replaced virtual interrupt request can be determined when the number of the to-be-processed virtual interrupt requests with the lowest priority is not unique.
In an exemplary embodiment, as shown in FIG. 8, replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request may include:
in step S801, a target position of the first to-be-replaced virtual interrupt request in the wait state list is determined.
In this embodiment of the present specification, the target position in the wait state list refers to a position from a data head to a data tail of data corresponding to the first to-be-replaced virtual interrupt request. In practical applications, the target position of the first to-be-replaced virtual interrupt request in the waiting status list may be determined by a specific address of the first to-be-replaced virtual interrupt in the register.
In step S802, the first to-be-replaced virtual interrupt request in the wait state list is deleted.
In this embodiment of the present specification, after determining that the first to-be-replaced virtual interrupt request is at the target position in the wait state list, the data at the target position may be deleted, so as to delete the first to-be-replaced virtual interrupt request in the wait state list.
In step S803, the target virtual interrupt request is written to the target position in the wait state list.
In this embodiment of the present specification, a start address of the first to-be-replaced virtual interrupt in the register may be determined, and the target virtual interrupt request is written from the start address, so that the target virtual interrupt request is written to a target position in the wait state list.
Insertion of the target virtual interrupt request in the wait state list may be accomplished quickly by determining a target location of the first to-be-replaced virtual interrupt request in the wait state list, deleting the first to-be-replaced virtual interrupt request in the wait state list, and writing the target virtual interrupt request to the target location in the wait state list.
In an exemplary embodiment, as shown in fig. 9, before replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request, the method may further include:
in step S901, the first to-be-replaced virtual interrupt request is stored in the memory.
By determining the first to-be-replaced virtual interrupt request, storing the first to-be-replaced virtual interrupt request in the memory, and replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request, the execution sequence of the first to-be-replaced virtual interrupt request can be arranged behind the to-be-processed virtual interrupt requests in the waiting state list, so that the validity of the first to-be-replaced virtual interrupt request is ensured.
In an exemplary embodiment, as shown in fig. 10, the method may further include:
in step S1001, when the priority of the target virtual interrupt request is lower than the priority of the first to-be-replaced virtual interrupt request, the target virtual interrupt request is stored in the memory.
By storing the target virtual interrupt request with the priority lower than that of the first replacement virtual interrupt request into the memory, the target virtual interrupt request with the lower priority can be queued outside the waiting state list, the response speed of the to-be-processed virtual interrupt request with the high priority is ensured, and the overall real-time performance of the system is improved.
In another aspect, the present application further provides an embodiment of a virtual interrupt processing apparatus, as shown in fig. 11, the apparatus 1100 may include:
a waiting status list obtaining module 1101, configured to, in response to a target virtual interrupt request, obtain a waiting status list and statuses of multiple to-be-processed virtual interrupt requests in the waiting status list;
a to-be-replaced virtual interrupt request determining module 1102, configured to determine, when the to-be-processed virtual interrupt request in the inactive state is not included in the waiting state list, a first to-be-replaced virtual interrupt request with a lowest priority among the multiple to-be-processed virtual interrupt requests;
a replacing module 1103, configured to replace the virtual interrupt request to be replaced with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the virtual interrupt request to be replaced.
In an exemplary embodiment, the apparatus may further include:
the system comprises a first data acquisition module, a first interrupt mapping table and a second data acquisition module, wherein the first data acquisition module is used for acquiring a target identity and a target service scene of a target virtual interrupt request, and the first interrupt mapping table represents the corresponding relation between the identity and the priority of the virtual interrupt request under different service scenes;
and the first priority determining module is used for determining the priority corresponding to the target virtual interrupt request from the first interrupt mapping table according to the target identity and the target service scene.
In an exemplary embodiment, the apparatus may further include:
the second data acquisition module is used for acquiring a target identity of the target virtual interrupt request and a second interrupt mapping table, and the second interrupt mapping table represents the corresponding relation between the identity of the virtual interrupt request and the priority;
and the second priority determining module is used for determining the priority of the corresponding target virtual interrupt request from the second interrupt mapping table according to the target identity.
In an exemplary embodiment, the apparatus may further include:
and the request processing module is used for processing the virtual medium-short term you to be processed in the waiting state list.
And the state changing module is used for changing the state of the to-be-processed virtual interrupt request processed in the waiting state list into an inactivated state.
In an exemplary embodiment, the apparatus may further include:
and the second to-be-replaced virtual interrupt request determining module is used for determining a second to-be-replaced virtual interrupt request based on the to-be-processed virtual interrupt request in the inactivated state when the waiting state list contains the to-be-processed virtual interrupt request in the inactivated state.
A second replacement module to replace the second virtual interrupt request to be replaced with the target virtual interrupt request.
In an exemplary embodiment, the to-be-replaced virtual interrupt request determining module may include:
a to-be-replaced virtual interrupt request determining unit, configured to determine, according to the priority of the to-be-processed virtual interrupt request in the wait state list, a to-be-processed virtual interrupt request with the lowest priority;
and the first to-be-replaced virtual interrupt request determining unit is used for selecting one to-be-processed virtual interrupt request from the at least two to-be-processed virtual interrupt requests with the lowest priority as the first to-be-replaced virtual interrupt request when the number of the to-be-processed virtual interrupt requests with the lowest priority is at least two.
In an exemplary embodiment, the replacement module may include:
a target position determining unit, configured to determine a target position of the first to-be-replaced virtual interrupt request in the waiting status list;
a deleting unit, configured to delete the first to-be-replaced virtual interrupt request in the wait state list;
and the writing unit is used for writing the target virtual interrupt request to a target position in the waiting state list.
In an exemplary embodiment, the apparatus may further include:
the first storage module is used for storing the first to-be-replaced virtual interrupt into the memory.
In an exemplary embodiment, the apparatus may further include:
and the second storage module is used for storing the target virtual interrupt request into the memory when the priority of the target virtual interrupt request is lower than that of the first to-be-replaced virtual interrupt request.
Fig. 12 is a block diagram illustrating an electronic device for virtual interrupt handling, which may be a terminal, according to an example embodiment, and an internal structure thereof may be as shown in fig. 12. The electronic device comprises a processor, a memory, a network interface, a display screen and an input device which are connected through a system bus. Wherein the processor of the electronic device is configured to provide computing and control capabilities. The memory of the electronic equipment comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the electronic device is used for connecting and communicating with an external terminal through a network. The computer program is executed by a processor to implement a method of virtual interrupt handling. The display screen of the electronic equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the electronic equipment can be a touch layer covered on the display screen, a key, a track ball or a touch pad arranged on the shell of the electronic equipment, an external keyboard, a touch pad or a mouse and the like.
Those skilled in the art will appreciate that the architecture shown in fig. 12 is merely a block diagram of some of the structures associated with the disclosed aspects and does not constitute a limitation on the electronic devices to which the disclosed aspects apply, as a particular electronic device may include more or less components than those shown, or combine certain components, or have a different arrangement of components.
Fig. 12 is a block diagram illustrating an electronic device for virtual interrupt handling, which may be a server, according to an example embodiment, and an internal structure thereof may be as shown in fig. 12. The electronic device includes a processor, a memory, and a network interface connected by a system bus. Wherein the processor of the electronic device is configured to provide computing and control capabilities. The memory of the electronic equipment comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the electronic device is used for connecting and communicating with an external terminal through a network. The computer program is executed by a processor to implement a method of virtual interrupt handling.
Those skilled in the art will appreciate that the architecture shown in fig. 12 is merely a block diagram of some of the structures associated with the disclosed aspects and does not constitute a limitation on the electronic devices to which the disclosed aspects apply, as a particular electronic device may include more or less components than those shown, or combine certain components, or have a different arrangement of components.
In an exemplary embodiment, there is also provided a computer-readable storage medium in which instructions, when executed by a processor of an electronic device, enable the electronic device to perform a virtual interrupt processing method in an embodiment of the present disclosure. The computer readable storage medium may be a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.
In an exemplary embodiment, there is also provided a computer program product containing instructions which, when run on a computer, cause the computer to perform the virtual interrupt handling method in the embodiments of the present disclosure.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
In the description provided herein, numerous specific details are set forth. It is understood, however, that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be interpreted as reflecting an intention that: that the invention as claimed requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
Those skilled in the art will appreciate that the modules in the device in an embodiment may be adaptively changed and disposed in one or more devices different from the embodiment. The modules or units or components of the embodiments may be combined into one module or unit or component, and furthermore they may be divided into a plurality of sub-modules or sub-units or sub-components. All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where at least some of such features and/or processes or elements are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that although embodiments described herein include some features included in other embodiments, not other features, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, in the claims of the present invention, any of the claimed embodiments may be used in any combination.
The present invention may also be embodied as apparatus or system programs (e.g., computer programs and computer program products) for performing a portion or all of the methods described herein. Such programs implementing the present invention may be stored on computer-readable media or may be in the form of one or more signals. Such a signal may be downloaded from an internet website, provided on a carrier signal, or provided in any other form.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps or the like not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several systems, several of these systems may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering and these words may be interpreted as names.
Claims (12)
1. A virtual interrupt processing method, the method comprising:
responding to a target virtual interrupt request, and acquiring a waiting state list and states of a plurality of virtual interrupt requests to be processed in the waiting state list;
when the waiting state list does not contain the to-be-processed virtual interrupt requests in the inactivated state, determining a first to-be-replaced virtual interrupt request with the lowest priority in the plurality of to-be-processed virtual interrupt requests;
replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request.
2. The method as recited in claim 1, wherein before replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request, the method further comprises:
acquiring a target identity and a target service scene of the target virtual interrupt request, and a first interrupt mapping table, wherein the first interrupt mapping table represents the corresponding relation between the identity and the priority of the virtual interrupt request under different service scenes;
and determining the priority corresponding to the target virtual interrupt request from the first interrupt mapping table according to the target identity and the target service scene.
3. The method as recited in claim 1, wherein before replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request, the method further comprises:
acquiring a target identity of the target virtual interrupt request and a second interrupt mapping table, wherein the second interrupt mapping table represents the corresponding relation between the identity of the virtual interrupt request and the priority;
and determining the priority of the corresponding target virtual interrupt request from the second interrupt mapping table according to the target identity.
4. The method of claim 1, further comprising:
processing the virtual interrupt request to be processed in the waiting state list;
changing the state of the pending virtual interrupt requests processed in the wait state list to an inactive state.
5. The method of claim 1, further comprising:
when the waiting state list comprises a to-be-processed virtual interrupt request in an inactivated state, determining a second to-be-replaced virtual interrupt request based on the to-be-processed virtual interrupt request in the inactivated state;
replacing the second to-be-replaced virtual interrupt request with the target virtual interrupt request.
6. The method of claim 1, wherein the determining a first pending virtual interrupt request of the plurality of pending virtual interrupt requests having a lowest priority comprises:
determining a virtual interrupt request to be processed with the lowest priority according to the priority of the virtual interrupt request to be processed in the waiting state list;
when the number of the to-be-processed virtual interrupt requests with the lowest priority is at least two, selecting one to-be-processed virtual interrupt request from the at least two to-be-processed virtual interrupt requests with the lowest priority as the first to-be-replaced virtual interrupt request.
7. The method of claim 1, wherein replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request comprises:
determining a target location of the first to-be-replaced virtual interrupt request in the wait state list;
deleting the first to-be-replaced virtual interrupt request in the waiting state list;
writing the target virtual interrupt request to the target location in the wait state list.
8. The method of claim 1, wherein prior to replacing the first to-be-replaced virtual interrupt request with the target virtual interrupt request, the method further comprises:
and storing the first virtual interrupt request to be replaced in a memory.
9. The method of claim 1, further comprising:
and when the priority of the target virtual interrupt request is lower than that of the first to-be-replaced virtual interrupt request, storing the target virtual interrupt request into a memory.
10. A virtual interrupt handling apparatus, the apparatus comprising:
a waiting state list obtaining module, configured to respond to a target virtual interrupt request, and obtain a waiting state list and states of multiple to-be-processed virtual interrupt requests in the waiting state list;
a to-be-replaced virtual interrupt request determining module, configured to determine, when the to-be-processed virtual interrupt request in an inactive state is not included in the waiting state list, a first to-be-replaced virtual interrupt request with a lowest priority among the multiple to-be-processed virtual interrupt requests;
a replacement module, configured to replace the first to-be-replaced virtual interrupt request with the target virtual interrupt request when the priority of the target virtual interrupt request is higher than the priority of the first to-be-replaced virtual interrupt request.
11. An electronic device, comprising:
a processor;
a memory for storing the processor-executable instructions;
wherein the processor is configured to execute the instructions to implement the virtual interrupt processing method of any of claims 1 to 9.
12. A computer-readable storage medium, wherein instructions in the computer-readable storage medium, when executed by a processor of an electronic device, enable the electronic device to perform the virtual interrupt processing method of any of claims 1 to 9.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115344374A (en) * | 2022-10-19 | 2022-11-15 | 成都菁蓉联创科技有限公司 | Interrupt response method and system thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040054832A1 (en) * | 2000-12-16 | 2004-03-18 | Joerg Franke | Interrupt-controller with prioity specification |
| CN1687901A (en) * | 2005-06-09 | 2005-10-26 | 华东师范大学 | Real time task dispatching method based on interrupt |
| US20100023666A1 (en) * | 2008-07-28 | 2010-01-28 | Arm Limited | Interrupt control for virtual processing apparatus |
| CN101771983A (en) * | 2009-12-14 | 2010-07-07 | 中国联合网络通信集团有限公司 | Control method and system applied to emergency communication scene |
| CN105893142A (en) * | 2015-12-31 | 2016-08-24 | 乐视移动智能信息技术（北京）有限公司 | Resource distribution method and device |
-
2021
- 2021-11-18 CN CN202111371770.3A patent/CN114153560A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040054832A1 (en) * | 2000-12-16 | 2004-03-18 | Joerg Franke | Interrupt-controller with prioity specification |
| CN1687901A (en) * | 2005-06-09 | 2005-10-26 | 华东师范大学 | Real time task dispatching method based on interrupt |
| US20100023666A1 (en) * | 2008-07-28 | 2010-01-28 | Arm Limited | Interrupt control for virtual processing apparatus |
| CN101771983A (en) * | 2009-12-14 | 2010-07-07 | 中国联合网络通信集团有限公司 | Control method and system applied to emergency communication scene |
| CN105893142A (en) * | 2015-12-31 | 2016-08-24 | 乐视移动智能信息技术（北京）有限公司 | Resource distribution method and device |
Non-Patent Citations (1)
| Title |
|---|
| 郭松辉等: "一种动态优先级排序的虚拟机I/O调度算法", 《计算机科学》, vol. 44, no. 1, 31 January 2017 (2017-01-31), pages 13 - 19 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115344374A (en) * | 2022-10-19 | 2022-11-15 | 成都菁蓉联创科技有限公司 | Interrupt response method and system thereof |
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