CN114095435A

CN114095435A - Method and device for sending bit block

Info

Publication number: CN114095435A
Application number: CN202010763618.9A
Authority: CN
Inventors: 孙德胜; 杨春生; 丁力
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2020-07-31
Filing date: 2020-07-31
Publication date: 2022-02-25
Also published as: WO2022022724A1

Abstract

The application discloses a method and a device for sending a bit block, wherein the method comprises the following steps: generating at least one first bit block, wherein the at least one first bit block comprises an indication field, the indication field is used for bearing flow control information, and the flow control information is obtained according to the cache condition of the communication device; the at least one first bit block is then transmitted. The method disclosed by the application can ensure that the communication device can feed back the flow control information in time, and the feedback mode is more flexible.

Description

Method and device for sending bit block

Technical Field

The present application relates to the field of communications technologies, and in particular, to a method and an apparatus for transmitting a bit block.

Background

To ensure that the data message can be received accurately, the communication device typically employs a flow control (flow control) mechanism. If a flow control mechanism is adopted, it can be ensured that the sending end does not send the message that the receiving end cannot receive.

Fig. 1a is a flow chart illustrating a flow of credit-based flow control, and as shown in fig. 1a, a receiving end may send a credit update message to a sending end, where the credit update message includes the number of credits. After receiving the credit update message, the sending end can send a message to the receiving end according to the credit number included in the credit update message.

Fig. 1b is a flowchart illustrating a flow of priority-based flow control, and as shown in fig. 1b, a receiving end may send a priority-based flow control (PFC) message to a sending end according to the buffering condition of 8 queues. After receiving the PFC message, the sending end may stop or delay sending a message in a corresponding queue according to the PFC message.

Typically, the typical length of a message may be 256 bytes, and even a message may be longer, wherein the message includes a credit update message or a PFC message. Therefore, problems such as message blocking may be caused, so that the sending end cannot receive the credit update message or the PFC message of the receiving end in time.

Disclosure of Invention

The application provides a method and a device for sending a bit block, which can ensure that a communication device feeds back flow control information in time and avoid the problems of message blocking and the like.

In a first aspect, an embodiment of the present application provides a method for transmitting a bit block, where the method may be applied to a communication apparatus, and the method includes: generating at least one first bit block, wherein the at least one first bit block comprises an indication field, the indication field is used for bearing flow control information, and the flow control information is obtained according to the cache condition of the communication device; the at least one first bit block is transmitted.

In the embodiment of the application, the communication device feeds back the flow control information to the opposite terminal in the form of the first bit block, so that the possibility that the at least one first bit block is sent out in time is higher, and the feedback mode is more flexible. Because the possibility that at least one first bit block is sent out in time is increased, the time delay of the opposite end for acquiring the first bit block is reduced, the time delay of the Flow Completion Time (FCT) is reduced, and the network utilization rate is improved. In addition, the length of the at least one first bit block is as small as or equal to the length of the message as possible, and for example, the length of the at least one first bit block may be 64 bits, 128 bits, 256 bits, and the like, thereby reducing the transmission delay of the first bit block as much as possible and avoiding that the transmission time of the at least one first bit block is too long and other messages are blocked.

In one possible implementation, the first bit block is a non-message bit block.

In this embodiment, the first bit block is a non-message bit block, and the non-message bit block includes a non-message start bit block. If the numerical value carried by the preset field in the non-message start bit block is different from the numerical value carried by the preset field in the message start bit block. Thereby, the non-message start bit block and the message start bit block can be distinguished; alternatively, when the at least one first bit block includes at least one O bit block, the O bit block can be distinguished from other O bit blocks by a value carried by a preset field of the O bit block. And the at least one first bit block can also be inserted into a bit stream of a first packet currently being transmitted by the communication device. The method and the device avoid that the at least one first bit block can be sent out only after the first message is sent, thereby reducing the waiting time delay of the at least one first bit block, reducing the time delay of the FCT and improving the network utilization rate.

In one possible implementation, the first bit block is a packet bit block.

In this embodiment, the first bit block is a message bit block, and if the communication device needs to feed back the flow control information, the first message just needs to be sent. In this case, the communication apparatus may feed back the flow control information in the first message.

In a possible implementation manner, the packet bit block is at least one of a packet start bit block, a data bit block corresponding to the packet start bit block, an end bit block corresponding to the packet start bit block, a packet end bit block, a start bit block corresponding to the packet end bit block, or a data bit block corresponding to the packet end bit block.

In the embodiment of the application, not only the message start bit block and the non-message start bit block can be distinguished through the preset field, but also the message end bit block corresponding to the message start bit block and the non-message end bit block corresponding to the non-message start bit block can be distinguished through the preset field. Or, the message data bit block corresponding to the message start bit block and the non-message data bit block corresponding to the non-message start bit block can be distinguished through a preset field.

In one possible implementation, the method further includes: and sending a first message, wherein the first message is composed of message bit blocks.

In this embodiment, for example, the first packet may include a packet start bit block and a data bit block corresponding to the packet start bit block; or, the first packet includes a packet start bit block, a data bit block corresponding to the packet start bit block, and an end bit block corresponding to the packet start bit block.

In one possible implementation, the transmitting the at least one first bit block includes: and after the message start bit block of the first message is sent and under the condition that the first message is not sent completely, sending at least one first bit block.

In the embodiment of the present application, since the first bit block is a non-packet bit block, and the first packet is composed of a packet bit block, even if the first bit block is inserted into the first packet, the opposite end can distinguish the first bit block from the first packet. Thus, the peer can obtain the information fed back by the communication device according to the at least one first bit block. Meanwhile, the first bit block is inserted into the first message and sent out, so that the waiting time delay of the at least one first bit block is further reduced, the time delay of the FCT is reduced, and the network utilization rate is improved.

In a possible implementation manner, the at least one first bit block includes a non-message start bit block, and a preset field in the non-message start bit block carries a first value.

In one possible implementation, a preset field in the start bit block of the packet carries the third value.

In a possible implementation manner, the at least one first bit block includes at least one sequence ordered set (O) bit block, and a preset field in each O bit block in the at least one O bit block carries the second value.

In this embodiment, the communication device may feed back the flow control information through at least one O bit block. Optionally, the at least one O bit block may also be inserted into a bit stream of a second packet being transmitted by the communication device. For example, the at least one O bit block may include one O bit block, two O bit blocks, or three O bit blocks, and the like, and the embodiments of the present application are not limited thereto.

In a possible implementation manner, the at least one first bit block further includes: at least one data bit block corresponding to the non-message start bit block; or an ending bit block corresponding to the non-message starting bit block; or at least one data bit block corresponding to the non-message start bit block and the end bit block corresponding to the non-message start bit block.

In this embodiment, the data bit block corresponding to the non-packet start bit block may also be referred to as a non-packet data bit block, and the end bit block corresponding to the non-packet start bit block may also be referred to as a non-packet end bit block.

In one possible implementation, in the case that the at least one first bit block includes a non-packet start bit block and a non-packet end bit block, transmitting the at least one first bit block includes: sequentially sending a non-message start bit block and a non-message end bit block; or sequentially transmitting the non-message end bit block and the non-message start bit block.

In a possible implementation manner, the non-message bit block may further include at least one of a non-message end bit block, a data bit block corresponding to the non-message end bit block, and a start bit block corresponding to the non-message end bit block.

In this embodiment, the data bit block corresponding to the non-packet-end bit block may also be referred to as a non-packet data bit block, and the start bit block corresponding to the non-packet-end bit block may also be referred to as a non-packet start bit block.

In a possible implementation manner, the flow control information includes information of the number of credits or the duration of time for which at least one queue is stopped sending the message.

In one possible implementation, the at least one first bit block further includes a Cyclic Redundancy Check (CRC) field.

In this embodiment of the application, the CRC field may be used to carry CRC information, and the CRC information may be used to protect flow control information in the at least one first bit block, and the like.

In one possible implementation, the first bit block is a P1B/P2B bit block, P1 represents the number of payload bits of the first bit block, P2 represents the total number of bits of the first bit block, and P2-P1 represent the number of sync header bits of the first bit block.

In one possible implementation, the value of P1 is any one of the following: 64. 128, 256 or 512; the value of P2-P1 is any one of the following: 1. 2 or 3.

The method provided by the first aspect of the present application may be applied to a communication device, and the communication device may include a receiving end.

In a second aspect, an embodiment of the present application provides a method for receiving a bit block, where the method includes: receiving at least one first bit block, wherein the at least one first bit block comprises an indication field, the indication field is used for bearing flow control information, and the flow control information is obtained according to the cache condition of a receiving end; and adjusting the sending condition of the second message according to the flow control information.

In this embodiment, the communication device may further obtain a block type field (block type field) of the at least one first bit block, and adjust the sending condition of the second packet according to the block type field, the value carried by the preset field, and the indication field. For example, if the block type field of the at least one first bit block is 0x4B and the preset field carries 0x06, it indicates that the obtained at least one first bit block is an O bit block, and the O bit block is used for feeding back flow control information, and the communication apparatus may adjust the sending condition of the second packet according to the indication field in the O bit block. Illustratively, the block type field of the at least one first bit block is 0x78, and the preset field carries 0xF5, the communication apparatus may adjust the transmission condition of the second packet according to the indication field in the non-packet start bit block.

In a possible implementation manner, a CRC field is further included in the at least one first bit block, and the CRC field is used for carrying CRC information.

In a possible implementation manner, adjusting the sending condition of the second packet according to the flow control information includes: adjusting the sending data volume of the second message according to the credit number; or adjusting the corresponding queue to stop sending the second message according to the time length information of the message which is stopped being sent by at least one queue.

In a possible implementation manner, adjusting the sending condition of the second packet according to the flow control information includes: and under the condition that the CRC information in at least one first bit block is successfully checked, adjusting the sending condition of the second message according to the flow control information.

In the embodiment of the present application, reference may be made to the description of the first aspect for descriptions of the first bit block, the indication field, the message bit block, or the non-message bit block, and details of the description are not described here.

The method provided by the second aspect of the present application may be applied to a communication apparatus, and the communication apparatus may include a transmitting end.

The beneficial effects of the second aspect can be seen in the beneficial effects of the first aspect, which are not described herein in detail.

In a third aspect, the present application provides a communication device for performing the method of the first aspect or any possible implementation manner of the first aspect. The communication device comprises corresponding means for performing the method of the first aspect or any possible implementation manner of the first aspect.

For example, the communication device may include a transceiving unit and a processing unit. It is understood that for the specific implementation of the transceiver unit and the processing unit, reference may be made to the following specific embodiments, which are not described in detail herein.

In a fourth aspect, the present application provides a communication device for performing the method of the second aspect or any possible implementation manner of the second aspect. The communication device comprises corresponding means for performing the method of the second aspect or any possible implementation of the second aspect.

In a fifth aspect, the present application provides a communication device comprising a processor, which may be configured to perform the method of the first aspect or any possible implementation manner of the first aspect.

In the embodiment of the present application, in the process of executing the method, a process of sending a message, receiving a message, or sending at least one first bit block (hereinafter, referred to as information) in the method may be understood as a process of outputting information by a processor, and a process of receiving input information by a processor. When outputting information, the processor outputs the information to the transceiver for transmission by the transceiver. This information, after being output by the processor, may also need to be further processed before reaching the transceiver. Similarly, when the processor receives incoming information, the transceiver receives the information and inputs it to the processor. Further, after the transceiver receives the information, the information may need to be further processed before being input to the processor.

Based on the above principle, for example, transmitting at least one first bit block may be understood as the processor outputting the at least one first bit block. Also for example, sending a first message may be understood as the processor outputting the first message, and so on.

The operations involving a processor, such as transmitting and/or receiving, may be understood generally as operations involving processor outputs and/or inputs, unless specifically indicated otherwise, or if not contradicted by actual role or inherent logic in the associated description.

In implementation, the processor may be a processor dedicated to performing the methods, or may be a processor executing computer instructions in a memory to perform the methods, such as a general-purpose processor. For example, the processor may also be adapted to execute a program stored in the memory, which when executed, causes the communication apparatus to perform a method as illustrated in the first aspect above or any possible implementation manner of the first aspect.

In one possible implementation, the memory is located outside the communication device.

In one possible implementation, the memory is located within the communication device described above.

In the embodiments of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together.

In a possible implementation, the communication device further includes a transceiver, which is configured to receive a message or send a message, and the like.

In the embodiment of the present application, for example, the processor may be configured to generate at least one first bit block; the transceiver may be configured to transmit at least one first block of bits; or, sending the first message; or receive a second message, etc.

In a sixth aspect, the present application provides a communication device comprising a processor, which may be configured to perform the method of the second aspect or any possible implementation manner of the second aspect.

In the embodiments of the present application, specific descriptions about the processor may refer to the description of the fifth aspect, and are not described in detail here. Illustratively, receiving at least one first block of bits may be understood as at least one first block of bits that the processor receives as input, for example. Also for example, sending the second message may be understood as the processor outputting the second message, and so on.

In implementation, the processor may be a processor dedicated to performing the methods, or may be a processor executing computer instructions in a memory to perform the methods, such as a general-purpose processor. For example, the processor may also be adapted to execute a program stored in the memory, which when executed, causes the communication apparatus to perform a method as illustrated in the second aspect above or any possible implementation of the second aspect.

In one possible implementation, the communication device further includes a transceiver configured to receive a message or transmit a message.

In this embodiment, for example, the processor may be configured to adjust a sending condition of the second packet according to flow control information included in the at least one first bit block; alternatively, the processor may be further configured to check CRC information in the at least one first bit block, and the like. The transceiver may be for receiving at least one first block of bits; or, receiving a first message; or send a second message, etc.

In a seventh aspect, the present application provides a communication device comprising logic circuitry to generate at least one first bit block and an interface to output the at least one first bit block.

In a possible implementation, the interface may be further configured to output the first message and/or input the second message.

In an eighth aspect, the present application provides a communication device, which includes a logic circuit and an interface, wherein the interface is configured to input at least one first bit block, and the logic circuit is configured to adjust a transmission condition of a first packet according to flow control information.

In a possible implementation, the logic circuit may be further configured to check CRC information in the at least one first bit block.

In a possible implementation, the interface may be further configured to input the first message and/or output the second message.

In a ninth aspect, the present application provides a computer readable storage medium for storing a computer program which, when run on a computer, causes the method illustrated in the first aspect or any possible implementation of the first aspect described above to be performed.

In a tenth aspect, the present application provides a computer-readable storage medium for storing a computer program which, when run on a computer, causes the method shown in the second aspect or any possible implementation of the second aspect described above to be performed.

In an eleventh aspect, the present application provides a computer program product comprising a computer program or computer code which, when run on a computer, causes the method illustrated in the first aspect or any possible implementation of the first aspect described above to be performed.

In a twelfth aspect, the present application provides a computer program product comprising a computer program or computer code which, when run on a computer, causes the method shown in the second aspect or any possible implementation of the second aspect described above to be performed.

In a thirteenth aspect, the present application provides a computer program which, when run on a computer, performs the method of the first aspect described above or shown in any possible implementation form of the first aspect.

In a fourteenth aspect, the present application provides a computer program which, when run on a computer, performs the method of the second aspect described above or any possible implementation of the second aspect.

In a fifteenth aspect, the present application provides a communication system, where the communication system includes a sending end and a receiving end, where the receiving end may be configured to execute the method shown in the first aspect or any possible implementation manner of the first aspect, and the sending end may be configured to execute the method shown in the second aspect or any possible implementation manner of the second aspect.

Drawings

FIG. 1a is a flow chart illustrating a credit-based flow control according to an embodiment of the present disclosure;

FIG. 1b is a flow chart illustrating a priority-based flow control according to an embodiment of the present disclosure;

fig. 2a is a schematic diagram of a format of a bit block according to an embodiment of the present application;

fig. 2b is a schematic diagram of another format of a bit block provided in the embodiment of the present application;

fig. 3a is a schematic diagram of a format of an O bit block according to an embodiment of the present application;

fig. 3b to fig. 3d are schematic diagrams of a method for distinguishing a message bit block from a non-message bit block according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a layered architecture of a 40G/100G Ethernet network according to an embodiment of the present application;

fig. 5 is a flowchart illustrating a method for transmitting a bit block according to an embodiment of the present application;

fig. 6a to fig. 6d are schematic diagrams illustrating comparison between a message bit block and a non-message bit block according to an embodiment of the present application;

fig. 7a and fig. 7b are schematic diagrams of formats of an O bit block according to an embodiment of the present application;

fig. 7c is a schematic diagram of transmission of an O bit block according to an embodiment of the present application;

fig. 7d is a schematic diagram illustrating changes in message length and link utilization according to an embodiment of the present application;

fig. 8a is a schematic format diagram of at least one first bit block provided in an embodiment of the present application;

fig. 8b and fig. 8c are schematic transmission diagrams of a non-message start bit block and a non-message end bit block according to an embodiment of the present application;

fig. 9a and 9b are schematic format diagrams of at least one first bit block provided in an embodiment of the present application;

fig. 9c is a schematic diagram of transmission of at least one first bit block according to an embodiment of the present application;

fig. 10a and 10b are schematic format diagrams of at least one first bit block provided by an embodiment of the present application;

fig. 10c is a schematic diagram of transmission of at least one first bit block according to an embodiment of the present application;

fig. 11 is a schematic structural diagram of a communication device according to an embodiment of the present application;

fig. 12 is a schematic structural diagram of another communication device provided in an embodiment of the present application;

fig. 13 is a schematic structural diagram of another communication device according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more clear, the present application will be further described with reference to the accompanying drawings.

The terms "first" and "second," and the like in the description, claims, and drawings of the present application are used solely to distinguish between different objects and not to describe a particular order. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. Such as a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those skilled in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

In this application, "at least one" means one or more, "a plurality" means two or more, "at least two" means two or three and three or more, "and/or" for describing an association relationship of associated objects, which means that there may be three relationships, for example, "a and/or B" may mean: only A, only B and both A and B are present, wherein A and B may be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one item(s) below" or similar expressions refer to any combination of these items. For example, at least one (one) of a, b, or c, may represent: a, b, c, "a and b," a and c, "" b and c, "or" a and b and c.

The terms referred to in the present application are described in detail below.

1. Credit-based flow control

As shown in fig. 1a, the receiving end sends a credit update message to the sending end, where the credit update message includes a credit number, and the credit number may be determined according to a receiving cache of the receiving end. After receiving the credit update message, the sending end can send a message to the receiving end according to the credit number included in the credit update message. Optionally, the sending end may send the message immediately when the number of credits is sufficient; and under the condition that the credit number is insufficient, the sending end can cache the message and accumulate the credit number. In other words, the number of credits sent by the receiving end may be used to instruct the sending end to send a message corresponding to the amount of data. For example, one credit number may represent a 16-byte message, and if the credit number is 5, the sender may send a message with less than or equal to 80(16 × 5 — 80) bytes.

2. Priority-based flow control (PFC)

In the ieee802.1qbb standard, 8 virtual channels are allowed to be created on an ethernet link and each virtual channel is assigned IEEE802.1P priority, i.e. 8 queues with priority. As shown in fig. 1b, 8 queues may be included in the transmitting end and the receiving end, respectively. For example, when the buffer of the queue 5 in the receiving end exceeds the buffer threshold, the receiving end may send a PFC message to the sending end, where the PFC message (or may also be referred to as a PFC frame) includes a time when the queue stops sending the message and an identifier of the corresponding queue. Therefore, after receiving the PFC message, the transmitting end stops or delays transmitting the message through the corresponding queue according to the PFC message, and for the receiving end, the receiving end stops or delays receiving the message through the corresponding queue.

3. Message

A message (message) is a unit of data exchanged and transmitted in a network. Illustratively, the message may include destination MAC address (destination address) information, source MAC address (source address) information, length/type (length/type) information, data information, Frame Check Sequence (FCS), and the like. Or, the message may further include a preamble (preamble) and a Start Frame Delimiter (SFD).

Fig. 4 is a schematic diagram of a layered architecture in a 40G/100G ethernet network. The Media Access Control (MAC) layer is used for checking a packet; the function of the coordination sublayer (RS) is to provide a signal mapping mechanism between the media independent interface (xMII) and the MAC layer; the function of the Physical Coding Sublayer (PCS) is to encode the signal received from xMII; the function of the physical media access sublayer (PMA) is responsible for parallel-to-serial, serial-to-parallel conversion of signals, and the like; the function of the Physical Media Dependent (PMD) layer is to perform the interaction between the high speed analog signals generated by the PMA and the peripheral medium. It is understood that the functions described in this application are only examples, and in particular implementations, each layer may also include other functions, etc., and the present application is not limited thereto.

Generally, each 8 bits of a packet are sequentially mapped to channels 0 to 7 of the xMII interface in units of 8 bits. The PCS then performs 64B/66B encoding, such as adding a 2-bit sync header, based on the signal received from the xmII interface, forming a 64B/66B bit block. For example, a preamble of 7 bytes and an SFD of 1 byte may be encoded as a start bit block; the 6-byte destination MAC address and the 2-byte partial source MAC address are encoded as a first block of data bits, and so on, forming a number of blocks of data bits. Optionally, in order to identify the end of the message, the PCS adds an end bit block to the end of the message. Optionally, the end bit block may include the FCS.

In this application, when the PCS performs 64B/66B encoding, the value of the preset field of the start bit block may be set to the first value or the third value. If the value of the preset field of the start bit block is the first value, the start bit block may also be referred to as a non-message start bit block, and if the value of the preset field of the start bit block is the third value, the start bit block may also be referred to as a message start bit block. Optionally, when the PCS performs 64B/66B coding, values of preset fields of the end bit block may also be set to different values, so as to distinguish the message end bit block from the non-message end bit block.

Optionally, the information of operation management and maintenance may be encoded into O bit blocks when 64B/66B encoding is performed through PCS. Optionally, the value of the preset field of the O bit block may be the second value.

It is understood that the above is shown as only one coding scheme, and the present application is equally applicable to other types of coding schemes.

4. First bit block (bit block)

In the present application, the first bit block may be a P1B/P2B bit block, or may also be referred to as a P1B/P2B code block, or may also be referred to as a P1B/P2B block, or may also be referred to as a P1B/P2B code block, or may also be referred to as a P1B/P2B bit stream, or the like. Wherein, P1 represents the payload bit number of the first bit block, P2 represents the total bit number of the first bit block, P2-P1 represent the synchronization head bit number of the first bit block, P1 and P2 are positive integers, and P2 is larger than P1.

In the present application, the P1B/P2B bit block may be a 64B/66B bit block; 128B/129B bit block; alternatively, or, 128B/130B bit blocks; alternatively, a 128B/131B bit block; alternatively, a 256B/257B bit block; alternatively, a 256B/258B bit block; alternatively, a 512B/513B bit block; alternatively, a 512B/514B bit block; or 512B/515B bit blocks, etc.

As an example, FIG. 2a shows different types of 64B/66B bit blocks. As shown in fig. 2a, 2 bits "10" or "01" of the header are synchronization header bits, and the last 64 bits are payload bits, which can be used to carry payload data, etc. Each row in FIG. 2a represents a pattern definition, where D0-D7 represent data bytes, C0-C7 represent control bytes, S0 represents the beginning of a MAC frame, and T0-T7 represent the end of a MAC frame.

As an example, fig. 2B shows a 128B/131B bit block, or may also be referred to as a flow control unit (flit), and the flit is taken as an example to explain various embodiments provided in the present application. As shown in fig. 2b, H (header) represents a synchronization header of the flit, and different values of H are used to indicate that the flit is a control bit block (also referred to as a control flit) or a data bit block (also referred to as a payload flit), and the length of H may be 1 bit, 2 bits, or 3 bits, etc. Different values of the Type (Type) field are used to identify the Type of the control bit block, such as a message start bit block (also referred to as a message start flit) or an O bit block (also referred to as a feedback flit or off) and the like. The type may be at least 2 bits long. Optionally, different values of the type field may also be used to identify that the type of the control bit block is a message start flit, a credit update flit, or a PFC flit (the credit update flit or the PFC flit is collectively referred to as an O flit).

Optionally, the flit shown in fig. 2b (a) may be generally used to carry request class, control or management class information, fig. 2b (two) to fig. 2b (four) show cases where multiple flits carry one packet, and the difference between them mainly lies in different CRC protection manners, fig. 2b (two) shows that each flit is protected by CRC-X (for example, X ═ 16, i.e., CRC-16), fig. 2b (three) shows that the start flit is protected by CRC-X, the load flits 0 to N are protected by CRC-Y (for example, Y ═ 32, i.e., CRC-32), and fig. 2b (four) shows that both the start flit and the load flit are protected by CRC-Y.

It can be understood that the above illustrated example is illustrated by using different values of the type field for identifying the packet start bit block or the O bit block, and in a specific implementation, the different values of the type field may also be used for identifying the packet start bit block, the packet end bit block, or the O bit block, and therefore, detailed description is not given here. Alternatively, the type field may identify the start bit block and the end bit block, and then distinguish the start bit block as the packet start bit block or the non-packet start bit block by other fields, or distinguish the end bit block as the packet end bit block or the non-packet end bit block by other fields.

In this application, the generation position of the first bit block is not limited, and the communication device may generate at least one first bit block at the xMII interface; alternatively, at least one first bit block may be generated at the PCS layer. In other words, at least the first bit block may be a P1B/P2B bit block generated at the PCS; alternatively, the at least one first bit block may be a bit block generated via the xMII interface and including control characters or data characters, and the bit block may be encoded as a P1B/P2B bit block after passing through the PCS sublayer.

5. Message bit block and non-message bit block

In this application, the packet bit block may include a boundary bit block and a data bit block, and the boundary bit block may be at least one of a start bit block and an end bit block. Therefore, the bit block corresponding to one packet may be: A. start bit block + data bit block; B. a start bit block + a data bit block + an end bit block; C. data bit block + end bit block. Illustratively, the packet bit block is at least one of a packet start bit block, a data bit block corresponding to the packet start bit block, an end bit block corresponding to the packet start bit block, a packet end bit block, a start bit block corresponding to the packet end bit block, or a data bit block corresponding to the packet end bit block.

In one possible implementation, the non-message bit block may be a bit block other than a message bit block, for example, an O bit block transmitted between messages.

In another possible implementation, the non-message bit block may also be implemented using a boundary bit block, and of course, the non-message bit block may also be implemented using a boundary bit block and a data bit block together. In this case, in order to distinguish the packet bit block from the non-packet bit block, a preset value (e.g., a first value) may be used for a preset field of the boundary bit block in the non-packet bit block, and the packet boundary bit block and the non-packet boundary bit block are distinguished by the preset field. For example, the preset field of the start bit block may be used for distinguishing between the message start bit block and the non-message start bit block, or the preset field of the end bit block may be used for distinguishing between the message end bit block and the non-message end bit block.

The following is a detailed description of whether the non-packet bit block includes the boundary bit block:

in the first mode, the non-message bit block does not include the boundary bit block.

The message bit block comprises a boundary bit block and a data bit block corresponding to the boundary bit block;

the non-message bit block is a bit block other than the message bit block, and may be an O bit block, for example.

In the second mode, the non-message bit block includes a boundary bit block.

The message bit block comprises a message boundary bit block and a data bit block corresponding to the message boundary bit block;

the non-message bit block is a bit block other than the message bit block, and may be, for example, an O bit block, a non-message boundary bit block, a data bit block corresponding to the non-message boundary bit block, a boundary bit block corresponding to the non-message boundary bit block, or the like. Specifically, the non-packet bit block may be an O bit block, a non-packet start bit block, a data bit block corresponding to the non-packet start bit block, an end bit block corresponding to the non-packet start bit block, a non-packet end bit block, a data bit block corresponding to the non-packet end bit block, a start bit block corresponding to the non-packet end bit block, or the like. For example, it may be:

A. a non-message start bit block;

B. a data bit block corresponding to the non-message start bit block + the non-message start bit block;

C. a non-message start bit block + a data bit block corresponding to the non-message start bit block + an end bit block corresponding to the non-message start bit block;

D. a non-message start bit block + an end bit block corresponding to the non-message start bit block;

E. a non-message end bit block;

F. a data bit block + non-message end bit block corresponding to the non-message end bit block;

G. a start bit block corresponding to the non-message end bit block + a data bit block corresponding to the non-message end bit block + a non-message end bit block;

H. a start bit block + a non-message end bit block corresponding to the non-message end bit block;

I. a non-message start bit block + a non-message end bit block;

J. a non-message start bit block + a data bit block corresponding to the non-message start bit block + a non-message end bit block;

here, a data bit block corresponding to a non-packet start bit block may also be referred to as a non-packet data bit block, an end bit block corresponding to a non-packet start bit block may also be referred to as a non-packet end bit block, a start bit block corresponding to a non-packet end bit block may also be referred to as a non-packet start bit block, a data bit block corresponding to a non-packet end bit block may also be referred to as a non-packet data bit block, and the like.

The above is merely an example, and other forms may be adopted for implementation, and are not described herein again. The order of transmission between bit blocks may be adjusted, and for example, the end bit block may be transmitted first and then the start bit block may be transmitted, or the end bit block may be transmitted first and then the start bit block may be transmitted.

In other words, the preset field may be used to identify an end-of-packet bit block or a non-end-of-packet bit block. If the message bit block comprises a preset field, the non-message bit block comprises a preset field, and the numerical value carried by the preset field can be used for identifying the message start bit block or the non-message start bit block; alternatively, the value carried by the preset field may be used to identify an end-of-packet bit block or a non-end-of-packet bit block. For example, the value carried by the preset field may include a first value or a third value, where the first value corresponds to the non-message bit block, and the third value corresponds to the message bit block.

In accordance with various embodiments provided herein, the at least one first bit block includes a preset field, and the preset field may be used to identify that the at least one first bit block is a message bit block or a non-message bit block. For example, the value carried by the preset field may be used to identify a packet start bit block or a non-packet start bit block; alternatively, the value carried by the preset field may be used to identify an end-of-packet bit block or a non-end-of-packet bit block. Alternatively, the preset field may be used to identify the role of the O bit block as carrying flow control information or other information, etc.

In this application, a preset field may be understood as a preset region or a preset position in a bit block, and the preset region or the preset position carries a numerical value. The present application does not limit which area or position in the bit block the preset field is specifically located in. The preset field may be located in at least one of a start bit block, an end bit block, or a data bit block.

For a more visual understanding of the difference between the message bit block and the non-message bit block, as shown in fig. 3b to 3 d.

Fig. 3b and fig. 3c show different values of the preset field in the non-packet start bit block, where the preset field in fig. 3b may be carried in a D1 region, and the preset field in fig. 3c may be carried in a D7 region, or may also be referred to as that the preset field in fig. 3b is located in a D1 region, and the preset field in fig. 3c is located in a D7 region. As shown in fig. 3b, the preset field in the non-message start bit block carries 0xE5, and the preset field in the message start bit block carries 0x 55. As shown in fig. 3c, the preset field in the non-packet start bit block carries 0xC5, and the preset field in the packet start bit block carries 0xD5 (bit transmission sequence is 10101011). Of these, 0xE5 and 0xC5 may be understood as first numerical values, and 0x55 and 0xD5 may be understood as third numerical values.

It is understood that fig. 3a to 3c are only examples, and in a specific implementation, the preset field may also be located in other regions, for example, the preset field in fig. 3b may also be any one or more regions D2 to D6, and the application is not limited to the specific value of the first value carried by the preset field of the non-packet bit block.

It can be understood that the comparison diagrams shown in fig. 3b and fig. 3c are illustrated by using the preset field in the start bit block as an example, however, in the present application, the preset field may also be in the end bit block, that is, the message end bit block and the non-message end bit block are distinguished by different values of the preset field in the end bit block. For the specific description that the preset field is located in the end bit block, reference may be made to fig. 3b and 3c, which are not described in detail here. Without loss of generality, the embodiments provided by the present application will be illustrated below with the preset field located at the starting bit block as an example.

Fig. 3d shows different values of the preset field in the flit. For example, when the preset field carries 00001, it indicates that the flit is a message start flit. When the preset field carries 01000, it indicates that the flit is off. In other words, when the communication device feeds back the buffer condition, the number of credits and the duration information of the message whose transmission of at least one queue is stopped may not be fed back at the same time, and therefore, the preset field may be configured to distinguish the message start flit from the off by two different values. It is understood that the same applies to the credit update bit block and the PFC bit block in the various embodiments shown below for this description. For a specific description of flits, reference may also be made to fig. 10a, which is not described in detail here. Table 1 shows an example of a method for distinguishing non-message bit blocks from message bit blocks.

TABLE 1

Bit block name	Location of preset fields	Value of the Preset field	Message bit block	Non-message bit block
					Block of S0 bits	Region D1	0x55 (i.e. third value)	Is that	Whether or not
Block of S0 bits	Region D1	0xE5 being the first value)	Whether or not	Is that
					Flit bit block	Type area	00001 (third value)	Is that	Whether or not
Flit bit block	Type area		01000 the second numerical value)	Whether or not						Is (O bit block)

In the present application, the preset field may be used to identify both the message bit block and the non-message bit block. Optionally, different values of the preset field may be used to identify the packet bit block, the credit update bit block, and the PFC bit block. The credit update bit block and the PFC bit block may be understood as non-message bit blocks. For example, when the preset field carries 00001, it indicates that the flit is a message start flit. When 00101 is carried by the preset field, the flit is represented as a credit update flit, and can also be called a non-message bit block or an O bit block; when the preset field carries 00110, it indicates that the flit is a PFC flit, which may also be referred to as a non-packet bit block or an O bit block. An example of a method of distinguishing the message bit block, the credit update bit block, and the PFC bit block is shown in table 2.

TABLE 2

Bit block name	Location of preset fields	Value of the Preset field	Message bit block	Non-message bit block
					Flit bit block	Type area	00001 (third value)	Is that	Whether or not
Flit bit block	Type area	00101 (i.e. the second value)	Whether or not	Is (Credit update flit)
					Flit bit block	Type area	00110 (i.e. the second value)	Whether or not	Is (PFC flit)

It can be understood that the values of the preset fields shown above are only examples, and in a specific implementation, the preset fields for distinguishing the non-packet start bit block from the packet start bit block may also be located in other areas, or may also be used for carrying other numerical values, and the like, which is not limited in this application. It is only necessary to distinguish the non-message bit block from the message bit block in the same field by taking different values.

7. Block of O bits

The preset fields shown above are mainly used to identify message bit blocks and non-message bit blocks, however, for control bit blocks such as O bit blocks, the preset fields may be used to identify the information carried by the O bit blocks. Optionally, different values carried by preset fields in the O bit block are used to identify that the O bit block is used to carry flow control information or retransmission control information. In other words, different values carried by the preset fields correspond to different information, and one value corresponds to one type of information. For example, when a preset field in the O bit block carries the second value, the O bit block is used for carrying the flow control information. When the preset field in the O bit block carries the fourth value, the O bit block may be used to carry retransmission control information and the like (for example only).

The preset field in the O bit block in fig. 3a may be carried in the O0 area, or may also be referred to as that the preset field in the O bit block is located in the O0 area, or may also be referred to as that the specific position of the preset field is located in the O0 area. And in the present application, the default field may carry a second value, such as 0x 06. I.e. when a preset field in the O bit block carries 0x06, it indicates that the O bit block is used for feeding back the flow control information.

It is understood that fig. 3a only shows the O bit block corresponding to fig. 2a, and the detailed description of the O flit corresponding to fig. 2b is omitted here.

It is to be understood that a field described in this application carries a certain numerical value, and that the value of the certain field may be a certain numerical value.

7. Bit position (Bit position)

Illustratively, as shown in fig. 2a, for a block of data bits (first row in fig. 2 a), 8 bits between bit positions 2 to 9 are a D0 region and 8 bits between bit positions 10 to 17 are a D1 region. For an S0 bit block, 8 bits between bit positions 2 to 9 are 0x78 (i.e., the block type field is 0x78), and 8 bits between bit positions 10 to 17 are the D1 region. For a T7 bit block, 8 bits between bit positions 2 and 9 are 0xFF (i.e., the block type field is 0xFF), and 8 bits between bit positions 10 and 17 are the D0 region. It is understood that the starting bit positions of the bit blocks shown in this application are all 0. If the starting bit position is 1, the bit position occupied by 0x78 of the S0 bit block may be 8 bits between bit positions 3 to 10. In other words, the present application does not limit how many start bit positions are.

Here, only the description of the bit positions is shown, but the present application is not limited to the relationship between the bit positions and the bit transmission order. For example, for the S0 bit block shown in fig. 2b, the 8 bits between bit positions 2 to 9 are 0x78, but the application is not limited to the specific bit position corresponding to 8 bits "01111000". For example, the 8 bits with bit positions between 2 and 9 in the S0 bit block may be 01111000 in sequence, or 00011110 in sequence, which is not limited in this application.

When the receiving end sends the credit update message or the PFC message to the sending end, because the length of the message is generally long, the credit update message or the PFC message sent by the receiving end may have message blocking. Especially, when the receiving end is sending another message (e.g. the first message), in this case, the receiving end needs to wait for the message to be sent, and then can send the credit update message or the PFC message. Illustratively, the length of the message is 256 bytes, i.e. the credit update message or the PFC message needs to wait for 256 bytes of message transmission time. In the worst case (worst case), the PFC packet may wait for the packet transmission time of the longest ethernet packet, for example, 1518 bytes, before sending out the credit update packet or the PFC packet. In addition, the length of the credit update packet itself will also increase the time delay for the receiving end to send the credit update packet. That is, once the credit update message is delayed, the sending end cannot send the message in time, so that the Flow Completion Time (FCT) of the service flow is prolonged, resulting in low network utilization.

In view of this, the present application provides a method and an apparatus for sending a bit block, where a receiving end can not only indicate a cache condition of the receiving end to a sending end, but also feed back flow control information in a bit block manner, so that the possibility that the flow control information can be sent out in time is higher, and a feedback manner of the flow control information is more flexible. Furthermore, the flow control information is fed back in a bit block mode, and the first message currently sent by the receiving end can be interrupted, so that the time delay of the flow control information is reduced, the time delay of the FCT is reduced, and the network utilization rate is improved.

The method provided by the application can be applied to not only an Information Technology (IT) network based on a high-speed serial computer expansion bus standard (PCIe) or a flit-based, but also an ethernet, an Internet Protocol (IP) network, a Packet Transport Network (PTN), an Agile Transport Network (ATN), a Sliced Packet Network (SPN), and the like, and the network to which the method provided by the application can be applied is not limited. Specifically, the method provided by the present application may be applied to a communication device, and the communication device may be a device supporting PCIe, flit, or ethernet technologies. The communication device may be any type of computer, server, switch (or switching device, switching chip, etc.), router, network card, etc., and the present application is not limited to a specific type of communication device.

Optionally, the method provided by the present application may be applied to two communication apparatuses, for example, the two communication apparatuses may include a transmitting end and a receiving end. Alternatively, the specific configurations of the transmitting end and the receiving end may refer to the configuration of the communication apparatus. Alternatively, the transmitting end and the receiving end may also be understood as any two interfaces. In other words, the method provided by the present application may be applied to a link-level (also referred to as point-to-point) scene, where the link-level scene may include a sending end and a receiving end, and during a transmission process of a packet (e.g., a first packet, a second packet, or at least one first bit block, etc.), the packet may not be lost, but problems such as a transmission error may occur.

In this embodiment, the sending end may be understood as a communication device that sends the second packet, and the receiving end may be understood as a communication device that receives the second packet. Alternatively, in this application, the sending end may be understood as a communication device that receives the first packet, and the receiving end may be understood as a communication device that sends the first packet. It is understood that the message shown in this application may also be referred to as a packet or a frame, and other names of the message are not limited in this embodiment of the application.

Fig. 5 is a schematic flowchart of a method for transmitting a bit block according to an embodiment of the present application, and as shown in fig. 5, the method includes:

501. the receiving end generates at least one first bit block, wherein the at least one first bit block comprises an indication field, the indication field is used for bearing flow control information, and the flow control information is obtained according to the cache condition of the receiving end.

In this embodiment, the buffer condition of the receiving end includes the buffer size of the receiving end, or the buffer size of the buffer queue of the receiving end. Or, the buffer size of the buffer queue of the receiving end includes whether the buffer size of the buffer queue of the receiving end exceeds a buffer threshold value or not. Therefore, the receiving end can obtain the flow control information according to the caching condition of the receiving end. For example, the flow control information may include the number of credits or the duration of time that at least one queue is stopped sending messages. Optionally, the number of credits may be determined according to the buffer size of the receiving end, and one credit (credit) may correspond to a packet with a certain data size. For example, one credit may correspond to a 16-byte message, and the like, which is not limited in this embodiment of the application. Optionally, the duration information of the at least one queue that stops sending the packet may be determined according to the buffer size of the buffer queue of the receiving end. The description of the buffer queue may refer to the description of fig. 1b above, and will not be described in detail here. The time unit of the duration information may be a time required for the physical layer chip to transmit 512 bits of data. In other words, one time unit of the duration information indicates that the time for the corresponding queue of the receiving end to pause receiving the message is the time required for the physical layer chip of the transmitting end to transmit 512-bit data. In this embodiment, the maximum time of the duration information may be 0 xFFFF.

In this embodiment, the flow control information may include, in addition to the duration information that the at least one queue is stopped sending the packet, an identifier of the at least one queue. For example, the flow control information may include duration information that one queue stops sending a message and an identifier of the one queue, where the identifier of the one queue may be any one of 0 to 7, or may also be an identifier of another manner, and the like, and the embodiment of the present application is not limited. For another example, the flow control information may include information about the duration that two queues are stopped sending packets and the identity of each of the two queues. For another example, the flow control information may include duration information that each of the eight queues is stopped sending a packet, and may further include an identifier of each of the eight queues. In other words, the indication field may include not only the duration information but also a queue identifier corresponding to the duration information.

In a possible implementation manner, a cyclic redundancy check, CRC, field is further included in the at least one first bit block, and the CRC field is used for carrying CRC information of the at least one first bit block, that is, the CRC field may be used for checking the at least one first bit block. For example, the CRC information may be used to protect the flow control information in the at least one first bit block. The length of the CRC field may be 4 bits, 8 bits, 16 bits, or 32 bits, and the length of the CRC may be determined according to a CRC check method, and the length of the CRC field is not limited in the embodiment of the present application.

502. The receiving end sends at least one first bit block to the sending end, and correspondingly, the sending end receives the at least one first bit block.

In one possible implementation, the method shown in fig. 5 may further include step 503.

503. The receiving end sends a first message to the sending end, and the first message is composed of message bit blocks. Correspondingly, the sending end receives the first message.

Optionally, the first packet may include a packet start bit block, a data bit block corresponding to the packet start bit block, and an end bit block corresponding to the packet start bit block (for example only). As an example, the first packet may include a packet start bit block (e.g., S0), a packet data bit block (e.g., D0-D7), and a packet end bit block (e.g., T0-T7) as shown in FIG. 2 a. Optionally, the first packet may include a packet start bit block and a data bit block corresponding to the packet start bit block. As an example, the first packet may include a packet start bit block and a packet data bit block as shown in fig. 2b (two). As for the specific value of the preset field in the message start bit block, reference is made to the above description, and details are not described here.

In this embodiment, the first bit block may be a non-message bit block, or the first bit block may be a message bit block. Specific forms of the first bit block are shown below, respectively.

In the first implementation, the first bit block is a non-message bit block.

That is, the first bit block is different from the bit block constituting the packet (for example, the bit block constituting the packet may be referred to as a second bit block), and for example, the value of the preset field in the non-packet start bit block is different from the value of the preset field in the packet start bit block. For the specific description of the preset field, reference may be made to the related descriptions of fig. 3a to 3d, and details thereof are not described here. The first bit block is a non-message bit block, e.g. at least one first bit block comprises a non-message start bit block, as shown in the second diagram of fig. 6a to 6d, respectively. Optionally, the at least one first bit block may further include a non-end-of-packet bit block, and for other descriptions of the at least one first bit block, reference may also be made to embodiments one to four shown below.

In some implementations of the present application, if the receiving end does not send the first packet when sending the at least one first bit block, the receiving end may send the at least one first bit block separately. As an example, the receiving end sends a first message when sending the at least one first bit block; or, the receiving end sends the at least one first bit block when the sending of the first packet is finished.

In other implementations of the present application, if the receiving end is sending the first packet while sending the at least one first bit block, the receiving end may insert the at least one first bit block into the first packet for sending. That is, the receiving end may break the first packet currently being transmitted, and insert the at least one first bit block into the first packet. In this case, the step 503 may be replaced by: after the message start bit block of the first message is sent and under the condition that the first message is not sent completely, the receiving end sends at least one first bit block to the sending end.

For different types of bit blocks, the preset fields are located in different areas. Therefore, in the first implementation manner, after the transmitting end receives the at least one first bit block, the at least one bit block may be checked according to CRC information carried in a CRC field in the at least one first bit block. Under the condition that the CRC information of the at least one first bit block is successfully checked, the sending end may obtain a value carried in the preset field according to the block type field of the at least one first bit block. And if the value carried by the preset field in the at least one first bit block is the first value, adjusting the sending condition of the second message according to the flow control information in the at least one first bit block. Illustratively, if the at least one first bit block includes a non-packet start bit block, the block type field of the non-packet start bit block is 8 bits with bit positions between 2 and 9, and the value of the block type field is 0x 78. Optionally, when the first bit block is a flit, since the preset fields of different types of bit blocks may be located in the same area, the sending condition of the second packet may be adjusted according to the sending end by obtaining the value carried by the preset field and the indication field. Or, if the at least one first bit block is the at least one O bit block, the block type field of the at least one O bit block is 8 bits with bit positions between 2 and 9, and the value of the block type field is 0x 4B. And then adjusting the sending condition of the second message according to the value, such as a second value, carried by the preset field of the at least one O bit block and the indication field.

In the second implementation mode, the first bit block is a message bit block.

When the receiving end feeds back the flow control information to the sending end, the receiving end may just need to send the first message, but the first message is not sent yet. In this case, the receiving end may feed back the flow control information in the first packet. In other words, the receiving end can carry the credit number or duration information, etc. in the message start bit block, and send out together with the first message.

In this implementation, the value carried by the preset field in the first bit block is a third value, which is shown in the first diagram of fig. 6a to 6d, respectively. At least one first bit block in step 502 is carried in the first message and sent out along with the first message. The first message shown here and the first message in step 503 may be understood as different first messages (i.e. may be understood as not being the same message).

In this case, after receiving at least one first bit block, the sender may check the first packet according to CRC information carried in a CRC field (which may also be referred to as a Frame Check Sequence (FCS) field) of the first packet. In other words, although the CRC field is included in the at least one first bit block, the CRC field is used for CRC checking the flow control information and the like included in the at least one first bit block. However, for the first message, the sending end needs to check the CRC information protecting the first message. In this embodiment of the present application, as long as the CRC information in the at least one first bit block is successfully checked, the sending end may execute step 505. If another CRC information (e.g., FCS) of the first message fails to be checked, the transmitting end may notify the receiving end to retransmit the first message.

For example, fig. 6a and 6c are schematic diagrams illustrating formats of at least one first bit block when the receiving end feeds back the credit number. Fig. 6b and fig. 6d are schematic diagrams illustrating formats of at least one first bit block when the receiving end feeds back the duration information. Fig. 6a and 6B show format diagrams of at least one first bit block when the receiving end feeds back the flow control information in the form of 64B/66B, and fig. 6c and 6d show format diagrams of at least one first bit block when the receiving end feeds back the flow control information in the form of flit. It is understood that the first packet shown in fig. 6a to 6d includes flow control information, but the flow control information is carried in a packet bit block, such as a packet start bit block. The message start bit block includes a field for carrying flow control information and a CRC field. It can be understood that, in fig. 6c and fig. 6d, when the preset field carries 01000, it can also be identified whether the flit includes the flow control information by 2 bits after the preset field. Or, it may be further identified whether the flit includes the flow control information or not by 1 bit after the preset field, which is not limited in this embodiment of the application. For example, the start flit of the first packet sent by the receiving end may further include a type field in addition to the indication field, the CRC field, and the preset field shown above, where the type field may be used to identify whether the start flit includes flow control information. The embodiment of the present application does not limit the specific position or length of the type field.

It is understood that the specific locations of the various fields shown in fig. 6 a-6 d are merely examples, and that the various fields may be located in other locations in a specific implementation. Meanwhile, the length of each field may also be determined according to the length of the message bit block included in the first message, and the length and the specific value of each field are shown above, which is not limited in the embodiment of the present application. For the specific description of the non-message bit block, reference may also be made to embodiments one to four shown below.

In one possible implementation, the method shown in fig. 5 may further include step 504 and step 505.

504. The transmitting end performs a CRC check on at least one first bit block.

In this embodiment of the present application, step 504 may also be understood as that the sending end checks CRC information in at least one first bit block.

505. And under the condition that the CRC passes, the sending end adjusts the sending condition of the second message according to the flow control information in at least one first bit block.

In this embodiment of the present application, if the sending end fails to check the CRC information in the at least one first bit block, the at least one first bit block may be directly discarded.

In the embodiment of the application, the sending end can distinguish the message bit block from the non-message bit block through the numerical value carried by the preset field. If the preset field carries the first value, the flow control information may be obtained from the indication field. Or, the sending end may obtain whether the bit block is an O bit block through the difference of the block type fields of the bit block, and if the bit block is an O bit block, the sending end may obtain the function of the O bit block through a preset field, and if the preset field carries a second value, obtain the flow control information from the O bit block indication field. For the specific description of step 505, reference may also be made to embodiment one to embodiment four shown below.

In this embodiment of the application, the sending end may adjust the sending data volume of the second packet according to the flow control information, or adjust the corresponding queue to stop sending the second packet, and the like. Illustratively, the sending end adjusts the data amount of the second packet according to the credit number in at least one first bit block. If the data volume of the at least one second message to be sent is less than or equal to the data volume corresponding to the credit number, the sending end can directly send the at least one second message. If the data volume of the second message to be sent is larger than the data volume corresponding to the credit number, the sending end firstly caches the second message, accumulates the credit number until the data volume corresponding to the credit number is larger than or equal to the data volume of the second message, and sends the second message. Illustratively, the sending end may further adjust the sending rate of the corresponding queue according to the duration information in the at least one first bit block.

In the embodiment of the application, the receiving end can feed back the flow control information to the sending end in the form of the first bit block instead of the message, so that on one hand, the receiving end can send out at least one first bit block in time, the transmission delay of the at least one first bit block is reduced as much as possible, and the situation that other messages are blocked due to overlong transmission time of the at least one first bit block is avoided. On the other hand, when the first bit block is a non-message bit block, if the value carried by the preset field of the non-message start bit block is different from the value carried by the preset field of the message start bit block, the non-message bit block and the message bit block can be distinguished by the receiving end or the transmitting end. Or the value carried by the preset field of at least one O bit block is different from the values carried by the preset fields of other O bit blocks, so that the sending end or the receiving end can distinguish the function of at least one O bit block according to the value of the preset field. In addition, the at least one first bit block can also be inserted into the first message and sent out, so that the waiting time delay of the at least one first bit block is further reduced, the time delay of the FCT is reduced, and the network utilization rate is improved.

To better understand the method shown in fig. 5, specific embodiments will be shown below in different forms of at least one first bit block. It is understood that specific descriptions of the preset fields in the various embodiments shown below may refer to the above description, and the preset fields are not described in detail below.

The first embodiment,

The at least one first bit block comprises at least one O bit block, and a preset field in each O bit block carries a second value.

In the embodiment of the present application, the indication field and the CRC field may be located at bit block positions 10 to 33 and 38 to 65, respectively, in the O bit block, and the indication field and the CRC field may be located at different bit positions, respectively. Meanwhile, the length of the indication field may be at least 8 bits, for example, the indication field may be 8 bits, 16 bits, 24 bits, 128 bits, and the like, and the specific length of the indication field is not limited in the embodiments of the present application. The CRC field may be 4 bits, 8 bits, 16 bits, 32 bits, or the like. As for the length of the indication field and the CRC field, etc., the various embodiments shown below are equally applicable and will not be described in detail below.

As an example, the positions and lengths of the indication field, the CRC field, and the preset field in the O-bit block may be as shown in fig. 7 a. As shown in the first diagram of fig. 7a, when the flow control information is the number of credits, the indication field may be located in 8 bits between bit positions 10 and 17 in the O-bit block, and the CRC field may be located in 8 bits between bit positions 18 and 25 in the O-bit block. As shown in the second diagram in fig. 7a, when the flow control information is duration information, the indication field may be located in 20 bits between 10 and 29 bits in the O bit block, that is, one part of the indication field carries the duration that one queue is stopped sending a message, and the other part of the indication field carries the identifier of the one queue. The CRC field is located in 4 bits between 30 and 33 bits in the O-bit block.

It is understood that the positions and lengths of the indication field and the CRC field shown in fig. 7a are merely examples, and in a specific implementation, the indication field and the CRC field may also be located in other areas of the O-bit block, and the like, which is not limited in this embodiment of the present application. In the embodiment of the present application, other positions in the O bit block are denoted as reserved (rsvd), but do not represent that the other positions are unoccupied, and the embodiment of the present application is not limited to the role of the region of rsvd in fig. 7 a. For this description, other embodiments shown in this application are equally applicable.

A specific scenario of the method for transmitting a bit block according to the embodiment of the present application will be described below with an example of one credit corresponding to 16 bytes, the number of credits being 20, and a schematic diagram shown in fig. 7 a.

The format of the O-bit block may be as shown in the first diagram of fig. 7b, where the indication field occupies 8 bits, and the value range of the credit number is 0 to 255 (including 0 and 255). When the number of credits is equal to 0, it indicates that the receiving end has no receiving capability, i.e. the buffer condition of the receiving end is saturated, and the message cannot be buffered any more. When the credit number is equal to 266, it represents that the maximum possible buffer space of the receiving end is 255 × 16 — 4080 bytes.

In the case that the receiving end needs to send the at least one O bit block, the receiving end is sending a first packet to the sending end. From the 64B/66B codec layer, the first packet can be understood as a packet bit block stream of S (packet start bit block) DDD … D (i.e. data bit block corresponding to packet start bit block) T (i.e. end bit block corresponding to packet start bit block). As shown in fig. 7c, the receiving end may directly transmit the at least one O bit block without transmitting the packet bit block stream of the first packet, and an O bit block is shown in fig. 7 c. That is, the receiving end may interrupt the packet bit block stream of the first packet currently being transmitted, and insert at least one O bit block into the packet bit block stream of the first packet, thereby transmitting the at least one O bit block.

The sending end receives a first message from a receiving end, receives a control bit block when the sending end finishes receiving a message bit block stream of the first message, obtains a block type field (block type field) of the control bit block to be 0x4B, and obtains a preset field to carry 0x 06. If the CRC result calculated by the transmitting end is identical to the CRC result in the control bit block, 20 credits are extracted from the D1 area (i.e., the indication field) of the O bit block. If the sender has a second message less than or equal to 20 × 16 ═ 320 bytes to send, the sender can send the second message immediately.

A specific scenario of the method for transmitting a bit block according to the embodiment of the present application will be described below by taking a priority queue whose number is required to be stopped by a receiving end is 7 as an example, and taking a schematic diagram shown in fig. 7a as an example.

The format of the O-bit block may be as shown in the second diagram of fig. 7b, where the indication field carries 0xFFFF, which indicates that the priority queue with the number of 7 needs to suspend sending the packet for the maximum time, and the indication field further carries 0x7, which indicates that the queue with the number of 7 suspends sending the packet. The specific description of the receiving end transmitting at least one O-bit block may refer to the description of fig. 7c, and will not be described in detail here.

Optionally, if the receiving end needs to restart the priority queue with the number of 7 to send the packet, the receiving end may further generate at least one O bit block, and a format of the O bit block is shown in the third diagram of fig. 7 b. For the specific description of the third diagram of fig. 7b, the method for the receiving end to transmit the at least one O bit block and the transmitting end to receive the at least one O bit block may refer to the above description, and will not be described in detail here.

The beneficial effects of the embodiments of the present application are simply analyzed according to the formula below with respect to the first embodiment.

Illustratively, as exemplified by a link utilization model, for example, the link utilization may satisfy the following formula.

Wherein, TLP_lenIs used for expressing the load length of the first message, namely the maximum payload length of the first message; h_lenFor indicating a header length of the first message; ACK_lenLength of Acknowledgement (ACK) message for indicating that the receiving end receives the second message and then feeds back the second message; FC_lenFor indicating the length of at least one first bit block; FC_updateFactorA transmission factor for representing at least one first bit block; ACK_updateFactorA sending factor for expressing the ACK message of the PCIe standard specification; p_bwFor indicating the degree of blocking, e.g. the delay when the receiving end transmits the at least one first block of bits. Illustratively, when the receiving end sends at least one first bit block, the first packet is not currently sent, i.e. when best case (best case), P _bw0. When the receiving end sends at least one first bit block, if the receiving end is currently sending a second message, such as in worst case, P_bw＝(TLP_len+H_len)+FC_len。

In the embodiment of the application, P is the best case _bw0; in the worst case, P _bw16 bytes, i.e. the size of one block of bits is blocked (100G traffic is transported over an ethernet interface at 100Gbps, considering 64B/66B coding, the actual interface rate is 100 × 66/64 Gbps. if only 100G rate is considered, one block of bits can be converted to 64 bits, i.e. 8 bytes). And other parameters take the form of TLP_lenThe header length is 20 bytes, and then 8 bytes of preamble and 12 bytes of frame gap (i.e., H) are considered_len＝20+8+12＝40)。FC_updateFactor＝2.5、ACK_updateFactor＝2.5，ACK_len＝8，FC_len＝8。

Then the method provided by the embodiment of the application is applied, and in the best case, U_{linkutilization}0.979; in the worst case, U_{linkutilization}0.959; at mean value (middle case), U_{linkutilization}0.979+ 0.959)/2-0.969. It can be seen that, by applying the method provided in the embodiment of the present application, the utilization rate of the link for sending at least one first bit block to the sending end by the receiving end is close to 1.

FIG. 7d illustrates packet length dependence (e.g., TLP as described above)_len) Resulting in varying link utilization. Wherein, "1", "2" or "3" respectively represents the change of the message length and the link utilization rate in the best case, the average value or the worst case. As can be seen from fig. 7d, the method provided in the embodiment of the present application can not only send out at least one first bit block in time, but also improve the link utilization.

The following is a brief analysis of the method provided in the embodiment of the present application, where the receiving end needs to increase the buffer size.

Assume that the link rate is R and the transmission rate at the receiving end is R₁R or less, at least one of the load flow control informationThe length of each first bit block is L1, and the length of the bit block that has been sent in the first packet interrupted by the at least one first bit block is L2, the buffer size that the receiving end needs to increase is as follows:

therefore, if the length L1 of at least one first bit block is 8 bytes, if the first message interrupted sends a message start bit block, for example, L2 is 8 bytes, the buffer size required to be increased by the receiving end is only 16 bytes.

It is understood that the formulas or explanations of the formulas shown in the embodiments of the present application are also applicable to the second to fourth embodiments shown below, and will not be described in detail below.

Example II,

The at least one first bit block comprises a non-message start bit block and a non-message end bit block, and a preset field in the non-message start bit block bears a first numerical value.

In the embodiment of the present application, the indication field, the CRC field, and the preset field may be located between 10 and 65 bit positions in the non-packet start bit block, and between 10 and 65 bit positions in the non-packet end bit block.

As an example, the bit positions of the preset field, the indication field, and the CRC field may be as shown in fig. 8 a. As shown in the second diagram of fig. 8a, the indication field may be located in 8 bits with bit positions 10 to 17 in the non-end-of-message bit block and the CRC field may be located in 8 bits with bit positions between 18 and 25 in the non-end-of-message bit block. Alternatively, as shown in the third diagram of fig. 8c, the indication field may be located in 5 bytes between bit positions 10 to 49 in the non-end-of-packet bit block, and the CRC field may be located in 16 bits between bit positions 50 to 65 in the non-end-of-packet bit block.

As still taking the related description in fig. 7c as an example, as shown in fig. 8b, in the case that the receiving end needs to feed back the flow control information, and the current receiving end is sending the message bit block stream of the first message. In this case, the receiving end may insert the non-message start bit block and the non-message end bit block into the message bit block stream currently being transmitted. Therefore, after acquiring the non-message start bit block (for example, the block type field is 0x78), the sending end can know that the non-message start bit block is not a message start bit block according to 0xE5 carried by a preset field in the non-message start bit block. Meanwhile, after the sending end obtains the non-message end bit block, the credit number or duration information and the like are obtained from the indication field of the non-message end bit block. Then the sending end adjusts the sending condition of the second message.

Optionally, fig. 8b shows that the receiving end sequentially inserts a non-packet start bit block and a non-packet end bit block in the packet bit block stream of the first packet. As shown in fig. 8c, the receiving end may further insert a non-packet-end bit block and a non-packet-start bit block in sequence in the packet bit block stream of the first packet. In other words, in the embodiment of the present application, the receiving end may sequentially send the non-message start bit block and the non-message end bit block; or, the receiving end may also send the non-message end bit block and the non-message start bit block in sequence.

M and n in fig. 8a may represent the identities (or numbers, etc.) of the different queues. It is understood that the specific description of fig. 8a to 8c can refer to fig. 5 to 7c, and will not be described in detail here.

Example III,

The at least one first bit block comprises a non-message start bit block, at least one non-message data bit block corresponding to the non-message start bit block and a non-message end bit block corresponding to the non-message start bit block, and a preset field in the non-message start bit block bears a first numerical value.

In this embodiment of the present application, the indication field and the CRC field may be located in the non-packet data bit block respectively and occupy different bit positions respectively.

As an example, the at least one first block of bits may include a block of non-message start bits, a block of non-message data bits, and a block of non-message end bits. The preset field is included in the non-packet start bit block, the indication field and the CRC field may be included in the non-packet data bit block, and the specific positions of the indication field and the CRC field are not limited in this embodiment.

As an example, the at least one first bit block may further comprise one non-packet start bit block, at least two non-packet data bit blocks and one non-packet end bit block. The preset field is included in the non-message start bit block, and the indication field and the CRC field may be included in the same non-message data bit block, or may be included in different message data bit blocks, respectively, and so on. For example, the indication field may be contained in the same non-message data bit block, or the indication field may be contained in a different non-message data bit block, etc. In this case, as shown in fig. 9a and 9b, the indication field and the CRC field may be included in different non-message data bit blocks in fig. 9a, and the indication field is included in at least three non-message data bit blocks in fig. 9 b.

As an example, the at least one first bit block may further comprise one non-packet start bit block, eight non-packet data bit blocks and one non-packet end bit block. As shown in fig. 9a and 9b, the eighth non-message data bit block including the CRC field can be understood as an eighth non-message data bit block, and the embodiment of the present application is not limited to the credit number and duration information. The queue identification information with 8 bit length in fig. 9b, e.g. e [0:7], can be used to indicate the validity of the duration information corresponding to each of the 8 queues. E.g., e [0x11] (00010001) may indicate that the duration information of queue 0 and queue 4 is valid. It is understood that the correspondence between the e [0:7] pair queues shown here is merely an example.

Fig. 9c illustrates a method for a receiving end to transmit at least one first bit block and a transmitting end to receive the at least one first bit block, and for the method illustrated in fig. 9c, reference may be made to the various embodiments described above, and details thereof are not described here.

Example four,

The first to third embodiments shown above are illustrated by taking the bit block shown in fig. 2a as an example, and the embodiments of the present application will explain the method provided by the embodiments of the present application by taking the bit block shown in fig. 2b as an example.

As an example, as shown in fig. 10a or fig. 10b, the length of H may be 3 bits, which means that the flit is a control flit when H carries 100; when H carries 001, it indicates that the flit is a payload flit. The length of the preset field is 5 bits, the preset field bearing 00001 indicates that the type of the flit is a message start flit, the preset field bearing 00101 indicates that the type of the flit is a credit update flit, and the preset field bearing 00110 indicates that the type of the flit is a PFC flit. In other words, when the H carries 100 and the preset field carries 00101, the flit is a credit update flit; when H carries 100 and the preset field carries 00110, the flit is a PFC flit.

0x81 in FIG. 10b is one representation of e [0:7 ]. Illustratively, e [0:7] may indicate the validity of the corresponding queue, e.g., a binary value of 10000001 for 0x81, thereby indicating that Time [0] and Time [7] are valid values.

As also exemplified by the related description in fig. 8a, the format of the first bit block may be as shown in the third diagram of fig. 10a, or as shown in the third diagram of fig. 10 b. The receiving end may insert at least one first bit block into the bit block stream and transmit the at least one first bit block to the transmitting end. It is understood that the O flit shown in fig. 10c is at least one first bit block shown in the embodiment of the present application.

It can be understood that the synchronization header (e.g. H field) in sfit (i.e. packet start bit block) shown in fig. 10b carries 100, and the synchronization header of data flit (d flit) carries 001. Compared with a scheme that only S flits include synchronization headers and D flits do not include synchronization headers, the embodiment of the present application includes synchronization headers in each flit, thereby ensuring that a transmitting end can identify at least one first bit block from D flits even if the at least one first bit block is inserted into a bit block stream of a flit. For example, if the D flit does not include the synchronization header, if values of some fields in the D flit are exactly the same as those of the O flit, the sender may not be able to identify whether the received flit is the D flit or the O flit.

It is understood that the different embodiments shown in the present application have different emphasis points, and an implementation manner not described in detail in one embodiment may also refer to other embodiments and the like, which are not described in detail herein.

The following will describe the apparatus provided by the embodiments of the present application.

Fig. 11 is a schematic structural diagram of a communication device according to an embodiment of the present application, where the communication device includes a processing unit 1101 and a transceiver unit 1102.

In some embodiments of the present application, the communication apparatus shown in fig. 11 may be used to perform the operations (functions or steps, etc.) performed by the receiving end in the above-described embodiments. Illustratively, the communication device may be configured to perform step 501, step 502, and the like shown in fig. 5.

In this embodiment, the processing unit 1101 may be configured to generate at least one first bit block, and the transceiver unit 1102 is configured to output the at least one first bit block.

In a possible implementation manner, the transceiving unit 1102 is further configured to output the first packet.

In a possible implementation manner, the transceiving unit 1102 is specifically configured to output at least one first bit block after outputting a message start bit block of a first message and under the condition that the first message is not output completely.

In a possible implementation manner, the transceiving unit 1102 may further be configured to obtain (or referred to as input) a second packet.

It is understood that reference to the above embodiments may be made to the description of the first bit block, the message bit block, the non-message bit block, the first message or the second message, etc., and detailed description thereof is omitted here. For example, fig. 3a to 3d may be referred to for the difference between the message bit block and the non-message bit block, or fig. 6a to 6d may also be referred to. The description of the at least one first bit block may refer to fig. 7a to 10c, etc.

In other embodiments of the present application, the communication apparatus shown in fig. 11 may be used to perform the operations (or functions or steps, etc.) performed by the transmitting end in the above-described embodiments. Illustratively, the communication device may be configured to perform step 504 and step 505, etc., shown in fig. 5.

In this embodiment of the application, the transceiver unit 1102 is configured to obtain (or referred to as input) at least one first bit block; the processing unit 1101 adjusts a transmission condition of the second packet according to the flow control information in the at least one first bit block.

In a possible implementation manner, the transceiving unit 1102 is configured to output the second message according to a transmission condition of the second message.

In a possible implementation manner, the processing unit 1101 is further configured to perform a CRC check on the at least one first bit block.

In this embodiment, according to the difference that at least one first bit block is a non-message bit block or a message bit block, the CRC check mode of the at least one first bit block by the processing unit may also be different. For example, if at least one first bit block is a non-message bit block, the processing unit may check CRC information carried in a CRC field in the at least one first bit block. If at least one first bit block is a message bit block, the processing unit not only checks the CRC information carried in the CRC field in the at least one first bit block, but also needs to check the CRC information carried in another CRC field (such as an FCS field) of the first message.

The descriptions of the transceiver and the processing unit shown in the embodiments of the present application are only examples, and for specific implementations of the transceiver and the processing unit, reference may also be made to the embodiments of the methods shown in the present application, and a detailed description thereof is omitted here.

The division of the modules in the embodiments of the present application is schematic, and only one logical function division is provided, and in actual implementation, there may be another division manner, and in addition, each functional module or unit in each embodiment of the present application may be integrated in one processor, may also exist alone physically, and may also be integrated in one module or unit by two or more modules or units. The integrated modules or units may be implemented in the form of hardware, or may be implemented in the form of software functional modules.

In one possible implementation, the communication device shown in fig. 11 is a computer, a server, a switch, a router, a network card, or the like in any form; or any type of device such as a computer, a server, a switch, a router, or a network card, or any type of device used in combination with any type of computer, a server, a switch, a router, or a network card, the processing unit 1101 may be one or more processors, the transceiver unit 1102 may be a transceiver, or the transceiver unit 1102 may also be a transmitting unit and a receiving unit, the transmitting unit may be a transmitter, the receiving unit may be a receiver, and the transmitting unit and the receiving unit are integrated into one device, such as a transceiver. In the embodiment of the present application, the processor and the transceiver may be coupled, and the connection manner between the processor and the transceiver is not limited in the embodiment of the present application.

As shown in fig. 12, the communication device 120 includes one or more processors 1220 and a transceiver 1212.

Alternatively, the processor and the transceiver may be configured to perform functions or operations performed when the communication apparatus is used as a receiving end. Illustratively, the processor is configured to generate at least one first bit block; the transceiver is configured to transmit the at least one first bit block. In another example, the transceiver is configured to send a first message. For another example, the transceiver is configured to send the at least one first bit block after sending the message start bit block of the first message and without sending the first message. As another example, the transceiver is further configured to receive a second message.

Alternatively, the processor and the transceiver may be configured to perform functions or operations and the like performed when the communication apparatus is used as a transmitting end. Illustratively, the transceiver is configured to receive at least one first bit block; and the processor is used for adjusting the sending condition of the second message according to the flow control information in the at least one first bit block. The transceiver is further configured to transmit the second message according to a transmission condition of the second message. As another example, the processor is further configured to perform a CRC check on the at least one first bit block.

It is understood that, for the functions or operations executed by the transceiver and/or the processor, etc., reference may be made to the various embodiments shown in fig. 11, or, alternatively, reference may also be made to the method embodiment shown in fig. 5, etc., which are not described in detail herein. It is understood that reference to the above embodiments may be made to the description of the first bit block, the message bit block, the non-message bit block, the first message or the second message, etc., and detailed description thereof is omitted here. For example, fig. 3a to 3d may be referred to for the difference between the message bit block and the non-message bit block, or fig. 6a to 6d may also be referred to. The description of the at least one first bit block may refer to fig. 7a to 10c, etc.

In various implementations of the communications apparatus shown in fig. 12, the transceiver may include a receiver for performing a receiving function (or operation) and a transmitter for performing a transmitting function (or operation). And transceivers for communicating with other devices/apparatuses over a transmission medium.

Optionally, the communication device 120 may also include one or more memories 1230 for storing program instructions and/or data. Memory 1230 is coupled to processor 1220. The coupling in the embodiments of the present application is an indirect coupling or a communication connection between devices, units or modules, and may be an electrical, mechanical or other form for information interaction between the devices, units or modules. The processor 1220 may cooperate with the memory 1230. Processor 1220 may execute program instructions stored in memory 1230. Optionally, at least one of the one or more memories may be included in the processor.

The specific connection medium among the transceiver 1212, the processor 1220 and the memory 1230 is not limited in the embodiments of the present application. In fig. 12, the memory 1230, the processor 1220 and the transceiver 1212 are connected through a bus 1240, the bus is represented by a thick line in fig. 12, and the connection manner among other components is only schematically illustrated and not limited. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 12, but this is not intended to represent only one bus or type of bus.

In the embodiments of the present application, the processor may be a general-purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, or the like, which may implement or execute the methods, steps, and logic blocks disclosed in the embodiments of the present application. A general purpose processor may be a microprocessor or any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules in a processor.

In the embodiment of the present application, the Memory may include, but is not limited to, a nonvolatile Memory such as a hard disk (HDD) or a solid-state drive (SSD), a Random Access Memory (RAM), an Erasable Programmable Read Only Memory (EPROM), a Read-Only Memory (ROM), or a portable Read-Only Memory (CD-ROM). The memory is any storage medium that can be used to carry or store program code in the form of instructions or data structures and that can be read and/or written by a computer (e.g., communications devices, etc., as shown herein), but is not limited to such. The memory in the embodiments of the present application may also be circuitry or any other device capable of performing a storage function for storing program instructions and/or data.

It is understood that the communication device shown in the embodiment of the present application may have more components than those shown in fig. 12, and the embodiment of the present application is not limited thereto.

It will be appreciated that the methods performed by the processor and transceiver shown above are merely examples, and reference may be made to the methods described above for the steps specifically performed by the processor and transceiver.

In another possible implementation manner, when the communication device is a chip system, such as a chip system in a server, an access device, a switch, a router, a network card, or the like, the processing unit 1101 may be one or more logic circuits, and the transceiving unit 1102 may be an input/output interface, which is also referred to as a communication interface, or an interface circuit, an interface, or the like. Or the transceiving unit 1102 may also be a transmitting unit and a receiving unit, the transmitting unit may be an output interface, the receiving unit may be an input interface, and the transmitting unit and the receiving unit are integrated into one unit, such as an input-output interface.

The logic circuit 1301 may be a chip, a processing circuit, an integrated circuit, or a system on chip (SoC) chip, and the interface 1302 may be a communication interface, an input/output interface, or the like. In the embodiments of the present application, the logic circuit and the interface may also be coupled to each other. The embodiments of the present application are not limited to the specific connection manner of the logic circuit and the interface.

As shown in fig. 13, the communication apparatus shown in fig. 13 includes a logic circuit 1301 and an interface 1302. That is, the processing unit 1101 may be implemented by a logic circuit 1301, and the transceiver unit 1102 may be implemented by an interface 1302.

Alternatively, the logic circuit and the interface may be used to perform functions or operations performed when the communication apparatus is used as a receiving end. Illustratively, logic circuitry is used to generate at least one first bit block; the interface is used for outputting the at least one first bit block. As another example, the interface is configured to output the first message. For another example, the interface is configured to output the at least one first bit block after outputting the message start bit block of the first message and without outputting the first message. As another example, the interface is also used to input a second message.

Alternatively, the logic circuit and the interface may be configured to perform a function or an operation performed when the communication apparatus is used as a transmitting end. Illustratively, the interface is for inputting at least one first bit block; and the logic circuit is used for adjusting the output condition of the second message according to the flow control information in the at least one first bit block. For another example, the interface is further configured to output the second message according to an output condition of the second message. As another example, the logic circuit is further configured to perform a CRC check on the at least one first block of bits.

It is understood that, for the functions or operations performed by the interface and/or the logic circuit, etc., reference may be made to the various embodiments shown in fig. 11, or, alternatively, reference may also be made to the method embodiment shown in fig. 5, etc., which are not described in detail herein. It is understood that reference to the above embodiments may be made to the description of the first bit block, the message bit block, the non-message bit block, the first message or the second message, etc., and detailed description thereof is omitted here. For example, fig. 3a to 3d may be referred to for the difference between the message bit block and the non-message bit block, or fig. 6a to 6d may also be referred to. The description of the at least one first bit block may refer to fig. 7a to 10c, etc.

In addition, the present application also provides a computer program for implementing the operations and/or processes performed by the receiving end in the method provided by the present application.

The present application also provides a computer program for implementing the operations and/or processes performed by the sender in the methods provided herein.

The present application also provides a computer-readable storage medium having stored therein computer code, which, when run on a computer, causes the computer to perform the operations and/or processes performed by the receiving end in the methods provided herein.

The present application also provides a computer-readable storage medium having stored therein computer code, which, when run on a computer, causes the computer to perform the operations and/or processes of the method provided by the present application, performed by the sending end.

The present application also provides a computer program product comprising computer code or a computer program which, when run on a computer, causes the operations and/or processes performed by the receiving end in the methods provided herein to be performed.

The present application also provides a computer program product comprising computer code or a computer program which, when run on a computer, causes the operations and/or processes performed by the sending end in the methods provided herein to be performed.

The embodiment of the present application further provides a communication system, where the communication system includes a sending end and a receiving end, the receiving end may be configured to execute step 501 and step 502 (sending step) shown in fig. 5, and the sending end may be configured to execute the receiving step in step 502 and step 503 shown in fig. 5, and step 504 and step 505. It is understood that the steps performed by the transmitting end and the receiving end shown here are only examples, and for other steps performed by the receiving end and the transmitting end, reference may also be made to the above embodiments, and detailed descriptions thereof are omitted here.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implementing, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may also be an electric, mechanical or other form of connection.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the technical effects of the solutions provided by the embodiments of the present application.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a readable storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned readable storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method for transmitting a bit block, the method being applied to a communication device, the method comprising:

generating at least one first bit block, where the at least one first bit block includes an indication field, where the indication field is used to carry traffic control information, and the traffic control information is obtained according to a cache condition of the communication device;

transmitting the at least one first bit block.

2. The method of claim 1, wherein the first block of bits is a non-message block of bits.

3. The method of claim 2, wherein a packet bit block is at least one of a packet start bit block, a data bit block corresponding to the packet start bit block, an end bit block corresponding to the packet start bit block, a packet end bit block, a start bit block corresponding to the packet end bit block, or a data bit block corresponding to the packet end bit block.

4. The method according to any one of claims 1-3, further comprising:

and sending a first message, wherein the first message is composed of message bit blocks.

5. The method according to any of claims 2-4, wherein said transmitting said at least one first bit block comprises:

and after the message start bit block of the first message is sent and under the condition that the first message is not sent completely, sending the at least one first bit block.

6. The method according to any of claims 2-5, wherein the at least one first bit block comprises a non-message start bit block, and wherein a predetermined field in the non-message start bit block carries the first value.

7. The method according to any of claims 2-5, wherein the at least one first bit block comprises at least one sequence of O bit blocks, and wherein the predetermined field in each of the at least one O bit blocks carries the second value.

8. The method of claim 6, wherein the at least one first bit block further comprises:

at least one data bit block corresponding to the non-message start bit block; or

An ending bit block corresponding to the non-message starting bit block; or

At least one data bit block corresponding to the non-packet start bit block and an end bit block corresponding to the non-packet start bit block.

9. The method according to any of claims 1-8, wherein the flow control information comprises information of the number of credits or the duration of time that at least one queue is stopped sending packets.

10. The method according to any of claims 1-9, wherein said at least one first bit block further comprises a cyclic redundancy check, CRC, field.

11. The method according to any of claims 1-10, wherein the first bit block is a P1B/P2B bit block, the P1 represents the number of payload bits of the first bit block, the P2 represents the total number of bits of the first bit block, and the P2-P1 represent the number of sync header bits of the first bit block.

12. The method of claim 11, wherein the value of P1 is any one of:

64. 128, 256 or 512;

the value of P2-P1 is any one of the following:

1. 2 or 3.

13. The method according to any of claims 3-5, wherein a predetermined field in the start bit block of the packet carries the third value.

14. The method of claim 1, wherein the first block of bits is a block of message bits.

15. A communications apparatus, the apparatus comprising:

a processor, configured to generate at least one first bit block, where the at least one first bit block includes an indication field, where the indication field is used to carry flow control information, and the flow control information is obtained according to a buffer condition of a communication device;

a transceiver for transmitting the at least one first bit block.

16. The apparatus of claim 15, wherein the first block of bits is a non-message block of bits.

17. The apparatus of claim 16, wherein a packet bit block is at least one of a packet start bit block, a data bit block corresponding to the packet start bit block, an end bit block corresponding to the packet start bit block, a packet end bit block, a start bit block corresponding to the packet end bit block, or a data bit block corresponding to the packet end bit block.

18. The apparatus of any one of claims 15-17,

the transceiver is further configured to send a first packet, where the first packet is composed of a packet bit block.

19. The apparatus according to any one of claims 16 to 18,

the transceiver is specifically configured to send the at least one first bit block after sending a message start bit block of a first message and under the condition that the first message is not sent completely.

20. The apparatus according to any of claims 16-19, wherein the at least one first bit block comprises a non-start-of-packet bit block, and wherein a predetermined field in the non-start-of-packet bit block carries the first value.

21. The apparatus according to any of claims 16-19, wherein the at least one first bit block comprises at least one sequence O bit block, and wherein the predetermined field in each O bit block of the at least one O bit block carries the second value.

22. The apparatus of claim 20, wherein the at least one first bit block further comprises:

An ending bit block corresponding to the non-message starting bit block; or

23. The apparatus according to any of claims 15-22, wherein the flow control information comprises information of the number of credits or the duration of time that at least one queue is stopped sending packets.

24. The apparatus according to any of claims 15-23, wherein the at least one first bit block further comprises a cyclic redundancy check, CRC, field.

25. The apparatus according to any of claims 15-24, wherein the first bit block is a P1B/P2B bit block, the P1 represents the number of payload bits of the first bit block, the P2 represents the total number of bits of the first bit block, and the P2-P1 represent the number of sync header bits of the first bit block.

26. The apparatus of claim 25, wherein the value of P1 is any one of:

64. 128, 256 or 512;

the value of P2-P1 is any one of the following:

1. 2 or 3.

27. The apparatus according to any of claims 17-19, wherein a predetermined field in the start of packet bit block carries the third value.

28. The apparatus of claim 15, wherein the first block of bits is a block of message bits.