CN114089166A - Chip testing device and method - Google Patents
Chip testing device and method Download PDFInfo
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- CN114089166A CN114089166A CN202111433753.8A CN202111433753A CN114089166A CN 114089166 A CN114089166 A CN 114089166A CN 202111433753 A CN202111433753 A CN 202111433753A CN 114089166 A CN114089166 A CN 114089166A
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- 238000012360 testing method Methods 0.000 title claims abstract description 226
- 238000000034 method Methods 0.000 title abstract description 8
- 238000001514 detection method Methods 0.000 claims description 60
- 230000000737 periodic effect Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 230000002035 prolonged effect Effects 0.000 description 2
- 238000013024 troubleshooting Methods 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
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Abstract
The embodiment of the invention provides a chip testing device and a method, wherein the chip testing device comprises a chip testing module, a self-checking module and an alarm module; the chip testing module comprises a plurality of devices and is used for testing the quality of a chip; the self-checking module is connected with the chip testing module, and is used for detecting whether a device which does not work in the chip testing module has a fault when the chip testing module tests a chip, and sending an alarm signal to the alarm module when the device which does not work has the fault is detected; the alarm module is connected with the self-checking module and used for sending an alarm prompt when receiving the alarm signal. The chip testing device and the method provided by the embodiment of the invention can monitor whether the chip testing device has faults or not during chip testing, and send out an alarm prompt when the chip testing device has the faults.
Description
Technical Field
The invention relates to the field of chip testing, in particular to a chip testing device and a chip testing method.
Background
The quality of the chip is related to the quality of a product comprising the chip, the chip needs to be tested by the chip testing device before the chip leaves a factory, the chip testing device can test a large number of chips until the chips are tested, and when the chip testing device goes wrong, the testing result of the chip is inaccurate. After a large number of chips are tested, if the test results of a plurality of continuous chips are inaccurate, whether the chip testing device has faults or not needs to be detected, and the existing chip testing device can detect whether the chip testing device has the faults or not only after the chip testing is finished.
Disclosure of Invention
The chip testing device and the method provided by the embodiment of the invention can monitor whether the chip testing device has faults or not during chip testing, and send out an alarm prompt when the chip testing device has the faults.
The embodiment provides a chip testing device, which comprises a chip testing module, a self-checking module and an alarm module;
the chip testing module comprises a plurality of devices and is used for testing the quality of a chip;
the self-checking module is connected with the chip testing module, and is used for detecting whether a device which does not work in the chip testing module has a fault when the chip testing module tests a chip, and sending an alarm signal to the alarm module when the device which does not work has the fault is detected;
the alarm module is connected with the self-checking module and used for sending an alarm prompt when receiving the alarm signal.
Optionally, the self-test module includes a device detection unit and a fault detection unit;
the device detection unit is connected with the fault detection unit and each device in the chip test module, and is used for detecting whether a device which does not work exists in the chip test module when the chip test module tests a chip and sending detection information to the fault detection unit when the device which does not work is detected;
the fault detection unit is connected with the alarm module and used for finding out the devices which do not work according to the detection information, detecting whether the devices have faults or not and sending alarm signals to the alarm module when the devices have the faults.
Optionally, the self-test module further includes a recording unit;
the recording unit is connected with the fault detection unit and is used for recording the type of the device detected by the fault detection unit and recording the interrupted position when the fault detection unit detects the device.
Optionally, the self-test module further includes a storage unit;
the storage unit is used for storing fault information, wherein the fault information comprises the name of a faulty device.
Optionally, the self-test module further includes a periodic unit;
the period unit is used for receiving a self-checking period sent by a user;
the fault detection unit is connected with the period unit and used for detecting all devices in the chip test module in the self-checking period.
Optionally, the chip testing apparatus provided in this embodiment further includes a display module;
the display module is connected with the self-checking module and used for displaying fault information.
Optionally, the display module includes an LED display screen, an LCD display screen, or an OLED display screen.
Optionally, the self-test module is further configured to test all devices in the chip test module before the chip test module tests the chip.
In a second aspect, the present embodiment further provides a chip testing method, where a chip testing module includes a plurality of devices, a self-checking module is connected to the chip testing module, and an alarm module is connected to the self-checking module;
the chip testing method comprises the following steps:
the chip testing module tests the quality of a chip, and the self-checking module detects whether a device which does not work in the chip testing module has a fault when the chip testing module tests the chip and sends an alarm signal to the alarm module when the device which does not work has the fault is detected;
and the alarm module sends out an alarm prompt when receiving the alarm signal.
Optionally, before the chip testing module tests the quality of the chip, the method further includes:
the self-checking module detects all devices in the chip testing module.
According to the chip testing device provided by the embodiment of the invention, the self-checking module is used for detecting the devices which do not work in the chip testing module when the chip testing module tests the chip, and sending the alarm signal to the alarm module when the fault devices are detected, and the alarm module sends the alarm prompt according to the alarm signal so as to inform the staff that the chip testing module which is testing the chip has faults. The chip testing device provided by the embodiment of the invention can monitor whether the chip testing device has faults or not during chip testing, and send out an alarm prompt when the chip testing device has the faults.
Drawings
Fig. 1 is a schematic structural diagram of a chip testing apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of another chip testing apparatus according to an embodiment of the present invention;
fig. 3 is a schematic flow chart of a chip testing method provided in this embodiment.
Detailed Description
The embodiments of the present invention will be described in further detail with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of and not restrictive on the broad invention. It should be further noted that, for convenience of description, only some structures, not all structures, relating to the embodiments of the present invention are shown in the drawings.
Fig. 1 is a schematic structural diagram of a chip testing apparatus according to an embodiment of the present invention, and referring to fig. 1, the chip testing apparatus includes a chip testing module 110, a self-test module 120, and an alarm module 130; the chip testing module 110 includes a plurality of devices, and the chip testing module 110 is used for testing the quality of the chip; the self-checking module 120 is connected to the chip testing module 110, and the self-checking module 120 is configured to detect whether a failure occurs in an inoperative device in the chip testing module 110 when the chip testing module 110 tests a chip, and send an alarm signal to the alarm module 130 when a failure occurs in the inoperative device; the alarm module 130 is connected to the self-checking module 120, and the alarm module 130 is configured to send an alarm prompt when receiving the alarm signal.
Specifically, the chip testing module 110 includes a plurality of devices, and in the chip testing process, there may be idle periods of some devices, that is, the devices are not operated in some time periods, when the self-test module 120 detects an inoperative device in the chip testing module 110, it detects whether there is a fault, and when it detects that the device is faulty, it sends an alarm signal to the alarm module 130, and the alarm module 130 sends an alarm prompt. The alarm prompt may be an icon of a device, for example, each device has an icon, and the alarm prompt may be an icon of a faulty device, so that a worker can intuitively know which device is faulty according to the icon. The alarm prompt may also be names of devices, for example, the names of the devices are different, and a worker may know which device has a fault according to the device names. The alarm prompt may also be a sound prompt, for example, when the self-test module 120 detects a faulty device, the alarm module 130 may generate a beep, and the staff will know that the faulty device exists in the chip testing module 110 after hearing the beep. The alarm prompt may also be a light prompt, for example, when the self-test module 120 detects a faulty device, the alarm module 130 may emit a flashing red light, and the worker knows that the faulty device exists in the chip testing module 110 after seeing the light. The worker can know the device with the fault in the chip testing module 110 in time according to the alarm prompt, and maintain the chip testing module 110 in time to ensure that the chip testing module 110 is in a normal state when testing the subsequent chip, so that the accuracy of the chip testing is improved. The self-test module 120 performs troubleshooting on the non-operating devices in the chip test module 110 instead of detecting the operating devices, so that the self-test module 120 does not affect the operating performance of the operating devices. In this embodiment, the self-test module 120 is configured to detect the chip testing module 110 when the chip testing module 110 tests a chip, that is, the chip testing and the troubleshooting of the chip testing module 110 are performed simultaneously, which can ensure the reliability of the chip testing and improve the efficiency of the chip testing.
According to the chip testing device provided by the embodiment of the invention, the self-checking module is used for detecting the devices which do not work in the chip testing module when the chip testing module tests the chip, and sending the alarm signal to the alarm module when the fault devices are detected, and the alarm module sends the alarm prompt according to the alarm signal so as to inform the staff that the chip testing module which is testing the chip has faults. The chip testing device provided by the embodiment of the invention can monitor whether the chip testing device has faults or not during chip testing, and send out an alarm prompt when the chip testing device has the faults.
Optionally, fig. 2 is a schematic structural diagram of another chip testing apparatus according to an embodiment of the present invention, and referring to fig. 2, the self-test module 120 includes a device detection unit 121 and a failure detection unit 122; the device detection unit 121 is connected to the failure detection unit 122 and each device in the chip testing module 110, and the device detection unit 121 is configured to detect whether there is an inoperative device in the chip testing module 110 when the chip testing module 110 tests a chip, and send detection information to the failure detection unit 122 when the inoperative device is detected; the failure detection unit 122 is connected to the alarm module 130, and the failure detection unit 122 is configured to find an inoperative device according to the detection information, detect whether the inoperative device has a failure, and send an alarm signal to the alarm module 130 when the failure is detected.
Specifically, the device detecting unit 121 is connected to all devices in the chip testing module 110, when the chip testing module 110 tests a chip, the device detecting unit 121 detects which devices in the chip testing module 120 are not working, when detecting a non-working device, sends a detection signal to the fault detecting unit 122, where the detection signal may include a position of the non-working device in the chip testing module 110, the fault detecting unit 122 finds the non-working device according to the detection signal and detects the non-working device, when detecting that a current device is faulty, the fault detecting unit 122 sends an alarm signal to the alarm module 130, and then detects whether another non-working device is faulty. When the failure detection unit 122 detects that the current device is not failed, it then detects whether another device is failed based on the detection information sent by the device detection unit 121.
Optionally, the self-test module further includes a recording unit; the recording unit is connected with the fault detection unit and is used for recording the device detected by the fault detection unit and recording the interrupted position when the fault detection unit detects the device.
Specifically, the recording unit may track the failure detection unit, and after the failure detection unit detects one device, the recording unit may record the name of the device. The device detection unit can send detection information to the fault detection unit in real time, when the fault detection unit detects a certain device, the device starts to work, the fault detection unit stops detecting the device, meanwhile, the recording unit records the detected position of the device, and when the device stops working again, the fault detection unit continues to detect the device according to the position recorded by the recording unit.
Optionally, the self-test module further includes a storage unit; the storage unit is used for storing fault information, wherein the fault information comprises the name of a fault device.
Specifically, the storage unit is connected to the failure detection unit, and when the failure detection unit detects a failed device, failure information is sent to the storage unit. The storage unit stores the name of the device with the fault, when the chip testing device stops working, a worker can call the fault information stored in the storage unit to know which devices have the fault, and therefore the fault devices are checked and maintained.
Optionally, the self-test module further includes a period unit; the period unit is used for receiving a self-checking period sent by a user; the fault detection unit is connected with the period unit and used for detecting all devices in the chip test module in the self-checking period.
Specifically, the fault detection unit needs to complete detection of all devices in the chip test module in one self-test period, and re-detects all devices in the chip test module in the next self-test period, and when the chip test module detects a chip, the fault detection unit detects all devices in the chip test module in each self-test period. The self-checking period can be adjusted according to the requirements of a user, when the user needs the chip testing device to complete high reliability testing, namely when the chip testing module is required to have high reliability, the self-checking module needs to detect each device in the chip testing module more carefully, the self-checking period can be prolonged, the detection time of each device is prolonged, the self-checking quality is improved, and the reliability of the chip testing device for testing the chip is improved.
Optionally, the chip testing apparatus provided in this embodiment further includes a display module; the display module is connected with the self-checking module and used for displaying fault information.
Specifically, the fault detection unit in the self-checking module is connected with the display module, when the fault detection unit detects that a faulty device exists in the chip testing module, fault information can be sent to the display module, the display module displays the fault information after receiving the fault information, the fault information can comprise the name of the device and also can comprise the icon of the device, and after the display module displays the fault information, a worker can visually know which device fails.
Optionally, the display module includes an LED display screen, an LCD display screen, or an OLED display screen.
Specifically, the LED display screen has the characteristics of long service life, high display brightness and the like. The LCD display screen has the characteristics of low power consumption, small radiation and the like. The OLED display screen has the characteristics of high display brightness, wide display visual angle and the like.
Optionally, the self-test module is further configured to test all devices in the chip test module before the chip test module tests the chip.
Specifically, before chip testing, in order to ensure the testing quality of a chip, the self-checking module is required to detect all devices in the chip testing module, when all the devices in the chip testing module have no fault, the chip testing can be performed, and when the self-checking module detects all the devices in the chip testing module before the chip testing, if the faulty devices are detected, the alarm signal can be sent to the alarm module.
The embodiment of the invention also provides a chip testing method, wherein the chip testing module comprises a plurality of devices, the self-checking module is connected with the chip testing module, and the alarm module is connected with the self-checking module;
fig. 3 is a schematic flow chart of a chip testing method provided in this embodiment, and referring to fig. 3, the chip testing method includes the following steps:
s110, the chip testing module tests the quality of the chip, the self-checking module detects whether a device which does not work in the chip testing module has a fault when the chip testing module tests the chip, and sends an alarm signal to the alarm module when the device which does not work is detected to have the fault.
And S120, sending an alarm prompt when the alarm module receives the alarm signal.
Optionally, before the chip testing module tests the quality of the chip, the method further includes: the self-checking module detects all devices in the chip testing module.
The chip testing method provided by the embodiment and the chip testing device provided by any embodiment of the invention belong to the same inventive concept, have corresponding beneficial effects, and the technical details are not detailed in the embodiment, and the chip testing device provided by any embodiment of the invention is detailed.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will appreciate that the embodiments of the present invention are not limited to the specific embodiments described herein, and that various obvious changes, adaptations, and substitutions are possible, without departing from the scope of the embodiments of the present invention. Therefore, although the embodiments of the present invention have been described in more detail through the above embodiments, the embodiments of the present invention are not limited to the above embodiments, and many other equivalent embodiments may be included without departing from the concept of the embodiments of the present invention, and the scope of the embodiments of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A chip testing device is characterized by comprising a chip testing module, a self-checking module and an alarm module;
the chip testing module comprises a plurality of devices and is used for testing the quality of a chip;
the self-checking module is connected with the chip testing module, and is used for detecting whether a device which does not work in the chip testing module has a fault when the chip testing module tests a chip, and sending an alarm signal to the alarm module when the device which does not work has the fault is detected;
the alarm module is connected with the self-checking module and used for sending an alarm prompt when receiving the alarm signal.
2. The chip testing apparatus according to claim 1, wherein the self-test module comprises a device detection unit and a failure detection unit;
the device detection unit is connected with the fault detection unit and each device in the chip test module, and is used for detecting whether a device which does not work exists in the chip test module when the chip test module tests a chip and sending detection information to the fault detection unit when the device which does not work is detected;
the fault detection unit is connected with the alarm module and used for finding out the devices which do not work according to the detection information, detecting whether the devices have faults or not and sending alarm signals to the alarm module when the devices have the faults.
3. The chip testing apparatus according to claim 2, wherein the self-test module further comprises a recording unit;
the recording unit is connected with the fault detection unit and is used for recording the type of the device detected by the fault detection unit and recording the interrupted position when the fault detection unit detects the device.
4. The chip testing apparatus according to claim 1, wherein the self-test module further comprises a storage unit;
the storage unit is used for storing fault information, wherein the fault information comprises the name of a faulty device.
5. The chip testing apparatus according to claim 2, wherein the self-test module further comprises a periodic unit;
the period unit is used for receiving a self-checking period sent by a user;
the fault detection unit is connected with the period unit and used for detecting all devices in the chip test module in the self-checking period.
6. The chip testing device according to claim 1, further comprising a display module;
the display module is connected with the self-checking module and used for displaying fault information.
7. The chip testing device according to claim 6, wherein the display module comprises an LED display screen, an LCD display screen or an OLED display screen.
8. The chip testing apparatus according to claim 1, wherein the self-test module is further configured to test all devices in the chip testing module before the chip testing module tests a chip.
9. A chip testing method is characterized in that a chip testing module comprises a plurality of devices, a self-checking module is connected with the chip testing module, and an alarm module is connected with the self-checking module;
the chip testing method comprises the following steps:
the chip testing module tests the quality of a chip, and the self-checking module detects whether a device which does not work in the chip testing module has a fault when the chip testing module tests the chip and sends an alarm signal to the alarm module when the device which does not work has the fault is detected;
and the alarm module sends out an alarm prompt when receiving the alarm signal.
10. The chip testing method according to claim 9, further comprising, before the chip testing module tests the quality of the chip:
the self-checking module detects all devices in the chip testing module.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111433753.8A CN114089166A (en) | 2021-11-29 | 2021-11-29 | Chip testing device and method |
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| CN202111433753.8A CN114089166A (en) | 2021-11-29 | 2021-11-29 | Chip testing device and method |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010095326A (en) * | 2000-04-05 | 2001-11-03 | 추후제출 | Test arrangement for testing function of a semiconductor chip |
| CN104950206A (en) * | 2015-07-21 | 2015-09-30 | 厦门一联高科信息技术有限公司 | Online detection system for power line ground protection |
| CN105300333A (en) * | 2015-11-24 | 2016-02-03 | 杭州士兰微电子股份有限公司 | Chip tester, and chip tester monitoring device and method |
| CN107238789A (en) * | 2016-11-28 | 2017-10-10 | 华润赛美科微电子(深圳)有限公司 | Fault detect recording method and the Fault of Integrated Circuits record system based on PC |
| CN209280865U (en) * | 2018-11-09 | 2019-08-20 | 深圳润信通科技有限公司 | A kind of integrated circuit testing plate with self-checking function |
-
2021
- 2021-11-29 CN CN202111433753.8A patent/CN114089166A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010095326A (en) * | 2000-04-05 | 2001-11-03 | 추후제출 | Test arrangement for testing function of a semiconductor chip |
| CN104950206A (en) * | 2015-07-21 | 2015-09-30 | 厦门一联高科信息技术有限公司 | Online detection system for power line ground protection |
| CN105300333A (en) * | 2015-11-24 | 2016-02-03 | 杭州士兰微电子股份有限公司 | Chip tester, and chip tester monitoring device and method |
| CN107238789A (en) * | 2016-11-28 | 2017-10-10 | 华润赛美科微电子(深圳)有限公司 | Fault detect recording method and the Fault of Integrated Circuits record system based on PC |
| CN209280865U (en) * | 2018-11-09 | 2019-08-20 | 深圳润信通科技有限公司 | A kind of integrated circuit testing plate with self-checking function |
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