CN114038282B - Power system internal overvoltage simulation display system and working method - Google Patents
Power system internal overvoltage simulation display system and working method Download PDFInfo
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- G09B—EDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
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- G09B23/188—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for motors; for generators; for power supplies; for power distribution
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Abstract
The invention provides an internal overvoltage simulation display system of a power system and a working method thereof, comprising the following steps: the device comprises a microprocessor, a display module, a cut-to-empty converting circuit module and a key circuit module; the display module, the cut-to-empty converting circuit module and the key circuit module are all in communication connection with the microprocessor; the switching circuit module at least comprises a four-bit dial switch, and the four-bit dial switch is used for switching the inhibition measures; the invention reduces the voltage class on the basis of retaining the overvoltage cause elements, simulates the real electric environment, designs corresponding countermeasure for different overvoltage causes, and can realize demonstration of insufficient countermeasure, proper countermeasure and excessive method.
Description
Technical Field
The invention relates to the technical field of overvoltage simulation in a power system, in particular to a system for simulating and displaying the overvoltage in the power system and a working method.
Background
The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.
The power system is affected by various conditions, which can cause voltage or current rising, and some are affected by external atmospheric environment, such as lightning strike, which can cause overvoltage in the aspect of atmosphere, and some are limited by power parameters, which can cause resonance or abrupt parameter change, so that internal overvoltage is formed. The internal overvoltage includes a very large number of types, wherein the operation overvoltage refers to the operation of a disconnecting link or the sudden damage of a power grid system, calculated in milliseconds, is short, and the transient overvoltage refers to the transient overvoltage, which means that the transient overvoltage is completed, but the power system fails to immediately return to a normal working state, and the voltage value rises, or a resonance condition is triggered, so that the system is separated from the normal working state, and the duration is long.
The problem of overvoltage is one of the problems that must be emphasized in the design of insulation strength of electrical equipment in order to study ultra-high voltage and ultra-high voltage technologies for the whole power grid system. Whether over-voltage caused by parameter change of an internal power system or over-voltage caused by meteorological conditions such as external lightning, damage or even immeasurable loss can be caused to continuous operation of the power. Some of these conditions, such as resonance, exist stably, so that comprehensive and deep analysis of the formation cause of overvoltage is important in the current research.
However, the inventor finds that the actual power grid voltage is high in grade, and is difficult to observe and learn in the field in daily teaching or demonstration links, and the direct adoption of higher power grid voltage for demonstration brings about greater potential safety hazards.
Disclosure of Invention
In order to solve the defects of the prior art, the invention provides the internal overvoltage simulation display system of the power system and the working method, the voltage class is reduced on the basis of retaining overvoltage cause elements, the real electric environment is simulated, corresponding countermeasure is respectively designed for different overvoltage causes, and the demonstration of insufficient prevention, proper prevention and excessive method can be realized.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
the first aspect of the invention provides an internal overvoltage simulation display system of a power system.
An internal overvoltage analog display system for an electrical power system, comprising: the device comprises a microprocessor, a display module, a cut-to-empty converting circuit module and a key circuit module;
the display module, the cut-to-empty converting circuit module and the key circuit module are all in communication connection with the microprocessor;
the cut-to-empty converting circuit module at least comprises a four-bit dial switch, and when the four-bit dial switch is closed, no-load transformer is cut off when no inhibition measures are taken;
the first bit of the four-bit dial switch is independently opened to cut off the no-load transformer when the electrolytic capacitor is additionally arranged;
the second position of the four-position dial switch is independently opened to represent that the no-load transformer is cut off when the voltage stabilizing tube is added;
the third bit of the four-bit dial switch is independently opened to cut off the no-load transformer when the piezoresistor is added;
the fourth single opening of the four-bit dial switch represents the cutting of the no-load transformer when the additional resistor is added.
Furthermore, the cut-to-empty converting circuit module further comprises a two-bit dial switch, wherein the first position of the two-bit dial switch is independently opened to represent the cut-to-full condition, the second position of the two-bit dial switch is independently opened to represent the cut-off of 70% of capacitive load, and the two-bit dial switch is completely closed to represent the cut-off of the no-load transformer.
Further, the first bit of the two-bit dial switch is connected with the secondary coil of the transformer through a resistor series-parallel network, the resistor series-parallel network comprises two paths with the same resistance and connected in parallel, and each path comprises two resistors with the same resistance in series.
Further, the first bit of the two-bit dial switch is connected with the secondary coil of the transformer through three capacitors connected in parallel.
Further, the first bit of the four-bit dial switch is connected with one end of four capacitors connected in parallel, the other ends of the four capacitors connected in parallel are respectively connected with a test point oscilloscope and a relay, and the relay is connected with a microprocessor.
Further, the second position of the four-bit dial switch is connected with one end of two voltage stabilizing tubes connected in series with the opposite head, the other end of the two voltage stabilizing tubes connected in series with the opposite head is respectively connected with a test point oscilloscope and a relay, and the relay is connected with the microprocessor.
Further, the third bit of the four-bit dial switch is connected with one end of the piezoresistor, the other end of the piezoresistor is respectively connected with the test point oscilloscope and the relay, and the relay is connected with the microprocessor.
Further, the fourth bit of the four-bit dial switch is connected with one end of an additional resistor, the other end of the additional resistor is respectively connected with a test point oscilloscope and a relay, and the relay is connected with a microprocessor.
Further, the processor is also connected with a plurality of indicator lamps for indicating the running state of the program.
Further, the key circuit module comprises a first key, a second key, a third key and a fourth key, and the first key, the second key, the third key and the fourth key are respectively connected with a capacitor in parallel;
the first key is a setting key, and enters a delay adjustment interface when the first key is pressed;
the second key is an adding key, the third key is a subtracting key, and the second key or the third key is pressed down on the adjusting interface, so that the delay time of the cut-off can be set;
the fourth key is a cut space transformer key, when the fourth key is pressed down, the relay acts after a certain delay time, and the transformer is cut off.
The second aspect of the present invention provides a working method of an internal overvoltage simulation display system of a power system, using the internal overvoltage simulation display system of a power system, comprising the following steps:
setting inhibition measures through a four-bit dial switch;
the selection of the cut-space change, the cut-full change and the cut-off of 70% capacitive load is carried out through a four-bit dial switch;
setting delay time and performing transformer cutting control through a key circuit module;
the microprocessor generates a transformer cutting instruction according to the received pressing signal of the fourth key and the combination of the inhibition measure and the cutting selection result;
and displaying the cutting effect through the display module and the oscilloscope.
Compared with the prior art, the invention has the beneficial effects that:
according to the system and the method for simulating and displaying the overvoltage in the power system, provided by the invention, on the basis of retaining overvoltage cause elements, the voltage level is reduced, the real electric environment is simulated, corresponding countermeasure measures are respectively designed for different overvoltage causes, and demonstration of insufficient prevention, proper prevention and excessive method can be realized.
Additional aspects of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention.
Fig. 1 is a block diagram of a cut space transformer device according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a single chip microcomputer control system according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of a power module according to an embodiment of the invention.
Fig. 4 is a schematic diagram of a display module according to an embodiment of the invention.
Fig. 5 is a schematic diagram of a cut-to-space transformer circuit according to an embodiment of the present invention.
Fig. 6 is a two-dimensional effect diagram of a PCB diagram according to an embodiment of the present invention.
Fig. 7 is a three-dimensional effect diagram of a PCB diagram according to an embodiment of the present invention.
Detailed Description
The invention will be further described with reference to the drawings and examples.
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the invention. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present invention. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the terms "comprises" and/or "comprising" when used in this specification are taken to specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.
Embodiments of the invention and features of the embodiments may be combined with each other without conflict.
Example 1:
to see the cut-off space variant, it is necessary to cut off at the maximum value of the current, so it is necessary to make a device with adjustable cut-off point to study at what point the transformer is cut off, what is the overvoltage at this time. If the oscillograph is directly used for observing the waveform when the no-load transformer is cut off, the voltage and current waveforms obtained each time are not comparable because the position of the cutting point, which is specifically located in the current sine waveform, cannot be accurately judged. The cutting point adjusting device has the function of visually observing the position of the cutting point and ensuring that the cutting point is cut off at the same position each time.
In this implementation, an opening point is designed according to the overvoltage amplitude caused by the actual transformer parameter, and the opening point is adjustable, that is, when the value in the singlechip is changed or the time key is manually adjusted, the maximum overvoltage waveform can be ensured to be observed when different transformers are replaced.
As shown in fig. 1, the transformer is represented by an inductance coil, which is an adjustable synchronous time generator, the synchronous signal comes from the mains supply, the tested cut-off transformer is also connected to the mains supply, and when the synchronous signal crosses the zero point, a fixed delay is passed, and the cut-off transformer signal is sent out. From the sending of the signal to the real disconnection of the transformer by the relay, there is a delay time, mainly the action delay of the relay, the signal needs to be sent in advance to disconnect the transformer at the highest voltage point, the quantity of the signal needs to be advanced, and the resistor in the diagram needs to be adjustable to adjust the delay time.
The synchronous signal of the singlechip comes from the mains supply, the mains supply is weak current for high voltage, but is strong current for the singlechip, namely the mains supply also needs to pass through a voltage reducing device, the voltage calculated according to the overvoltage principle is set with 0 or 1 signal and is transmitted to the singlechip, and the components are selected to control the cut-off point.
In the device, an AC12V signal is adopted, and the AC12V signal is not directly sent to a singlechip power supply interface, but needs certain rectification, and then the signal is transmitted to be used as a synchronous signal output of the singlechip. A key capable of intuitively adjusting time is designed to adjust the time of the cut-space changing action and the delay of the synchronous signal. The action contacts of the relay are divided into a normally open type and a normally closed type, the normally closed action contacts are used for completing the operation of cutting off the no-load transformer, and the normally open contact is used for obtaining a synchronous signal required by the system.
In addition, the device also needs a dial switch to realize the selection of different loads, inhibition measures and the like, needs a filter capacitor, a resistor for limiting a current value, and related components such as a lightning arrester, a voltage stabilizing diode and the like which are needed in the inhibition measures so as to observe different overvoltage waveforms, and the voltage class of an actual power system is reduced by the proportional switching device, so that a waveform diagram when a transformer is truly cut off is fully displayed through calculation. In the design, besides the no-load transformer, the situation of cutting off the full-load resistance load and the load when about 70% of the capacitance is also designed, and the suppression measures such as adding the resistance, the voltage stabilizing tube, the lightning arrester and the capacitance are adopted, so that overvoltage waveforms under different situations and overvoltage conditions under different collocation situations can be fully displayed. In addition, a delay adjusting link is added, so that the time of the cut-to-space change can be conveniently adjusted, and the worst condition can be observed.
Specifically, in the minimum system, the STC8A8K is a newer chip, which has no external clock system and crystal oscillator system, the C52 chip is a traditional 51-core single chip microcomputer, which has an external clock system and external crystal oscillator, and an external reset system, and a reset key is designed, as shown in fig. 2. The STC8A8K is used as an enhancement of the 51 kernel, a clock system and a reset system are integrated into an internal circuit, and a clock part circuit is not needed to be designed, so that the direct power supply can be put into use, a capacitor is added at a power supply port to play a role in filtering, clutter is filtered, a capacitor is often added between a power supply and the ground, and the more the capacitor is put, the purer the waveform is. The wiring terminal is provided with four pins which are program downloading ports, and the program can be downloaded into the singlechip by connecting the downloading device.
Four keys in the figure are designed according to design requirements, the time delay of the cut space transformer can be set according to the requirement by pressing a setting key to enter a time delay adjusting interface and pressing an adding key or a subtracting key on the adjusting interface, and the time delay of the cut space transformer is 0.1mS as a unit. The button of the cut space transformer is an action instruction button for cutting off the transformer, the button is pressed down, the relay acts after a certain delay time, the transformer is cut off, and an oscilloscope can be used for seeing whether the overvoltage state is at the rising edge or the falling edge. In the design circuit of the key, a capacitor with the specification of 104 is connected in parallel under each button, because after the key is pressed, irregular continuous voltage change is observed by an oscilloscope, because clutter appears when the key is pressed, for example, the original P3.4 port has a high level, the terminal is grounded to a low level, the key is pressed, the port level is pulled down, a process of reducing in oscillation can occur, the judgment of a singlechip is affected by clutter, and in order to reduce the interference of the clutter, the capacitor is added for a delay, so that the key pressing or bouncing state can be well judged.
The LED lamp is flashed while serial port data is sent, so that whether a program is running can be clearly known, and the LED lamp is most visual, can be used for multiple purposes in programming, and further can be flashed for several times to indicate which program section is running, so that four LED lamps are added in a single chip microcomputer minimum system to be used for checking the running condition of the program and the running state of the program.
Fig. 3 is a power module, mainly composed of a power interface of DC005 and a six-pin switch. The resistor is connected in series with the LED display, and the resistor mainly plays a role in current limiting because the LED exhibits current nonlinearity after being lighted by a voltage source, and if the resistor is not present, the LED is likely to burn out due to excessive current.
The digital display module described in fig. 4 adopts a dynamic scanning display mode, uses a triode for scanning control, if P10 has a low level, the triode Q2 is turned on, the cathode of the first digital tube is connected to the GND terminal, which is equivalent to the cathode, and if P00 has a high level, a section of digital tube is turned on. The four groups of resistor triodes below the nixie tube are combined to realize the function of bit selection, which nixie tube can be lightened, and P00-P07 is lightened by high level to control what number is displayed by the seven-segment display. The STC singlechip chip has stronger driving capability after being improved, can provide larger current and can directly drive the nixie tube. The resistor is connected in series above the nixie tube to play a role in limiting current.
As shown in fig. 5, if all of the four-bit dip switches are in the OFF state, this represents the situation where all lines and equipment are not connected to the circuit, i.e., no suppression is taken, and no-load transformer is cut OFF. If one dial switch is turned on sequentially from left to right, it represents: the electrolytic capacitor is added, the voltage stabilizing tube (DZ 1,2 are connected in series opposite to the head, because of alternating current, the voltage stabilizing tube can be conducted in a single phase, only one direction is voltage-stabilized), the piezoresistor, namely the lightning arrester, is added, and after the resistor is added, the internal overvoltage is restrained.
The transformer secondary simulates the conditions of cut-to-air, cut-to-full and cut-off about 70% of the capacitive load, respectively. In the full cut transformation, the power of the resistor is larger than that calculated, the margin is reserved, 4 transformers with the power of 1W are connected in series and parallel, the resistance value is unchanged, but the power is increased by 4 times, because the rated voltage of the transformer adopted in the design is 9V, the maximum power value which can be born is 3W, and the transformer is a 3VA transformer which is displayed on a transformer nameplate. Therefore, through detailed analysis and calculation, the full load state when the capacitor is 27 ohms can be calculated by using the capacity, the withstand voltage value and the like, and the capacitor is formed by connecting three 22 uFs in parallel, so that the withstand voltage value of the capacitor is improved, and the situation of cutting off 70% of capacitive load is simulated. If the two-bit dip switch is all in the OFF state, this represents cutting OFF the empty load transformer.
The test point is connected with the oscilloscope, the waveform condition of the voltage can be observed, and the dial switch has a gating function and can automatically select different suppression circuits. In the relay driving circuit, in a default off state, a PNP triode is adopted to drive the relay, the relay is more stable, the P14 port is conducted in a low level mode, and the electromagnetic relay JC1 is electrified, so that the circuit is conducted. The JP3 terminal can be connected with 12V alternating current, and when P14 is connected with 0, the terminal is closed. The relay has electromagnetic coil winding, is inductive, at the moment of disconnection, the coil current in the relay can not be released, so that the magnetic energy is stored in the coil, and the unreleasable magnetic energy can be converted into electric field energy to release very high voltage, namely overvoltage is generated, and the relay module is likely to be damaged, so that a D1 diode is connected to release and eliminate the transient high-value voltage, and the relay is protected from being damaged.
The PCB circuit effect diagram of the specific circuit in this embodiment is shown in fig. 6 and fig. 7.
According to the embodiment, specific research and analysis of overvoltage in the power system are firstly conducted, theoretical analysis is conducted mainly from formation causes of various internal overvoltage, preventive measures are provided, a demonstration verification scheme is designed, overvoltage waveforms are verified and summarized, measuring instruments such as modern technology display equipment are adopted, and all-dimensional multi-angle display, analysis and calculation of voltage and current waveforms are conducted timely.
According to the embodiment, on the basis of comprehensively summarizing the formation reasons of various types of internal overvoltage, necessary theoretical analysis and calculation are carried out on the internal overvoltage, on the basis of retaining the overvoltage cause elements, the voltage class is reduced to design a real electric environment, corresponding precautions are respectively designed for different overvoltage causes, insufficient, proper and excessive prevention demonstration can be realized, and in addition, modern measurement methods such as a digital oscilloscope and the like are used for conveniently recording and storing the overvoltage process.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (5)
1. An inside overvoltage simulation display system of electric power system, its characterized in that:
comprising the following steps: the device comprises a microprocessor, a display module, a cut-to-empty converting circuit module and a key circuit module;
the display module, the cut-to-empty converting circuit module and the key circuit module are all in communication connection with the microprocessor;
the cut-to-empty converting circuit module at least comprises a four-bit dial switch, and when the four-bit dial switch is closed, no-load transformer is cut off when no inhibition measures are taken;
the first bit of the four-bit dial switch is independently opened to cut off the no-load transformer when the electrolytic capacitor is additionally arranged;
the second position of the four-position dial switch is independently opened to represent that the no-load transformer is cut off when the voltage stabilizing tube is added;
the third bit of the four-bit dial switch is independently opened to cut off the no-load transformer when the piezoresistor is added;
the fourth bit of the four-bit dial switch is independently opened to represent that the no-load transformer is cut off when the additional resistor is added;
the first bit of the four-bit dial switch is connected with one end of four capacitors connected in parallel, the other ends of the four capacitors connected in parallel are respectively connected with a test point oscilloscope and a relay, and the relay is connected with a microprocessor;
the second position of the four-bit dial switch is connected with one end of two voltage stabilizing tubes connected in series with the opposite head, the other end of the two voltage stabilizing tubes connected in series with the opposite head is respectively connected with a test point oscilloscope and a relay, and the relay is connected with the microprocessor;
the third bit of the four-bit dial switch is connected with one end of the piezoresistor, the other end of the piezoresistor is respectively connected with the test point oscilloscope and the relay, and the relay is connected with the microprocessor;
the fourth bit of the four-bit dial switch is connected with one end of an additional resistor, the other end of the additional resistor is respectively connected with a test point oscilloscope and a relay, and the relay is connected with a microprocessor;
the key circuit module comprises a first key, a second key, a third key and a fourth key, and a capacitor is respectively connected in parallel with the first key, the second key, the third key and the fourth key;
the first key is a setting key, and enters a delay adjustment interface when the first key is pressed;
the second key is an adding key, the third key is a subtracting key, and the second key or the third key is pressed down on the adjusting interface, so that the delay time of the cut-off can be set;
the fourth key is a cut space transformer key, when the fourth key is pressed down, the relay acts after a certain delay time, and the transformer is cut off.
2. The power system internal overvoltage analog display system of claim 1, wherein:
the switching circuit module of the cut-to-empty converter further comprises a two-bit dial switch, wherein the first bit of the two-bit dial switch is independently opened to represent the cut-to-full condition, the second bit of the two-bit dial switch is independently opened to represent the cut-off of 70% of capacitive load, and the two-bit dial switch is completely closed to represent the cut-off of the empty-load transformer.
3. The power system internal overvoltage analog display system of claim 2, wherein:
the first bit of the two-bit dial switch is connected with the secondary coil of the transformer through a resistor series-parallel network, the resistor series-parallel network comprises two paths with the same resistance value and connected in parallel, and each path comprises two resistors with the same resistance value connected in series.
4. The power system internal overvoltage analog display system of claim 2, wherein: the first bit of the two-bit dial switch is connected with the secondary coil of the transformer through three capacitors which are connected in parallel.
5. The power system internal overvoltage analog display system of claim 1, wherein:
the processor is also connected with a plurality of indicator lamps for indicating the running state of the program.
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| CN202111339641.6A CN114038282B (en) | 2021-11-12 | 2021-11-12 | Power system internal overvoltage simulation display system and working method |
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| CN202111339641.6A CN114038282B (en) | 2021-11-12 | 2021-11-12 | Power system internal overvoltage simulation display system and working method |
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