CN113923432B

CN113923432B - Video reading method and device, electronic equipment and storage medium

Info

Publication number: CN113923432B
Application number: CN202111474863.9A
Authority: CN
Inventors: 王迎智; 高倩; 马晓忠
Original assignee: Jixian Artificial Intelligence Co Ltd
Current assignee: Jixian Artificial Intelligence Co Ltd
Priority date: 2021-12-06
Filing date: 2021-12-06
Publication date: 2022-02-11
Anticipated expiration: 2041-12-06
Also published as: WO2023103954A1; CN113923432A

Abstract

The invention provides a video reading method and device, electronic equipment and a storage medium, and is applied to the technical field of three-dimensional display. The method comprises the following steps: when at least two paths of video streams are played simultaneously, cache block numbers of videos to be played are obtained, wherein the at least two paths of video streams correspond to at least two buffer areas respectively, cache blocks in the at least two buffer areas correspond to one, and the cache blocks corresponding to each other in the at least two buffer areas have the same cache block numbers; inquiring the cache block address of each path of video stream corresponding to the cache block number in a cache block address list; in the buffer area corresponding to each video stream, the video frame is read from the cache block indicated by each cache block address and output, and the time sequence of the video frame stored in each cache block corresponding to a single cache block number is the same. Therefore, when at least two paths of video streams are synchronously processed, a large amount of calculation can be avoided, the processing complexity is reduced, the synchronous processing process is simplified, and the real-time performance and the alignment precision of video synchronization are improved.

Description

Video reading method and device, electronic equipment and storage medium

Technical Field

The invention is applied to the technical field of three-dimensional display, and particularly relates to a video reading method and device, electronic equipment and a storage medium.

Background

With the increasing maturity of 3D (Three dimensional) display technology, the 3D display technology is applied to the field of medical images, and the related way of viewing 3D medical images is realized by a user wearing a 3D endoscope.

The watching principle of the 3D endoscope is that left and right eyes of a person respectively receive left and right eye video images played according to a frame sequence, and then the left and right eye video images are synthesized through a brain to generate a three-dimensional effect. During film watching, the left eye and the right eye need to receive video images through the 3D endoscope, so that a left eye video frame of a left eye video stream formed by a left eye image can be received only by the left eye, and a right eye video frame of a right eye video stream formed by a right eye image can be received only by the right eye.

Therefore, two video streams consisting of video images on the left eye and the right eye need to be collected, and the two video streams are sent to a display after synchronous processing of the two video streams is completed. At present, the synchronization processing is usually performed by calculating a video progress difference value or a video segment synchronization compensation value, and both methods require a large amount of calculation and are relatively complex to implement, so that the real-time requirement of the 3D endoscope image video processing cannot be met.

Disclosure of Invention

In view of this, embodiments of the present invention provide a video reading method, an apparatus, an electronic device, and a storage medium, which are used to solve the technical problem that the related art cannot meet the requirement on the real-time performance of 3D endoscope image video processing.

A first aspect of the present invention provides a video reading method, including:

when at least two paths of video streams are played simultaneously, cache block numbers of videos to be played are obtained, wherein the at least two paths of video streams respectively correspond to at least two buffer areas, cache blocks in the at least two buffer areas correspond to one another one by one, and the cache blocks in the at least two buffer areas which correspond to one another have the same cache block numbers;

inquiring the cache block address of each path of video stream corresponding to the cache block number of the video frame to be played in a cache block address list;

and for each video stream, reading and outputting video frames from the cache block indicated by each cache block address in the buffer area corresponding to each video stream, wherein the time sequence of the video frames stored in each cache block corresponding to the single cache block number is the same.

According to a second aspect of the present invention, there is provided a video reading apparatus, the apparatus comprising:

the video playing device comprises a first obtaining module, a second obtaining module and a third obtaining module, wherein the first obtaining module is used for obtaining cache block numbers of videos to be played when at least two paths of video streams are played simultaneously, the at least two paths of video streams respectively correspond to at least two buffer areas, cache blocks in the at least two buffer areas correspond to one another one by one, and the cache blocks in the at least two buffer areas which correspond to each other have the same cache block numbers;

the query module is used for querying the cache block address of each path of video stream corresponding to the cache block number of the video frame to be played in the cache block address list;

and the reading module is used for reading and outputting a video frame from the cache block indicated by each cache block address in the buffer area corresponding to each video stream, wherein the time sequence of the video frame stored in each cache block corresponding to the single cache block number is the same.

According to a third aspect of the present invention, there is provided a readable storage medium, on which a program or instructions are stored, which when executed by a processor, implement the video reading method of the first aspect.

According to a fourth aspect of the present invention, there is provided an electronic device, comprising a processor, a memory, and a program or instructions stored on the memory and executable on the processor, wherein the program or instructions, when executed by the processor, implement the video reading method according to the first aspect.

Aiming at the related technology, the invention has the following advantages:

according to the video reading method, the video reading device, the electronic equipment and the storage medium, when at least two paths of video streams are played simultaneously, cache block numbers of videos to be played are obtained, wherein the at least two paths of video streams respectively correspond to at least two buffer areas, the cache blocks in the at least two buffer areas correspond to one another, and the cache blocks corresponding to each other in the at least two buffer areas have the same cache block numbers. The time sequence of the video frames stored in each cache block corresponding to the number of a single cache block is the same, so that the cache block address of each path of video stream corresponding to the cache block number of the video frame to be played can be directly inquired in the cache block address list by acquiring the cache block number; and then, the cache blocks indicated by the addresses of the cache blocks are respectively read to complete the synchronous processing of at least two paths of video streams, and video frames with the same time sequence of each path of video stream are obtained and output, so that when the at least two paths of video streams are synchronously processed, a large amount of calculation can be avoided, the processing complexity is reduced, the synchronous processing process is simplified, and the real-time performance and the alignment precision of video synchronization are improved.

The foregoing is a summary of the present invention, and embodiments of the present invention are described below to make the present invention more comprehensible.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

fig. 1 is a flowchart illustrating steps of a video reading method according to an embodiment of the present invention;

fig. 2 is a schematic view of a video reading structure according to an embodiment of the present invention;

FIG. 3 is a block diagram illustrating a cache block address list according to an embodiment of the present invention;

FIG. 4 is a schematic view of another video reading structure according to an embodiment of the present invention;

FIG. 5 is a flowchart illustrating steps of another video reading method according to an embodiment of the present invention;

FIG. 6 is a cache block partitioning diagram according to an embodiment of the present invention;

FIG. 7 is a flowchart illustrating steps of a video reading method according to another embodiment of the present invention;

FIG. 8 is a block diagram illustrating a cache block address boundary according to an embodiment of the present invention;

FIG. 9 is a flowchart illustrating steps of a video reading method according to another embodiment of the present invention;

fig. 10 is a block diagram of a video reading apparatus according to an embodiment of the present invention;

fig. 11 is a block diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments that can be derived by one of ordinary skill in the art from the embodiments given herein are intended to be within the scope of the present invention.

The terms first, second and the like in the description and in the claims of the present invention are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the invention may be practiced other than those illustrated or described herein, and that the objects identified as "first," "second," etc. are generally a class of objects and do not limit the number of objects, e.g., a first object may be one or more. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/" generally means that a preceding and succeeding related objects are in an "or" relationship.

The following describes in detail a video reading method, an apparatus, an electronic device, and a storage medium according to embodiments of the present invention with reference to the accompanying drawings.

The 3D display technology is a novel display technology, and is compared with ordinary 2D picture display, and the 3D technology can make the picture become three-dimensional lifelike, and the image no longer restricts in the plane of screen on, seems to be can walk out the screen outside, lets spectator have the sensation of being personally on the scene, in glasses formula 3D technology, can subdivide three kinds of main types: color difference, polarization and active shutter, among which the polarization 3D technology is most widely used for its better image effect and lower use cost.

With the development of new technology, 3D display technology is applied to the field of medical images, images in a patient body are collected through a medical 3D endoscope, 3D images are displayed on display equipment such as a monitor and a display screen, the images are more vivid compared with 2D images, the observation of a focus part is clearer, the image is more layered, and remarkable effects are achieved in the aspects of providing diagnosis efficiency and accuracy.

The polarized light type 3D decomposes an original image by utilizing the principle that light has a vibration direction, the image is divided into two groups of pictures of vertical polarized light and horizontal polarized light, then polarized light lenses with different polarization directions are adopted on the left and the right of a 3D glasses, so that the two groups of pictures can be received by the left eye and the right eye of a person, and then the three-dimensional image is synthesized by the brain.

According to the polarized light type 3D display technology, two paths of video streams need to be collected, and the video streams are sent to a display after video processing is completed. Because the two paths of videos are relatively independent in acquisition and processing processes and have certain time deviation, the two paths of videos need to be synchronously processed before being sent to a display, and the time deviation is ensured to be within a required range.

The current commonly used video synchronization methods comprise the following two methods, one is to compare the video progress difference and correct the synchronization deviation through a time stamp; the other method is to calculate a synchronous compensation value according to the video segments and realize the synchronization of two paths of videos according to the synchronous compensation value. Both methods require a large amount of calculation, and the deviation of video synchronization is adjusted according to the calculation result, so that the method is complex to implement and is not suitable for the requirement on the real-time property of the 3D endoscope image video processing. And through the two schemes, the obtained video data synchronization result is not high in precision and completely depends on the processing performance, and the synchronization effect is related to the calculation processing time of the video parameters.

In order to solve the above problems, the present invention provides a video reading method, an apparatus, an electronic device, and a storage medium, which solve the problem that a large amount of calculation is required in the related scheme by periodically calculating a video progress difference, and can improve the real-time performance of video synchronization, reduce the processing complexity, and improve the video synchronization precision.

As shown in fig. 1, a video reading method provided in an embodiment of the present invention includes:

step S101, at least two paths of video streams are obtained.

In this embodiment of the present invention, the at least two video streams may include a main video stream and at least one sub video stream, the main video stream may be a video stream of one path randomly selected from the at least two video streams, and the sub video stream may be a video stream of another path except the main video stream; the main path video stream may also be a fixed path video stream, and the secondary path video stream may be a path video stream other than the main path video stream, which may be determined specifically according to actual requirements, and is not limited here.

In the embodiment of the present invention, the controller may obtain at least two video streams through the acquisition device.

Illustratively, referring to fig. 2, at least two video streams are acquired by a capturing device such as a camera or a lens of a 3D endoscope, and a controller detects video frames of the at least two video streams through a video detection module.

In the embodiment of the present invention, the video frame of the main video stream detected by the controller through the video detection module is a main video frame, and the video frame of the slave video stream detected by the controller through the video detection module is a slave video frame.

Step S102, storing the video frames with the same time sequence in at least two video streams in at least two cache blocks corresponding to the same cache block number respectively.

In the embodiment of the present invention, the video frames with the same time sequence in the at least two video streams refer to the video frames of each video stream with the same timestamp in the at least two video streams, or refer to the video frames of each video stream with the same receiving order in the at least two video streams; that is, the time sequence is the same, which means that the timestamps are the same or that the receiving order is the same, and the time sequence may be determined according to the actual requirement, and is not limited herein.

In the embodiment of the invention, the cache blocks are storage areas with determined capacity and address intervals, the capacity is determined according to the resolution, color depth and the like of an acquired video image, each cache block can store at least one video frame, the address intervals are divided by an Application software developer, a starting address and an ending address of each cache block are issued to a cache block address list through an Application Processor (APU), the one-to-one correspondence between the cache block numbers and the cache block addresses is established, and the starting address and the ending address of the head and the tail of each cache block are put into the cache block address list, so that the quick conversion between the cache block numbers and the cache addresses is realized. Each cache block is assigned a number, i.e. a cache block number, and the cache blocks are divided into cache blocks 0, 1 …, and n +1, as shown in fig. 3.

It should be noted that, in the embodiment of the present invention, the at least two video streams may respectively correspond to at least two buffers, and cache blocks in the at least two buffers correspond to one another, where the cache blocks corresponding to each other in the at least two buffers have the same cache block number.

In the embodiment of the invention, after at least two paths of video streams are acquired through a camera or a lens of a 3D endoscope and other acquisition devices, a controller detects video frames of the at least two paths of video streams through a video detection module, and then video frames of each path of video stream with the same timestamp or the same receiving sequence in the at least two paths of video streams are respectively stored in at least two cache blocks corresponding to the same cache block number.

Exemplarily, referring to fig. 4, after the system is powered on, the configuration file is loaded successfully, the Application Processor (APU) starts to operate normally, performs initialization configuration on the cache management (master) end and the cache management (slave) end, and divides the memory space into at least two video data buffers, which are respectively used for storing at least two video data streams, where a master video stream in the at least two video streams may be a video stream 1, a slave video stream in the at least two video streams may be a video stream 2, the cache management module corresponding to the video stream 1 is used as the cache management (master) end, and the cache management module corresponding to the video stream 2 is used as the cache management (slave) end; after acquiring the video stream 1 and the video stream 2 through a camera or a lens of the 3D endoscope and other acquisition equipment, the controller detects video frames of the video stream 1 and the video stream 2 through a video detection module, then storing the main video frame in the video frames with the same timestamp or the same receiving sequence into the video stream 1 data buffer area through the buffer management (main) end, then obtaining the buffer block number of the buffer block stored in the main video frame in the video stream 1 data buffer area, synchronizing the buffer block number of the buffer management (main) end to the buffer management (slave) end in real time to ensure that the buffer block numbers of the write operation of the two buffer management modules are the same, so that the buffer management (slave) end stores the slave video frame in the video frame with the same timestamp or the same receiving order as the master video frame in the buffer block corresponding to the buffer block number in the data buffer of the video stream 2.

Step S103, when at least two paths of video streams are played simultaneously, the cache block number of the video to be played is obtained.

In the embodiment of the present invention, the video to be played may refer to a video obtained by performing synchronization processing on a 3D endoscope image video, for example: the synchronous video stream 1 and the synchronous video stream 2 shown in fig. 4 may be determined according to actual requirements, and are not limited herein.

In the embodiment of the invention, when the display device of the 3D endoscope simultaneously plays at least two paths of video streams, the controller can acquire the cache block number of the video to be played.

Illustratively, referring to fig. 4, the video obtained by performing the synchronization process on the 3D endoscopic image video includes: and when the display device of the 3D endoscope simultaneously plays the synchronous video stream 1 and the synchronous video stream 2, acquiring the cache block numbers for storing the synchronous video stream 1 and the synchronous video stream 2.

And step S104, inquiring the cache block address of each path of video stream corresponding to the cache block number of the video frame to be played in the cache block address list.

In the embodiment of the present invention, in order to implement read-write operations on different cache blocks, an Application Processor (APU) needs to configure a cache block address of each cache block as an initialization parameter into a cache block address list, and simultaneously establish a one-to-one mapping relationship between a cache block number and a start address and an end address included in the cache block address, so that after obtaining the cache block number of a video to be played, a controller can extract the start address and the end address corresponding to the cache block number according to the cache block number, thereby obtaining the cache block address stored in each path of video stream corresponding to the cache block number.

For example, referring to fig. 5, after obtaining the buffer block number of the video to be played, the controller extracts, through the address extraction module, a start address and an end address corresponding to the buffer block number of the video frame to be played from the buffer block address list, so as to obtain a buffer block address stored in each path of video stream corresponding to the buffer block number of the video frame to be played.

Step S105, for each path of video stream, in the buffer area corresponding to the path of video stream, reading and outputting the video frame from the cache block indicated by each cache block address, wherein the time sequence of the video frame stored in each cache block corresponding to a single cache block number is the same.

Wherein performing S105 for each of the at least two video streams is synchronized.

In an embodiment of the invention, the cache block address comprises a start address and an end address.

In the embodiment of the invention, the controller reads the end address of the cache block from the start address of a single cache block according to the position indicated by the start address and the end address included in each cache block address, obtains and outputs the video frame of each path of video stream.

Illustratively, referring to fig. 2, after the cache block number is sent into the cache block address list managed by the cache block address, the controller extracts the start address and the end address corresponding to the cache block number; and the read operation bus time sequence control submodule acquires the use permission of the interface bus through arbitration, and reads and outputs the video frame data stored in the cache block corresponding to the cache block number according to the address information of the starting address and the ending address after acquiring the use permission.

The invention provides a video reading method, when at least two paths of video streams are played simultaneously, the number of a cache block of a video to be played is obtained; the time sequence of the video frames stored in each cache block corresponding to a single cache block number is the same, so that the cache block address of each path of video stream corresponding to the cache block number can be directly inquired in a cache block address list by acquiring the cache block number; then, the cache blocks indicated by the addresses of the cache blocks are respectively read to complete the synchronous processing of at least two paths of video streams, and video frames with the same time sequence of each path of video stream are obtained and output; therefore, when the at least two paths of video streams are synchronously processed, a large amount of calculation can be avoided, the processing complexity is reduced, the synchronous processing process is simplified, the same cache block number control is adopted for the read-write operation at every time, extra calculation is not needed, the processing delay is reduced to the minimum, the real-time performance is good, the real-time performance of video synchronization can be improved when the two paths of video streams of the 3D endoscope are synchronously processed, the requirement on the real-time performance of the 3D endoscope image video processing can be met, the video synchronization precision is improved, and the effect is good.

In the embodiment of the invention, at least two paths of video streams are synchronously processed and converted into synchronous read-write operation of a cache block, so that the complex calculation in the existing scheme is removed, the processing real-time performance is improved, and the method is very suitable for being realized in a Field Programmable Gate Array (FPGA) platform.

As shown in fig. 6, a video reading method according to an embodiment of the present invention includes:

step S201, at least two video streams are obtained.

This step can refer to the detailed description of step S101, and is not described herein again.

Step S202, the at least two video streams include a main video stream and a secondary video stream, and main video frames of the main video stream are stored in the first cache block.

In the embodiment of the present invention, the first buffer block is used for storing a main video frame of the main video stream, the first buffer block is located in a first buffer area, the first buffer area corresponds to the buffer management (main) end, and the first buffer area may be located in the first memory.

In the embodiment of the present invention, after the controller detects the main video frame of the main video stream through the video detection module, the controller stores the main video frame in the first cache block of the first memory.

Illustratively, referring to fig. 2, the main video stream of the at least two video streams may be video stream 1, and the first buffer may be a video stream 1 data buffer. After detecting the main video frame of the video stream 1 through the video detection module, the controller stores the main video frame in the data buffer of the video stream 1.

Alternatively, as shown in fig. 7, step S202 may include:

in sub-step S2021, the current available cache block number is obtained.

In the embodiment of the present invention, the available cache block number is the number of the cache block in the memory to which data can be written. The memory can comprise a first memory and a second memory, wherein a first buffer area is arranged in the first memory, and a second buffer area is arranged in the second memory, namely two independent memories are adopted as the buffer areas of the two paths of video stream data; the first buffer area and the second buffer area can also be directly arranged in the memory, namely the buffer areas of two paths of video stream data share one memory, each buffer area is divided into a plurality of buffer blocks, and each buffer block has a fixed number and is used for storing at least one piece of video frame image data. When two independent memories are adopted, the synchronous reading of video frames of the cache management (main) end and the cache management (auxiliary) end is related to the bandwidth of two physical hardware interfaces, and the synchronous deviation of the cache management (main) end and the cache management (auxiliary) end can be reduced to the maximum extent by adopting the same chip and physical hardware interface design; when a memory is shared, video frame reading at two ends of a cache management (main) end and a cache management (slave) end needs to share a physical hardware interface (memory interface), the physical bandwidth of the memory interface is far higher than the video stream reading bandwidth, a time division multiplexing mechanism can be adopted to control reading of fixed length data each time, a main channel and a slave channel are switched, and memory interface sharing is realized; both methods can ensure the synchronization of the reading of at least two video streams.

In the embodiment of the invention, the controller inquires according to the number sequence of the cache blocks, and determines the number of the idle cache block which is the most front and is not occupied as the number of the available cache block for the writing operation. Accordingly, the determined number of the available cache block is the number of the available cache block described in this embodiment.

Illustratively, referring to fig. 3, each buffer is divided into a number of cache blocks by the application software developer, each cache block having a fixed cache block number, for example: cache block 0, cache block 1 … cache block n, cache block n + 1. Referring to fig. 2, the controller acquires the number of the cache block that can perform the write operation as the available cache block number so that the controller notifies the write operation bus timing control sub-module to fetch the available cache block number.

In the substep S2022, a write start address corresponding to an available cache block number is searched for in the cache block address list.

In the embodiment of the present invention, the write start address refers to a start address of an available cache block, and the controller may search, according to the number of the available cache block, a start address corresponding to the number of the available cache block in a cache block address list as the write start address.

Each cache block illustratively has a start address and an end address, which are two boundaries of the cache block, which may be physical addresses of the memory chip or relative addresses. The cache management module may perform data read/write operations on a certain cache block according to the start address and the end address, and the address boundary division of the cache block is as shown in fig. 8. Referring to fig. 5, the controller configures the address information of the start address and the end address of each cache block into the cache block address list, and after acquiring the number of an available cache block, the controller may search, in the cache block address list, for the start address corresponding to the number of the available cache block as the write start address according to the number of the available cache block.

In the sub-step S2023, the main video frame data of the main video stream is written into the cache block corresponding to the available cache block number from the write start address, where the cache block corresponding to the available cache block number is the first cache block.

In the embodiment of the present invention, after the controller detects the main video frame of the main video stream through the video detection module, the main video frame data of the main video stream is written into the cache block corresponding to the available cache block number from the write-in start address, where the cache block corresponding to the available cache block number is the first cache block.

Illustratively, the master of the cache management module receives a master video frame data, according to the number of the available cache block, extracts the start address information of the cache block (i.e. the first cache block) in the first buffer corresponding to the number of the available cache block from the cache block address list, and writes a master video frame data into the first cache block through the interface bus.

The invention can determine the cache block which can be written with data currently in the memory by acquiring the number of the available cache block, thereby searching the write-in initial address corresponding to the number of the available cache block in the cache block address list according to the number of the available cache block, and further writing the main video frame data of the main video stream into the cache block (namely, the first cache block) corresponding to the number of the available cache block from the write-in initial address, so as to avoid the damage and loss of the main video stream data caused by overwriting the cache block in which the data is written when the main video frame data of the main video stream is written into the memory.

And a substep S2024 of detecting an end-of-frame flag of the main-path video frame.

In the embodiment of the invention, a video frame comprises a frame head and a frame tail, and the frame tail mark refers to a mark for identifying the frame tail of the video frame.

In the embodiment of the present invention, the controller may determine that the main video frame is completely stored when the end-of-frame flag is detected by detecting the end-of-frame flag of the main video frame.

Illustratively, the controller detects a header flag and an end flag of a main-path video frame, and when a valid end flag is detected, it can be determined that the main-path video frame is completely stored.

Substep S2025, upon detection of the end of frame flag, increments the available buffer block number by one.

In the embodiment of the present invention, the controller may determine that the main video frame is completely stored in the current available cache block by detecting the end-of-frame flag of the main video frame, and at this time, the current available cache block becomes an occupied cache block, and adds a cache block number of a cache block in which the next main video frame is stored to the available cache block number.

Illustratively, the controller detects a header flag and an end flag of a main video frame, and when a valid end flag is detected, it may determine that the main video frame is completely stored in the current available buffer block, and adds 1 to the available buffer block number to obtain the buffer block number of the buffer block storing the next main video frame.

The method comprises the steps of detecting a frame tail mark of main path video frame data; the available buffer block number may be incremented by 1 when the end-of-frame flag is detected, thereby obtaining an updated available buffer block number, and the buffer block having the available buffer block number may store the next main video frame data.

In step S203, the target cache block number of the first cache block is acquired.

In the embodiment of the present invention, the target cache block number refers to a cache block number of a cache block to be stored in the slave video frame, which is synchronized with the receiving timestamp or receiving order of the master video frame.

In the embodiment of the present invention, the controller obtains the cache block number of the first cache block, and uses the cache block number as the target cache block number.

Illustratively, referring to fig. 4, the cache block number of the cache management (slave) end is provided by the cache management (master) end, and the controller obtains the target cache block number of the first cache block and synchronizes the target cache block number to the cache management (slave) end in real time, so as to ensure that the master video frame and the slave video frame, which receive timestamps or receive order synchronization, are written into two cache blocks with the same cache block number.

Step S204, the slave way video frame of the slave way video stream is stored in a second cache block corresponding to the target cache block number, and at least two cache blocks comprise a first cache block and a second cache block.

In the embodiment of the present invention, the second buffer block is used for storing the slave way video frame of the slave way video stream, and the second buffer block is located in the second buffer zone, and the second buffer zone corresponds to the buffer management (slave) end.

In the embodiment of the present invention, according to the number of the target cache block, the controller searches, in the cache block address list, a start address corresponding to the number of the target cache block as a target write start address, writes the slave video frame of the slave video stream from the target write start address into the second cache block corresponding to the number of the target cache block.

Illustratively, referring to fig. 4, the controller searches a starting address corresponding to a target cache block number in the cache block address list as a target write starting address according to the target cache block number, and then writes a slave video frame from the target write starting address into a second cache block corresponding to the target cache block number through the interface bus.

According to the invention, the main video frame of the main video stream is stored in the first cache block, and then the target cache block number of the first cache block is acquired, so that the target cache block number of the cache management (master) end can be provided for the cache management (slave) end, so that the slave video frame of the slave video stream is stored in the second cache block corresponding to the target cache block number, and the main video frame and the slave video frame which receive the timestamps or receive the synchronous sequence are ensured to be written into the cache blocks with the same number of the two cache blocks.

Step S205, the at least two video streams comprise a plurality of slave video streams, and the at least two cache blocks comprise a plurality of second cache blocks; the slave video frames of the plurality of slave video streams are stored in different second cache blocks corresponding to the target cache block numbers, respectively, and the slave video frames of a single slave video stream are stored in a single second cache block.

In the embodiment of the present invention, the plurality of second cache blocks may all be disposed in the same memory, or may be disposed in different memories, which may be determined according to actual requirements, and is not limited herein.

In an embodiment of the present invention, when the at least two video streams include a plurality of slave video streams, the controller stores the slave video frames of each of the plurality of slave video streams in different second buffer blocks corresponding to the target buffer block numbers, respectively, and the slave video frames of a single slave video stream are stored in a single second buffer block.

Illustratively, referring to fig. 4, when the at least two video streams include a plurality of slave video streams, there are a plurality of buffer management (slave) ends corresponding to the respective slave video streams, and after the controller controls the buffer management (master) end to provide the target buffer block numbers to the respective buffer management (slave) ends, the respective buffer management (slave) ends write the respective slave video frames of the respective slave video streams into the respective second buffer blocks corresponding to the target buffer block numbers from the start addresses corresponding to the target buffer block numbers.

When the at least two paths of video streams comprise a plurality of slave video streams, the controller respectively stores the slave video frames of the plurality of slave video streams in different second cache blocks corresponding to the target cache block numbers, so that the slave video frames with synchronous receiving timestamps or receiving sequences can be written into the cache blocks with the same cache block numbers.

Step S206, when at least two paths of video streams are played simultaneously, the cache block number of the video to be played is obtained.

This step can refer to the detailed description of step S103, which is not repeated herein.

In step S207, the cache block address of each video stream corresponding to the cache block number is searched in the cache block address list.

This step can refer to the detailed description of step S104, and is not described herein again.

Step S208, detecting the state signals of the output interfaces corresponding to the at least two video streams.

In the embodiment of the present invention, a single output interface is used to output video frames of a single video stream, and an output interface corresponding to any one video stream may be used to output video frames of the video stream; the status signal indicates whether the output interface is in an idle state.

In the embodiment of the present invention, the controller detects whether output interfaces corresponding to the at least two video streams are in an idle state, so as to determine whether to read a video frame of a video to be played from a cache block indicated by a cache block address.

For example, the output interface may include a first output interface and a second output interface, as shown in fig. 2, the video frame read-back operation is also implemented in the buffer management module, the first output interface is connected to the buffer management (master) end of the buffer management module, the second output interface is connected to the buffer management (slave) end of the buffer management module, and the buffer management (master) end and the buffer management (slave) end respectively monitor a status signal of whether each output interface is in an idle state.

Step S209, when the status signals of the output interfaces corresponding to the at least two video streams are all idle status signals, respectively reading from the cache block indicated by each cache block address in the buffer corresponding to each video stream to obtain the video frame of the video stream, and outputting the obtained video frame of the single video stream through a single output interface.

In the embodiment of the invention, when the status signals are idle status signals, the controller reads the end address of the cache block from the start address of the single cache block according to the position indicated by the start address and the end address included in each cache block address, obtains the video frame of each path of video stream, and outputs the video frame of the single path of video stream through the single output interface.

Illustratively, the output interface may include a first output interface and a second output interface, and as shown in fig. 2, when both the first output interface connected to the cache management (master) end and the second output interface connected to the cache management (slave) end are in an idle state (e.g. Ready), the cache management (master) end looks up a start address corresponding to the cache block number from the cache block address list according to the current cache block number, reads one video frame data in the data buffer of the video stream 1 through the interface bus to obtain one video frame of the synchronized video stream 1, outputs the video frame through the first output interface, the cache management (master) end synchronizes the cache block number to the cache management (slave) end in real time, the cache management (master) end and the cache management (slave) end synchronously start a video frame reading operation, first extracts the start address of the storage block from the cache block address list according to the cache block number, and reading a corresponding video frame data in the data buffer area of the video stream 2 to obtain a video frame of the synchronous video stream 2, and outputting the video frame through the second output interface.

According to the invention, by detecting the state signal of each output interface, when the state signals are all idle state signals, the video frames of each path of video stream are obtained by respectively reading in the cache block indicated by each cache block address, and the video frames are output through the output interfaces, so that the validity of the read main path video frame data and the read auxiliary path video frame data can be ensured, and the problem that the obtained synchronous processing result is wrong due to the loss of the video frame data caused by reading the main path video frame data and the auxiliary path video frame data when the first cache block or the second cache block is occupied is avoided.

Optionally, step S209 may include:

and a substep S2091, sequentially reading data of the target length from the cache block indicated by each cache block address until the video frame is completely read, and outputting the video frame of the one-way video stream through a single output interface.

In the embodiment of the present invention, the target length may be set by a user based on actual experience, or may be a default value for 3D endoscopy, which may be determined according to actual requirements, and is not limited herein.

In the embodiment of the invention, when at least two buffer areas are positioned in the same memory, the at least two buffer areas transmit the video frame data of each path of video stream through the same interface bus, and at the moment, a time-sharing multiplexing mechanism is adopted to control the reading of the video frame data with the fixed target length each time until the video frame is completely read, and the video frame of the single path of video stream is output through a single output interface.

Illustratively, referring to fig. 4, when at least two buffers are located in the same memory, the at least two buffers are connected to a buffer management (master) end and a buffer management (slave) end through the same interface bus, respectively, reading a video frame by the buffer management (master) end and the buffer management (slave) end requires sharing a physical memory interface, the physical bandwidth of the memory interface is much higher than the video stream reading bandwidth, a time division multiplexing mechanism may be adopted to control reading of fixed length data each time, switching of master and slave channels to achieve memory interface sharing, and then outputting a master-way video frame through a first output interface connected to the buffer management (master) end and outputting a slave-way video frame through a second output interface connected to the buffer management (slave) end.

In the embodiment of the invention, the data with the target length is sequentially read from the cache block indicated by each cache block address until the video frame is completely read, and the video frame of the single-path video stream is output through a single output interface, so that the data can be time-shared and multiplexed on the interface bus in the whole time of transmitting the main-path video frame data and the slave-path video frame data, and the utilization rate of the interface bus is improved.

Optionally, the sub-step S2091 may include:

a substep A, sequentially reading a video frame with a target length from a cache block indicated by each cache block address;

in the embodiment of the invention, the controller adopts a time division multiplexing mechanism to control that the fixed target length video frame data is read from the cache block indicated by each cache block address each time.

Illustratively, referring to fig. 4, the read operation bus timing control sub-module obtains the interface bus usage right by arbitration, and reads the fixed target length video frame data from the cache block indicated by each cache block address each time after obtaining the right.

B, detecting a frame tail mark of the video frame;

in an embodiment of the present invention, the controller determines that the video frame data is completely read by detecting an end-of-frame flag of the video frame in the cache block indicated by each cache block address.

Illustratively, the controller detects a frame head flag and a frame tail flag of a video frame in the buffer block indicated by each buffer block address, and when a valid frame tail flag is detected, it can be determined that the video frame data is completely read.

And a substep C, outputting the video frames of the one-way video stream through a single output interface and updating the numbers of the buffer blocks when detecting the frame end marks with the same number as the video frames.

In the embodiment of the present invention, the controller outputs the video frames of the one-way video stream through a single output interface when detecting the end-of-frame flag equal to the number of the video frames by detecting the end-of-frame flag of the video frames in the cache block indicated by each cache block address, and adds one to the cache block number to update the cache block number.

Illustratively, the controller detects a frame head flag and a frame tail flag of a video frame in a buffer block indicated by each buffer block address, and when a valid frame tail flag is detected, may determine that video frame data in a current buffer block has been completely read, output a video frame of a one-way video stream through a single output interface, and add 1 to a buffer block number, which may result in a buffer block number storing a next video frame.

In the embodiment of the invention, when the cache management module (main) end and the cache management module (auxiliary) end finish reading one video frame, a new cache block number is extracted, and the next video frame data is read; in an extreme case, because the idle states of the output interfaces of the buffer management module (master) end and the buffer management module (slave) end may be different, and the video reading rates may be different, a situation may occur where one end finishes reading a frame first, when one end finishes reading a frame and the reading progress of the other end is slow, the video synchronization deviation of the buffer management module (master) end and the buffer management module (slave) end may approach the time of one video frame, and the synchronization deviation is greatly reduced compared with the existing scheme.

The invention can read the video frame with the target length from the cache block indicated by each cache block address in sequence, and can multiplex the video frame on the interface bus in a time-sharing way, thereby improving the utilization rate of the interface bus; detecting a frame end mark of the video frame; when the frame end mark which is the same as the number of the video frames is detected, the video frames of the single-channel video stream are output through the single output interface, and the number of the buffer blocks is updated, so that the controller can continuously read the subsequent video frame data.

After obtaining at least two paths of video streams, storing a main video frame of the main video stream in a first cache block and then obtaining a target cache block number of the first cache block, so that the target cache block number of a cache management (master) end can be provided for a cache management (slave) end, so that a slave video frame of the slave video stream is stored in a second cache block corresponding to the target cache block number, and a main video frame and a slave video frame which are synchronous in receiving time stamp or receiving sequence are ensured to be written into two cache blocks with the same cache block number; then when at least two paths of video streams are played simultaneously, acquiring the number of a cache block of a video to be played; the cache block address of each path of video stream corresponding to the cache block number can be directly inquired in the cache block address list; and then, the cache blocks indicated by the addresses of the cache blocks are respectively read to complete the synchronous processing of at least two paths of video streams and obtain video frames with the same time sequence of each path of video stream, so that a large amount of calculation can be avoided when the at least two paths of video streams are synchronously processed, the processing complexity is reduced, the synchronous processing process of the at least two paths of video streams is simplified, the real-time performance of video synchronization is improved when the two paths of video streams of the 3D endoscope are synchronously processed, the requirement on the real-time performance of the 3D endoscope image video processing can be met, and the video synchronization precision is improved.

As shown in fig. 9, another video reading method provided in the embodiment of the present invention includes:

step S301, at least two video streams are obtained.

Step S302 stores the left-eye video frame data in the left-eye buffer block, and stores the right-eye video frame data in the right-eye buffer block.

In the embodiment of the invention, the cache blocks of the left-eye cache block and the right-eye cache block have the same number.

In the embodiment of the invention, after two video streams are acquired by two lenses of a 3D endoscope, a controller detects video frames of the two video streams through a video detection module, and then stores left-eye video frame data with the same time stamp or the same receiving sequence in the two video streams in a left-eye cache block, and stores right-eye video frame data in a right-eye cache block.

For example, referring to fig. 4, a main video stream in the two video streams may be a video stream 1, a secondary video stream in the two video streams may be a video stream 2, the two video streams 1 and 2 collected through the left and right lenses of the 3D endoscope enter a video detection module at a cache management (main) end, and after a main video frame is detected, a write operation bus timing control sub-module is notified to extract a cache block number of a currently available cache block, and the cache block number is sent to a cache block address management sub-module, so as to obtain a start address of the cache block corresponding to the cache block number from a cache block address list. The write operation bus time sequence control sub-module writes the current main video frame into the corresponding cache block according to the initial address; and meanwhile, detecting a frame head mark and a frame tail mark of the main video frame, and adding 1 to the number of the cache block when a valid frame tail mark is detected.

Step S303, when at least two paths of video streams are played simultaneously, the cache block number of the video to be played is obtained.

In step S304, the cache block address of each video stream corresponding to the cache block number is searched in the cache block address list.

Step S305, reading a left-eye video frame from the left-eye cache block indicated by each cache block address, obtaining and outputting a video frame of a left-eye video stream, and reading a right-eye video frame from the right-eye cache block indicated by each cache block address, obtaining and outputting a video frame of a right-eye video stream.

In the embodiment of the present invention, the controller reads a left-eye video frame from a left-eye cache block indicated by each cache block address according to a position indicated by a start address and an end address included in each cache block address, obtains and outputs a video frame of a left-eye video stream, and reads a right-eye video frame from a right-eye cache block indicated by each cache block address, obtains and outputs a video frame of a right-eye video stream.

For example, referring to fig. 2, after the read operation bus timing control sub-module finishes reading the previous video frame, the read operation bus timing control sub-module obtains the cache block number updated by adding 1, sends the cache block number into the cache block address list, and extracts the start address and the end address of the cache block corresponding to the cache block number; the read operation bus time sequence control submodule acquires the use authority of the interface bus through arbitration, and reads and outputs corresponding video frame data according to the address information of the starting address and the ending address of the cache block.

The other video reading method provided by the invention comprises the steps of acquiring two paths of video streams acquired by a 3D endoscope, storing left-eye video frame data in a left-eye cache block, and storing right-eye video frame data in a right-eye cache block, wherein the cache blocks of the left-eye cache block and the right-eye cache block have the same serial number, and when the two paths of video streams are played simultaneously by the 3D endoscope, the serial number of the cache block of a video to be played is acquired; the time sequence of the video frames stored in each cache block corresponding to a single cache block number is the same, so that the cache block address of each path of video stream corresponding to the cache block number can be directly inquired in a cache block address list by acquiring the cache block number; then, a left-eye video frame is read from a left-eye cache block indicated by each cache block address to obtain a video frame of a left-eye video stream, a right-eye video frame is read from a right-eye cache block indicated by each cache block address to obtain a video frame of a right-eye video stream, so that a large amount of calculation can be avoided when two paths of video streams collected by the 3D endoscope are subjected to time-synchronization processing, the processing complexity is reduced, the synchronization processing process is simplified, the real-time performance of video synchronization is improved, the requirement on the real-time performance of 3D endoscope image video processing is met, and the video synchronization precision is improved.

As shown in fig. 10, an embodiment of the present invention further provides a video reading apparatus 400, including:

a first obtaining module 401, configured to obtain a cache block number of a video to be played when at least two video streams are played simultaneously;

a query module 402, configured to query a cache block address of each video stream corresponding to a cache block number in a cache block address list;

a reading module 403, configured to read from the cache block indicated by each cache block address, respectively, to obtain and output a video frame of each video stream, where the time sequence of the video frame stored in each cache block corresponding to a single cache block number is the same as that of the video frame stored in the cache block corresponding to the single cache block number.

Optionally, the reading module 403 is further configured to:

detecting a status signal of each output interface; the single output interface is used for outputting video frames of the single-path video stream; and when the state signals are idle state signals, respectively reading the cache blocks indicated by the addresses of the cache blocks to obtain the video frames of each path of video stream, and outputting the video frames of the single path of video stream through a single output interface.

Optionally, when the cache blocks are all located in the same memory, the reading module 403 is further configured to:

and sequentially reading data with the target length from the cache block indicated by each cache block address until the video frame is completely read, and outputting the video frame of the single-path video stream through a single output interface.

Optionally, the reading module 403 is further configured to:

sequentially reading video frames with target length from the cache blocks indicated by each cache block address; detecting an end-of-frame marker of a video frame; and when the frame end mark which is the same as the number of the video frames is detected, outputting the video frames of the one-way video stream through a single output interface, and updating the cache block number.

Optionally, the cache block address comprises a start address and an end address; a reading module 403, further configured to:

and respectively reading the end address of the cache block from the start address of the single cache block to obtain the video frame of each path of video stream, and outputting the video frame of the single path of video stream through a single output interface.

Optionally, the video reading apparatus 400 further includes:

a second obtaining module 404, configured to obtain at least two video streams;

the storage module 405 is configured to store video frames with the same time sequence in at least two video streams in at least two cache blocks corresponding to the same cache block number, respectively.

Optionally, the at least two video streams comprise: a master video stream and a slave video stream; the storage module 405 is further configured to:

storing a main video frame of a main video stream in a first cache block; acquiring a target cache block number of a first cache block; storing a slave video frame of the slave video stream in a second cache block corresponding to the target cache block number, the at least two cache blocks including a first cache block and a second cache block.

Optionally, the at least two video streams comprise a plurality of slave video streams, and the at least two cache blocks comprise a plurality of second cache blocks; the storage module 405 is further configured to:

the slave video frames of the plurality of slave video streams are stored in different second cache blocks corresponding to the target cache block numbers, respectively, and the slave video frames of a single slave video stream are stored in a single second cache block.

Optionally, the storage module 405 is further configured to:

acquiring the number of a current available cache block; the available cache block encoding is the number of cache blocks in memory where data can be written; searching a write-in initial address corresponding to an available cache block number in a cache block address list; and writing main video frame data of the main video stream into a cache block corresponding to an available cache block number from a write start address, wherein the cache block corresponding to the available cache block number is a first cache block.

Optionally, the storage module 405 is further configured to:

detecting a frame tail mark of a main video frame; when the end of frame flag is detected, the cache block number is incremented by one.

Optionally, the at least two video streams include a left-eye video stream and a right-eye video stream captured by a three-dimensional stereoscopic display endoscope, and the video frames include: a left-eye video frame of a left-eye video stream and a right-eye video frame of a right-eye video stream, the cache block comprising: the left-eye video frame buffer comprises a left-eye buffer block and a right-eye buffer block, wherein the left-eye buffer block stores a left-eye video frame, and the right-eye buffer block stores a right-eye video frame;

the storage module 405 is further configured to: storing left-eye video frame data in a left-eye cache block, and storing right-eye video frame data in a right-eye cache block, wherein cache blocks of the left-eye cache block and the right-eye cache block are the same in number.

Optionally, the reading module 403 is further configured to: and reading the left-eye video frame from the left-eye cache block indicated by each cache block address to obtain and output the video frame of the left-eye video stream, and reading the right-eye video frame from the right-eye cache block indicated by each cache block address to obtain and output the video frame of the right-eye video stream.

The video reading device provided by the invention can be used for acquiring the cache block number of a video to be played when at least two paths of video streams are played simultaneously; the time sequence of the video frames stored in each cache block corresponding to a single cache block number is the same, so that the cache block address of each path of video stream corresponding to the cache block number can be directly inquired in a cache block address list by acquiring the cache block number; and then, the cache blocks indicated by the addresses of the cache blocks are respectively read to complete the synchronous processing of at least two paths of video streams, and video frames with the same time sequence of each path of video stream are obtained and output, so that when the at least two paths of video streams are synchronously processed, a large amount of calculation can be avoided, the processing complexity is reduced, the synchronous processing process is simplified, the real-time performance of video synchronization is improved when the two paths of video streams of the 3D endoscope are synchronously processed, the requirement on the real-time performance of the 3D endoscope image video processing can be met, and the video synchronization precision is improved.

As shown in fig. 11, an electronic device 500 according to an embodiment of the present invention further includes a processor 501, a memory 502, and a program or an instruction stored in the memory 502 and executable on the processor 501, where the program or the instruction is executed by the processor 501 to implement the processes of the video reading method embodiment, and can achieve the same technical effects, and no further description is provided herein to avoid repetition.

The embodiment of the present invention further provides a readable storage medium, where a program or an instruction is stored on the readable storage medium, and when the program or the instruction is executed by a processor, the program or the instruction implements each process of the video reading method embodiment, and can achieve the same technical effect, and in order to avoid repetition, details are not repeated here.

The processor is the processor in the electronic device in the above embodiment. Readable storage media, including computer-readable storage media, such as Read-Only Memory (ROM), Random Access Memory (RAM), magnetic or optical disks, etc.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element. Further, it should be noted that the scope of the methods and apparatus of embodiments of the present invention is not limited to performing functions in the order illustrated or discussed, but may include performing functions in a substantially simultaneous manner or in a reverse order based on the functions involved, e.g., the methods described may be performed in an order different than that described, and various steps may be added, omitted, or combined. In addition, features described with reference to certain examples may be combined in other examples.

Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention or the portions contributing to the prior art may be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal (such as a mobile phone, a computer, a server, a network device, an embedded device, or a surgical robot) to execute the method according to the embodiments of the present invention.

While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A method for reading video, the method comprising:

2. The method according to claim 1, wherein reading and outputting video frames from the cache block indicated by each cache block address in the buffer corresponding to each video stream comprises:

detecting state signals of output interfaces corresponding to the at least two paths of video streams, wherein the output interface corresponding to any path of video stream is used for outputting video frames of the any path of video stream;

and when the state signals of the output interfaces corresponding to the at least two paths of video streams are idle state signals, respectively reading from the cache block indicated by each cache block address in the buffer area corresponding to each path of video stream to obtain the video frame of each path of video stream, and outputting the obtained video frame through the output interface.

3. The method according to claim 2, wherein when the status signals of the output interfaces corresponding to the at least two video streams are all idle status signals, respectively reading from the buffer block indicated by each buffer block address in the buffer corresponding to each video stream to obtain the video frame of each video stream, and outputting the obtained video frame through the output interface, comprises:

and sequentially reading data with a target length from the cache block indicated by each cache block address until the video frame is completely read, and outputting the video frame through the output interface.

4. The method of claim 3, wherein reading the data of the target length from the cache block indicated by each cache block address in sequence until the video frame is completely read, and outputting the video frame through the output interface comprises:

reading the video frames with target length from the cache blocks indicated by each cache block address in turn;

detecting an end-of-frame marker of the video frame;

and when the frame tail mark with the same number as the video frame is detected, outputting the video frame through the output interface, and updating the cache block number of the video frame to be played.

5. The method of claim 2, wherein the cache block address comprises a start address and an end address; when the state signals of the output interfaces corresponding to the at least two video streams are all idle state signals, respectively reading from the cache block indicated by each cache block address in the buffer area corresponding to each video stream to obtain the video frame of each video stream, and outputting the obtained video frame through the output interface, including:

and respectively reading the ending address of the cache block from the starting address of the single cache block to obtain the video frame of each path of video stream, and outputting the video frame through the output interface.

6. The method according to claim 1, wherein before obtaining the buffer block number of the video to be played when the at least two video streams are played simultaneously, the method further comprises:

acquiring at least two video streams;

and respectively storing the video frames with the same time sequence in the at least two paths of video streams into at least two cache blocks corresponding to the same cache block number.

7. The method of claim 6, wherein the at least two video streams comprise: a master video stream and a slave video stream; the storing the video frames with the same time sequence in the at least two video streams in at least two cache blocks corresponding to the same cache block number respectively comprises:

storing a main video frame of the main video stream in a first cache block;

acquiring a target cache block number of the first cache block;

storing a slave video frame of the slave video stream in a second cache block corresponding to the target cache block number, the at least two cache blocks including the first cache block and the second cache block.

8. The method of claim 7, wherein said at least two video streams comprise a plurality of said slave video streams, and wherein said at least two cache blocks comprise a plurality of said second cache blocks; the storing the slave video frame of the slave video stream in the second cache block corresponding to the target cache block number includes:

and respectively storing slave way video frames of a plurality of slave way video streams in different second cache blocks corresponding to the target cache block numbers, wherein the slave way video frames of a single slave way video stream are stored in the single second cache block.

9. The method according to claim 7, wherein said storing the main video frame of the main video stream in a first cache block comprises:

acquiring the number of a current available cache block, wherein the number of the available cache block is the number of a cache block which can be written with data currently in a memory;

searching a write-in initial address corresponding to the available cache block number in a cache block address list;

and writing main video frame data of the main video stream from the write-in start address into the cache block corresponding to the available cache block number, wherein the cache block corresponding to the available cache block number is the first cache block.

10. The method according to claim 9, wherein after said writing the main video frame data of the main video stream from the write start address into the cache block corresponding to the available cache block number, the method further comprises:

detecting a frame tail mark of the main video frame;

upon detection of the end-of-frame marker, the available cache block number is incremented by one.

11. The method of claim 6, wherein the at least two video streams comprise a left eye video stream and a right eye video stream captured by a three-dimensional stereoscopic display endoscope, and wherein the video frames comprise: a left-eye video frame of the left-eye video stream and a right-eye video frame of the right-eye video stream, the cache block comprising: the left-eye video frame is stored in the left-eye cache block, and the right-eye video frame is stored in the right-eye cache block;

the storing the video frames with the same time sequence in the at least two video streams in different cache blocks corresponding to the same cache block number respectively comprises:

storing the left-eye video frame data in the left-eye cache block, and storing the right-eye video frame data in the right-eye cache block, wherein the cache blocks of the left-eye cache block and the right-eye cache block have the same number.

12. The method according to claim 11, wherein for each video stream, reading and outputting video frames from the buffer block indicated by each buffer block address in the buffer corresponding to each video stream, comprises:

and reading the left-eye video frame from the left-eye cache block indicated by each cache block address to obtain and output a video frame of the left-eye video stream, and reading the right-eye video frame from the right-eye cache block indicated by each cache block address to obtain and output a video frame of the right-eye video stream.

13. A video reading apparatus, characterized in that the apparatus comprises:

14. The apparatus of claim 13, wherein the reading module is further configured to:

detecting state signals of output interfaces corresponding to the at least two paths of video streams, wherein the output interface corresponding to any path of video stream is used for outputting a video frame of the any path of video stream;

15. The apparatus of claim 14, wherein when the cache blocks are all located in the same memory, the read module is further configured to:

16. The apparatus of claim 13, further comprising:

the second acquisition module is used for acquiring at least two paths of video streams;

and the storage module is used for respectively storing the video frames with the same time sequence in the at least two paths of video streams into at least two cache blocks corresponding to the same cache block number.

17. The apparatus of claim 16, wherein the at least two video streams comprise a left eye video stream and a right eye video stream captured by a three-dimensional stereoscopic display endoscope, and wherein the video frames comprise: a left-eye video frame of the left-eye video stream and a right-eye video frame of the right-eye video stream, the cache block comprising: the left-eye video frame is stored in the left-eye cache block, and the right-eye video frame is stored in the right-eye cache block;

the storage module is further configured to:

18. The apparatus of claim 17, wherein the reading module is further configured to:

19. A readable storage medium, characterized in that the readable storage medium has stored thereon a program or instructions which, when executed by a processor, implement the video reading method of any one of claims 1 to 12.

20. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the video reading method according to any one of claims 1 to 12 when executing the computer program.