CN113776721A - Sensor integrated chip and manufacturing method thereof - Google Patents
Sensor integrated chip and manufacturing method thereof Download PDFInfo
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- CN113776721A CN113776721A CN202111042711.1A CN202111042711A CN113776721A CN 113776721 A CN113776721 A CN 113776721A CN 202111042711 A CN202111042711 A CN 202111042711A CN 113776721 A CN113776721 A CN 113776721A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 120
- 239000002131 composite material Substances 0.000 claims abstract description 39
- 230000001133 acceleration Effects 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 19
- 230000008569 process Effects 0.000 claims abstract description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 30
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 30
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 9
- 238000004891 communication Methods 0.000 claims description 7
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 7
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 230000035945 sensitivity Effects 0.000 abstract description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L9/00—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
- G01L9/02—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of variations in ohmic resistance, e.g. of potentiometers, electric circuits therefor, e.g. bridges, amplifiers or signal conditioning
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D21/00—Measuring or testing not otherwise provided for
- G01D21/02—Measuring two or more variables by means not covered by a single other subclass
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
Abstract
Disclosed are a sensor integrated chip and a method of manufacturing the same, the sensor integrated chip including a pressure sensor and an acceleration sensor juxtaposed in a horizontal direction, the method of manufacturing including: forming a first groove in the first region and a second groove in the second region, the first and second grooves having release windows communicating with air; forming a composite dielectric layer on the substrate, the surfaces of the first groove and the second groove and in the release window to form a first cavity and a second cavity; opening and forming a first piezoresistor on the surface of the substrate in the first area, and opening and forming a second piezoresistor on the surface of the substrate in the second area; forming a first ohmic contact layer in contact with the first piezoresistor and a second ohmic contact layer in contact with the second piezoresistor; a first through hole communicating the second cavity with air is formed. The manufacturing method is compatible with an integrated circuit process, the cost can be reduced, and the sensitivity of the sensor is higher.
Description
Technical Field
The invention belongs to the technical field of detection devices, and particularly relates to a sensor integrated chip and a manufacturing method thereof.
Background
At present, a piezoresistive acceleration sensor and a piezoresistive pressure sensor are often present in an integrated circuit together and are used for simultaneously measuring parameters such as acceleration, pressure and the like. Specifically, for example, in a tire pressure monitoring system of an automobile, it is necessary to detect the air pressure of a tire in real time by using a pressure sensor, and detect whether the automobile is running or not by using an acceleration sensor, so as to realize the functions of mobile instant start, system self-check and automatic wake-up of the automobile.
Based on the above applications, in order to reduce the size of the sensor module, the piezoresistive acceleration sensor and the piezoresistive pressure sensor are often integrated in the same chip. Currently, bonding techniques are often used to fabricate the cavities of sensors in integrated chips. However, the above method may result in an integrated chip with a larger size and higher production cost, and the residual stress in the bonding process for preparing the integrated chip may have a larger influence on the temperature drift index of the sensor.
Disclosure of Invention
The invention aims to provide a sensor integrated chip and a manufacturing method thereof, and the sensor integrated chip with higher sensing performance is prepared by adopting the manufacturing method with low cost and low manufacturing complexity.
According to the present invention, there is provided a method of manufacturing a sensor integrated chip including a pressure sensor located in a first region and an acceleration sensor located in a second region, the method including: forming a first groove extending downward along the surface of the substrate in the first region, and forming a second groove extending downward along the surface of the substrate in the second region, the first and second grooves having a release window communicating with air;
forming a composite dielectric layer on the substrate and the surfaces of the first groove, the second groove and the release window so as to form a closed first cavity in the substrate of the first area and a closed second cavity in the substrate of the second area;
opening and forming a first piezoresistor on the surface of the substrate in the first area, and opening and forming a second piezoresistor on the surface of the substrate in the second area;
forming a first ohmic contact layer in contact with the first piezoresistor, and forming a second ohmic contact layer in contact with the second piezoresistor; and
forming a first through hole penetrating through the composite dielectric layer and the substrate and communicating the second cavity with air in the second region,
the first region and the second region are arranged in parallel in a horizontal direction.
Optionally, the step of forming a composite dielectric layer on the substrate and the surfaces of the first groove and the second groove and in the release window includes:
forming silicon oxide layers on the surface of the substrate and the surfaces of the first groove and the second groove; and
forming a silicon nitride layer covering the silicon oxide layer on the surface of the substrate and the surfaces of the first and second grooves, the silicon nitride layer being further filled in the release windows of the first and second grooves,
wherein, the closed space reserved in the first area of the silicon nitride layer is used as the first cavity, and the closed space reserved in the second area of the silicon nitride layer is used as the second cavity.
Optionally, the height of the first cavity and the second cavity is 2 micrometers to 10 micrometers.
Optionally, the step of forming a first groove extending downward along the surface of the substrate in the first region and forming a second groove extending downward along the surface of the substrate in the second region comprises:
forming a plurality of release windows in the first region and the second region along the substrate surface; and
etching the substrate with the release window etch channel and forming the first recess in the first region in communication with air and the second recess in the second region in communication with air.
Optionally, the width of the release window is 1 micron to 2 microns, and the depth of the release window is 2 microns to 10 microns.
Optionally, an anisotropic etching process is used to form the plurality of release windows extending down the substrate surface.
Optionally, the first groove and the second groove are formed by etching downwards along the release window by using an isotropic etching process.
Optionally, the step of opening and forming a first varistor on the substrate surface of the first region and opening and forming a second varistor on the substrate surface of the second region includes:
removing part of the silicon nitride layer and the silicon oxide layer on the surface of the substrate to form a first opening in the first region and a second opening in the second region;
positive and negative resistance strips forming contacts in the substrate along the first and second openings, respectively;
and filling a silicon nitride layer in the first opening and the second opening.
Optionally, the anode resistive strip and the cathode resistive strip are single crystal silicon layers.
According to the application, the sensor integrated chip comprises:
a substrate;
a pressure sensor located in a first area of the substrate, and an acceleration sensor located in a second area of the substrate, the first area and the second area being arranged side by side in a horizontal direction,
the pressure sensor includes:
a first cavity in an enclosed space in the substrate;
the composite dielectric layer is filled in the surface of a first groove in the substrate and the surface of the substrate, the first groove extends downwards along the surface of the substrate and is provided with a release window communicated with air, the composite dielectric layer is also positioned in the release window, and the composite dielectric layer positioned in the first groove surrounds to form the first cavity;
the first piezoresistor is positioned in the opening on the surface of the substrate; and
a first ohmic contact layer in contact with the first varistor;
the acceleration sensor has a cantilever beam structure comprising:
a second cavity in an enclosed space in the substrate;
the composite dielectric layer is filled in the surface of a second groove in the substrate and the surface of the substrate, the second groove extends downwards along the surface of the substrate and is provided with a release window communicated with air, the composite dielectric layer is also positioned in the release window, and the composite dielectric layer positioned in the second groove surrounds to form a second cavity;
the first through hole penetrates through the composite dielectric layer and the substrate to reach the second cavity and communicates the second cavity with the air;
the second piezoresistor is positioned in the opening on the surface of the substrate; and
and the second ohmic contact layer is in contact with the second piezoresistor.
Optionally, the composite dielectric layer located above the second cavity and the substrate located between the release windows in the second region form a cantilever beam structure.
Optionally, the composite dielectric layer includes:
the silicon oxide layers are positioned on the surface of the substrate and the surfaces of the first groove and the second groove; and
and the silicon nitride layer is positioned on the surface of the substrate and the surfaces of the first groove and the second groove and covers the silicon oxide layer, and the silicon nitride layer is also filled in the release windows of the first groove and the second groove.
Optionally, the height of the first cavity and the second cavity is 2 micrometers to 10 micrometers.
Optionally, the first piezo-resistor and the second piezo-resistor are single crystal silicon piezo-resistors.
According to the sensor integrated chip and the manufacturing method thereof provided by the embodiment of the invention, the acceleration sensor with the cantilever beam structure and the pressure sensor with the cavity structure are formed by sealing the composite dielectric layer, and the pressure sensor and the acceleration sensor are distributed in parallel along the horizontal direction, so that the size of the sensor module is reduced. And the sensor integrated chip adopts the composite dielectric layer to seal and form a cavity, is not easy to leak gas, has high reliability, and can be compatible with a CMOS (complementary metal oxide semiconductor) preparation process, thereby reducing the manufacturing cost and the design complexity of an integrated circuit. And the acceleration sensor and the pressure sensor in the sensor integrated chip sense pressure and acceleration by measuring the change value of the piezoresistor, so that the detection precision is higher. In conclusion, the manufacturing method of the sensor integrated chip is compatible with an integrated circuit process, the cost can be reduced, the sensitivity of the prepared acceleration sensor and the pressure sensor is higher, the parasitic quantity is less, and a feasible scheme is provided for realizing the monolithic integration of the sensor and the processing circuit in the future.
Furthermore, piezoresistors of the sensor are all monocrystalline silicon piezoresistors, the piezoresistance property is better, and the output consistency, zero drift and other index performances of the sensor are obviously improved.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 is a flow chart illustrating a method for manufacturing a sensor integrated chip according to an embodiment of the invention;
fig. 2 to 8 are cross-sectional views illustrating structures of a sensor integrated chip provided according to an embodiment of the present invention at different stages in a manufacturing process.
Detailed Description
Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.
The present invention may be embodied in various forms, some examples of which are described below.
Fig. 1 is a flow chart illustrating a method for manufacturing a sensor integrated chip according to an embodiment of the present invention. Fig. 2 to 8 are cross-sectional views illustrating structures of a sensor integrated chip provided according to an embodiment of the present invention at different stages in a manufacturing process.
As shown in fig. 1, the method of manufacturing the sensor integrated chip includes the following steps.
Step S10: a first groove extending downward along the surface of the substrate is formed in the first region, and a second groove extending downward along the surface of the substrate is formed in the second region. Further, a plurality of release windows are formed in the first region 101 and the second region 102 along the surface of the substrate 110. Specifically, as shown in fig. 2, the substrate 110 includes a first region 101 and a second region 102 juxtaposed in a horizontal direction, and the substrate 110 is, for example, an N-type doped single crystal silicon substrate. A plurality of release windows 120 are formed in the first region 101 and the second region 102, respectively, extending down the surface of the substrate 110. Further, a plurality of release windows 120 are formed in the substrate 110, for example, by using an anisotropic etching process, wherein the width of the release windows 120 is, for example, 1 micron to 2 microns, and the depth of the release windows 120 is, for example, 2 microns to 10 microns. Further, the depth of the release window 120 is 10 μm. Further, the shape of the horizontal section of the release window 120 may be one of circular, square, and hexagonal. Next, the substrate 110 is etched down along the release window 120, and a first groove 121 communicating with air is formed in the first region 101, and a second groove 122 communicating with air is formed in the second region 102. Specifically, as shown in fig. 3, while the sidewalls of the release windows in the substrate 110 are protected, the substrate 110 is etched down along the bottoms of the release windows 120, for example, using an isotropic etching process to form a first recess 121 in the first region 101 and a second recess 122 in the second region 102. Wherein the first recess 121 has a release window 120 in communication with air and the second recess 122 has a release window 120 in communication with air.
Step S20: a first cavity is formed in the substrate in the first region and a second cavity is formed in the substrate in the second region. Specifically, the composite dielectric layer 130 is formed on the substrate 110 and the surfaces of the first and second grooves 121 and 122 and the release window 120. Further, as shown in fig. 4, a silicon oxide layer 131 is grown on the surface of the substrate 110 and the surfaces of the first and second grooves 121 and 122. Wherein the surface of the first recess 121 includes the sidewall of the release window 120 and the surface of the substrate 110 exposed in the first recess 121, and the surface of the second recess 122 includes the sidewall of the release window 120 and the surface of the substrate 110 exposed in the second recess 122. Next, as shown in fig. 5, a silicon nitride layer 132 covering the silicon oxide layer 131 is formed on the surface of the substrate 110 and the surfaces of the first recess 121 and the second recess 122, wherein the silicon nitride layer 132 is further filled in the release windows 120 of the first recess 121 and the second recess 122, a closed space surrounded by the silicon nitride layer 132 and reserved in the first recess 121 serves as a first cavity 141, and a closed space surrounded by the silicon nitride layer 132 and reserved in the second recess 122 serves as a second cavity 142. The silicon oxide layer 131 and the silicon nitride layer form a composite dielectric layer 130 to seal the first recess 121 and the second recess 122 to form a cavity structure. The height of the closed first and second cavities 141 and 142 is about 2 to 10 micrometers. Further, the height of the closed first and second cavities 141 and 142 is 5 μm.
In an alternative embodiment, the silicon nitride layer 132 on the surface of the substrate 110 is then surface polished, for example using a chemical polishing process, to obtain a planar surface.
Step S30: the first piezoresistor is opened and formed on the surface of the substrate in the first region, and the second piezoresistor is opened and formed on the surface of the substrate in the second region. Specifically, as shown in fig. 6, a portion of the silicon nitride layer 132 and the silicon oxide layer 131 on the surface of the substrate 110 are removed to form a first opening 151 in the first region 101 and a second opening 152 in the second region 102, thereby exposing a portion of the surface of the substrate 110 above the first cavity 141 and above the second cavity 142. Wherein for example at least two first openings 151 are formed in the first region 101 and at least one second opening 152 is formed in the second region 102. Ion implantation is then performed, for example, using an ion implantation process, along the exposed surface of the substrate 110 in the first and second openings 151 and 152 to form the positive and negative resistive stripes 161 and 162 in contact in the substrate 110 in the first and second openings 151 and 152, respectively. Specifically, the positive electrode bar 161 and the negative electrode bar 162 are, for example, phosphorus-doped single crystal silicon layers. Then, the first opening 151 and the second opening 152 are filled with the silicon nitride layer 132, and further, the silicon nitride layer 132 is formed on the surface of the silicon nitride layer 132 on the surface of the substrate 110 (see fig. 7), and then the surface of the silicon nitride layer 132 after the thickening is polished to obtain a flat surface by using, for example, a chemical polishing process.
Step S40: a first ohmic contact layer is formed in contact with the first piezoresistor, and a second ohmic contact layer is formed in contact with the second piezoresistor. Specifically, as shown in fig. 7, first, a third opening reaching the surface of the positive electrode resistance bar 161 is formed in the first region 101 extending downward along the surface of the silicon nitride layer 132 and a fourth opening reaching the surface of the positive electrode resistance bar 161 is formed in the second region 102. Next, a first ohmic contact layer 171 in contact with the positive electrode resistance bar 161 is formed on the surface of the silicon nitride layer 132 and in the third opening, and a second ohmic contact layer 172 in contact with the positive electrode resistance bar 161 is formed on the surface of the silicon nitride layer 132 and in the fourth opening. The first ohmic contact layer 171 and the second ohmic contact layer 172 are metal layers, and are connected to the outside and detected to obtain a resistance value that can reflect a pressure variation or an acceleration variation.
Step S50: and forming a first through hole which penetrates through the composite dielectric layer and the substrate and communicates the second cavity with the air in the second area. Specifically, as shown in fig. 8, for example, an ion etching process is used to form a first through hole 180 penetrating through the composite dielectric layer 130 and the substrate 110 in the second region 102 and communicating the second cavity 142 with the air, and a cantilever structure is formed by releasing through the first through hole 180, where the composite dielectric layer 130 located above the second cavity 142 and the substrate 110 located between the release windows 120 in the second region 102 form the cantilever structure.
As shown in fig. 8, the sensor integrated chip 100 includes a substrate 110, a pressure sensor located in a first region 101 of the substrate 110, and an acceleration sensor located in a second region 102 of the substrate 110, the first region 101 and the second region 102 being arranged side by side in a horizontal direction. The pressure sensor includes a closed first cavity 141 in the substrate 110, and a composite dielectric layer 130 filling a surface of a first groove in the substrate 110 and a surface of the substrate 110, the first groove extending downward along the surface of the substrate 110 and having a release window communicating with air, the composite dielectric layer 130 being further positioned in the release window, the composite dielectric layer 130 positioned in the first groove surrounding the closed first cavity 141. The pressure sensor further includes a first piezo-resistor located in an opening in the surface of the substrate 110 over the first cavity 141, and a first ohmic contact layer 171 in contact with the first piezo-resistor. The acceleration sensor has a cantilever beam structure including a second cavity 142 in the substrate 110 and a first via 180 extending through the composite dielectric layer 130, the substrate 110 into the second cavity 142 and communicating the second cavity 142 with air. The acceleration sensor further includes a composite dielectric layer 130 filling a surface of a second recess in the substrate 110 and the surface of the substrate 110, the second recess extending down along the surface of the substrate 110 and having a release window in communication with air, the composite dielectric layer 130 further being located in the release window, the composite dielectric layer 130 located in the second recess surrounding a second cavity 142. The acceleration sensor further comprises a second piezo-resistor located in an opening in the surface of the substrate 110 above the second cavity 142, and a second ohmic contact layer 172 in contact with the second piezo-resistor.
While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The scope of the invention should be determined from the following claims.
Claims (14)
1. A method for manufacturing a sensor integrated chip including a pressure sensor located in a first region and an acceleration sensor located in a second region, comprising:
forming a first groove extending downward along the surface of the substrate in the first region, and forming a second groove extending downward along the surface of the substrate in the second region, the first and second grooves having a release window communicating with air;
forming a composite dielectric layer on the substrate and the surfaces of the first groove, the second groove and the release window so as to form a closed first cavity in the substrate of the first area and a closed second cavity in the substrate of the second area;
opening and forming a first piezoresistor on the surface of the substrate in the first area, and opening and forming a second piezoresistor on the surface of the substrate in the second area;
forming a first ohmic contact layer in contact with the first piezoresistor, and forming a second ohmic contact layer in contact with the second piezoresistor; and
forming a first through hole penetrating through the composite dielectric layer and the substrate and communicating the second cavity with air in the second region,
wherein the first region and the second region are distributed in parallel along a horizontal direction.
2. The method of manufacturing a sensor integrated chip according to claim 1, wherein the step of forming a composite dielectric layer on the substrate and the surfaces of the first and second grooves and the release window comprises:
forming silicon oxide layers on the surface of the substrate and the surfaces of the first groove and the second groove; and
forming a silicon nitride layer covering the silicon oxide layer on the surface of the substrate and the surfaces of the first and second grooves, the silicon nitride layer being further filled in the release windows of the first and second grooves,
wherein, the closed space reserved in the first area of the silicon nitride layer is used as the first cavity, and the closed space reserved in the second area of the silicon nitride layer is used as the second cavity.
3. The method of manufacturing a sensor integrated chip according to claim 2, wherein the height of the first cavity and the second cavity is 2 to 10 micrometers.
4. The method for manufacturing a sensor integrated chip according to claim 1, wherein the step of forming a first groove extending downward along the surface of the substrate in the first region and forming a second groove extending downward along the surface of the substrate in the second region comprises:
forming a plurality of release windows in the first region and the second region along the substrate surface; and
etching the substrate with the release window etch channel and forming the first recess in the first region in communication with air and the second recess in the second region in communication with air.
5. The method of manufacturing a sensor integrated chip according to claim 4, wherein the width of the release window is 1 to 2 micrometers, and the depth of the release window is 2 to 10 micrometers.
6. The method of manufacturing a sensor integrated chip according to claim 4, wherein the plurality of release windows are formed extending down the substrate surface using an anisotropic etching process.
7. The method of manufacturing a sensor integrated chip according to claim 4, wherein the first and second grooves are etched down the release window using an isotropic etching process.
8. The method for manufacturing a sensor integrated chip according to claim 2, wherein the step of opening and forming a first piezo-resistor on the substrate surface of the first region and a second piezo-resistor on the substrate surface of the second region comprises:
removing part of the silicon nitride layer and the silicon oxide layer on the surface of the substrate to form a first opening in the first region and a second opening in the second region;
positive and negative resistance strips forming contacts in the substrate along the first and second openings, respectively;
and filling a silicon nitride layer in the first opening and the second opening.
9. The method for manufacturing a sensor integrated chip according to claim 8, wherein the positive electrode resistive strip and the negative electrode resistive strip are single crystal silicon layers.
10. A sensor integrated chip, comprising:
a substrate;
a pressure sensor located in a first area of the substrate, and an acceleration sensor located in a second area of the substrate, the first area and the second area being arranged side by side in a horizontal direction,
the pressure sensor includes:
a first cavity in an enclosed space in the substrate;
the composite dielectric layer is filled in the surface of a first groove in the substrate and the surface of the substrate, the first groove extends downwards along the surface of the substrate and is provided with a release window communicated with air, the composite dielectric layer is also positioned in the release window, and the composite dielectric layer positioned in the first groove surrounds to form the first cavity;
the first piezoresistor is positioned in the opening on the surface of the substrate; and
a first ohmic contact layer in contact with the first varistor;
the acceleration sensor has a cantilever beam structure comprising:
a second cavity located in a space in the substrate;
the composite dielectric layer is filled in the surface of a second groove in the substrate and the surface of the substrate, the second groove extends downwards along the surface of the substrate and is provided with a release window communicated with air, the composite dielectric layer is also positioned in the release window, and the composite dielectric layer positioned in the second groove surrounds to form a second cavity;
the first through hole penetrates through the composite dielectric layer and the substrate to reach the second cavity and communicates the second cavity with the air;
the second piezoresistor is positioned in the opening on the surface of the substrate; and
and the second ohmic contact layer is in contact with the second piezoresistor.
11. The sensor integrated chip of claim 10, wherein the substrate between the composite dielectric layer over the second cavity and the release window in the second region constitutes the cantilever arm structure.
12. The sensor integrated chip of claim 10, wherein the composite dielectric layer comprises:
the silicon oxide layers are positioned on the surface of the substrate and the surfaces of the first groove and the second groove; and
and the silicon nitride layer is positioned on the surface of the substrate and the surfaces of the first groove and the second groove and covers the silicon oxide layer, and the silicon nitride layer is also filled in the release windows of the first groove and the second groove.
13. The sensor integrated chip of claim 11, wherein the first and second cavities have a height of 2-10 microns.
14. The sensor integrated chip of claim 10, wherein the first and second piezoresistors are single crystal silicon piezoresistors.
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