CN113763852B - Display driving circuit and display apparatus using the same - Google Patents
Display driving circuit and display apparatus using the same Download PDFInfo
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- CN113763852B CN113763852B CN202010492398.0A CN202010492398A CN113763852B CN 113763852 B CN113763852 B CN 113763852B CN 202010492398 A CN202010492398 A CN 202010492398A CN 113763852 B CN113763852 B CN 113763852B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve
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- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention relates to a display driving circuit and a display device using the same, wherein the driving circuit comprises a GAMMA output circuit, a plurality of digital-to-analog converters, a plurality of source amplifiers and at least one precharge circuit. The GAMMA output circuit is used for outputting GAMMA voltages with a plurality of gray scales. Each DAC receives the GAMMA voltages and provides output data voltages according to the display data. The input end of each source amplifier is correspondingly coupled with the output ends of the digital-analog converters so as to receive corresponding output data voltages. The precharge circuit is coupled between the input end of at least one of the source amplifiers and the output end of at least one of the digital-to-analog converters, and is used for precharging the input end of the coupled source amplifier so that the output end of the coupled source amplifier can quickly respond to the received output data voltage.
Description
Technical Field
The present invention relates to a display panel driving technology, and more particularly, to a display driving circuit and a display device using the same.
Background
Fig. 1 is a schematic diagram of a driving principle of a display driving integrated circuit in the prior art. Referring to fig. 1, the conventional display driving integrated circuit is divided by an internal (or external) resistor to provide a set of reference voltages for the display driving integrated circuit, the reference voltages are a GAMMA voltage curve (GAMMA voltage curve), and the display driving integrated circuit is controlled by the display data to select the voltage on the GAMMA voltage curve to drive the display device, thereby controlling the panel brightness (gray scale), as shown in fig. 1.
As panel resolution and picture update rate become higher, the charging time of the pixels becomes more and more critical, and the operation speed of the display driving integrated circuit is required to be increased. However, the operation speed of the display driving integrated circuit is limited by the speed of the analog circuit inside the chip.
Disclosure of Invention
An object of the present invention is to provide a display driving circuit and a display device using the same, which can make a source amplifier react to a data voltage rapidly by performing a precharge at an input terminal of the source amplifier to accelerate a driving speed, so that the display driving circuit can be applied to a display panel with higher resolution.
In view of the above, the present invention provides a display driving circuit, which includes a GAMMA output circuit, a plurality of digital-to-analog converters, a plurality of source amplifiers, and at least one precharge circuit. The GAMMA output circuit is used for outputting GAMMA voltages with a plurality of gray scales. Each DAC includes an output terminal, and each DAC receives the plurality of GAMMA voltages and provides an output data voltage according to the display data. Each source amplifier comprises an input end and an output end, and the input end of each source amplifier is correspondingly coupled with the output end of the digital-analog converter so as to receive corresponding output data voltage. The precharge circuit is configured between the input end of at least one of the source amplifiers and the output end of at least one of the digital-to-analog converters for precharging the input end of the coupled source amplifier so that the output end of the coupled source amplifier can quickly respond to the received output data voltage.
The invention further provides a display device which comprises a display panel and a display driving circuit. The display driving circuit includes a GAMMA output circuit, a plurality of digital-to-analog converters, a plurality of source amplifiers and at least one precharge circuit. The GAMMA output circuit is used for outputting GAMMA voltages with a plurality of gray scales. Each DAC includes an output terminal, and each DAC receives the plurality of GAMMA voltages and provides an output data voltage according to the display data. Each source amplifier comprises an input end and an output end, the output end of each source amplifier is correspondingly coupled with a corresponding data line of the display panel, and the input end of each source amplifier is correspondingly coupled with the output end of the digital-analog converter so as to receive corresponding output data voltage. The precharge circuit is configured between the input end of at least one of the source amplifiers and the output end of at least one of the digital-to-analog converters for precharging the input end of the coupled source amplifier so that the output end of the coupled source amplifier can quickly respond to the received output data voltage.
According to the display driving circuit and the display device using the same of the preferred embodiment of the invention, the precharge circuit comprises a first switch circuit, a voltage supply circuit and a selection circuit. The first switch circuit is coupled between the input end of the source amplifier and the output end of the at least one digital-analog converter. The voltage supply circuit is used for supplying multiple groups of voltages. The selection circuit comprises a plurality of input ends and an output end, wherein the plurality of input ends of the selection circuit respectively receive the plurality of groups of voltages, and the output end of the selection circuit is coupled with the input end of the source amplifier. Before the digital-to-analog converter provides the output data voltage, the first switch circuit breaks a circuit between the input end of the source amplifier and the output end of at least one digital-to-analog converter; the selection circuit is used for selecting one group of specific voltage of the multiple groups of voltages provided by the voltage providing circuit to the input end of the source amplifier according to a corresponding display data so as to perform pre-charging.
According to the display driving circuit and the display device using the same of the preferred embodiment of the present invention, the precharge circuit further comprises a buffer circuit coupled between the output terminal of the selection circuit and the input terminal of the source amplifier for increasing the current driving force to accelerate the precharge. In a preferred embodiment, the precharge circuit further includes a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier. Before the digital-to-analog converter provides the output data voltage, the first switch circuit opens the circuit between the input end of the source amplifier and the output end of at least one digital-to-analog converter, and the second switch circuit is conducted; when the precharge is completed, the second switch circuit is turned off, and the first switch circuit is turned on.
According to the display driving circuit and the display device using the same in the preferred embodiment of the invention, the precharge circuit comprises a first switch circuit, a buffer circuit and a second switch circuit. The first switch circuit is coupled between the input end of the source amplifier and the output end of the at least one digital-analog converter. The buffer circuit is coupled between the input end of the source amplifier and the output end of the at least one digital-to-analog converter, and is used for pre-charging according to the output data voltage output by the output end of the at least one digital-to-analog converter. The second switch circuit is coupled between the buffer circuit and the input terminal of the source amplifier. Before the digital-to-analog converter provides the output data voltage, the first switch circuit opens the circuit between the input end of the source amplifier and the output end of at least one of the digital-to-analog converters, and the second switch circuit is turned on, wherein the buffer circuit is used for pre-charging according to the output data voltage output by the output end of at least one of the digital-to-analog converters; when the precharge is completed, the second switch circuit is turned off, and the first switch circuit is turned on.
According to the display driving circuit and the display device using the same of the preferred embodiment of the present invention, the time for the precharge circuit to precharge the source amplifier includes a default time before the at least one DAC provides the corresponding output data voltage. The time for the precharge circuit to precharge the source amplifier includes a default time after the at least one DAC provides the corresponding output data voltage. The time for the precharge circuit to precharge the source amplifier includes a default time around when the at least one DAC provides the corresponding output data voltage.
The invention aims at pre-charging the input end of the source amplifier, and disconnecting the digital-analog converter of the front stage when charging, so that the time constant seen by the output of the digital-analog converter is smaller, and the pre-charging circuit can concentrate on pre-charging, thereby enabling the source amplifier to quickly respond to the data voltage, increasing the driving speed and enabling the display driving circuit to be applied to a display panel with higher resolution.
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of preferred embodiments, as illustrated in the accompanying drawings.
Drawings
Fig. 1 is a schematic diagram of a driving principle of a display driving integrated circuit in the prior art.
FIG. 2 is a schematic diagram showing the structure of a driving IC.
FIG. 3 is a schematic diagram of a transmission path of GAMMA voltage inside a display driving integrated circuit.
FIG. 4 is a schematic diagram of an equivalent circuit of a transmission path of a GAMMA voltage inside a display driving integrated circuit.
FIG. 5 is a circuit block diagram of a display device according to a preferred embodiment of the invention.
FIG. 6 is a circuit block diagram of a display driving circuit according to a preferred embodiment of the invention.
FIG. 7 is a block diagram showing details of a display driving circuit 502 according to a preferred embodiment of the invention.
FIG. 8 is a block diagram of another detailed circuit of the display driving circuit 502 according to a preferred embodiment of the invention.
Fig. 9-12 are HSPICE simulation diagrams of a display driver circuit 502 according to a preferred embodiment of the present invention.
Symbol description:
SOP: source amplifier
GOP: GAMMA operational amplifier
DAC: digital-to-analog converter
300: load of GAMMA operational amplifier GOP
301: GAMMA voltage long-distance running line parasitic resistor
302: parasitic capacitance of SOP differential input pair of source amplifier
R1: parasitic resistance of long-distance running line for transmitting GAMMA voltage
C1: parasitic capacitance of differential input pair of source amplifier SOP
Ron: transistor on-resistance of digital-to-analog converter DAC
P1: node
501: display panel
502: display driving circuit
601: GAMMA output circuit
602: pre-charging circuit
701. 801: control circuit
SW1: first switch circuit
SW2: second switching circuit
702: selection circuit
AOP: analog buffer circuit
703: voltage supply circuit
VP: specific voltage
R1': load at output of GAMMA operational amplifier GOP
C1': parasitic capacitance of positive input end of source amplifier SOP
901: the original discharge waveform of the precharge circuit 602 is not added
902: discharge waveform incorporating precharge circuit 602 of FIG. 7
903: discharge waveforms incorporating precharge circuit 602 of fig. 8
1001: without adding a precharge circuit 602, the discharge waveform of SOP to the load is simulated
1002: the precharge circuit 602 is added to simulate the discharge waveform of SOP to the load
1101: is the original charge waveform without adding the precharge circuit 602
1102: charging waveforms incorporating precharge circuit 602 of fig. 7
1103: charging waveforms incorporating precharge circuit 602 of fig. 8
1201: without adding the precharge circuit 602, the charge waveform of the SOP to the load is simulated
1202 add precharge circuit 602 to simulate the charge waveform of SOP to load
Detailed Description
FIG. 2 is a schematic diagram showing the structure of a driving IC. Referring to fig. 2, due to product characteristics, the number of the source amplifiers (Source Operation Amplifier) SOPs in the display driving integrated circuit is determined according to the resolution of the display device to be driven, for example, in a vertical (portrait) panel, the number of data lines is 2160 (720×3) in the resolution of HD real RGB (1280×720), and the number of data lines is 3240 (1080×3) in the resolution of FHD real RGB (1920×1080). Based on production cost, the resistor voltage division in fig. 2 is to transmit the voltage to a huge number of source amplifiers SOP as a shared reference voltage source through a GAMMA operational amplifier (GAMMA OP amplifier) GOP, and determine what voltage each source amplifier SOP is to drive to the display device through a digital-to-analog converter (DAC) controlled by display data. It is understood that the source amplifier SOP may also be referred to as a TFT (Thin Film Transistor) source signal amplifier.
FIG. 3 is a schematic diagram of a transmission path of GAMMA voltage inside a display driving integrated circuit. Referring to fig. 3, 300 shows the load of the GAMMA op-amp GOP; 301 represents a long-distance run parasitic resistance (global GAMMA long wire routing) of the GAMMA voltage; 302 represents the parasitic capacitance of the source amplifier SOP differential input pair. As the metal layer of the process used for the display driving integrated circuit becomes thinner (the resistance of the metal wire becomes larger under the same process conditions), the capability of the GAMMA operational amplifier GOP to drive the SOP input terminal of the source amplifier becomes the main factor limiting the driving speed. The load 300 of the GAMMA operational amplifier GOP is gradually dominated by the long-running line parasitic resistance 301 for transmitting the GAMMA voltage and the parasitic capacitance 302 of the differential input pair of the source amplifier SOP in the display driving integrated circuit architecture shown in fig. 3. When the load is larger, the input signal speed of the differential input pair of the source amplifier SOP is too slow, and the slew rate (slew rate) is too low, which further affects the driving speed of the display driving integrated circuit.
Under the same process conditions, the parasitic capacitance 302 of the differential input pair of the source amplifier SOP is highly correlated with the size of the transistor, and random mismatch (random mismatch) of the differential input pair of the source amplifier SOP is an important factor for the display quality of the display driving integrated circuit, and the solution of random mismatch can be suppressed by enlarging the critical device area, thus, the parasitic capacitance 302 of the differential input pair of the source amplifier SOP cannot be reduced. This also results in a key cause of the load 300 seen by the GAMMA op-amp GOP failing to drop. Further, the signal climbing capability is insufficient, and in the case of high resolution, the signal is extremely likely to be less than the target voltage.
For those skilled in the art to understand, FIG. 4 is a schematic diagram of an equivalent circuit of a transmission path of the GAMMA voltage inside the display driving integrated circuit. Referring to FIG. 4, in this example, the circuit architecture in FIG. 3 is simplified into a resistor-capacitor model (RC model), where R1 is the parasitic resistance of the long-distance running line of the GAMMA voltage; reference numeral Ron denotes a transistor on-resistance of the digital-to-analog converter DAC; c1 is the parasitic capacitance of the differential input pair of the source amplifier SOP.
As can be clearly understood by those skilled in the art with reference to fig. 4, when the parasitic impedance R1 of the long-distance running line transmitting the GAMMA voltage is larger, if the parasitic capacitance C1 of the differential input pair of the source amplifier SOP is larger, the influence of the pushing force of the GAMMA operational amplifier GOP on the response speed of the node P1 will be smaller. Therefore, under the limited condition of improving the parasitic resistance R1 of the long-distance running line, for example, considering the manufacturing cost of the display driving integrated circuit, in order to increase the reaction speed of the node P1, the charge-discharge behavior of the node P1 or the load structure driven by the GAMMA operational amplifier GOP must be changed.
FIG. 5 is a circuit block diagram of a display device according to a preferred embodiment of the invention. Referring to fig. 5, the display device includes a display panel 501 and a display driving circuit 502. The display driving circuit 502 is coupled to the display panel 501 to drive the display panel 501. FIG. 6 is a block diagram of a display driving circuit 502 according to a preferred embodiment of the invention. Referring to FIG. 6, the display driving circuit 502 includes a GAMMA output circuit 601, a plurality of DAC, a plurality of source amplifiers SOP and at least one precharge circuit 602. In fig. 6, the number of precharge circuits 602 is plural, but the present invention is not limited thereto.
The GAMMA output circuit 601 outputs GAMMA voltages of a plurality of gray scales. Each DAC receives the GAMMA voltage outputted from the GAMMA output circuit 601 and provides an output data voltage to the corresponding source amplifier SOP according to the display data. The input terminal of the source amplifier SOP is correspondingly coupled to the output terminal of the DAC to receive the corresponding output data voltage. The precharge circuit 602 is coupled between the input terminal of the source amplifier SOP and the output terminal of the DAC, and is used for precharging the input terminal of the coupled source amplifier SOP, so that the output terminal of the coupled source amplifier SOP can quickly respond to the received output data voltage.
FIG. 7 is a block diagram showing details of a display driving circuit 502 according to a preferred embodiment of the invention. Referring to fig. 7, in order to more clearly understand the present invention, in this embodiment, the original circuit is purposely simplified, the GAMMA output circuit 601 is only shown as a part of the GAMMA operational amplifier GOP, the impedance of the resistor network part of the GAMMA output circuit 601 is only represented by the resistor R1', and in this embodiment, the DAC and the source amplifier SOP are only shown as a group, so as to facilitate the description of the spirit of the present invention.
In this embodiment, the precharge circuit 602 includes a control circuit 701, a first switch circuit SW1, a second switch circuit SW2, a selection circuit 702, an analog buffer circuit AOP, and a voltage supply circuit 703. The voltage supply circuit 703 is used for providing a plurality of sets of voltages V1, V2, V3 and …. The first switch circuit SW1 is coupled between the positive input terminal of the source amplifier SOP and the output terminal of the DAC. The selection circuit 702 includes a plurality of inputs and an output. The multiple input terminals of the selection circuit 702 respectively receive the multiple sets of voltages V1, V2, V3 …, and the output terminal of the selection circuit 702 is coupled to the positive input terminal of the source amplifier SOP through the analog buffer circuit AOP and the second switch circuit SW 2.
When the DAC provides the output data voltage, the control circuit 701 controls the first switch circuit SW1 to break the circuit between the positive input terminal of the source amplifier SOP and the output terminal of the DAC, and at this time, the load of the output terminal of the GAMMA operational amplifier GOP is only R1', so that the output terminal of the DAC can quickly rise to the output data voltage. Meanwhile, during the time when the first switch circuit SW1 is turned off, the control circuit 701 controls the second switch circuit SW2 to be turned on, and at this time, the control circuit 701 controls the selection circuit 702 to supply a set of specific voltages VP similar to the output data voltage, and the parasitic capacitance C1' at the positive input terminal of the source amplifier SOP is precharged by increasing the current driving capability through the analog buffer circuit AOP. Then, the control circuit 702 controls the first switch circuit SW1 to be turned on and the second switch circuit SW2 to be turned off. At this time, normal operation is resumed. By the precharge technology, the response speed of the source amplifier SOP to the output data voltage input by the input end can be accelerated, and the display panel with higher resolution or higher update rate can be driven. In an embodiment, the precharge circuit 602 precharges the source amplifier SOP for a predetermined time before the DAC provides the output data voltage, or for a predetermined time after the DAC provides the output data voltage, or for a predetermined time before and after the DAC provides the output data voltage.
It will be appreciated by those skilled in the art from the above description of the embodiments that the analog buffer circuit AOP may be omitted if the voltage supply circuit 703 can provide a relatively stable and high driving voltage. Meanwhile, the selection circuit 702 is a switching network, so that the second switching circuit SW2 may be omitted without the analog buffer circuit AOP. Therefore, the present invention is not limited to the above-mentioned circuit.
FIG. 8 is a block diagram of another detailed circuit of the display driving circuit 502 according to a preferred embodiment of the invention. Referring to fig. 8, in this embodiment, the original circuit is simplified, only a portion of the GAMMA operational amplifier GOP is shown in the GAMMA output circuit 601, the impedance of the resistor network portion of the GAMMA output circuit 601 is represented by the resistor R1', and only one set of the DAC and the source amplifier SOP is shown in this embodiment, so as to facilitate the description of the spirit of the present invention. In addition, in this embodiment, the precharge circuit 602 includes only a control circuit 801, a first switch circuit SW1, a second switch circuit SW2, and an analog buffer circuit AOP.
When the DAC provides the output data voltage, the control circuit 801 controls the first switch circuit SW1 to break the circuit between the positive input terminal of the source amplifier SOP and the output terminal of the DAC, and the load of the output terminal of the GAMMA operational amplifier GOP is almost R1', so that the output terminal of the DAC can quickly rise to the output data voltage. Meanwhile, the control circuit 801 controls the second switch circuit SW2 to be turned on at the same time, that is, during the time when the first switch circuit SW1 is turned off, and at this time, the analog buffer circuit AOP rapidly precharges the parasitic capacitance C1' at the positive input terminal of the source amplifier SOP according to the output data voltage received at the input terminal thereof. Then, the control circuit 702 controls the first switch circuit SW1 to be turned on and the second switch circuit SW2 to be turned off. At this time, normal operation is resumed. By the precharge technology, the response speed of the source amplifier SOP to the output data voltage input by the input end can be accelerated, and the display panel with higher resolution or higher update rate can be driven. In an embodiment, the precharge circuit 602 precharges the source amplifier SOP for a predetermined time before the DAC provides the output data voltage, or for a predetermined time after the DAC provides the output data voltage, or for a predetermined time before and after the DAC provides the output data voltage. This time may be controlled, for example, by a timing controller.
Fig. 9-12 are HSPICE simulation diagrams of a display driver circuit according to a preferred embodiment of the present invention. Referring to fig. 9, the hsice simulation condition is the QHD SOP load provided by the actual panel plant, r_fanout= 7.02841kΩ; c_fanout= 8.47112pF; r_arrayarea= 10.1717kΩ; c_arrayarea= 15.9536pF. Reference numeral 901 denotes an original discharge waveform to which the precharge circuit 602 is not added, reference numeral 902 denotes a discharge waveform added to the left side of SW1 in the precharge circuit 602 of fig. 8, and reference numeral 903 denotes a discharge waveform added to the right side of SW1 in the precharge circuit 602 of fig. 8. Referring to fig. 10, 1001 is to add no precharge circuit 602, simulate the discharge waveform of SOP to the load, 1002 is to add precharge circuit 602, simulate the discharge waveform of SOP to the load. As can be seen from the above figures, the addition of the precharge circuit 602 can surely improve the discharge speed.
Referring to fig. 11, 1101 is an original charging waveform without adding the precharge circuit 602, 1102 is a charging waveform added to the left side of SW1 in the precharge circuit 602 of fig. 8, 1103 is a charging waveform added to the right side of SW1 in the precharge circuit 602 of fig. 8. Referring to fig. 12, 1201 is to add no precharge circuit 602, simulate the charge waveform of the SOP to the load, 1202 is to add the precharge circuit 602, simulate the charge waveform of the SOP to the load. As can be seen from the above figures, the addition of the precharge circuit 602 can surely improve the charging speed.
Furthermore, the applicant has also simulated the charge-discharge rate using HSPICE, discharging at 7.8V to 4V (the time can be from 1% to 99%), the original architecture requiring about 2.227us, adding to the architecture of the present invention, only 1.216us. Charging to 7.8V at 4V (the time may be from 1% to 99%), the original architecture requires about 2.210us, adding to the architecture of the present invention, only 1.232us. The original architecture requires about 2.296us with 7.8V discharge to 0.2V (time can be from 1% to 99%), with only 1.400us being required to add to the architecture of the present invention. Charging to 4V at 0.2V (time can be from 1% to 99%), the original architecture requires about 2.225us, with only 1.241us being needed to join the architecture of the present invention. Discharging to 0.2 at 4V, the original architecture requires about 2.318us, adding to the architecture of the present invention, only 1.267us. Charging to 7.8V at 0.2V, the original architecture requires about 2.229us, adding to the architecture of the present invention, only 1.389us. Simulation proves that the technology of the invention can shorten the driving time of the display driving circuit by 37.7-45.4%, so that the display driving circuit can meet the display product requirement of high resolution and high picture updating rate.
In summary, the present invention is directed to a method for pre-charging an input terminal of a source amplifier, and turning off a pre-stage DAC during charging, so that a time constant seen by an output of the DAC is smaller, and a pre-charging circuit is dedicated to pre-charging, so that the source amplifier can rapidly respond to a data voltage, thereby increasing a driving speed, and the display driving circuit can be applied to a display panel with higher resolution.
The embodiments set forth in the detailed description of the preferred embodiments are merely for convenience of explanation of the technical content of the present invention, and are not intended to limit the present invention in a narrow sense to the above-described embodiments, but various modifications can be made without departing from the spirit of the invention and the scope of the following claims. The scope of the invention is therefore defined in the appended claims.
Claims (20)
1. A display driving circuit, comprising:
a GAMMA output circuit for outputting GAMMA voltages of a plurality of gray scales;
each digital-to-analog converter comprises an output end, and each digital-to-analog converter receives the GAMMA voltages and provides output data voltages according to display data;
the source amplifiers comprise an input end and an output end, and the input end of each source amplifier is correspondingly coupled with the output end of the digital-analog converter so as to receive corresponding output data voltage; and
at least one precharge circuit disposed between the input terminal of at least one of the source amplifiers and the output terminal of at least one of the digital-to-analog converters for precharging the input terminal of the coupled source amplifier to enable the output terminal of the coupled source amplifier to rapidly respond to the received output data voltage, wherein the precharge circuit comprises:
a first switch circuit coupled between the input end of the source amplifier and the output end of the at least one digital-to-analog converter;
a voltage supply circuit for providing multiple groups of voltages; and
the selection circuit comprises a plurality of input ends and an output end, wherein the plurality of input ends of the selection circuit respectively receive the plurality of groups of voltages, and the output end of the selection circuit is coupled with the input end of the source amplifier;
before the digital-analog converter provides the corresponding output data voltage, the first switch circuit breaks a circuit between the input end of the source amplifier and the output end of the digital-analog converter;
the selection circuit is used for selecting one group of specific voltages of the multiple groups of voltages provided by the voltage providing circuit to the input end of the source amplifier according to corresponding display data so as to perform pre-charging.
2. The display driver circuit of claim 1, wherein the precharge circuit comprises:
and a buffer circuit coupled between the output end of the selection circuit and the input end of the source amplifier for increasing current driving force so as to accelerate the pre-charge.
3. The display driver circuit of claim 2, wherein the precharge circuit further comprises:
a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier;
before the digital-to-analog converter provides the output data voltage, the first switch circuit breaks a circuit between the input end of the source amplifier and the output end of at least one digital-to-analog converter, and the second switch circuit is conducted;
when the precharge is completed, the second switch circuit is turned off, and the first switch circuit is turned on.
4. The display driving circuit according to claim 1, wherein the time for the precharge circuit to precharge the source amplifier comprises a default time before the at least one of the digital-to-analog converters provides the corresponding output data voltage.
5. The display driving circuit according to claim 1, wherein the precharge circuit precharges the source amplifier for a predetermined time period including a predetermined time period after the at least one of the digital-to-analog converters provides the corresponding output data voltage.
6. The display driving circuit according to claim 1, wherein the time for the precharge circuit to precharge the source amplifier comprises a default time around when the at least one of the digital-to-analog converters provides the corresponding output data voltage.
7. A display device, comprising:
a display panel; and
a driving circuit coupled to the display panel, comprising:
a GAMMA output circuit for outputting GAMMA voltages of a plurality of gray scales;
each digital-to-analog converter comprises an output end, and each digital-to-analog converter receives the GAMMA voltages and provides output data voltages according to display data;
the source amplifiers comprise an input end and an output end, the input end of each source amplifier is correspondingly coupled with the output end of the digital-analog converter so as to receive corresponding output data voltage, and the output end of each source amplifier is correspondingly coupled with a corresponding data line of the display panel; and
at least one precharge circuit disposed between the input terminal of at least one of the source amplifiers and the output terminal of at least one of the digital-to-analog converters for precharging the input terminal of the coupled source amplifier to enable the output terminal of the coupled source amplifier to rapidly respond to the received output data voltage, wherein the precharge circuit comprises:
a first switch circuit coupled between the input end of the source amplifier and the output end of the at least one digital-to-analog converter;
a voltage supply circuit for providing multiple groups of voltages;
the selection circuit comprises a plurality of input ends and an output end, wherein the plurality of input ends of the selection circuit respectively receive the plurality of groups of voltages, and the output end of the selection circuit is coupled with the input end of the source amplifier; before the digital-analog converter provides the corresponding output data voltage, the first switch circuit breaks a circuit between the input end of the source amplifier and the output end of the digital-analog converter;
the selection circuit is used for selecting one group of specific voltages of the multiple groups of voltages provided by the voltage providing circuit to the input end of the source amplifier according to corresponding display data so as to perform pre-charging.
8. The display device of claim 7, wherein the precharge circuit further comprises:
and a buffer circuit coupled between the output end of the selection circuit and the input end of the source amplifier for increasing current driving force so as to accelerate the pre-charge.
9. The display device of claim 8, wherein the precharge circuit further comprises:
a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier;
before the digital-to-analog converter provides the output data voltage, the first switch circuit breaks a circuit between the input end of the source amplifier and the output end of at least one digital-to-analog converter, and the second switch circuit is conducted;
when the precharge is completed, the second switch circuit is turned off, and the first switch circuit is turned on.
10. The display device of claim 7, wherein the precharge circuit precharges the source amplifiers for a predetermined time period before the at least one DAC provides the corresponding output data voltage.
11. The display device of claim 7, wherein the precharge circuit precharges the source amplifiers for a predetermined time period after the at least one DAC provides the corresponding output data voltage.
12. The display device of claim 7, wherein the time for the precharge circuit to precharge the source amplifier includes a default time around when the at least one dac provides the corresponding output data voltage.
13. A display driving circuit, comprising:
a GAMMA output circuit for outputting GAMMA voltages of a plurality of gray scales;
each digital-to-analog converter comprises an output end, and each digital-to-analog converter receives the GAMMA voltages and provides output data voltages according to display data;
the source amplifiers comprise an input end and an output end, and the input end of each source amplifier is correspondingly coupled with the output end of the digital-analog converter so as to receive corresponding output data voltage; and
at least one precharge circuit disposed between the input terminal of at least one of the source amplifiers and the output terminal of at least one of the digital-to-analog converters for precharging the input terminal of the coupled source amplifier to enable the output terminal of the coupled source amplifier to rapidly respond to the received output data voltage, wherein the precharge circuit comprises:
a first switch circuit coupled between the input end of the source amplifier and the output end of the at least one digital-to-analog converter;
a buffer circuit coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter for pre-charging according to the output data voltage outputted from the output terminal of the at least one digital-to-analog converter; and
a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier;
before the digital-to-analog converter provides the output data voltage, the first switch circuit breaks a circuit between the input end of the source amplifier and the output end of at least one digital-to-analog converter, and the second switch circuit is conducted;
the buffer circuit is used for pre-charging according to the output data voltage output by the output end of at least one digital-analog converter;
when the precharge is completed, the second switch circuit is turned off, and the first switch circuit is turned on.
14. The display driver circuit of claim 13, wherein the precharge circuit precharges the source amplifiers for a predetermined time period before the at least one DAC provides the corresponding output data voltage.
15. The display driving circuit according to claim 13, wherein the time for the precharge circuit to precharge the source amplifier comprises a default time after the at least one of the digital-to-analog converters provides the corresponding output data voltage.
16. The display driver circuit of claim 13, wherein the precharge circuit precharges the source amplifiers for a predetermined time period including a predetermined time period around when the at least one DAC provides the corresponding output data voltage.
17. A display device, comprising:
a display panel; and
a driving circuit coupled to the display panel, comprising:
a GAMMA output circuit for outputting GAMMA voltages of a plurality of gray scales;
each digital-to-analog converter comprises an output end, and each digital-to-analog converter receives the GAMMA voltages and provides output data voltages according to display data;
the source amplifiers comprise an input end and an output end, the input end of each source amplifier is correspondingly coupled with the output end of the digital-analog converter so as to receive corresponding output data voltage, and the output end of each source amplifier is correspondingly coupled with a corresponding data line of the display panel; and
at least one precharge circuit disposed between the input terminal of at least one of the source amplifiers and the output terminal of at least one of the digital-to-analog converters for precharging the input terminal of the coupled source amplifier to enable the output terminal of the coupled source amplifier to rapidly respond to the received output data voltage, wherein the precharge circuit comprises:
a first switch circuit coupled between the input end of the source amplifier and the output end of the at least one digital-to-analog converter;
a buffer circuit coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter for pre-charging according to the output data voltage outputted from the output terminal of the at least one digital-to-analog converter; and
a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier; before the digital-to-analog converter provides the output data voltage, the first switch circuit breaks a circuit between the input end of the source amplifier and the output end of at least one digital-to-analog converter, and the second switch circuit is conducted;
the buffer circuit is used for pre-charging according to the output data voltage output by the output end of at least one digital-analog converter;
when the precharge is completed, the second switch circuit is turned off, and the first switch circuit is turned on.
18. The display device of claim 17, wherein the precharge circuit precharges the source amplifiers for a predetermined time period before the at least one dac provides the corresponding output data voltage.
19. The display device of claim 17, wherein the precharge circuit precharges the source amplifiers for a predetermined time period after the at least one dac provides the corresponding output data voltage.
20. The display device of claim 17, wherein the time for the precharge circuit to precharge the source amplifier includes a default time around when the at least one dac provides the corresponding output data voltage.
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