CN113690289A

CN113690289A - Display substrate, preparation method thereof and display device

Info

Publication number: CN113690289A
Application number: CN202110984252.2A
Authority: CN
Inventors: 崔钊; 张楠; 张锋; 刘文渠; 吕志军; 董立文; 孟德天; 王利波; 侯东飞; 李柳青; 黄海涛; 姚琪
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2021-08-25
Filing date: 2021-08-25
Publication date: 2021-11-23
Anticipated expiration: 2041-08-25
Also published as: CN113690289B

Abstract

The disclosure provides a display substrate, a preparation method thereof and a display device. The display substrate comprises a plurality of pixel island regions, a plurality of connecting bridge regions and a plurality of isolation regions, the display substrate comprises a sound production display structure layer and a cavity structure layer which are overlapped, the sound production display structure layer comprises a sound production structure layer arranged on a substrate and a display structure layer arranged on one side, far away from the substrate, of the sound production structure layer, and the cavity structure layer is arranged on one side, far away from the display structure layer, of the substrate; and the sound production structure layer and the display structure layer of at least one isolation region are provided with isolation grooves. According to the display substrate, the isolation grooves are arranged between the pixel islands, the isolation grooves can isolate sound waves propagating in the plane of the display substrate, and the problem that standing wave effect influences screen display and mechanical problems of a screen are avoided.

Description

Display substrate, preparation method thereof and display device

Technical Field

The present disclosure relates to but not limited to the field of display technologies, and in particular, to a display substrate, a method for manufacturing the same, and a display device.

Background

The role and position of sound in displaying products is becoming more and more important as an important aspect of human-computer interaction between the products and users. The traditional display product sets up sound generating mechanism (for example speaker) alone usually and realizes sound output, and the speaker is set up the side at the display screen, and the volume is great, and occupation space is big, and not only the low frequency effect is relatively poor, influences the thickness and the screen of showing the product moreover and accounts for than, is unfavorable for realizing narrow frame. The screen sounding technology has the advantages of small volume, small occupied space, water and dust prevention, screen occupation ratio improvement and the like, and is rapidly developed in recent years.

The inventor of the application finds that the conventional screen sounding product not only has the problem of influence on display due to standing wave effect, but also has the problem of low integration level.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

The technical problem to be solved by the embodiments of the present disclosure is to provide a display substrate, a manufacturing method thereof, and a display device, so as to solve the problems that the display and the integration level are affected by the existing structure.

In one aspect, the present disclosure provides a display substrate, including a plurality of pixel island regions, a plurality of connection bridge regions and a plurality of isolation regions, where the connection bridge regions are located between adjacent pixel island regions and configured to implement signal communication between the adjacent pixel island regions through connection lines, and the isolation regions are located between the adjacent pixel island regions except for a region where the connection bridge regions are located; on a plane perpendicular to a display substrate, the display substrate comprises a sound production display structure layer and a cavity structure layer which are overlapped, the sound production display structure layer comprises a sound production structure layer arranged on a substrate and a display structure layer arranged on one side, far away from the substrate, of the sound production structure layer, and the cavity structure layer is arranged on one side, far away from the display structure layer, of the substrate; and the sound production structure layer and the display structure layer of at least one isolation region are provided with isolation grooves.

In an exemplary embodiment, the sound emission structure layer of the pixel island region includes a first electrode layer disposed on the substrate, a piezoelectric layer disposed on a side of the first electrode layer away from the substrate, a second electrode layer disposed on a side of the piezoelectric layer away from the substrate, and a protective layer disposed on a side of the second electrode layer away from the substrate; the first electrode layer comprises at least one first electrode, the second electrode layer comprises at least one second electrode, and an orthographic projection of the first electrode on the substrate at least partially overlaps with an orthographic projection of the second electrode on the substrate.

In an exemplary embodiment, the cavity structure layer includes a first bonding layer disposed on a side of the substrate away from the display structure layer and a substrate layer disposed on a side of the first bonding layer away from the substrate, the substrate layer is provided with at least one cavity, and the cavity is a groove formed on a side of the substrate layer close to the substrate, or the cavity is a through hole formed in the substrate layer; the orthographic projection of the cavity on the substrate at least partially overlaps with the orthographic projection of the first electrode or the second electrode in the sounding structure layer on the substrate.

In an exemplary embodiment, the cavity structure layer further includes a second adhesive layer disposed on a side of the substrate layer away from the substrate, and a reflective layer disposed on a side of the second adhesive layer away from the substrate.

In an exemplary embodiment, the sound emission structure layer of the connecting bridge area comprises a piezoelectric layer arranged on the base and a protective layer arranged on the side of the piezoelectric layer far away from the base; the display structure layer of the connection bridge area comprises a first inorganic layer arranged on the protective layer, a first organic layer arranged on one side, far away from the substrate, of the first inorganic layer, a connection line arranged on one side, far away from the substrate, of the first organic layer and a second organic layer covering the connection line.

In an exemplary embodiment, the display structure layer of the pixel island region includes a driving structure layer disposed on a side of the sound emission structure layer away from the substrate and a light emitting structure layer disposed on a side of the driving structure layer away from the substrate; the driving structure layer comprises a first insulating layer arranged on the protective layer, a transistor arranged on one side, far away from the substrate, of the first insulating layer and a second flat layer covering the transistor; the first inorganic layer of the connecting bridge region and the first insulating layer of the pixel island region are arranged on the same layer, the connecting line of the connecting bridge region and the source electrode and the drain electrode of the transistor of the pixel island region are arranged on the same layer, and the second organic layer of the connecting bridge region and the second flat layer of the pixel island region are arranged on the same layer.

On the other hand, the embodiment of the present disclosure further provides a display device, including the aforementioned display substrate.

In yet another aspect, embodiments of the present disclosure further provide a method for manufacturing a display substrate, where the display substrate includes a plurality of pixel island regions, a plurality of connection bridge regions and a plurality of isolation regions, the connection bridge regions are located between adjacent pixel island regions and configured to implement signal communication between the adjacent pixel island regions through connection lines, and the isolation regions are located between the adjacent pixel island regions except for a region where the connection bridge region is located; the preparation method comprises the following steps:

form sound production display structural layer and cavity structural layer respectively, it includes to form sound production display structural layer: sequentially forming a sound production structure layer and a display structure layer arranged on one side, far away from the substrate, of the sound production structure layer on the substrate, wherein the sound production structure layer and the display structure layer of at least one isolation region are provided with isolation grooves;

and sticking the cavity structure layer to one side of the substrate far away from the display structure layer.

In an exemplary embodiment, a sounding structure layer and a display structure layer disposed on a side of the sounding structure layer away from the substrate are sequentially formed on the substrate, and isolation grooves are disposed on the sounding structure layer and the display structure layer of at least one isolation region, including:

forming a sound production structure layer on a substrate, wherein the sound production structure layer connecting the bridge area and the isolation area comprises a piezoelectric layer arranged on the substrate and a protective layer arranged on one side of the piezoelectric layer far away from the substrate;

and forming a display structure layer on the sounding structure layer, and forming an isolation groove on the sounding structure layer and the display structure layer of at least one isolation region, wherein the isolation groove is exposed out of the substrate.

In an exemplary embodiment, forming an isolation groove on the sound emission structure layer and the display structure layer of the at least one isolation region includes:

sequentially forming a first inorganic layer and a composite insulating layer on the protective layer of the connection bridge region and the isolation region;

removing the composite insulating layer of the connecting bridge region and the isolation region through a primary patterning process to form a first groove;

removing the first inorganic layer, the protective layer and the piezoelectric layer of the isolation region through another patterning process, and forming a second groove in the first groove;

forming a first organic layer filling the first and second grooves;

forming a connecting line, wherein the connecting line is positioned on one side, away from the substrate, of the first organic layer of the connecting bridge region;

forming a second organic layer covering the connection line of the connection bridge region;

and removing the first organic layer and the second organic layer of the isolation region to form an isolation groove, wherein the substrate is exposed out of the isolation groove.

In an exemplary embodiment, the display structure layer of the pixel island region includes a driving structure layer disposed on a side of the sound emission structure layer away from the substrate and a light emitting structure layer disposed on a side of the driving structure layer away from the substrate; the driving structure layer comprises a first insulating layer arranged on the protective layer, a transistor arranged on one side, far away from the substrate, of the first insulating layer and a second flat layer covering the transistor; the first inorganic layer of the connection bridge area and the first insulating layer of the pixel island area are arranged on the same layer and are formed simultaneously through the same patterning process, the connecting line of the connection bridge area and the source electrode and the drain electrode of the transistor of the pixel island area are arranged on the same layer and are formed simultaneously through the same patterning process, and the second organic layer of the connection bridge area and the second flat layer of the pixel island area are arranged on the same layer and are formed simultaneously through the same patterning process.

In an exemplary embodiment, the first and second planarization layers of the isolation region are removed after the pixel defining layer of the light emitting structure layer is formed.

In an exemplary embodiment, forming a cavity structure layer includes:

at least one cavity is formed on the substrate layer, and the cavity is a groove or a through hole formed in the substrate layer.

In an exemplary embodiment, attaching the cavity structure layer to a side of the substrate away from the display structure layer includes:

the substrate layer is attached to one side, far away from the display structure layer, of the base through a first bonding layer, and the orthographic projection of the cavity on the base on the substrate layer is at least partially overlapped with the orthographic projection of the first electrode or the second electrode on the base in the sound production structure layer;

and a reflecting layer is attached to one side, far away from the substrate, of the substrate layer through a second bonding layer.

The disclosed exemplary embodiment provides a display substrate, a manufacturing method thereof and a display device, wherein isolation grooves are arranged between pixel island regions, and the isolation grooves can isolate sound waves propagating in the plane of the display substrate, so that the problems that standing wave effect influences screen display and screen mechanics are avoided. The display substrate of the exemplary embodiment of the disclosure is provided with the sound production structure layer and the display structure layer at the same side of the substrate, and the formed integrated structure and the integrally prepared display substrate have high integration level, can reduce the overall thickness of a product, and meet the product requirement of lightness and thinness.

Other aspects will be apparent upon reading and understanding the attached drawings and detailed description.

Drawings

The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the example serve to explain the principles of the invention and not to limit the invention. The shapes and sizes of the various elements in the drawings are not to scale and are merely intended to illustrate the invention.

FIG. 1 is a schematic diagram of a screen-lit television;

fig. 2 is a schematic plan view illustrating a display substrate according to an embodiment of the disclosure;

fig. 3 is a schematic plan view of a pixel island according to an exemplary embodiment of the present disclosure;

FIG. 4 is a schematic cross-sectional view illustrating a display substrate according to an exemplary embodiment of the disclosure;

FIG. 5 is a schematic cross-sectional view of another display substrate according to an exemplary embodiment of the disclosure;

FIG. 6 is a schematic diagram illustrating a sound generating structure layer after patterning;

FIG. 7 is a schematic diagram illustrating a patterned transistor layer according to an embodiment of the disclosure;

FIG. 8 is a schematic diagram illustrating a first groove pattern formed according to an embodiment of the disclosure;

FIG. 9 is a schematic diagram illustrating a second groove pattern formed in accordance with an embodiment of the present disclosure;

FIG. 10 is a schematic diagram illustrating an active via pattern formed according to an embodiment of the present disclosure;

FIG. 11 is a schematic view illustrating a first planarization layer pattern formed according to an embodiment of the present disclosure;

FIG. 12 is a schematic view of a third conductive layer pattern formed in accordance with an embodiment of the present disclosure;

FIG. 13 is a schematic view illustrating a second planarization layer pattern formed according to an embodiment of the present disclosure;

FIG. 14 is a schematic view after an anode pattern is formed according to an embodiment of the disclosure;

FIG. 15 is a schematic diagram illustrating a pixel defining layer pattern formed according to an embodiment of the disclosure;

FIG. 16 is a schematic view of an embodiment of the present disclosure after forming an isolation trench pattern;

FIG. 17 is a schematic view of an organic light emitting layer after patterning;

FIG. 18 is a schematic view after forming a cathode pattern according to an embodiment of the disclosure;

fig. 19 is a schematic diagram illustrating a patterned package structure layer according to an embodiment of the disclosure;

FIG. 20 is a schematic view of the cover plate of the present disclosure after being attached;

FIG. 21 is a schematic view of a substrate layer after patterning according to an embodiment of the disclosure;

fig. 22 is a schematic view after the bonding process according to the embodiment of the present disclosure.

Description of reference numerals:

1-a glass carrier plate; 10-a substrate; 20, a sound production structure layer;

21 — a first electrode; 22-a piezoelectric layer; 23 — a second electrode;

24-a protective layer; 30-displaying a structural layer; 30A-driving structure layer;

30B — a light emitting structure layer; 30C, packaging the structural layer; 31 — a first insulating layer;

32-a second insulating layer; 33 — a third insulating layer; 34 — a fourth insulating layer;

35-a first planarization layer; 36 — a second planarization layer; 40-a cavity structure layer;

41-a substrate layer; 42-a cavity; 43 — a first adhesive layer;

44 — a second adhesive layer; 45-a reflective film; 50-sound display structure layer;

61-an anode; 62-pixel definition layer; 63 — an organic light emitting layer;

64-a cathode; 80-a cover plate; 81-cover plate bonding layer;

90-an isolation groove; 91 — a first recess; 92-a second recess;

100-pixel island region; 101-a transistor; 102 — a storage capacitor;

103-connecting lines; 200-connecting bridge region; 300-isolation region.

Detailed Description

To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Note that the embodiments may be implemented in a plurality of different forms. Those skilled in the art can readily appreciate the fact that the forms and details may be varied into a variety of forms without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure should not be construed as being limited to the contents described in the following embodiments. The embodiments and features of the embodiments in the present disclosure may be arbitrarily combined with each other without conflict. To maintain the following description of the embodiments of the present disclosure clear and concise, a detailed description of some known functions and components have been omitted from the present disclosure. The drawings of the embodiments of the disclosure only relate to the structures related to the embodiments of the disclosure, and other structures can refer to the common design

The drawing scale in this disclosure may be referenced in the actual process, but is not limited thereto. For example: the width-length ratio of the channel, the thickness and the interval of each film layer and the width and the interval of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the numbers shown in the drawings, and the drawings described in the present disclosure are only schematic structural views, and one embodiment of the present disclosure is not limited to the shapes, numerical values, and the like shown in the drawings.

The ordinal numbers such as "first", "second", "third", and the like in the present specification are provided for avoiding confusion among the constituent elements, and are not limited in number.

In this specification, for convenience, words such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicating orientations or positional relationships are used to explain positional relationships of constituent elements with reference to the drawings, only for convenience of description and simplification of description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present disclosure. The positional relationship of the components is changed as appropriate in accordance with the direction in which each component is described. Therefore, the words described in the specification are not limited to the words described in the specification, and may be replaced as appropriate.

In this specification, the terms "mounted," "connected," and "connected" are to be construed broadly unless otherwise specifically indicated and limited. For example, it may be a fixed connection, or a removable connection, or an integral connection; can be a mechanical connection, or an electrical connection; either directly or indirectly through intervening components, or both may be interconnected. The specific meaning of the above terms in the present disclosure can be understood in specific instances by those of ordinary skill in the art.

In this specification, a transistor refers to an element including at least three terminals, i.e., a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, a channel region refers to a region where current mainly flows.

In this specification, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using transistors of opposite polarities, or in the case of changing the direction of current flow during circuit operation, the functions of the "source electrode" and the "drain electrode" may be interchanged. Therefore, in this specification, "source electrode" and "drain electrode" may be exchanged with each other.

In this specification, "electrically connected" includes a case where constituent elements are connected together by an element having some kind of electrical action. The "element having a certain electric function" is not particularly limited as long as it can transmit and receive an electric signal between connected components. Examples of the "element having some kind of electric function" include not only an electrode and a wiring but also a switching element such as a transistor, a resistor, an inductor, a capacitor, other elements having various functions, and the like.

In the present specification, "parallel" means a state in which an angle formed by two straight lines is-10 ° or more and 10 ° or less, and therefore, includes a state in which the angle is-5 ° or more and 5 ° or less. The term "perpendicular" refers to a state in which the angle formed by two straight lines is 80 ° or more and 100 ° or less, and therefore includes a state in which the angle is 85 ° or more and 95 ° or less.

In the present specification, "film" and "layer" may be interchanged with each other. For example, the "conductive layer" may be sometimes replaced with a "conductive film". Similarly, the "insulating film" may be replaced with an "insulating layer".

In this specification, a triangle, a rectangle, a trapezoid, a pentagon, a hexagon, or the like is not strictly defined, and may be an approximate triangle, a rectangle, a trapezoid, a pentagon, a hexagon, or the like, and some small deformations due to tolerances may exist, and a lead angle, a curved edge, deformation, or the like may exist.

"about" in this disclosure means that the limits are not strictly defined, and that the numerical values are within the tolerances allowed for the process and measurement.

Fig. 1 is a schematic structural diagram of a screen-sounding television. As shown in fig. 1, the main structure of the screen-sounding television includes a display device a and two sounding devices B, one sounding device B is disposed at a first position in the left area of the display device a, the other sounding device B is disposed at a second position in the right area of the display device a, and the two sounding devices B respectively excite the screen to vibrate and sound. The inventor of the application finds that when the screens at the first position and the second position vibrate simultaneously, vibration waves at the two positions can be transmitted in the screens except pushing air to vibrate to make sound, when the vibration waves at the two positions are transmitted to the middle position to meet, superposition of two rows of vibration waves can occur, superposition of the vibration waves with two same frequencies but advancing in opposite directions generates a standing wave effect, so that the amplitude and the energy of the middle position are greatly enhanced, the display effect of the screens can be influenced, such as ripples and the like, and mechanical problems of the screens can be caused, such as screen deformation. In addition, current screen sound production product is preparation respectively usually and shows structure and sound production structure part, then laminates two parts, and not only the integrated level of product is lower, and whole thickness is thicker moreover, is unfavorable for the demand of frivolousization.

In order to solve the problems of the existing structure, such as low display influence and integration level, the exemplary embodiment of the present disclosure provides a display substrate, including a plurality of pixel island regions, a plurality of connection bridge regions and a plurality of isolation regions, where the connection bridge regions are located between adjacent pixel island regions and configured to implement signal communication between adjacent pixel island regions through connection lines, and the isolation regions are located between adjacent pixel island regions except for the region where the connection bridge regions are located; on a plane perpendicular to a display substrate, the display substrate comprises a sound production display structure layer and a cavity structure layer which are overlapped, the sound production display structure layer comprises a sound production structure layer arranged on a substrate and a display structure layer arranged on one side, far away from the substrate, of the sound production structure layer, and the cavity structure layer is arranged on one side, far away from the display structure layer, of the substrate; the sound production structural layer and the display structural layer of at least one isolation region are provided with isolation grooves, and the isolation grooves are configured to obstruct the transmission of sound waves in the display substrate.

In an exemplary embodiment, the isolation grooves may serve as physical partitioning units, and a physical partition is formed between the sound generating units, so that the vibration waves generated by the sound generating units stop propagating when propagating to the isolation grooves, thereby avoiding the standing wave effect (resonance phenomenon) caused by superposition of the vibration waves, avoiding the influence on the screen display effect caused by the standing wave effect, and avoiding the screen mechanics problem caused by the standing wave effect.

Fig. 2 is a schematic plan view illustrating a display substrate according to an embodiment of the disclosure. As shown in fig. 2, the body structure of the display substrate according to the embodiment of the present disclosure may include a plurality of pixel island regions 100 distributed in an array and spaced apart from each other, and at least one bridge region 200 and at least one isolation region 300 between adjacent pixel island regions 100.

In an exemplary embodiment, the pixel islands 100 are configured to realize image display, the connection bridge regions 200 located between the adjacent pixel islands 100 are configured to realize signal communication of the adjacent pixel islands 100 through connection lines, and the isolation regions 300 located between the adjacent pixel islands 100 are configured to block the propagation of acoustic waves in the plane of the display substrate by providing isolation grooves. In an exemplary embodiment, the isolation region 300 may be a region other than the region where the connection bridge region 200 is located, in a region between adjacent pixel island regions 100.

In an exemplary embodiment, the display substrate may be an organic light emitting diode display substrate or a quantum dot light emitting diode display substrate. Organic Light Emitting Diodes (OLEDs) and Quantum-dot Light Emitting Diodes (QLEDs) are active Light Emitting display devices, and have the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, very high response speed, thinness, flexibility, low cost, and the like. With the continuous development of Display technology, a Flexible Display device (Flexible Display) using an OLED or a QLED as a light emitting device and performing signal control by a Thin Film Transistor (TFT) has become a mainstream product in the Display field at present.

Fig. 3 is a schematic plan view of a pixel island according to an exemplary embodiment of the disclosure, taking an OLED display device as an example. As shown in fig. 3, the pixel island 100 may include at least one pixel unit P, the pixel unit P may include a first sub-pixel P1 emitting light of a first color, a second sub-pixel P2 emitting light of a second color, and a third sub-pixel P3 emitting light of a third color, and the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 each include a pixel driving circuit and a light emitting device. The pixel driving circuits in the first, second and third sub-pixels P1, P2 and P3 are respectively connected to the scan signal line, the data signal line and the light emitting signal line, and the pixel driving circuits are configured to receive the data voltage transmitted from the data signal line and output corresponding currents to the light emitting devices under the control of the scan signal line and the light emitting signal line. The light emitting devices in the first, second and third sub-pixels P1, P2 and P3 are respectively connected to the pixel driving circuit of the sub-pixel in which they are located, and the light emitting devices are configured to emit light of corresponding luminance in response to a current output from the pixel driving circuit of the sub-pixel in which they are located.

In an exemplary embodiment, the first sub-pixel P1 may be a red (R) sub-pixel, the second sub-pixel P2 may be a green (G) sub-pixel, the third sub-pixel P3 may be a blue (B) sub-pixel, the three sub-pixels may be rectangular, diamond, pentagon or hexagon in shape, and the three sub-pixels may be arranged in a horizontal, vertical or delta arrangement. In some possible embodiments, the pixel unit may include four sub-pixels, and the four sub-pixels may be arranged in a horizontal parallel manner, a vertical parallel manner, a Square (Square) or a Diamond (Diamond) manner, and the disclosure is not limited thereto.

In an exemplary embodiment, the shape of the pixel island region 300 may be a rectangle or a square in a plane parallel to the display substrate, and corners of the rectangle or the square may be provided as arc-shaped chamfers, and the present disclosure is not limited thereto. In an exemplary embodiment, the width of the pixel island region 300 may be about 300 μm to 800 μm.

In an exemplary embodiment, the shape of the bridge region 200 in a plane parallel to the display substrate may include any one of the following: an "L" shape or a shape with a plurality of "L" shapes connected, a "Z" shape or a shape with a plurality of "Z" shapes connected, and the disclosure is not limited herein. In an exemplary embodiment, the width of the bridge region 200 may be about 40 μm to about 100 μm.

In an exemplary embodiment, the at least one isolation region 300 may be provided with an isolation trench, the structural film layer in the isolation trench is removed, and the isolation trench is configured to block acoustic waves propagating in the plane of the display substrate, prevent standing wave effects from being generated by superposition of vibration waves of the same frequency but traveling in opposite directions, prevent screen display effects from being influenced by the standing wave effects, and prevent screen mechanics problems from being generated by the standing wave effects.

In an exemplary embodiment, the shape of the isolation groove in a plane parallel to the display substrate may include any one of: the shape of an "I" shape or a plurality of connected "I" shapes, the shape of a "T" shape or a plurality of connected "T" shapes, and the shape of an "L" shape or a plurality of connected "L" shapes, the disclosure is not limited herein. In an exemplary embodiment, the width of the isolation trench may be about 10 μm to 100 μm. For example, the width of the isolation trench may be about 10 μm to 20 μm.

Fig. 4 is a schematic cross-sectional structure diagram of a display substrate according to an exemplary embodiment of the disclosure. As shown in fig. 4, the display substrate may include a pixel island region 100, a connection bridge region 200, and an isolation region 300 between the pixel island region 100 and the connection bridge region 200. The main structure of the display substrate may include a cavity structure layer 40 and a sound display structure layer 50 stacked on each other in a plane perpendicular to the display substrate. In an exemplary embodiment, the sound emission display structure layer 50 may include the sound emission structure layer 20 disposed on the substrate 10 and the display structure layer 30 disposed on one side of the sound emission structure layer 20 away from the substrate 10, and the cavity structure layer 40 may be disposed on one side of the substrate 10 away from the display structure layer 30, so as to form an integrated structure and an integrally-prepared screen sound emission display substrate, which not only has a higher integration level, but also can reduce the overall thickness of the product, thereby realizing a light and thin product requirement.

In an exemplary embodiment, at least one isolation region 300 may be provided with at least one isolation groove 90, the sound generating structure layer 20 and the display structure layer 30 in the isolation groove 90 are removed, and the surface of the substrate 10 may be exposed, so that the isolation groove 90 may serve as a physical dividing unit, and a physical separation is formed between the sound generating units, so that the vibration waves generated by the sound generating units stop propagating when propagating to the isolation groove 90, thereby avoiding the standing wave effect (resonance phenomenon) due to the superposition of the vibration waves, avoiding the influence on the screen display effect due to the standing wave effect, and avoiding the screen mechanics problem due to the standing wave effect.

Fig. 5 is a schematic cross-sectional view of another display substrate according to an exemplary embodiment of the disclosure. As shown in fig. 5, the display substrate may include a sound emission structure layer 20 disposed on the substrate 10 and a display structure layer 30 disposed on the sound emission structure layer 20, and the cavity structure layer 40 may be disposed on a side of the substrate 10 away from the display structure layer 30, in a plane perpendicular to the display substrate.

In an exemplary embodiment, the display substrate may include a cover plate 80 disposed on a side of the display structure layer 30 away from the substrate, and the cover plate 80 may be attached to the display structure layer 30 by a cover plate adhesive layer 81.

In an exemplary embodiment, the sound emitting structure layer 20 of the pixel island area 100 may include a first electrode layer disposed on the substrate 10, a piezoelectric layer disposed on a side of the first electrode layer away from the substrate, a second electrode layer disposed on a side of the piezoelectric layer away from the substrate, and a protective layer disposed on a side of the second electrode layer away from the substrate, the piezoelectric layer being configured to generate mechanical vibration by the first electrode layer and the second electrode layer to generate sound waves.

In an exemplary embodiment, the display structure layer 30 of the pixel island region 100 may include a driving structure layer disposed on a side of the sound emission structure layer 20 away from the substrate, a light emitting structure layer disposed on a side of the driving structure layer away from the substrate, and a package structure layer disposed on a side of the light emitting structure layer away from the substrate.

In an exemplary embodiment, the cavity structure layer 40 may include a first adhesive layer disposed at a side of the substrate 10 away from the display structure layer 30, a substrate layer disposed at a side of the first adhesive layer away from the substrate, a second adhesive layer disposed at a side of the substrate layer away from the substrate, and a reflective layer disposed at a side of the second adhesive layer away from the substrate.

In an exemplary embodiment, the isolation trench 90 may be disposed at the at least one isolation region 300, and the isolation trench 90 may expose the substrate 10.

In an exemplary embodiment, the first electrode layer may include at least one first electrode, the second electrode layer may include at least one second electrode, an orthographic projection of the first electrode on the substrate and an orthographic projection of the second electrode on the substrate at least partially overlap, the first electrode and the second electrode and the piezoelectric layer located between the first electrode and the second electrode constitute a piezoelectric sound generating unit generating an acoustic wave.

In an exemplary embodiment, the substrate layer may be provided with at least one cavity, and the cavity may be a groove formed on a side of the substrate layer close to the substrate, or may be a through hole formed on the substrate layer. The orthographic projection of the cavity on the substrate at least partially overlaps with the orthographic projection of the piezoelectric sound generating unit on the substrate in the sound generating structure layer, and the cavity is configured to propagate sound waves generated by the piezoelectric sound generating unit.

In an exemplary embodiment, the sound emitting structure layer of the connecting bridge region 200 may include a piezoelectric layer disposed on the base 10 and a protective layer disposed on a side of the piezoelectric layer away from the base. The display structure layer of the connection bridge region 200 may include a first inorganic layer disposed on the protective layer, a first organic layer disposed on a side of the first inorganic layer away from the substrate, a connection line disposed on a side of the first organic layer away from the substrate, and a second organic layer covering the connection line.

In an exemplary embodiment, the driving structure layer of the pixel island region 100 may include a first insulating layer disposed on the sound emitting structure layer 20, a transistor disposed on a side of the first insulating layer away from the substrate, and a second planarization layer covering the transistor.

In an exemplary embodiment, the first inorganic layer connecting the bridge region 200 may be disposed in the same layer as the first insulating layer of the pixel island region 100 and formed simultaneously by the same patterning process, the connection line connecting the bridge region 200 may be disposed in the same layer as the source and drain electrodes of the transistor of the pixel island region 100 and formed simultaneously by the same patterning process, and the second organic layer connecting the bridge region 200 may be disposed in the same layer as the second planarization layer of the pixel island region 100 and formed simultaneously by the same patterning process.

The disclosed exemplary embodiment provides a display substrate, and through setting up the isolation groove at the isolation region, sound production structural layer and display structural layer in the isolation groove are removed for the acoustic wave that the isolation groove can obstruct and propagate in the display substrate plane, has avoided standing wave effect to influence screen display and screen to take place mechanical problem. The display substrate of the exemplary embodiment of the disclosure is provided with the sound production structure layer and the display structure layer at the same side of the substrate, and the formed integrated structure and the integrally prepared display substrate have high integration level, can reduce the overall thickness of a product, and meet the product requirement of lightness and thinness.

The following is an exemplary description through a process of manufacturing a display substrate. The "patterning process" referred to in the present disclosure includes processes of coating a photoresist, mask exposure, development, etching, stripping a photoresist, and the like, for a metal material, an inorganic material, or a transparent conductive material, and processes of coating an organic material, mask exposure, development, and the like, for an organic material. The deposition can be any one or more of sputtering, evaporation and chemical vapor deposition, the coating can be any one or more of spraying, spin coating and ink-jet printing, and the etching can be any one or more of dry etching and wet etching, and the disclosure is not limited. "thin film" refers to a layer of a material deposited, coated, or otherwise formed on a substrate. The "thin film" may also be referred to as a "layer" if it does not require a patterning process throughout the fabrication process. If the "thin film" requires a patterning process during the entire fabrication process, it is referred to as "thin film" before the patterning process and "layer" after the patterning process. The "layer" after the patterning process includes at least one "pattern". In the present disclosure, the term "a and B are disposed in the same layer" means that a and B are formed simultaneously by the same patterning process, and the "thickness" of the film layer is the dimension of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiment of the present disclosure, "the forward projection of B is located within the range of the forward projection of a" or "the forward projection of a includes the forward projection of B" means that the boundary of the forward projection of B falls within the boundary range of the forward projection of a, or the boundary of the forward projection of a overlaps with the boundary of the forward projection of B.

The preparation process of the display substrate of the exemplary embodiment of the present disclosure may include three parts, namely, sound production display structure layer preparation, cavity structure layer preparation and bonding treatment. The preparation of the sound production display structure layer and the preparation of the cavity structure layer have no precedence requirement and can be carried out simultaneously, and the laminating treatment is carried out after the preparation of the sound production display structure layer and the preparation of the cavity structure layer are finished. The three parts of the preparation process are described below.

First part, preparation of sound production display structure layer

In an exemplary embodiment, the process of preparing the sound display structure layer may include the following operations.

(1) A substrate is prepared. In an exemplary embodiment, the substrate may include a flexible material layer, a first inorganic material layer, and a second inorganic material layer stacked on a glass carrier, the flexible material layer may be made of Polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer soft film, the first inorganic material layer and the second inorganic material layer may be made of silicon nitride (SiNx), silicon oxide (SiOx), or the like, may have a single-layer structure, or the display structure layer can be a multilayer structure, the first inorganic material layer can be called a Barrier (Barrier) layer, the second inorganic material layer can be called a Buffer (Buffer) layer, and the first inorganic material layer and the second inorganic material layer arranged in the substrate can improve the water and oxygen resistance of the substrate and prevent water and oxygen from entering the display structure layer from the lower part of the flexible material layer to influence the electrical property of the transistor and the light emitting property of the organic light emitting layer.

In an exemplary embodiment, the preparation process of the substrate may include: firstly, coating a flexible material layer on a glass carrier plate, and curing to form a film to form the flexible material layer; then depositing a first inorganic material film on the flexible material layer to form a first inorganic material layer (Barrier layer) covering the flexible material layer; then, a second inorganic material film is deposited on the first inorganic material layer to form a second inorganic material layer (Buffer layer) covering the first inorganic material layer, thereby completing the preparation of the substrate.

After the process, the pixel island region 100, the bridge region 200 and the isolation region 300 all include a substrate disposed on a glass carrier.

(2) And preparing a sound production structure layer pattern on the substrate. In an exemplary embodiment, the preparing of the sound emitting structure layer pattern may include:

a first metal thin film is deposited on the substrate 10, and is patterned through a patterning process to form a first electrode layer pattern disposed on the second inorganic material layer of the substrate 10, the first electrode layer pattern may be located in the pixel island region 100, and the first electrode layer pattern may include a plurality of first electrodes 21 disposed at intervals. In the patterning process, the first metal film connecting the bridge region 200 and the isolation region 300 is etched away.

Subsequently, a piezoelectric material solution system is coated, a piezoelectric material film with certain piezoelectric performance is formed by heat curing treatment, crystallization (high temperature) treatment and polarization treatment under a high-voltage electric field in sequence, and the piezoelectric material film is patterned by a patterning process to form a piezoelectric layer 22 pattern covering the first conductive layer pattern.

In an exemplary embodiment, the material of the piezoelectric layer may be an organic piezoelectric material, or may be a composite piezoelectric material of an organic piezoelectric material and an inorganic piezoelectric material. The organic piezoelectric material may be Polyvinylidene Fluoride (PVDF), binary polymer, ternary polymer, or the like, and the composite piezoelectric material may be a composite piezoelectric material composed of piezoelectric ceramics or the like.

In an exemplary embodiment, the patterning of the piezoelectric material film is to etch away the piezoelectric layer in areas outside the display area (e.g., the binding areas) so as not to affect the subsequent binding process. In the patterning process, the piezoelectric material film is remained in the connecting bridge region 200 and the isolation region 300.

Subsequently, a second metal film is deposited and patterned through a patterning process to form a second electrode layer pattern disposed on the piezoelectric layer 22, the second electrode layer pattern may be located on the pixel island region 100, and the second electrode layer pattern may include a plurality of second electrodes 23 disposed at intervals. In this patterning process, the second metal film connecting the bridge region 200 and the isolation region 300 is etched away.

Subsequently, a protective film is applied, and a protective layer 24 covering the second conductive layer is formed after a curing process. In the patterning process, the protective layer 24 is remained to connect the bridge region 200 and the isolation region 300.

In an exemplary embodiment, an orthographic projection of the first electrode 21 on the substrate at least partially overlaps an orthographic projection of the second electrode 23 on the substrate.

In an exemplary embodiment, the orthographic projection of the first electrode 21 on the substrate is located within the range of the orthographic projection of the second electrode 23 on the substrate, or the orthographic projection of the second electrode 23 on the substrate is located within the range of the orthographic projection of the first electrode 21 on the substrate, that is, the positions of the first electrode 21 and the second electrode 23 are in one-to-one correspondence and are opposite, so that the first electrode 21, the piezoelectric layer 22 and the second electrode 23 with overlapped areas constitute a piezoelectric sound generating unit for generating sound waves, and the piezoelectric layer 22 generates mechanical vibration under the action of the potential difference of the first electrode 21 and the second electrode 23, so that a film layer above the piezoelectric layer 22 vibrates, and the sound is generated.

In an exemplary embodiment, the first electrode 21 may be a receiving electrode (Rx) and the second electrode 23 may be a transmitting electrode (Tx), or the first electrode 21 may be a transmitting electrode (Tx) and the second electrode 23 may be a receiving electrode (Rx).

In an exemplary embodiment, the material of the protection layer 24 may be an organic material, such as Resin (Resin) having a dielectric constant of about 3. The protective layer 24 may include at least two functions: firstly, as the flat layer, make the sound production structural layer have more flat surface to do benefit to follow-up preparation. And secondly, as an insulating layer, an insulating structure is formed between the electrode of the sounding structure layer and the transistor of the driving structure layer, so that when the sounding structure layer of the sandwich structure is excited by an electric signal, a capacitor is prevented from being formed between the second electrode and the electrode of the transistor, and the electrical characteristics of the transistor are influenced.

After this process, the pixel island area 100 may include a sound emitting structure layer 20 disposed on the substrate 10, and the sound emitting structure layer 20 may include the substrate 10 disposed on the glass carrier 1, a first electrode layer disposed on the substrate 10 and including a plurality of first electrodes 21, a piezoelectric layer 22 disposed on the first electrode layer, a second electrode layer disposed on the piezoelectric layer 22 and including a plurality of second electrodes 23, and a protective layer 24 covering the second electrode layer. The bridge region 200 and the isolation region 300 may include a substrate 10 disposed on the glass carrier plate 1, a piezoelectric layer 22 disposed on the substrate 10, and a protective layer 24 covering the piezoelectric layer 22, as shown in fig. 6, and fig. 6 is a cross-sectional view taken along a-a of fig. 2.

(3) And preparing a transistor film pattern on the substrate. In an exemplary embodiment, the preparing of the transistor film layer pattern may include:

depositing a first insulating film and a semiconductor film in sequence on the substrate on which the patterns are formed, patterning the semiconductor film through a patterning process to form a first insulating layer 31 covering the protective layer, and a semiconductor layer pattern disposed on the first insulating layer 31, the semiconductor layer pattern including at least a first active layer. In the patterning process, the semiconductor film connecting the bridge region 200 and the isolation region 300 is etched away, and the first insulating film remains.

Subsequently, a second insulating film and a first conductive film are sequentially deposited, and the first conductive film is patterned through a patterning process to form a second insulating layer 32 covering the semiconductor layer pattern and a first conductive layer pattern disposed on the second insulating layer 32, the first conductive layer pattern including at least a first gate electrode and a first electrode plate. In the patterning process, the first conductive film connecting the bridge region 200 and the isolation region 300 is etched away, and a second insulating film is remained.

And then, sequentially depositing a third insulating film and a second conductive film, and patterning the second conductive film through a patterning process to form a third insulating layer 33 covering the first conductive layer and a second conductive layer pattern arranged on the third insulating layer 33, wherein the second conductive layer pattern at least comprises a second polar plate, and the orthographic projection of the second polar plate on the substrate is at least partially overlapped with the orthographic projection of the first polar plate on the substrate. In the patterning process, the second conductive film connecting the bridge region 200 and the isolation region 300 is etched away, and a third insulating film is remained.

Thus, a transistor film pattern is prepared. The transistor film of the pixel island region 100 may include a first insulating layer, a semiconductor layer, a second insulating layer, a first conductive layer, a third insulating layer, and a second conductive layer stacked, and the transistor film connecting the bridge region 200 and the isolation region 300 may include a first insulating layer 31, a second insulating layer 32, and a third insulating layer 33 stacked, as shown in fig. 7, where fig. 7 is a cross-sectional view taken along a-a in fig. 2.

(4) A groove pattern is formed. In an exemplary embodiment, forming the groove pattern may include: a fourth insulating film is deposited on the substrate on which the aforementioned pattern is formed, and a fourth insulating layer 34 covering the second conductive layer is formed. Subsequently, a photoresist is coated, exposed and developed through a mask to form a photoresist pattern, the fourth insulating layer 34 of the pixel island region 100 is covered with the photoresist, and the photoresist connecting the bridge region 200 and the isolation region 300 is removed to expose the surface of the fourth insulating layer 34. After the first groove 91 is formed through an etching process, the remaining photoresist is stripped. The first groove 91 may be located to connect the bridge region 200 and the isolation region 300, and the fourth insulating layer 34, the third insulating layer 33 and the second insulating layer 32 in the first groove 91 are etched away to expose the surface of the first insulating layer 31, as shown in fig. 8, where fig. 8 is a cross-sectional view taken along a-a in fig. 2.

In an exemplary embodiment, the first insulating layer 31 connecting the bridge region 200 may serve as a first inorganic layer of the region, and the second, third, and fourth insulating

layers

32, 33, and 34 connecting the bridge region 200 serve as a composite insulating layer of the region, so that the first inorganic layer connecting the bridge region 200 is disposed in the same layer as the first insulating layer 31 of the pixel island region 100 and is simultaneously formed through the same patterning process.

Subsequently, a photoresist is coated, exposed and developed through a mask to form a photoresist pattern, the fourth insulating layer 34 of the pixel island region 100 and the first insulating layer 31 of the connection bridge region 200 are covered with the photoresist, and the photoresist of the isolation region 300 is removed to expose the surface of the first insulating layer 31.

The second groove 92 is formed by an etching process, and the remaining photoresist is stripped. The second recess 92 may be located in the isolation region 300, that is, the second recess 92 is located in the first recess 91, and the first insulating layer 31, the passivation layer 24 and the piezoelectric layer 22 in the second recess 92 are etched away to expose the surface of the substrate 10, as shown in fig. 9, where fig. 9 is a cross-sectional view taken along the direction a-a in fig. 2.

In an exemplary embodiment, the second groove 92 may etch away a portion of the thickness of the substrate 10. For example, the second groove 92 may etch away a second inorganic material layer (Buffer) layer in the substrate 10, and the second groove 92 exposes the first inorganic material layer of the substrate 10. As another example, the second groove 92 may etch away the second inorganic material layer (Buffer layer) and the first inorganic material layer (Barrier layer) in the substrate 10, and the second groove 92 exposes the flexible material layer of the substrate 10, which is not limited in this disclosure.

In an exemplary embodiment, the Process of forming the first groove 91 may be referred to as a first etching Process (Etch Process 1, abbreviated to EP1), and the Process of forming the second groove 92 may be referred to as a second etching Process (Etch Process 2, abbreviated to EP 2).

In an exemplary embodiment, the processes of EP1 and EP2 may be performed in synchronization with the process of the inflection region of the bonding region in the display substrate. In an exemplary embodiment, the binding region in the display substrate is provided with a bending region configured to bend the binding region to a rear surface of the display substrate. The Bending region is formed with a groove by a patterning process of a first MASK (Etch masking a MASK, abbreviated as EBA MASK) and a patterning process of a second MASK (Etch masking B MASK, abbreviated as EBB MASK) to reduce the thickness of the Bending region. In the present disclosure, the processing of EP1 may be performed in synchronization with the processing of the EBA MASK, and the processing of EP2 may be performed in synchronization with the processing of the EBB MASK, while forming corresponding grooves in the isolation region 300 and the kink region.

(5) And forming an active via hole pattern. In an exemplary embodiment, the forming of the active via pattern may include: the fourth insulating layer 34 is patterned through a patterning process, at least two active vias K1 are formed on the fourth insulating layer 34, the two active vias K1 are located in the pixel island region 100, and the fourth insulating layer 34, the third insulating layer 33 and the second insulating layer 32 in the two active vias K1 are etched away to expose both ends of the first active layer, as shown in fig. 10, where fig. 10 is a cross-sectional view taken along a-a in fig. 2.

(6) A first planarization layer pattern is formed. In an exemplary embodiment, forming the first flat layer pattern may include: a first planarization film is coated on the substrate on which the aforementioned pattern is formed, and a first planarization layer 35 filling the first and

second grooves

91 and 92 is formed, as shown in fig. 11, and fig. 11 is a cross-sectional view taken along a-a of fig. 2.

In an exemplary embodiment, the first planarization layer 35 is located to connect the bridge region 200 and the isolation region 300 as a first organic layer. The first planarization layer 35 located in the bridge region 200 fills the first groove 91, the first planarization layer 35 located in the isolation region 300 fills the second groove 92, and the surface of the first planarization layer 35 located in the bridge region 200 on the side away from the substrate and the surface of the first planarization layer 35 located in the isolation region 300 on the side away from the substrate may be flush. In an exemplary embodiment, the first flat film of the pixel island region 100 is entirely removed, and a surface of the first flat layer 35 of the isolation region 300 on a side close to the pixel island region 100 away from the substrate and a surface of the fourth insulating layer 34 of the pixel island region 100 on a side close to the isolation region 300 away from the substrate may be flush.

(7) Forming a third conductive layer pattern. In an exemplary embodiment, the forming of the third conductive layer pattern may include: depositing a third conductive film on the substrate with the patterns, and patterning the third conductive film through a patterning process to form a third conductive layer pattern, wherein the third conductive layer pattern at least comprises: a first source electrode and a first drain electrode on the pixel island region 100, and a plurality of connection lines 103 on the connection bridge region 200, as shown in fig. 12, and fig. 12 is a cross-sectional view taken along a-a of fig. 2.

In an exemplary embodiment, the first source electrode and the first drain electrode of the pixel island region 100 are disposed at the same layer as the plurality of connection lines 103 connecting the bridge region 200, and are simultaneously formed through the same patterning process. A first source electrode and a first drain electrode located at the pixel island region 100 are disposed on the fourth insulating layer 34, the first drain electrode is connected to one end of the first active layer through one active via K1, and the first drain electrode is connected to the other end of the first active layer through the other active via K1. The plurality of connection lines 103 located at the connection bridge region 200 are disposed on the first planarization layer 35, and the plurality of connection lines 103 are disposed at intervals. In the patterning process, the third conductive film of the isolation region 300 is etched away.

In an exemplary embodiment, the pixel island region 100 is formed at the periphery thereof with the bridge regions 200 in two directions (row and column directions), the connection lines of one direction connecting the bridge regions 200 may include at least a power connection line and a data connection line, and the connection lines of the other direction connecting the bridge regions 200 may include at least a scan connection line and a light emission control line. The connection lines connecting the bridge regions 200 are illustrated in fig. 12 in only one direction, and may be formed in the same layer as the data signal lines and by the same patterning process. The connection line connecting the bridge region in the other direction may be in the same layer as the first conductive layer or the second conductive layer, and formed by the same patterning process.

(8) A second flat layer pattern is formed. In an exemplary embodiment, forming the second flat layer pattern may include: a second planarization film is coated on the substrate on which the aforementioned pattern is formed, and a second planarization layer 36 is formed to cover the third conductive layer pattern, as shown in fig. 13, and fig. 13 is a cross-sectional view taken along a-a in fig. 2.

In an exemplary embodiment, at least a connection via K2 is formed on the second planarization layer 36 positioned on the pixel island 100, and the second planarization layer 36 in the connection via K2 is removed to expose a surface of the first drain electrode. The second planarization layer 36 located in the connection bridge region 200 is disposed on the first planarization layer 35, and the second planarization layer 36 located in the isolation region 300 serves as a second organic layer covering the plurality of connection lines 103.

At this point, the driving structure layer 30A pattern is completed. The driving structure layer 30A of the pixel island region 100 may include a first insulating layer 31, a semiconductor layer, a second insulating layer 32, a first conductive layer, a third insulating layer 33, a second conductive layer, a fourth insulating layer 34, a second conductive layer, and a second flat layer 36 stacked on the sound emitting structure layer 20, the semiconductor layer, the first conductive layer, the second conductive layer, and the second conductive layer constituting a first transistor 101 and a storage capacitor 102 of the pixel driving circuit, the first transistor 101 may include a first active layer, a first gate electrode, a first source electrode, and a first drain electrode, and the storage capacitor 102 may include a first plate and a second plate. The driving structure layer 30A of the bridge region 200 may include a first insulating layer 31 disposed on the sound emitting structure layer 20 and a first groove 91 disposed on a side of the first insulating layer 31 away from the substrate, the second insulating layer 32, the third insulating layer 33 and the fourth insulating layer 34 in the first groove 91 are removed, the first flat layer 35 fills the first groove 91, the plurality of connection lines 103 are disposed on the first flat layer 35, and the second flat layer 36 covers the plurality of connection lines 103. The driving structure layer 30A of the isolation region 300 may include a second groove 92 disposed on the substrate 10, the piezoelectric layer 22, the protective layer 24, the first insulating layer 31, the second insulating layer 32, the third insulating layer 33, and the fourth insulating layer 34 in the second groove 92 are removed, the first planarization layer 35 fills the second groove 92, and the second planarization layer 36 is disposed on the first planarization layer 35. In an exemplary embodiment, the first Transistor 101 may be a driving Transistor in a pixel driving circuit, and the driving Transistor may be a Thin Film Transistor (TFT).

In example embodiments, the first, second, third, and fourth insulating layers may employ any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multi-layer, or a composite layer. The first insulating layer may be referred to as a buffer layer, the second and third insulating layers may be referred to as (GI) layers, and the fourth insulating layer may be referred to as an interlayer Insulating (ILD) layer. The first conductive film, the second conductive film, and the third conductive film may be made of a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above metals, such as aluminum neodymium (AlNd) or molybdenum niobium (MoNb), and may have a single-layer structure or a multi-layer composite structure, such as Ti/Al/Ti, or the like. The first and second planarization layers may employ an organic material such as resin or the like. The active layer thin film may be made of various materials such as amorphous indium gallium zinc Oxide (a-IGZO), zinc oxynitride (ZnON), Indium Zinc Tin Oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene, polythiophene, etc., that is, the present disclosure is applicable to transistors manufactured based on Oxide technology, silicon technology, and organic technology.

(9) An anode pattern is formed. In an exemplary embodiment, the forming of the anode pattern may include: a fourth conductive film is deposited on the substrate on which the foregoing pattern is formed, and the fourth conductive film is patterned through a patterning process, so that an anode 61 is patterned on the pixel island region 100, and the anode 61 is connected to the first drain electrode of the first transistor 101 through the connection via K2, as shown in fig. 14, where fig. 14 is a cross-sectional view taken along a-a in fig. 2.

In an exemplary embodiment, the fourth conductive film may be made of a metal material including any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above metals, or a transparent conductive material including Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO). In an exemplary embodiment, the conductive thin film may be a single layer structure, or a multi-layer composite structure such as ITO/Al/ITO, etc.

In an exemplary embodiment, the fourth conductive film connecting the bridge region 200 and the isolation region 300 in the patterning process is etched away.

(10) Forming a pixel defining layer pattern. In an exemplary embodiment, forming the pixel defining layer pattern may include: a pixel defining film is coated on the substrate on which the aforementioned pattern is formed, the pixel defining film is patterned by a patterning process, a pixel defining layer 62 is patterned on the pixel island region 100, a pixel opening K3 is provided on the pixel defining layer 62, the pixel defining film in the pixel opening K3 is removed, and the surface of the anode electrode 61 is exposed, as shown in fig. 15, and fig. 15 is a sectional view taken along a-a in fig. 2.

In an exemplary embodiment, the material of the pixel defining layer may include polyimide, acryl, or polyethylene terephthalate, etc.

In an exemplary embodiment, the pixel defining film connecting the bridge region 200 and the isolation region 300 in the patterning process is removed.

In an exemplary embodiment, a halftone (Half Tone Mask) or gray Tone Mask patterning process may be used to form a spacer pillar pattern when forming the pixel defining layer, the spacer pillar may be disposed outside the pixel opening, and the spacer pillar is configured to support a fine metal Mask in a subsequent evaporation process, which is not limited herein.

(11) An isolation trench pattern is formed. In an exemplary embodiment, the forming of the isolation groove pattern may include: the first and second planarization layers 35 and 36 of the isolation region 300 are removed to form a pattern of isolation trenches 90, as shown in fig. 16, and fig. 16 is a cross-sectional view taken along a-a of fig. 2.

In an exemplary embodiment, the isolation trench 90 may be located in the isolation region 300, and the first and second planarization layers 35 and 36 in the isolation trench 90 are removed to expose the second recess 92, i.e., the isolation trench 90 exposes the surface of the substrate 10.

In an exemplary embodiment, the processing of the first and second planarization layers 35 and 36 may employ an Ashing (Ashing) process or a patterning process.

(12) An organic light emitting layer pattern is formed. In an exemplary embodiment, forming the organic light emitting layer pattern may include: on the substrate on which the above-described pattern is formed, an organic light emitting layer 63 is patterned by an evaporation method or an ink jet printing method, as shown in fig. 17, and fig. 17 is a cross-sectional view taken along a-a in fig. 2.

In an exemplary embodiment, the organic light emitting layer 63 may be located in the pixel island region 100, the organic light emitting layer 63 of the pixel island region 100 is connected to the anode electrode 61 through the pixel opening K3, and the bridge region 200 and the isolation region 300 are connected without evaporation or printing of an organic light emitting material.

In an exemplary embodiment, the organic light emitting layer may include an emission layer (EML), and any one or more of: a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), an Electron Blocking Layer (EBL), a Hole Blocking Layer (HBL), an Electron Transport Layer (ETL), and an Electron Injection Layer (EIL). In an exemplary embodiment, the organic light emitting layer may be formed by evaporation using a Fine Metal Mask (FMM).

In an exemplary embodiment, the organic light emitting layer may be prepared using the following preparation method. The method comprises the steps of firstly adopting an open mask to sequentially evaporate a hole injection layer and a hole transport layer, and forming a common layer of the hole injection layer and the hole transport layer on a display substrate. Subsequently, a fine metal mask is used to evaporate an electron blocking layer and a red light emitting layer on the red sub-pixel, evaporate an electron blocking layer and a green light emitting layer on the green sub-pixel, and evaporate an electron blocking layer and a blue light emitting layer on the blue sub-pixel, the electron blocking layer and the light emitting layer of the adjacent sub-pixels may overlap by a small amount (for example, the overlapping portion occupies less than 10% of the area of the respective light emitting layer pattern), or may be isolated. And then, sequentially evaporating a hole blocking layer, an electron transport layer and an electron injection layer by using an open mask, and forming a common layer of the hole blocking layer, the electron transport layer and the electron injection layer on the display substrate.

In an exemplary embodiment, the electron blocking layer may serve as a microcavity adjusting layer of the light emitting device, and the thickness of the organic light emitting layer between the cathode and the anode may be designed to satisfy the microcavity length design by designing the thickness of the electron blocking layer. In some exemplary embodiments, a hole transport layer, a hole blocking layer, or an electron transport layer in the organic light emitting layer may be used as a microcavity adjusting layer of the light emitting device, and the disclosure is not limited thereto.

In an exemplary embodiment, the light emitting layer may include a Host (Host) material and a guest (Host) material doped in the Host material, and the doping ratio of the guest material of the light emitting layer is 1% to 20%. In the range of the doping proportion, on one hand, the host material of the light-emitting layer can effectively transfer exciton energy to the guest material of the light-emitting layer to excite the guest material of the light-emitting layer to emit light, and on the other hand, the host material of the light-emitting layer carries out 'dilution' on the guest material of the light-emitting layer, thereby effectively improving the fluorescence quenching caused by the mutual collision among molecules and the mutual collision among energies of the guest material of the light-emitting layer, and improving the light-emitting efficiency and the service life of the device. In an exemplary embodiment, the doping ratio refers to a ratio of the mass of the guest material to the mass of the light emitting layer, i.e., mass percentage. In an exemplary embodiment, the host material and the guest material may be co-evaporated by a multi-source evaporation process to be uniformly dispersed in the light emitting layer, and the doping ratio may be controlled by controlling an evaporation rate of the guest material during evaporation, or by controlling an evaporation rate ratio of the host material and the guest material. In an exemplary embodiment, the thickness of the light emitting layer may be about 10nm to 50 nm.

In exemplary embodiments, the hole injection layer may employ an inorganic oxide such as molybdenum oxide, titanium oxide, vanadium oxide, rhenium oxide, ruthenium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, silver oxide, tungsten oxide, or manganese oxide, or may employ a p-type dopant of a strong electron-withdrawing system and a dopant of a hole-transporting material. In an exemplary embodiment, the thickness of the hole injection layer may be about 5nm to 20 nm.

In an exemplary embodiment, a material with high hole mobility, such as an arylamine compound, may be used for the hole transport layer, and the substituent group may be carbazole, methylfluorene, spirofluorene, dibenzothiophene, furan, or the like. In an exemplary embodiment, the thickness of the hole transport layer may be about 40nm to 150 nm.

In exemplary embodiments, the hole blocking layer and the electron transport layer may employ aromatic heterocyclic compounds, for example, imidazole derivatives such as benzimidazole derivatives, imidazopyridine derivatives, benzimidazolophenanthrin derivatives, and the like; oxazine derivatives such as pyrimidine derivatives and triazine derivatives; and compounds containing a nitrogen-containing six-membered ring structure (including compounds having a phosphine oxide substituent on the heterocyclic ring) such as quinoline derivatives, isoquinoline derivatives, and phenanthroline derivatives. In an exemplary embodiment, the hole blocking layer may have a thickness of about 5nm to 15nm, and the electron transport layer may have a thickness of about 20nm to 50 nm.

In an exemplary embodiment, the electron injection layer may employ an alkali metal or metal, such as lithium fluoride (LiF), ytterbium (Yb), magnesium (Mg), or calcium (Ca), or a compound of these alkali metals or metals, or the like. In an exemplary embodiment, the thickness of the electron injection layer may be about 0.5nm to 2 nm.

(13) A cathode pattern is formed. In an exemplary embodiment, the forming of the cathode pattern may include: on the substrate on which the above-described pattern is formed, a cathode 64 pattern is formed by an open mask evaporation method, and as shown in fig. 18, fig. 18 is a cross-sectional view taken along a-a in fig. 2.

In an exemplary embodiment, the cathode 64 may be located at the pixel island region 100, the cathode 64 is connected to the organic light emitting layer 63, it is realized that the organic light emitting layer 63 is simultaneously connected to the anode 61 and the cathode 64, and the bridge region 200 and the isolation region 300 are connected without evaporating the cathode. Since the organic light emitting layer 63 is disposed between the anode 61 and the cathode 64 and is connected to the anode 61 and the cathode 64, respectively, and the anode 23 is connected to the first drain electrode of the first transistor 101, light emission control of the organic light emitting layer 63 is achieved.

In an exemplary embodiment, the cathode may employ any one or more of magnesium (Mg), silver (Ag), aluminum (Al), copper (Cu), and lithium (Li), or an alloy made of any one or more of the above metals.

In some possible exemplary embodiments, the optical coupling layer pattern may be formed after the cathode pattern is formed, the optical coupling layer is disposed on the cathode, the refractive index of the optical coupling layer may be greater than that of the cathode, which is beneficial for light extraction and increases light extraction efficiency, and the optical coupling layer may be made of an organic material, or an inorganic material, or an organic material and an inorganic material, and may be a single layer, a multilayer, or a composite layer, which is not limited in this disclosure.

Thus, the light emitting structure layer 30B is prepared. In the pixel island region 100, the light emitting structure layer 30B may include an anode 61, a pixel defining layer 22, an organic light emitting layer 63, and a cathode 64, the organic light emitting layer 63 being disposed between the anode 61 and the cathode 64.

(14) Forming a pattern of the packaging structure layer. In an exemplary embodiment, the patterning of the package structure layer may include: on the substrate on which the patterns are formed, a first packaging film is deposited by using an open mask plate in a deposition mode to form a first packaging layer pattern, then a second packaging material is printed by using the open mask plate in an inkjet printing process to form a second packaging layer pattern, then a third packaging film is deposited by using the open mask plate in a deposition mode to form a third packaging layer pattern, and the stacked first packaging layer, second packaging layer and third packaging layer form a packaging structure layer 30C, as shown in fig. 19, wherein fig. 19 is a cross-sectional view along the direction of a-a in fig. 2.

In an exemplary embodiment, the first encapsulation layer and the third encapsulation layer may be one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer, which may ensure that external water and oxygen cannot enter the light emitting structure layer, and the deposition may be Chemical Vapor Deposition (CVD) or Atomic Layer Deposition (ALD). The second encapsulation layer may be made of an organic material, such as resin, and serves to encapsulate the layers of the display substrate, so as to improve structural stability and flatness.

In an exemplary embodiment, the encapsulation structure layer 30C may be located in the pixel island region 100 and the connecting bridge region 200, the encapsulation structure layer 30C of the pixel island region 100 covers the cathode 64, and the encapsulation structure layer 30C of the connecting bridge region 200 covers the second planarization layer 36, so as to form a stacked structure of inorganic material/organic material/inorganic material, thereby ensuring the integrity of the package and effectively isolating external water and oxygen.

In an exemplary embodiment, after the encapsulation layer is prepared, a touch structure layer (TSP) may be formed on the encapsulation structure layer, and the touch structure layer may include a touch electrode layer, or a touch electrode layer and a touch insulating layer, which is not limited herein.

And preparing the sound production display structure layer.

In an exemplary embodiment, after the sound display structure layer is prepared, the process of attaching the cover plate and peeling the glass carrier plate can be included. In an exemplary embodiment, the attaching cover plate may include: a Cover Glass (CG) 80 is attached to the above-formed structure layer by a Cover adhesive layer 81, as shown in fig. 20. In an exemplary embodiment, the cover plate adhesive layer 81 may employ Optical Cement (OCA).

Preparation of second part, cavity structural layer

In an exemplary embodiment, the preparation process of the cavity structure layer may include the following operations. A substrate layer 41 is prepared and a plurality of cavities 42 are formed in the substrate layer 41 by mechanically punching the substrate layer 41 directly or by a patterning process or the like, as shown in fig. 21.

In an exemplary embodiment, the substrate layer 41 may be made of glass or the like, and the forming of the cavity by the patterning process may include: a metal film is deposited on the substrate layer 41, a Mask layer pattern serving as a Mask (Hard Mask) is formed through a patterning process, a cavity is formed through an acid etching process of hydrofluoric acid (HF), and then the Mask layer is stripped.

In an exemplary embodiment, the plurality of cavities 42 may be disposed at intervals, the plurality of cavities 42 may be grooves formed on the substrate layer 41 on a side close to the substrate, or the plurality of cavities 42 may be through holes formed on the substrate layer 41.

In an exemplary embodiment, a plurality of alignment marks (Mark) may be disposed on the cavity structure layer to improve alignment accuracy when the cavity structure layer is attached to the sound display structure layer.

Third, bonding treatment

In an exemplary embodiment, the attaching process may include the following operations. Firstly, the substrate layer 41 is pasted on one side of the substrate 10 far away from the display structure layer through the first bonding layer 43, that is, the cavity structure layer and the sound production display structure layer are pasted together, then the reflective film 45 is pasted on one side of the cavity structure layer far away from the sound production display structure layer through the second bonding layer 44, and finally the piezoelectric type screen sound production OLED display substrate disclosed by the invention is formed, as shown in FIG. 22.

In an exemplary embodiment, the orthographic projection of the cavity 42 on the substrate on the cavity-structure layer at least partially overlaps the orthographic projection of the piezoelectric sound-generating unit (first and second electrodes) on the sound-generating display-structure layer on the substrate.

In an exemplary embodiment, the orthographic projection of the cavity on the substrate on the cavity structure layer is located within the range of the orthographic projection of the piezoelectric sound generating unit on the sound generating display structure layer, or the orthographic projection of the cavity on the piezoelectric sound generating unit substrate on the sound generating display structure layer is located within the range of the orthographic projection of the cavity on the substrate on the cavity structure layer, that is, the positions of the cavity and the piezoelectric sound generating unit are in one-to-one correspondence and are opposite to each other, so that the cavity can transmit the sound signal generated by the piezoelectric sound generating unit.

In an exemplary embodiment, the first adhesive layer 43 and the second adhesive layer 44 may use Optical Cement (OCA), and the reflective film 45 may use a material that reflects an acoustic wave.

To this end, the preparation of the display substrate of the exemplary embodiment of the present disclosure is completed.

It can be seen through the structure and the preparation process of this disclosed example embodiment display substrate, this disclosure sets up the isolation groove through at least one isolation region between adjacent pixel island, and sound production structural layer and display structural layer in the isolation groove are removed for the isolation groove can separate the sound wave of the in-film propagation in the display substrate, avoids the standing wave effect that the superposition of the vibration wave that the same frequency but marchd with opposite direction leads to, avoids influencing the display effect of screen, avoids the screen to take place mechanical problem. This is disclosed through with sound production structural layer and display structure layer setting in the homonymy of basement, has realized the integration of sound production structure and display structure, and the integrated configuration that forms and the display substrate of integration preparation, not only the integrated level is high, can reduce the whole thickness of product moreover, realizes frivolous product demand. According to the Micro Electro Mechanical System (MEMS) structure, the piezoelectric property of the piezoelectric material and the cavity on the substrate layer are utilized to generate vibration and sound, the sound waves are reflected by the reflection layer at the lowest layer, the integration level is further improved, and the overall thickness of a product can be further reduced. The preparation process can be realized by utilizing the existing mature preparation equipment, has small improvement on the existing process, can be well compatible with the existing preparation process, and has the advantages of simple process realization, easy implementation, high production efficiency, low production cost and high yield.

The structure of the display substrate and the process of manufacturing the same according to the exemplary embodiments of the present disclosure are merely exemplary illustrations. In an exemplary embodiment, the corresponding structure may be changed and the patterning process may be added or reduced according to actual needs. For example, a display substrate that produces sound in a full screen may be formed by disposing piezoelectric sound producing units in all pixel islands of the display substrate. For another example, a piezoelectric sound generating unit may be disposed in a part of the pixel island region of the display substrate to form a display substrate that generates sound in a part of the region. For another example, the isolation groove may be provided between set pixel islands, which means pixel islands having the piezoelectric sound emitting unit. For another example, the number of isolation trenches in the isolation region may be one, or may be multiple, and the disclosure is not limited thereto.

In an exemplary embodiment, the solution of providing the isolation groove on the display substrate to prevent the standing wave effect is also applicable to the electromagnetic sounding structure, and the disclosure is not limited herein.

In an exemplary embodiment, the display substrate of the present disclosure may be applied to a display device having a pixel driving circuit, such as an OLED, a quantum dot display (QLED), a light emitting diode display (Micro LED or Mini LED), a quantum dot light emitting diode display (QDLED), and the like, and the disclosure is not limited thereto.

The exemplary embodiment of the present disclosure also provides a method of manufacturing a display substrate. In an exemplary embodiment, the display substrate includes a plurality of pixel island regions, a plurality of connection bridge regions between adjacent pixel island regions configured to enable signal communication of the adjacent pixel island regions through connection lines, and a plurality of isolation regions between the adjacent pixel island regions except for a region where the connection bridge region is located. In an exemplary embodiment, the preparation method may include:

In an exemplary embodiment, sequentially forming a sound generating structure layer and a display structure layer disposed on the side of the sound generating structure layer away from the substrate on the substrate, wherein the sound generating structure layer and the display structure layer of the at least one isolation region are provided with isolation grooves, which may include:

In an exemplary embodiment, the forming of the isolation groove on the sound emission structure layer and the display structure layer of the at least one isolation region may include:

forming a first organic layer filling the first and second grooves;

In an exemplary embodiment, the composite insulating layer may include a second insulating layer, a third insulating layer, and a fourth insulating layer stacked.

In an exemplary embodiment, the display structure layer of the pixel island region may include a driving structure layer disposed at a side of the sound emission structure layer away from the substrate and a light emitting structure layer disposed at a side of the driving structure layer away from the substrate; the driving structure layer may include a first insulating layer disposed on the protective layer, a transistor disposed on a side of the first insulating layer away from the substrate, and a second flat layer covering the transistor; the first inorganic layer of the connection bridge area and the first insulating layer of the pixel island area are arranged on the same layer and are formed simultaneously through the same patterning process, the connecting line of the connection bridge area and the source electrode and the drain electrode of the transistor of the pixel island area are arranged on the same layer and are formed simultaneously through the same patterning process, and the second organic layer of the connection bridge area and the second flat layer of the pixel island area are arranged on the same layer and are formed simultaneously through the same patterning process.

In an exemplary embodiment, forming the cavity structure layer may include: at least one cavity is formed on the substrate layer, and the cavity is a groove or a through hole formed in the substrate layer.

In an exemplary embodiment, attaching the cavity structure layer to a side of the substrate away from the display structure layer may include:

In this embodiment, the structure, material, related parameters, and detailed preparation process of each film layer have been described in detail in the foregoing embodiments, and are not described herein again.

The embodiment provides a preparation method of a display substrate, wherein an isolation groove is arranged in at least one isolation region between adjacent pixel island regions, and a sound production structure layer and a display structure layer in the isolation groove are removed, so that the isolation groove can isolate sound waves propagating in a film layer in the display substrate, a standing wave effect caused by superposition of vibration waves with the same frequency but advancing in opposite directions is avoided, the display effect of a screen is prevented from being influenced, and the mechanical problem of the screen is avoided. This is disclosed through with sound production structural layer and display structure layer setting in the homonymy of basement, has realized the integration of sound production structure and display structure, and the integrated configuration that forms and the display substrate of integration preparation, not only the integrated level is high, can reduce the whole thickness of product moreover, realizes frivolous product demand. The preparation process can be realized by utilizing the existing mature preparation equipment, has small improvement on the existing process, can be well compatible with the existing preparation process, and has the advantages of simple process realization, easy implementation, high production efficiency, low production cost and high yield.

The present disclosure also provides a display device including the display substrate of the foregoing embodiment. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame or a navigator, etc.

Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A display substrate is characterized by comprising a plurality of pixel island regions, a plurality of connecting bridge regions and a plurality of isolation regions, wherein the connecting bridge regions are positioned between adjacent pixel island regions and are configured to realize signal communication of the adjacent pixel island regions through connecting lines, and the isolation regions are positioned in regions between the adjacent pixel island regions except for the regions where the connecting bridge regions are positioned; on a plane perpendicular to a display substrate, the display substrate comprises a sound production display structure layer and a cavity structure layer which are overlapped, the sound production display structure layer comprises a sound production structure layer arranged on a substrate and a display structure layer arranged on one side, far away from the substrate, of the sound production structure layer, and the cavity structure layer is arranged on one side, far away from the display structure layer, of the substrate; and the sound production structure layer and the display structure layer of at least one isolation region are provided with isolation grooves.

2. The display substrate according to claim 1, wherein the sound emission structure layer of the pixel island region comprises a first electrode layer disposed on the substrate, a piezoelectric layer disposed on a side of the first electrode layer away from the substrate, a second electrode layer disposed on a side of the piezoelectric layer away from the substrate, and a protective layer disposed on a side of the second electrode layer away from the substrate; the first electrode layer comprises at least one first electrode, the second electrode layer comprises at least one second electrode, and an orthographic projection of the first electrode on the substrate at least partially overlaps with an orthographic projection of the second electrode on the substrate.

3. The display substrate of claim 1, wherein the cavity structure layer comprises a first adhesive layer disposed on a side of the substrate away from the display structure layer and a substrate layer disposed on a side of the first adhesive layer away from the substrate, and at least one cavity is disposed on the substrate layer, and the cavity is a groove formed on a side of the substrate layer close to the substrate, or a through hole formed on the substrate layer; the orthographic projection of the cavity on the substrate at least partially overlaps with the orthographic projection of the first electrode or the second electrode in the sounding structure layer on the substrate.

4. The display substrate of claim 3, wherein the cavity structure layer further comprises a second adhesive layer disposed on a side of the substrate layer away from the substrate and a reflective layer disposed on a side of the second adhesive layer away from the substrate.

5. The display substrate according to any one of claims 1 to 4, wherein the sound generating structure layer of the connecting bridge region comprises a piezoelectric layer disposed on the substrate and a protective layer disposed on a side of the piezoelectric layer away from the substrate; the display structure layer of the connection bridge area comprises a first inorganic layer arranged on the protective layer, a first organic layer arranged on one side, far away from the substrate, of the first inorganic layer, a connection line arranged on one side, far away from the substrate, of the first organic layer and a second organic layer covering the connection line.

6. The display substrate of claim 5, wherein the display structure layer of the pixel island region comprises a driving structure layer disposed on a side of the sound generating structure layer away from the substrate and a light emitting structure layer disposed on a side of the driving structure layer away from the substrate; the driving structure layer comprises a first insulating layer arranged on the protective layer, a transistor arranged on one side, far away from the substrate, of the first insulating layer and a second flat layer covering the transistor; the first inorganic layer of the connecting bridge region and the first insulating layer of the pixel island region are arranged on the same layer, the connecting line of the connecting bridge region and the source electrode and the drain electrode of the transistor of the pixel island region are arranged on the same layer, and the second organic layer of the connecting bridge region and the second flat layer of the pixel island region are arranged on the same layer.

7. A display device comprising the display substrate according to any one of claims 1 to 6.

8. A preparation method of a display substrate is characterized in that the display substrate comprises a plurality of pixel island regions, a plurality of connecting bridge regions and a plurality of isolation regions, wherein the connecting bridge regions are located between adjacent pixel island regions and are configured to realize signal communication of the adjacent pixel island regions through connecting lines, and the isolation regions are located between the adjacent pixel island regions except for the region where the connecting bridge regions are located; the preparation method comprises the following steps:

9. The method of claim 8, wherein sequentially forming a sound generating structure layer and a display structure layer on the substrate, the sound generating structure layer and the display structure layer being disposed on a side of the sound generating structure layer away from the substrate, the sound generating structure layer and the display structure layer of at least one isolation region having isolation grooves formed thereon, comprises:

10. The method of claim 9, wherein forming the isolation grooves on the sound generating structure layer and the display structure layer of the at least one isolation region comprises:

forming a first organic layer filling the first and second grooves;

11. The manufacturing method according to claim 10, wherein the display structure layer of the pixel island region includes a driving structure layer disposed on a side of the sound emission structure layer away from the substrate and a light emitting structure layer disposed on a side of the driving structure layer away from the substrate; the driving structure layer comprises a first insulating layer arranged on the protective layer, a transistor arranged on one side, far away from the substrate, of the first insulating layer and a second flat layer covering the transistor; the first inorganic layer of the connection bridge area and the first insulating layer of the pixel island area are arranged on the same layer and are formed simultaneously through the same patterning process, the connecting line of the connection bridge area and the source electrode and the drain electrode of the transistor of the pixel island area are arranged on the same layer and are formed simultaneously through the same patterning process, and the second organic layer of the connection bridge area and the second flat layer of the pixel island area are arranged on the same layer and are formed simultaneously through the same patterning process.

12. A manufacturing method according to claim 10, wherein the first and second planarization layers of the isolation region are removed after the pixel defining layer of the light emitting structure layer is formed.

13. The method of claim 8, wherein forming a cavity structure layer comprises:

14. The method as claimed in claim 13, wherein attaching the cavity structure layer to a side of the substrate away from the display structure layer comprises: