CN113676174B

CN113676174B - Circuit, method and equipment for processing BMC (baseboard management controller) coded data of USB-PD (Universal Serial bus-PD) protocol

Info

Publication number: CN113676174B
Application number: CN202110904699.4A
Authority: CN
Inventors: 邹日昌; 何杰
Original assignee: Dongguan Haineng Electronics Co ltd
Current assignee: Dongguan Haineng Electronics Co ltd
Priority date: 2021-08-07
Filing date: 2021-08-07
Publication date: 2022-06-10
Anticipated expiration: 2041-08-07
Also published as: CN113676174A

Abstract

The application discloses a circuit, a method and equipment for processing BMC (baseboard management controller) coded data of a USB-PD (Universal Serial bus-PD) protocol, which relate to the technical field of USB-PD, wherein the method comprises the following steps: receiving BMC coded data of a USB-PD protocol; acquiring the waveform of the BMC coded data; converting the BMC coded data into a level signal based on the waveform, and acquiring PD communication content according to the level signal; and outputting the level signal in a push-pull mode. The method and the device have the effect of directly receiving and processing the BMC coded data without processing of other devices after replacing the PD processor.

Description

Circuit, method and equipment for processing BMC (baseboard management controller) coded data of USB-PD (Universal Serial bus-PD) protocol

Technical Field

The present application relates to the field of USB-PD technologies, and in particular, to a circuit, a method, and a device for processing BMC encoded data of a USB-PD protocol.

Background

After the USB Type-C technology is released, more and more products apply the Type-C interface, the Type-C interface can realize USB data transmission, and can also realize multiple different functions through the Alt-mode (alternative mode), for example, DP video signals are transmitted by the Type-C interface based on the DP-Alt-mode specification.

In order to realize the Alt-mode function, a PD processor is integrated in a product requiring Type-C, all PD processors in the market are manufactured by manufacturers according to functions of different products by using special chips, the functions realized by the PD processor are single, the PD processor can only be used for special products, the universality is not high, in addition, the PD processor manufacturers usually do not open codes, when the compatibility problem occurs in the product, the PD processor manufacturers can only be informed to modify the codes, and the phenomena of difficult debugging, poor timeliness and the like can be caused in some cases. Therefore, in order to expand various functions and improve the functional diversity and flexibility of the product, other control chips with more interfaces can be adopted to replace the PD processor.

In view of the above-mentioned related art in extending the functions of the PD processor, the inventors consider that the following drawbacks exist: because the PD processor needs to adopt PD communication, the amplitude of the BMC coded waveform in PD communication does not exceed 1V, and the operating level of a general control chip is 3.3V, if PD communication needs to be performed through a general control chip, it is difficult to directly receive and process BMC coded data, and it is also necessary to relay the BMC coded data through a device having a function of voltage conversion or the like.

Disclosure of Invention

In order to overcome the defect that when other control chips are used for replacing PD processors, the direct receiving and processing of BMC coded data are difficult, the application provides a circuit, a method and a device for processing the BMC coded data of a USB-PD protocol.

In a first aspect, the present application provides a circuit for processing BMC encoded data of a USB-PD protocol, comprising:

the data interface is used for receiving BMC (baseboard management controller) encoded data and sending a feedback signal;

the data processing module is connected with the data interface and used for acquiring the waveform of the BMC encoding data, converting the BMC encoding data into a level signal according to the waveform, obtaining PD communication content according to the level signal, generating the feedback signal in a level form based on the PD communication content and outputting the feedback signal to the data interface, wherein the feedback signal is generated based on a BMC encoding rule;

and the voltage division module is respectively connected with the data processing module and the data interface and is used for limiting the amplitude of the sent feedback signal not to be larger than the amplitude threshold of the waveform.

By adopting the technical scheme, the data processing module receives BMC coded data through the data interface and acquires the waveform of the BMC coded data, the BMC coded data is converted into a level signal according to the waveform through the data processing module, the level signal is decoded to obtain transmitted PD communication content, meanwhile, the data processing module generates a feedback signal in a level form, the feedback signal also adopts a BMC coding rule, the feedback signal is sent through the voltage division module and the data interface, the voltage division module can limit the amplitude of the sent feedback signal not to be larger than the amplitude threshold of the waveform, and therefore direct receiving processing of the BMC coded data can be completed.

Optionally, the data interface includes a first transmission pin and a second transmission pin, and both the first transmission pin and the second transmission pin are connected to the data processing module through the voltage dividing module;

when the BMC coding data or the feedback signal needs to be transmitted, the first transmission pin is used as a communication pin for transmitting the BMC coding data or the level signal, and the second transmission pin is powered on or suspended;

or the like, or, alternatively,

the second transmission pin is used as a communication pin for transmitting the BMC encoding data or the feedback signal, and the first transmission pin is powered on or suspended.

By adopting the technical scheme, the data interface comprises two transmission pins, so that in the process of data transmission, only one transmission pin is adopted as the communication pin to complete data transmission, the other transmission pin is configured as the power supply pin to supply power, and the other transmission pin is suspended if power supply is not needed, so that the possibility of repeated data transmission or disorder is reduced.

Optionally, the data processing module includes:

the transmission unit is connected with the first transmission pin and the second transmission pin through the voltage division module and is used for receiving the BMC coding signal or outputting the feedback signal;

the analog comparison unit is connected with the transmission unit to receive the BMC coding signal and acquire the waveform of the BMC coding signal, and converts the BMC coding signal into a level signal according to the waveform to output;

and the compiling unit is connected with the analog comparison unit to receive the level signal, obtain PD communication content according to the level signal, generate the feedback signal based on the PD communication content, and output the feedback signal to the transmission unit for transmission.

By adopting the technical scheme, the transmission module receives BMC coded data through the transmission pin on the data interface and outputs the BMC coded data to the analog comparison unit, the analog comparison unit receives the BMC coded data and then obtains the waveform of the BMC coded data, the BMC coded data are converted into the level signal based on the waveform to be output, the compiling unit can interpret the level signal and obtain PD communication content after receiving the level signal, the compiling unit generates corresponding feedback signals according to the PD communication content and outputs the feedback signals to the transmission unit, and the transmission unit can send the feedback signals after receiving the feedback signals.

Optionally, the transmission unit includes a first pin group and a second pin group;

the voltage division module comprises a first voltage division unit and a second voltage division unit;

the first pin group is connected with the first transmission pin through the first voltage division unit, and the first voltage division unit limits the amplitude of a feedback signal output to the first transmission pin by the first pin group not to be larger than the amplitude threshold of the waveform;

the second pin group is connected with the second transmission pin through the second voltage division unit, and the second voltage division unit limits that the amplitude of a feedback signal output to the second transmission pin by the second pin group is not larger than the amplitude threshold of the waveform;

or the like, or, alternatively,

the first pin group is connected with the second transmission pin through the first voltage division unit, and the first voltage division unit limits the amplitude of a feedback signal output to the second transmission pin by the first pin group not to be larger than the amplitude threshold of the waveform;

the second pin group is connected with the first transmission pin through the second voltage division unit, and the second voltage division unit limits that the amplitude of a feedback signal output to the first transmission pin by the second pin group is not larger than the amplitude threshold of the waveform.

Through adopting above-mentioned technical scheme, transmission unit is connected with two transmission pins of data interface respectively through two pin groups, and every pin group collocation a partial pressure unit, and the partial pressure unit can carry out the partial pressure with the feedback signal of pin group output to make the feedback signal amplitude of exporting to transmission pin from the pin group be not more than the amplitude threshold value of wave form, in order to guarantee feedback signal's normal output.

Optionally, the first pin group includes a first analog-to-digital conversion pin and a first data transmission pin;

the second pin group comprises a second analog-to-digital conversion pin and a second data transmission pin;

the first voltage division unit includes a first resistor and a second resistor;

the second voltage division unit includes a third resistor and a fourth resistor;

the first analog-to-digital conversion pin is connected with the first transmission pin or the second transmission pin through the first resistor, the first data transmission pin is connected with the first transmission pin or the second transmission pin through the second resistor, the first data transmission pin is grounded, and the first resistor and the second resistor are connected in series to divide voltage;

the second analog-to-digital conversion pin is connected with the first transmission pin or the second transmission pin through the third resistor, the second data transmission pin is connected with the first transmission pin or the second transmission pin through the fourth resistor, the second data transmission pin is grounded, and the third resistor and the fourth resistor are connected in series to divide voltage.

By adopting the technical scheme, the analog signals of the BMC coded data can be converted into the digital signals of the level signals through the connection of the analog-to-digital conversion pins, each pin group adopts two resistors to carry out serial voltage division, and the amplitude of the feedback signals output to the transmission pins by the data transmission pins is not larger than the amplitude threshold of the waveform through the voltage division of the resistors.

In a second aspect, the present application provides a method for processing BMC encoded data of a USB-PD protocol, which is applied to a circuit for processing BMC encoded data of a USB-PD protocol in the first aspect, and the method specifically includes the following steps:

receiving BMC coded data of a USB-PD protocol through the data interface;

acquiring the waveform of the BMC coded data;

converting the BMC coding data into a level signal based on the waveform, obtaining PD communication content according to the level signal, and generating a feedback signal based on the PD communication content;

and outputting the feedback signal by using the data interface and the voltage division module, wherein the voltage division module is used for limiting the amplitude of the sent feedback signal not to be larger than the amplitude threshold of the waveform.

By adopting the technical scheme, the BMC encoding data is received through the data interface, the waveform of the BMC encoding data is obtained, the BMC encoding data is converted into the level signal through the data processing module according to the waveform, the level signal is decoded to obtain the transmitted PD communication content, the feedback signal is generated and output through the voltage division module and the data interface, the voltage division module can limit the amplitude of the sent feedback signal not to be larger than the amplitude threshold value of the waveform, and therefore the direct receiving processing of the BMC encoding data can be completed.

Optionally, the receiving BMC encoded data of the USB-PD protocol through the data interface includes the following steps:

identifying the first transmission pin and the second transmission pin;

selecting the first transmission pin or the second transmission pin as a communication pin, and when the first transmission pin is used as the communication pin, supplying power or suspending the second transmission pin;

when the second transmission pin is used as a communication pin, the first transmission pin supplies power or is suspended;

and establishing a PD communication channel based on the communication pin, and receiving the BMC encoding data through the PD communication channel.

By adopting the technical scheme, the data interface comprises two transmission pins, so that in the process of data transmission, a PD communication channel can be established by only adopting one transmission pin as a communication pin to complete data transmission, the other transmission pin is configured as a power supply pin for supplying power, and the other transmission pin is suspended if power supply is not needed, so that the possibility of repeated data transmission or disorder is reduced.

Optionally, converting the BMC encoded data into a level signal based on the waveform includes the following steps:

acquiring a voltage value of each BMC coded data according to the waveform;

judging whether the voltage values are larger than a preset standard value one by one;

if the voltage value is larger than a preset standard value, converting the corresponding BMC encoded data into a high-level signal;

and if the voltage value is smaller than a preset standard value, converting the corresponding BMC coded data into a low-level signal.

By adopting the technical scheme, the voltage value of the BMC coded data is judged one by presetting a standard value and based on the waveform of the BMC coded data, the BMC coded data larger than the standard value is converted into a high-level signal, and the BMC coded data smaller than the standard value is converted into a low-level signal, so that analog-to-digital conversion of the BMC coded data is completed.

Optionally, converting the BMC encoded data into a level signal based on the waveform further includes:

if the voltage value is equal to a preset standard value, judging according to a level signal after the previous BMC coded data conversion;

if the level signal after the last BMC coded data conversion is a high level, the corresponding BMC coded data is converted into a high level signal;

and if the level signal after the last BMC coded data conversion is in a low level, converting the corresponding BMC coded data into a low-level signal.

By adopting the technical scheme, as partial special conditions possibly occur in the data transmission process, the voltage value of partial BMC coded data is equal to a preset standard value, and at the moment, whether the BMC coded data is converted into a high-level signal or a low-level signal is determined by judging the level signal after the last BMC coded data is converted, so that the integrity of the data signal is ensured.

Optionally, outputting the feedback signal by using the data interface and the voltage dividing module includes the following steps:

judging a pin group for establishing the PD communication channel;

if the pin group establishing the PD communication channel is a first pin group, taking the first analog-to-digital conversion pin and the first data transmission pin as output pins, and outputting the feedback signal through the voltage division module in a push-pull mode;

and if the pin group establishing the PD communication channel is a second pin group, taking the second analog-to-digital conversion pin and the second data transmission pin as output pins, and outputting the feedback signal through the voltage division module by adopting a push-pull mode.

By adopting the technical scheme, as the feedback signal is in a level form, the pin group for establishing the PD communication channel is set to be in a push-pull mode to output the feedback signal, so that when the output pin outputs the feedback signal with high level, the voltage is close to the power supply voltage of the circuit; when the output pin outputs the low-level feedback signal, the voltage is close to 0V, the voltage division module is favorable for carrying out voltage division processing on the output feedback signal, and the amplitude of the feedback signal is not larger than the amplitude threshold of the BMC encoded data waveform.

Optionally, outputting the level signal through the voltage dividing module in a push-pull manner includes the following steps:

judging whether the feedback signal is at a high level or a low level;

if the feedback signal is at a high level, one output pin outputs the high level, and the other output pin outputs the low level;

and if the feedback signal is at a low level, the two output pins both output the low level.

By adopting the technical scheme, when the output feedback signal is at a high level, one output pin outputs a high level close to the power voltage, the other output pin outputs a low voltage close to 0V, and the voltage output by the whole pin group does not exceed the amplitude threshold of the waveform of the BMC coded data at the moment through the serial voltage division of the two resistors; when the output feedback signal is at a low level, both the two output pins output a low level close to 0V, and at this time, the voltage output by the whole pin group is close to 0V through the serial voltage division of the two resistors.

In a third aspect, the present application provides a device comprising a circuit of the first aspect described above for processing BMC encoded data of a USB-PD protocol.

In summary, the present application includes at least one of the following beneficial technical effects:

1. the data processing module directly receives BMC coded data through the data interface, a waveform of the BMC coded data is obtained to be 0V-1V, the BMC coded data are converted into level signals through the data processing module according to the waveform, the level signals are decoded to obtain transmitted PD communication content, meanwhile, feedback signals under BMC coding rules are generated, the feedback signals are output through the voltage dividing module and the data interface, the voltage dividing module can limit the amplitude of the sent feedback signals to be not larger than the amplitude threshold of the waveform, and therefore the BMC coded data can be directly received, processed and fed back.

2. Because the data interface comprises two transmission pins, in the process of receiving and transmitting BMC coded data, a PD communication channel can be established by only adopting one transmission pin as a communication pin to complete data transmission, the other transmission pin is configured as a power supply pin for supplying power, and the other transmission pin is suspended if power supply is not needed, so that the possibility of repeated data transmission or disorder is reduced.

Drawings

Fig. 1 is a block diagram of a circuit module for processing BMC encoded data of a USB-PD protocol according to an embodiment of the present disclosure.

Fig. 2 is a schematic diagram illustrating a specific connection of a module structure of a circuit for processing BMC encoded data of the USB-PD protocol according to an embodiment of the present application.

Fig. 3 is a schematic flowchart illustrating processing of BMC encoded data of the USB-PD protocol according to an embodiment of the present application.

Fig. 4 is a waveform diagram illustrating BMC encoded data transmitted through Type-C according to an embodiment of the present application.

Fig. 5 is a schematic flowchart of an embodiment of the present application for receiving BMC encoded data of a USB-PD protocol through a data interface.

Fig. 6 is a flowchart illustrating a process of converting BMC encoded data into a level signal according to an embodiment of the present disclosure.

Fig. 7 is a schematic flowchart of outputting a feedback signal in a push-pull manner according to an embodiment of the present application.

Description of reference numerals:

1. a data interface; 2. a data processing module; 3. a voltage division module; 11. a first transmission pin; 12. a second transmission pin; 21. a transmission unit; 22. an analog comparison unit; 23. a compiling unit; 211. a first lead group; 212. a second pin group; 2111. a first analog-to-digital conversion pin; 2112. a first data transmission pin; 2121. a second analog-to-digital conversion pin; 2122. a second data transmission pin; 31. a first voltage division unit; 32. a second voltage division unit; 311. a first resistor; 312. a second resistor; 321. a third resistor; 322. a fourth resistor.

Detailed Description

The present application is described in further detail below with reference to figures 1-7.

The application discloses a circuit for processing BMC coded data of a USB-PD protocol.

Referring to fig. 1, the circuit for processing BMC encoded data of the USB-PD protocol includes a data interface 1, and may be electrically connected to an external device through the data interface 1 and receive BMC encoded data of the USB-PD protocol transmitted by the external device. The data interface 1 is electrically connected with a voltage division module 3, and the voltage division module 3 is electrically connected with a data processing module 2. The data processing module 2 receives the BMC encoded data and the waveform thereof from the data interface 1 through the voltage dividing module 3, converts the BMC encoded data into a level signal, and then interprets the level signal to obtain PD communication content transmitted by data. The PD communication content generally includes a control command, and the PD communication content is output to an external device to enable the external device to execute the control command, and meanwhile, the data processing module 2 generates a feedback signal in a corresponding level form according to the specific content of the PD communication content, where the feedback signal is generated based on the BMC coding rule. Because the internal voltage of the data processing module 2 is 3.3V, the voltage of the generated feedback signal is 0V-3.3V, and the waveform amplitude of the BMC encoded data is 0V-1V, the feedback signal needs to be output to the voltage dividing module 3, and the voltage dividing module 3 divides the output feedback signal to make the output feedback signal less than 1V.

Referring to fig. 2, the data processing module 2 includes a transmission unit 21, the transmission unit 21 is electrically connected to the data interface 1 through a pin and the voltage dividing module 3 to transmit data, the transmission unit 21 is further electrically connected to an analog comparison unit 22, the transmission unit 21 receives the BMC encoded data and then sends the BMC encoded data to the analog comparison unit 22, and the analog comparison unit 22 obtains a waveform of the BMC encoded data and converts the BMC encoded data into a level signal based on the waveform. The analog comparing unit 22 is electrically connected to the compiling unit 23, the compiling unit 23 can receive the level signal and interpret the PD communication content in the level signal, and the compiling unit 23 generates a corresponding feedback signal according to the PD communication content. The compiling unit 23 sends the interpreted PD communication content to the external device, and outputs the feedback signal to the transmission unit 21, and the transmission unit 21 outputs the feedback signal to the voltage division module 3, and outputs the feedback signal through the data interface 1 after voltage division by the voltage division module 3.

Referring to fig. 2, the data processing module 2 in this embodiment may be a Mini58ZDE chip, which includes two analog comparators and a compiling unit 23, where the analog comparators include transmission units 21 and analog comparison units 22, the two transmission units 21 are electrically connected to one analog comparison unit 22, the two analog comparison units 22 are both electrically connected to the compiling unit 23, the compiling unit 23 is a compiler preset with an interpretation code, and each transmission unit 21 is collocated with one voltage dividing module 3 and one data interface 1. The data processing module 2 further includes a VSS pin, a VDD pin, and a plurality of external pins, wherein the VSS pin is used for grounding, the VDD pin is used for connecting with a 3.3V power supply, a filter capacitor C1 is connected between the VDD pin and the power supply in parallel, the other end of the filter capacitor C1 is grounded, and the plurality of external pins are used for establishing a connection channel between the compiling unit 23 and an external device, so that the compiling unit 23 can transmit PD communication content to the external device.

Referring to fig. 2, the transmission unit 21 includes a first pin group 211 and a second pin group 212, the voltage dividing module 3 includes a first voltage dividing unit 31 and a second voltage dividing unit 32, and the data interface 1 includes a first transmission pin 11 and a second transmission pin 12. The connection mode among the transmission unit 21, the voltage division module 3 and the data interface 1 may adopt any one of the following modes:

the first pin group 211 is electrically connected with the first voltage division unit 31, the first voltage division unit 31 is electrically connected with the first transmission pin 11, the second pin group 212 is electrically connected with the second voltage division unit 32, and the second voltage division unit 32 is electrically connected with the second transmission pin 12;

the first pin group 211 is electrically connected with the second voltage division unit 32, the second voltage division unit 32 is electrically connected with the first transmission pin 11, the second pin group 212 is electrically connected with the first voltage division unit 31, and the first voltage division unit 31 is electrically connected with the second transmission pin 12;

the first pin group 211 is electrically connected with the first voltage division unit 31, the first voltage division unit 31 is electrically connected with the second transmission pin 12, the second pin group 212 is electrically connected with the second voltage division unit 32, and the second voltage division unit 32 is electrically connected with the first transmission pin 11;

the first pin group 211 is electrically connected to the second voltage dividing unit 32, the second voltage dividing unit 32 is electrically connected to the second transmission pin 12, the second pin group 212 is electrically connected to the first voltage dividing unit 31, and the first voltage dividing unit 31 is electrically connected to the first transmission pin 11.

In this embodiment, a first connection manner is adopted for connection, that is, the first pin group 211 is electrically connected to the first voltage dividing unit 31, the first voltage dividing unit 31 is electrically connected to the first transmission pin 11, the second pin group 212 is electrically connected to the second voltage dividing unit 32, and the second voltage dividing unit 32 is electrically connected to the second transmission pin 12.

Referring to fig. 2, the first pin group 211 includes a first analog-to-digital conversion pin 2111 and a first data transmission pin 2112, and the first voltage division unit 31 includes a first resistor 311 and a second resistor 312. The second resistor 312 is electrically connected to the first transmission pin 11 and the first data transmission pin 2112, the first data transmission pin 2112 is grounded, one end of the first resistor 311 is electrically connected to the first analog-to-digital conversion pin 2111, and the other end is electrically connected between the second resistor 312 and the first transmission pin 11, so that the first resistor 311 and the second resistor 312 realize serial voltage division. In this embodiment, the resistance of the first resistor 311 is 430 Ω, the resistance of the second resistor 312 is 220 Ω, and since the power supply voltage of the data processing module 2 is 3.3V and the first data transmission pin 2112 is grounded, the voltage between the first resistor 311 and the second resistor 312 after voltage division is the voltage divided by the second resistor 312, and the specific voltage value can be calculated by a series voltage division formula as follows:

wherein U is_outIs the voltage between the first resistor 311 and the second resistor 312, U_inFor supply voltage, R₁Is the resistance value, R, of the first resistor 311₂Is the second resistor 312 resistance value. The voltage between the first resistor 311 and the second resistor 312 is calculated to be approximately equal to 1V, and the feedback signal finally output to the first transmission pin 11 is less than 1V because there is signal loss during signal transmission.

Referring to fig. 2, the second pin group 212 includes a second analog-to-digital conversion pin 2121 and a second data transmission pin 2122, and the second voltage division unit 32 includes a third resistor 321 and a fourth resistor 322. The fourth resistor 322 is electrically connected to the second transmission pin 12 and the second data transmission pin 2122, the second data transmission pin 2122 is grounded, one end of the third resistor 321 is electrically connected to the second analog-to-digital conversion pin 2121, and the other end of the third resistor 321 is electrically connected between the fourth resistor 322 and the second transmission pin 12, so that the third resistor 321 and the fourth resistor 322 realize serial voltage division. In this embodiment, the resistance of the third resistor 321 is 430 Ω, the resistance of the fourth resistor 322 is 220 Ω, and the voltage between the third resistor 321 and the fourth resistor 322 is approximately equal to 1V through the above-mentioned series voltage dividing formula.

The application also discloses a method for processing BMC coded data of the USB-PD protocol.

Referring to fig. 3, the method for processing BMC encoded data of the USB-PD protocol includes the following specific steps:

101, receiving BMC coded data of the USB-PD protocol through the data interface 1.

The data interface 1 can be electrically connected with a USB TYPE-C line, BMC (phase Mark coding) coded data is received through a USB PD (Power Delivery) protocol, the BMC coded data is simple and flexible, belongs to a phase modulation coding technology, and is a coding method for transmitting clock and data in a mixed mode. The feature of BMC coding is that if the data is 1, the level is inverted in the middle of the bit and at the boundary of each data transmission bit. By using the BMC coding, the transmission end and the receiving end can transmit and receive data correctly only by one data line, and good synchronism is kept at the transmitting end and the receiving end.

And 102, acquiring the waveform of the BMC coded data.

And 103, converting the BMC encoding data into a level signal based on the waveform, obtaining PD communication content according to the level signal, and generating a feedback signal based on the PD communication content.

The BMC encoded data received by the transmission unit 21 is an analog signal, and needs to be converted into a digital signal form of a level signal by the analog comparison unit 22, and then the PD communication content in the BMC encoded data is compiled by the compiling unit 23, and the compiling unit 23 generates a feedback signal. The feedback signal corresponds to the PD communication content, each PD communication content corresponds to a different feedback signal, and the compiling unit 23 compiles the PD communication content to generate the feedback signal corresponding to the PD communication content at the same time.

And 104, outputting the feedback signal by using the data interface 1 and the voltage dividing module 3, wherein the voltage dividing module 3 is configured to limit that the amplitude of the sent feedback signal is not greater than the amplitude threshold of the waveform.

The implementation principle of the embodiment is as follows:

the data interface 1 is connected with USB TYPE-C lines of other devices, BMC encoding data is received through the data interface 1, waveforms of the BMC encoding data are obtained through the data processing module 2, the BMC encoding data are converted into level signals according to the waveforms, the level signals are decoded through the compiling unit 23, transmitted PD communication contents can be obtained, meanwhile, the compiling unit 23 generates feedback signals, the PD communication contents are output to external devices through the compiling unit 23, the feedback signals are output to the transmission unit 21, the transmission unit 21 outputs the feedback signals through the voltage division module 3 and the data interface 1, the voltage division module 3 can limit the amplitude of the sent feedback signals to be not larger than the amplitude threshold of the waveforms, and therefore direct receiving and combing of the BMC encoding data can be completed.

In step 102 of the embodiment shown in fig. 3, the acquired waveform of the BMC encoded data is a waveform when the BMC encoded data is transmitted through a USB Type-C line, which is specifically described in detail by using the waveform diagram shown in fig. 4:

referring to fig. 4, the waveforms are located in the Source TX interval and the first End TX interval from left to right, and the bold solid line shown is a waveform diagram of BMC encoded data in a Source current (Sourcing current) state; in the Sink TX and the second End TX interval from left to right, the displayed thin solid line is a waveform diagram of BMC encoded data in a Sink current (Sink current) state, in this embodiment, the Source current state refers to a state when the data interface receives BMC encoded data, and the Sink current state refers to a state when the data interface sends BMC encoded data, so that the waveform of BMC encoded data acquired in this embodiment is a waveform shown by a thick solid line in the Source TX interval and the first End TX interval from left to right.

In step 101 of the embodiment shown in fig. 3, the data interface 1 includes two transmission pins, and only one of the transmission pins may be used for data transmission each time data is received, and the specific steps are described in detail with the embodiment shown in fig. 5.

Referring to fig. 5, receiving BMC encoded data of the USB-PD protocol through the data interface 1 specifically includes the following steps:

201, identifying the first transmission pin 11 and the second transmission pin 12.

Since the USB TYPE-C line includes two CC (configuration channel) pins, the first transmission pin 11 and the second transmission pin 12 are electrically connected to the two CC pins, respectively, so as to identify the connection states of the transmission pins and the CC pins.

202, selecting the first transmission pin 11 or the second transmission pin 12 as a communication pin, and when the first transmission pin 11 is used as the communication pin, the second transmission pin 12 supplies power or hangs in the air; when the second transmission pin 12 is used as a communication pin, the first transmission pin 11 is powered on or suspended.

When the USB TYPE-C line transmits data, the data can be transmitted only through one CC pin, so that one CC pin and one transmission pin can be selected to communicate and transmit the data, and the other CC pin and the other transmission pin can be configured to be power supply pins to provide power supply voltage or are not electrically connected and are mutually suspended.

And 203, establishing a PD communication channel based on the communication pin, and receiving the BMC encoding data through the PD communication channel.

The implementation principle of the embodiment is as follows:

one transmission pin is adopted as a communication pin, a PD communication channel can be established to complete data transmission, the other transmission pin is configured as a power supply pin for supplying power, and the other transmission pin is suspended if power supply is not needed, so that the possibility of repeated data transmission or disorder is reduced.

In step 103 of the embodiment shown in fig. 3, the BMC encoded data needs to be converted from an analog signal form to a digital signal form of a level signal to facilitate the compiling of PD communication content accompanied by the BMC encoded data, and the specific steps are described in detail by the embodiment shown in fig. 6.

Referring to fig. 6, converting BMC encoded data into a level signal based on a waveform specifically includes the following steps:

301, acquiring a voltage value of each BMC encoded data according to the waveform.

The method comprises the steps of identifying and positioning the position of each BMC coded data in a waveform, and acquiring the voltage value of each BMC coded data based on the waveform amplitude, wherein the voltage value range is 0V-1V.

302, determining whether the voltage values are larger than a preset standard value one by one, and if so, executing a step 303; if so, go to step 304; if so, go to step 305.

The standard value is preset in the analog comparing unit 22, and since the waveform amplitude of the BMC encoded data is 0V to 1V, the preset standard value in this embodiment is 0.5V, and the BMC encoded data is converted into a high-level or low-level signal by determining whether the voltage value of the encoded data is greater than 0.5V.

303, the corresponding BMC encoded data is converted into a high level signal.

304, the corresponding BMC encoded data is converted into a low level signal.

305, judging according to the level signal after the previous BMC coded data conversion, and if the level signal after the previous BMC coded data conversion is a high level, executing step 306; if the level signal after the last BMC encoding data conversion is low level, step 307 is executed.

The voltage value of the BMC encoded data is exactly equal to the preset standard value due to other special reasons such as signal loss or abnormal transmission, and the BMC encoded data is determined one by one, so that the level signal of the BMC encoded data with the voltage value equal to the standard value can be determined to be converted into the high level or the low level according to whether the level signal after the previous BMC encoded data conversion is the high level or the low level.

And 306, converting the corresponding BMC encoded data into a high-level signal.

307, the corresponding BMC encoded data is converted into a low level signal.

The implementation principle of the embodiment is as follows:

and converting the BMC coded data into a high-level or low-level signal from an analog signal one by presetting a standard value.

In step 104 of the embodiment shown in fig. 3, since the internal power supply voltage of the data processing module 2 is 3.3V, the voltage threshold of the feedback signal generated by the compiling unit 23 is 0V to 3.3V, and the waveform amplitude of the BMC encoded data is 0V to 1V, when the transmission unit 21 outputs the feedback signal from the data interface 1, the voltage needs to be divided by the voltage dividing module 3, so that the output feedback signal is smaller than 1V, and the specific steps are described in detail by the embodiment shown in fig. 7.

Referring to fig. 7, outputting the feedback signal in a push-pull manner includes:

401, determining to establish a pin group of the PD communication channel, and if the pin group is the first pin group 211, executing step 402; if the second lead group 212 is selected, go to step 403.

The data transmission state of the first pin group and the second pin group is judged.

402, the first analog-to-digital conversion pin 2111 and the first data transmission pin 2112 are used as output pins, and the feedback signal is output through the voltage division module 3 in a push-pull manner.

The feedback signal is also a signal in a level form, and the push-pull mode refers to a CMOS push-pull output mode of the pin, and at this time, the voltage value of the output high-level feedback signal is close to the internal supply voltage value of the analog conversion unit by 3.3V, and the voltage value of the output low-level feedback signal is close to 0V.

403, the second analog-to-digital conversion pin 2121 and the second data transmission pin 2122 are used as output pins, and the feedback signal is output through the voltage division module 3 in a push-pull manner.

Wherein, the details refer to the details of step 402.

404, determining that the feedback signal is at a high level or a low level, and if the feedback signal is at a high level, executing step 405; if the level is low, step 406 is performed.

And under a push-pull output mode, the two output pins adopt different matching modes to output according to different high and low levels of the feedback signal.

405, one of the output pins outputs a high level and the other output pin outputs a low level.

The voltage value of the high-level feedback signal output by one output pin is close to 3.3V, the voltage value of the low-level feedback signal output by the other output pin is close to 0V, and the voltage is divided by the voltage division module 3, so that the feedback signal output from the data interface 1 is smaller than 1V finally.

406, both output pins output a low level.

The voltage value of the low-level feedback signal output by one of the output pins is close to 0V, the voltage value of the low-level feedback signal output by the other output pin is also close to 0V, and at this time, the feedback signal output from the data interface 1 is close to 0V.

The implementation principle of the embodiment is as follows:

through the matching of the CMOS push-pull output mode of the pin and the voltage division module 3, the voltage value of the feedback signal finally output from the data interface 1 is in the voltage value range which can be normally transmitted under the BMC coding rule.

The present application also discloses a device which may be a data line or a docking station comprising the circuitry shown in fig. 1 and 2.

The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.

Claims

1. A circuit for processing BMC encoded data for a USB-PD protocol, comprising:

a data interface (1) for transmitting BMC encoded data and receiving a feedback signal;

the data processing module (2) is used for acquiring the waveform of the BMC encoding data, converting the BMC encoding data into a level signal according to the waveform, obtaining PD communication content according to the level signal, generating the feedback signal in a level form based on the PD communication content, and outputting the feedback signal to the data interface (1), wherein the feedback signal is generated based on a BMC encoding rule;

the voltage division module (3) is respectively connected with the data processing module (2) and the data interface (1) and is used for limiting the amplitude of the sent feedback signal not to be larger than the amplitude threshold of the waveform;

the data interface (1) comprises a first transmission pin (11) and a second transmission pin (12), and the first transmission pin (11) and the second transmission pin (12) are both connected with the data processing module (2) through the voltage division module (3);

when the BMC coded data or the feedback signal needs to be transmitted, the first transmission pin (11) serves as a communication pin and is used for transmitting the BMC coded data or the feedback signal, and the second transmission pin (12) supplies power or is suspended;

or the like, or, alternatively,

the second transmission pin (12) is used as a communication pin for transmitting the BMC encoding data or the feedback signal, and the first transmission pin (11) is configured to be powered on or suspended.

2. A circuit for processing BMC encoded data of a USB-PD protocol according to claim 1, characterized in that said data processing module (2) comprises:

the transmission unit (21) is connected with the first transmission pin (11) and the second transmission pin (12) through the voltage division module (3) and is used for receiving the BMC coding signal or sending the feedback signal;

the analog comparison unit (22) is connected with the transmission unit (21) to receive the BMC coding signal and acquire the waveform of the BMC coding signal, and converts the BMC coding data into a level signal according to the waveform to output;

and the compiling unit (23) is connected with the analog comparison unit (22) to receive the level signal, obtain PD communication content according to the level signal, generate the feedback signal based on the PD communication content, and output the feedback signal to the transmission unit (21) for transmission.

3. A circuit for processing BMC encoded data of a USB-PD protocol according to claim 2, wherein:

the transmission unit (21) comprises a first pin group (211) and a second pin group (212);

the partial pressure module (3) comprises a first partial pressure unit (31) and a second partial pressure unit (32);

the first pin group (211) is connected with the first transmission pin (11) through the first voltage division unit (31), and the first voltage division unit (31) limits the amplitude of a feedback signal output by the first pin group (211) to the first transmission pin (11) to be not greater than the amplitude threshold of the waveform;

the second pin group (212) is connected with the second transmission pin (12) through the second voltage division unit (32), and the second voltage division unit (32) limits the amplitude of a feedback signal output by the second pin group (212) to the second transmission pin (12) to be not greater than the amplitude threshold of the waveform;

or the like, or, alternatively,

the first pin group (211) is connected with the second transmission pin (12) through the first voltage division unit (31), and the first voltage division unit (31) limits the amplitude of a feedback signal output by the first pin group (211) to the second transmission pin (12) to be not larger than the amplitude threshold value of the waveform;

the second pin group (212) is connected with the first transmission pin (11) through the second voltage division unit (32), and the second voltage division unit (32) limits that the amplitude of a feedback signal output to the first transmission pin (11) by the second pin group (212) is not larger than the amplitude threshold of the waveform.

4. A circuit for processing BMC encoded data of a USB-PD protocol according to claim 3, wherein:

the first pin group (211) comprises a first analog-to-digital conversion pin (2111) and a first data transmission pin (2112);

the second pin group (212) comprises a second analog-to-digital conversion pin (2121) and a second data transmission pin (2122);

the first voltage division unit (31) includes a first resistor (311) and a second resistor (312);

the second voltage division unit (32) includes a third resistor (321) and a fourth resistor (322);

the first analog-to-digital conversion pin (2111) is connected to the first transmission pin (11) or the second transmission pin (12) through the first resistor (311), the first data transmission pin (2112) is connected to the first transmission pin (11) or the second transmission pin (12) through the second resistor (312), the first data transmission pin (2112) is grounded, and the first resistor (311) and the second resistor (312) are serially divided;

the second analog-to-digital conversion pin (2121) is connected to the first transmission pin (11) or the second transmission pin (12) through the third resistor (321), the second data transmission pin (2122) is connected to the first transmission pin (11) or the second transmission pin (12) through the fourth resistor (322), the second data transmission pin (2122) is grounded, and the third resistor (321) and the fourth resistor (322) are connected in series to divide voltage.

5. A method for processing BMC coded data of a USB-PD protocol, which is applied to the circuit for processing BMC coded data of the USB-PD protocol, and is characterized by comprising the following steps:

receiving BMC encoded data of a USB-PD protocol over the data interface (1);

acquiring the waveform of the BMC coded data;

converting the BMC encoding data into a level signal based on the waveform, obtaining PD communication content according to the level signal, and generating a feedback signal based on the PD communication content;

outputting the feedback signal by using the data interface (1) and the voltage division module (3), wherein the voltage division module (3) is used for limiting the amplitude of the sent feedback signal to be not greater than the amplitude threshold of the waveform;

identifying a first transmission pin (11) and a second transmission pin (12);

selecting the first transmission pin (11) or the second transmission pin (12) as a communication pin, and when the first transmission pin (11) is used as the communication pin, the second transmission pin (12) is powered on or suspended;

when the second transmission pin (12) is used as a communication pin, the first transmission pin (11) is powered on or suspended;

6. The method of claim 5, wherein said converting the BMC encoded data into a level signal based on the waveform comprises:

acquiring a voltage value of each BMC coded data according to the waveform;

if the voltage value is larger than a preset standard value, converting the corresponding BMC coded data into a high-level signal;

and if the voltage value is smaller than a preset standard value, converting the corresponding BMC encoded data into a low-level signal.

7. The method of claim 6, wherein said converting the BMC encoded data to a level signal based on the waveform further comprises:

8. Method for processing BMC coded data of USB-PD protocol according to claim 7, characterized in that said outputting said feedback signal with said data interface (1) and said voltage divider module (3) comprises the following steps:

judging a pin group for establishing the PD communication channel;

if the pin group for establishing the PD communication channel is a first pin group (211), a first analog-to-digital conversion pin (2111) and a first data transmission pin (2112) are taken as output pins, and the feedback signal is output through the voltage division module (3) in a push-pull mode;

and if the pin group establishing the PD communication channel is a second pin group (212), taking a second analog-to-digital conversion pin (2121) and the second data transmission pin (2122) as output pins, and outputting the feedback signal through the voltage division module (3) in a push-pull mode.

9. The method for processing BMC encoded data of USB-PD protocol according to claim 8, wherein said outputting said feedback signal via said voltage divider module (3) in push-pull mode comprises the following steps:

judging whether the feedback signal is at a high level or a low level;

10. A device for processing BMC encoded data of a USB-PD protocol, the device comprising a circuit as claimed in any of claims 1 to 4 for processing BMC encoded data of a USB-PD protocol.