CN113655775B

CN113655775B - FCT (Flexible Circuit test) method and system of controller

Info

Publication number: CN113655775B
Application number: CN202110830881.XA
Authority: CN
Inventors: 刘俊福; 周龙; 季学文
Original assignee: Dongfeng Motor Corp
Current assignee: Dongfeng Motor Corp
Priority date: 2021-07-22
Filing date: 2021-07-22
Publication date: 2023-01-06
Anticipated expiration: 2041-07-22
Also published as: CN113655775A

Abstract

The invention discloses an FCT test method and a system of a controller, belonging to the technical field of vehicle electronics.A voltage of a voltage stabilizing source is controlled by an upper computer, and current information of the voltage stabilizing source is obtained so as to carry out power-on and power-off tests on the controller; performing controller sleep awakening test based on the voltage stabilizing source current information acquired after the upper computer turns on or turns off the voltage stabilizing source and the CAN signal acquired from the CAN tool; the upper computer periodically sends CAN signals to the controller on the two CAN paths through the CAN tool, and the CAN communication test of the controller is carried out according to the relation between the CAN signals received from the two CAN paths and the sent CAN signals; and after the controller is powered off and is powered on again, the controller reads the stored CAN signals, and sends the stored CAN signals to the upper computer through the two paths of CAN to perform EEPROM storage test. The reliability of controller hardware can be tested, defective controllers in batch production can be intercepted, the repair cost is reduced, and the yield of delivered products is improved.

Description

FCT (Flexible Circuit test) method and system of controller

Technical Field

The invention belongs to the technical field of vehicle electronics, and particularly relates to an FCT (fuzzy C-means) testing method and system of a controller.

Background

With the development of automobile electrification, the number of electronic components of a whole automobile is continuously increased, and the electronic and electric architecture of the automobile is increasingly complex. In this case, each controller needs to have high reliability to ensure normal interaction of network signals of the whole vehicle. Therefore, how to determine the product quality of the controller in the production process is important to improve the yield of the produced controller.

Disclosure of Invention

Aiming at the defects or improvement requirements in the prior art, the invention provides the FCT testing method and the FCT testing system for the controller, which are arranged in an FCT testing station in the production flow of the controller, can test the reliability of controller hardware, intercept defective controller products produced in batches, reduce the repair cost and improve the yield of delivered products.

In order to achieve the above object, according to an aspect of the present invention, there is provided an FCT testing method for a controller, the controller is connected to a CAN tool through two paths of CAN, an upper computer communicates with a regulator voltage source and the CAN tool through a USB, respectively, the regulator voltage source supplies power to the controller, the method comprising:

controlling the voltage of a voltage stabilizing source through an upper computer, acquiring current information of the voltage stabilizing source, and performing power-on and power-off test on a controller through the current information of the voltage stabilizing source;

performing controller sleep awakening test based on the voltage stabilizing source current information acquired after the upper computer turns on or turns off the voltage stabilizing source and the CAN signal acquired from the CAN tool;

the upper computer periodically sends CAN signals to the controller on the two CAN paths through the CAN tool, and the CAN communication test of the controller is carried out according to the relation between the CAN signals received from the two CAN paths and the sent CAN signals;

the upper computer periodically sends CAN signals to the controller on the two paths of CAN through the CAN tool, the controller stores the received CAN signals, after the controller is powered off and is electrified again, the controller reads the stored CAN signals, and the stored CAN signals are sent to the upper computer through the two paths of CAN, so that EEPROM storage testing is performed.

In some optional embodiments, the controlling the voltage of the voltage-stabilizing source by the upper computer to obtain the current information of the voltage-stabilizing source, and performing the power-on and power-off test of the controller by using the current information of the voltage-stabilizing source includes:

starting the voltage stabilizing source to have no output, enabling the controller to be in a Power-off state, and connecting two paths of Power + in the voltage stabilizing source to a Vbat pin and an IGN pin of the controller respectively, wherein the Power-is connected to a GND pin of the controller;

the upper computer starts a voltage stabilizing source through a first USB, receives first current information I1 of the voltage stabilizing source at the moment through the first USB after a first preset time Twake, judges the size of the first current information I1 and saves a judgment result;

the upper computer adjusts the output voltages of two Power + of the voltage-stabilizing source into the minimum working voltage Vmin of the controller through the first USB, receives the second current information I2 of the voltage-stabilizing source at the moment through the first USB after a first preset time Tpeak, judges the size of the second current information I2 and stores the judgment result;

the upper computer adjusts the output voltages of the two paths of Power + of the voltage regulator to be the maximum working voltage Vmax of the controller through the first USB, receives the third current information I3 of the voltage regulator at the moment through the first USB after a first preset time Tpeak, judges the size of the third current information I3 and saves the judgment result;

the upper computer simultaneously powers off the output of the two paths of Power + of the voltage stabilizing source through the first USB, receives fourth current information I4 of the voltage stabilizing source at the moment through the first USB after a second preset time Tsleep, judges the size of the fourth current information I4 and stores a judgment result, and the upper computer disconnects the two paths of Power + of the voltage stabilizing source at the moment;

and repeating the steps, if the conditions that Imin is less than I1 and less than Imax, imin is less than I2 and less than Imax, imin is less than I3 and less than Imax and I4 and less than Isleep1 are met in each test, judging that the upper computer and the lower computer pass the test, and otherwise, judging that the upper computer and the lower computer do not pass the test, wherein Imin is the minimum normal working current of the controller, imax is the maximum normal working current of the controller, and Isleep1 is the minimum resting current of the controller.

In some optional embodiments, after the voltage regulator is turned on or turned off based on the upper computer, the controller sleep wake-up test is performed based on the current information of the voltage regulator and the CAN signal acquired from the CAN tool, and the method includes:

the upper computer starts a voltage stabilizing source through a first USB, receives fifth current information I5 of the voltage stabilizing source at the moment through the first USB after a first preset time Twake, judges the size of the fifth current information I5 and stores a judgment result, judges whether CAN signals from a CAN tool exist or not, analyzes CAN message data if the CAN signals exist, judges whether the CAN messages are periodic signals sent on two paths of CAN by default when the controller is in a power-on state or not, stores the judgment and analysis results, and then closes the power supply of the voltage stabilizing source to the IGN through the first USB;

after a second preset time Tsleep, the upper computer receives sixth current information I6 of the voltage stabilizing source at the moment through the first USB, judges whether CAN signals from a CAN tool exist or not, stores the judgment result, and turns off power supply of the voltage stabilizing source to the IGN through the first USB;

and repeating the steps, if the detected current Imin is less than I5 and less than Imax during each test, and the upper computer receives periodic signals sent by two paths of CAN when the upper computer has the controller in the power-on state on the two paths of CAN, isleep1 is less than I6 and less than Isleep2, and the upper computer cannot receive periodic messages of any path of CAN at the moment, judging that the dormancy awakening test is passed by the upper computer, otherwise, judging that the dormancy awakening test is not passed, wherein the Isleep2 is the maximum dormancy current of the controller.

In some optional embodiments, the upper computer sends the CAN signals to the controller periodically on the two paths of CAN through the CAN tool, and performs the controller CAN communication test according to the relationship between the CAN signals received from the two paths of CAN and the sent CAN signals, including:

the upper computer starts two paths of Power + of a voltage stabilizing source through a first USB, after a first preset time Twake, the upper computer sends a plurality of frames of first CAN signals on a first path of CAN in a first preset period T1 through a CAN tool, sends a plurality of frames of second CAN signals on a second path of CAN in a second preset period T2, the controller receives the two paths of CAN signals, sends the first CAN signals with the period of T1 to the second path of CAN, sends the second CAN signals with the period of T2 to the first path of CAN, and compares whether the ID, data, period and frame number of the CAN signals with the period of T1 received from the second path of CAN are consistent with the first CAN signals, and compares whether the ID, data, period and frame number of the CAN signals with the period of T2 received from the first path of CAN are consistent with the second CAN signals;

the upper computer starts two paths of Power + of a voltage stabilizing source through a first USB, after a first preset time Tway, the upper computer sends a plurality of frames of second CAN signals on a first path of CAN in a second preset period T2 through a CAN tool, sends a plurality of frames of first CAN signals on a second path of CAN in a first preset period T1, the controller receives the two paths of CAN signals, sends the first CAN signals with the period of T1 to the first path of CAN, sends the second CAN signals with the period of T2 to the second path of CAN, compares whether the ID, data, period and frame number of the CAN signals with the period of T2 received from the second path of CAN are consistent with the second CAN signals, and compares whether the ID, data, period and frame number of the CAN signals with the period of T1 received from the first path of CAN are consistent with the first CAN signals;

if the signals in the steps are consistent, the upper computer judges that the CAN communication test passes, otherwise, the upper computer judges that the CAN communication test does not pass.

In some optional embodiments, the host computer passes through the CAN instrument and periodically sends the CAN signal to the controller on two ways CAN, and the controller saves the CAN signal that receives, and after the controller outage was electrified again, the controller read the CAN signal of storage, sends the CAN signal of storage to the host computer through two ways CAN, carries out EEPROM storage test, includes:

the upper computer sends a plurality of frames of third CAN signals on the first path of CAN in a third preset period T3, the upper computer sends a plurality of frames of fourth CAN signals on the second path of CAN in a fourth preset period T4, and the controller stores the received third CAN signals and the received fourth CAN signals in an EEPROM;

the upper computer closes the two Power + outputs of the voltage stabilizing source, the controller is powered off, and the Power is powered on again after a third preset time Ts;

the controller reads data stored in the EEPROM and converts the data into CAN standard frames, a third CAN signal is sent on a second path of CAN, a fourth CAN signal is sent on a first path of CAN, the upper computer compares whether the ID, the data, the period and the frame number of the CAN signal sent back by the controller on the second path of CAN are consistent with the third CAN signal sent out by the upper computer, compares whether the ID, the data, the period and the frame number of the CAN signal sent back by the controller on the first path of CAN are consistent with the fourth CAN signal sent out by the upper computer, if the signals are consistent, the upper computer judges that the EEPROM data storage and reading test is passed, and otherwise, the EEPROM data storage and reading test is not passed.

According to another aspect of the present invention, there is provided an FCT test system of a controller, including: the device comprises a controller, a CAN tool, an upper computer and a voltage stabilizing source;

the controller is connected with the CAN tool through two paths of CAN, the upper computer is respectively communicated with the voltage stabilizing source and the CAN tool through the USB, and the voltage stabilizing source supplies power to the controller;

performing controller sleep wake-up test based on the current information of the voltage stabilizing source acquired after the voltage stabilizing source is turned on or turned off by the upper computer and the CAN signal acquired from the CAN tool;

the upper computer periodically sends CAN signals to the controller through the CAN tool, the controller stores the received CAN signals, and after the controller is powered off and is powered on again, the controller reads the stored CAN signals and sends the stored CAN signals to the upper computer through the two CAN tools to perform EEPROM storage testing.

the upper computer starts a voltage regulator through a first USB, receives first current information I1 of the voltage regulator through the first USB after a first preset time Tway, judges the size of the first current information I1 and stores a judgment result;

the upper computer adjusts the output voltages of the two paths of Power + of the voltage regulator into the minimum working voltage Vmin of the controller through the first USB, receives second current information I2 of the voltage regulator at the moment through the first USB after a first preset time Tpeak, judges the size of the second current information I2 and saves the judgment result;

the upper computer adjusts the output voltages of the two Power + circuits of the voltage-stabilizing source into the maximum working voltage Vmax of the controller through the first USB, receives third current information I3 of the voltage-stabilizing source at the moment through the first USB after a first preset time Tway, judges the magnitude of the third current information I3 and stores the judgment result;

In some optional embodiments, the performing the controller sleep wake-up test based on the current information of the voltage stabilizing source acquired after the upper computer turns on or off the voltage stabilizing source and the CAN signal acquired from the CAN tool includes:

the upper computer starts a voltage stabilizing source through a first USB, receives fifth current information I5 of the voltage stabilizing source at the moment through the first USB after a first preset time Twake, judges the size of the fifth current information I5 and stores a judgment result, judges whether CAN signals from a CAN tool exist or not, analyzes CAN message data if the CAN signals exist, judges whether the CAN messages are periodic signals sent on two paths of CAN in a default mode when the controller is in a power-on state or not, stores the judgment and analysis results, and then closes power supply of the voltage stabilizing source to an IGN through the first USB by the upper computer;

after the second preset time Tsleep, the upper computer receives the sixth current information I6 of the voltage stabilizing source at the moment through the first USB, judges whether a CAN signal from a CAN tool exists or not, saves the judgment result, and closes the power supply of the voltage stabilizing source to the IGN through the first USB;

In some optional embodiments, the upper computer sends the CAN signals to the controller periodically on two paths of the CANs through the CAN tool, and performs the controller CAN communication test according to the relation between the CAN signals received from the two paths of the CANs and the sent CAN signals, including:

and if the signals in the steps are consistent, the upper computer judges that the CAN communication test passes, otherwise, the upper computer judges that the CAN communication test does not pass.

In general, compared with the prior art, the above technical solution contemplated by the present invention can achieve the following beneficial effects:

(1) The invention provides a test scheme aiming at an automobile controller using CAN bus communication, which is arranged in an FCT test station in the production flow of the controller to test the reliability of controller hardware, CAN intercept defective products of the controller caused by hardware failure before product assembly and finished product test, reduces the repair cost and improves the yield of delivered products. The test method can find the problem of low-probability failure which is difficult to expose under the common use scene and during the development test process through repeated pressure tests.

(2) The testing method can be conveniently used for testing a large number of controllers only by configuring the parameters of the lower computer software and the upper computer software, and software and tooling equipment do not need to be changed in the later stage.

Drawings

Fig. 1 is a layout diagram of an FCT test system of a controller according to an embodiment of the present invention;

fig. 2 is a schematic flowchart of an FCT testing method for a controller according to an embodiment of the present invention;

fig. 3 is a schematic diagram of an operation interface of an upper computer according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the invention. In addition, the technical features involved in the respective embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

In the present examples, "first", "second", etc. are used for distinguishing different objects, and are not used for describing a particular order or sequence.

The terms of the present invention will be described in detail below.

PCB: (Printed Circuit Board) is a carrier for electronic components and provides electrical connections.

SMT: (Surface Mounted Technology) a PCB Surface mounting Technology.

THT: (Through Hole Technology) Through-Hole insert.

ICT: and the (In-Circuit Test) production line is used for testing poor welding.

FCT: (Functional Circuit Test), functional Circuit Test, is arranged in the controller production flow for testing of the PCBA.

EOL: the (End Of Line) product off-Line test, or finished product test, is the test at the final stage Of the production Line.

PC: (Personal Computer) Personal Computer, or host Computer.

Power supply: and the direct-current voltage stabilizing source simulates the real vehicle power supply environment to supply power to the controller, and the output voltage can be regulated by an upper computer or manually.

CAN Interface Tool: the CAN is converted into a USB tool, which is hereinafter referred to as a CAN tool for short. The CAN signal receiving and transmitting device is used for receiving CAN signals by the upper computer and transmitting signals to a CAN line by the upper computer.

Vbat: the controller is connected with a pin of the anode of the automobile storage battery.

IGN: the controller is connected with a pin of the thermal power supply, the controller is awakened when the power supply is powered on, and the controller enters a dormant state when the power supply is powered off.

Power +: and stabilizing the positive electrode output of the voltage source.

Power-: and (5) stabilizing the output of the cathode of the voltage source.

Example one

In the test scheme of the invention, after the processes of chip mounting, THT plug-in welding, ICT test and the like of the controller PCB are finished, special lower computer test software is burned for FCT test. The test CAN find that the controller has low probability problems such as wakeup failure, CAN communication failure and the like in the normal use process, and CAN intercept defective products caused by hardware. Due to the fact that the cost of production processes such as product assembly, three-proofing paint coating, high-temperature aging, air tightness testing and the like is high, defective products are intercepted through the testing, the defective products are prevented from flowing into subsequent stations or flowing out of a production line, and high repair cost and finished automobile fault diagnosis cost are avoided.

As shown in FIG. 1, the upper computer communicates with the CAN tool through the second USB port, and the CAN tool is connected with two CAN channels of the controller. The upper computer is communicated with the voltage stabilizing source through the first USB port, the voltage output by the upper computer can be changed, the controller is powered through two powers + and one Power-, the two powers + are respectively connected with the Vbat pin and the IGN pin of the controller, and the Power-is connected with the GND pin of the controller. The controller is woken up or put to sleep by switching the IGN interface on or off. The upper computer obtains the output current information of the voltage stabilizing source through the first USB interface and judges the current.

In this embodiment, the power-up and power-down test is: and testing whether the working current of the controller under the condition of normal supply voltage is in a normal range.

The sleep wake-up test is as follows: and testing whether the controller can be repeatedly awakened by normal dormancy.

The CAN communication test is as follows: and testing whether the CAN module of the controller CAN correctly receive and transmit data.

The EEPROM test is as follows: and testing whether the EEPROM of the controller can normally store and read data.

Fig. 2 is a schematic flow chart of an FCT testing method for a controller according to an embodiment of the present invention, in a production flow, the controller records a lower computer software dedicated for testing, the lower computer software defaults to always send periodic signals on two paths of CAN in a powered-on state of the controller, the upper computer controls a voltage regulator to be turned on through a first USB port to supply power to the controller, the upper computer communicates with a CAN tool through a second USB port, and the CAN tool communicates with a CAN module inside the controller through the first path of CAN and the second path of CAN, the method includes:

(1) Controlling the voltage of a voltage stabilizing source through an upper computer, acquiring current information of the voltage stabilizing source, and performing power-on and power-off test on a controller through the current information of the voltage stabilizing source;

(2) Performing controller sleep awakening test based on the voltage stabilizing source current information acquired after the upper computer turns on or turns off the voltage stabilizing source and the CAN signal acquired from the CAN tool;

(3) The upper computer periodically sends CAN signals to the controller on the two CAN paths through the CAN tool, and the CAN communication test of the controller is carried out according to the relation between the CAN signals received from the two CAN paths and the sent CAN signals;

(4) The upper computer periodically sends CAN signals to the controller on the two paths of CAN through the CAN tool, the controller stores the received CAN signals, after the controller is powered off and is electrified again, the controller reads the stored CAN signals, and the stored CAN signals are sent to the upper computer through the two paths of CAN, so that EEPROM storage testing is performed.

In this embodiment, the upper computer software parameter setting is first performed:

controller nominal working voltage Vnor, controller minimum working voltage Vmin and controller maximum working voltage Vmax; the minimum normal working current Imin of the controller and the maximum normal working current Imax of the controller are obtained; the minimum sleep current Isleep1 of the controller and the maximum sleep current Isleep2 of the controller; the maximum time Tsleep for the controller to go to sleep from the wake-up state; the maximum time Twake for which the controller enters the awake state from the sleep state or the power-off state; the power-on test times N1; sleep wake-up times N2; the period T1 of the first CAN signal, the period T2 of the second CAN signal, the period T3 of the third CAN signal and the period T4 of the fourth CAN signal have respective specific ID and data; CAN signal frame number N3 of CAN communication test; number of CAN signal frames N4 of EEPROM test; the controller powers off time Ts in EEPROM. The above parameter values are not changed in the testing process after being pre-configured and stored by upper computer software.

In this embodiment, the policies of the controller lower computer software are as follows: the controller is powered on and enters a normal working state, and then constantly sends a CAN signal 0 with a period of Td, and does not send the CAN signal in a dormant state; under the normal working state, if the controller receives a first CAN signal from the first path of CAN, the controller sends the first CAN signal from the second path of CAN, and if the controller receives a second CAN signal from the second path of CAN, the controller sends the second CAN signal from the first path of CAN; under the normal working state, if the controller receives a third CAN signal from the first path of CAN, the controller stores the data of the third CAN signal into the EEPROM, and if the controller receives a fourth CAN signal from the second path of CAN, the controller stores the data of the fourth CAN signal into the EEPROM; the controller acquires data from the EEPROM after being electrified again, transmits a third CAN signal with a specific frame number from the second path of CAN, and transmits a fourth CAN signal with the specific frame number from the first path of CAN; and after the specific frame number is finished, stopping sending the third CAN signal and the fourth CAN signal, and only sending a periodic CAN signal 0.

FIG. 3 is a diagram showing a test operation interface using the DELPHI development environment according to the present embodiment. When the test is started, the environment is built according to the arrangement shown in fig. 1, the controller sends periodic messages to the upper computer through the CAN after being electrified, and the upper computer operation interface displays the serial number (according to the test sequence of the controller), the electrifying test times, the dormancy awakening test times, the CAN communication test times and the EEPROM test times of the controller. The start test button is clicked and the test is started.

In this embodiment, step (1) may be specifically implemented by the following steps:

(1.1) starting no output of a voltage stabilizing source, enabling a controller to be in a Power-off state, and connecting two paths of Power + of the voltage stabilizing source to a Vbat pin and an IGN pin of the controller respectively, wherein the Power-is connected to a GND pin of the controller;

(1.2) the upper computer starts a voltage stabilizing source through a first USB port, receives first current information I1 of the voltage stabilizing source at the moment through the first USB port after a first preset time Tpeak, judges the size of the first current information I1 and stores a judgment result;

(1.3) the upper computer adjusts the output voltages of two paths of Power + of the voltage-stabilizing source into Vmin through a first USB port, receives second current information I2 of the voltage-stabilizing source at the moment through the first USB port after a first preset time Tpeak, judges the size of the second current information I2 and stores a judgment result;

(1.4) the upper computer adjusts the output voltages of the two paths of Power + of the voltage-stabilizing source into Vmax through the first USB port, receives third current information I3 of the voltage-stabilizing source at the moment through the first USB port after a first preset time Tpeak, judges the size of the third current information I3 and stores a judgment result;

(1.5) the upper computer simultaneously powers off the output of the two paths of Power + of the voltage stabilizing source through the first USB port, receives fourth current information I4 of the voltage stabilizing source through the first USB port after a second preset time Tsleep, judges the magnitude of the fourth current information I4 and stores a judgment result, and the upper computer cuts off the two paths of Power + of the voltage stabilizing source;

(1.6) circulating the steps (1.2) to (1.5) for N1 times, if each circulation meets the conditions that Imin is less than I1 and less than Imax, imin is less than I2 and less than Imax, imin is less than I3 and less than Imax and I4 is less than Isleep1, judging that the upper and lower electric tests pass, and otherwise, judging that the upper and lower electric tests do not pass.

In this embodiment, the step (2) may be specifically implemented by:

(2.1) the upper computer starts a voltage stabilizing source through a first USB port, receives fifth current information I5 of the voltage stabilizing source at the moment through the first USB port after a first preset time Twake, judges the magnitude of the fifth current information I5 and stores a judgment result, judges whether a CAN signal from a CAN tool exists or not, analyzes CAN message data if the CAN signal exists, judges whether the CAN message data is a CAN signal 0 or not, stores the judgment and analysis result, and after the operation is finished, the upper computer closes the power supply of the voltage stabilizing source to the IGN through the first USB port;

(2.2) after a second preset time Tsleep, the upper computer receives sixth current information I6 of the voltage stabilizing source through the first USB port, judges whether CAN signals from a CAN tool exist or not, stores the judgment result, and turns off power supply of the voltage stabilizing source to the IGN through the first USB;

and (2.3) circulating the steps (2.1) to (2.2) for N2 times, if the current Imin detected in each circulation is less than I5 and less than Imax, the upper computer receives that two paths of CAN signals have CAN signals 0, isleep1 and less than I6 and less than Isleep2, and the upper computer cannot receive any path of CAN periodic message, judging that the dormancy awakening test is passed by the upper computer, and otherwise, judging that the dormancy awakening test is not passed.

In this embodiment, the step (3) may be specifically implemented by:

(3.1) after the upper computer opens two paths of Power + of the voltage stabilizing source through the first USB port and passes through a first preset time Tway, the upper computer sends N3-frame first CAN signals on the first path of CAN in a first preset period T1 through a CAN tool, sends N3-frame second CAN signals on the second path of CAN in a second preset period T2, the controller receives the two paths of CAN signals and sends the first CAN signals with the period T1 to the second path of CAN, and sends the second CAN signals with the period T2 to the first path of CAN, the upper computer compares whether the ID, the data, the period and the frame number of the CAN signals with the period T1 received from the second path of CAN are consistent with the first CAN signals which are sent, and compares whether the ID, the data, the frame number and the frame number of the CAN signals with the period T2 received from the first path of CAN are consistent with the second CAN signals which are sent;

(3.2) after the upper computer opens two paths of Power + of the voltage stabilizing source through the first USB port and passes through a first preset time Twake, the upper computer sends N3-frame second CAN signals on the first path of CAN in a second preset period T2 through a CAN tool, sends N3-frame first CAN signals on the second path of CAN in a first preset period T1, the controller sends the first CAN signals with the period of T1 to the first path of CAN after receiving the two paths of CAN signals, sends the second CAN signals with the period of T2 to the second path of CAN, and the upper computer compares whether the ID, data, period and frame number of the CAN signals with the period of T2 received from the second path of CAN are consistent with the second CAN signals which are sent at the beginning or not and compares whether the ID, data, period and frame number of the CAN signals with the period of T1 received from the first path of CAN are consistent with the first CAN signals which are sent at the beginning or not;

and (3.3) if the signals in the step (3.1) and the step (3.2) are consistent, the upper computer judges that the CAN communication test passes, otherwise, the upper computer judges that the CAN communication test does not pass.

In this embodiment, the step (4) may be specifically implemented by the following steps:

(4.1) the upper computer sends N4-frame third CAN signals on the first path of CAN in a third preset period T3, sends N4-frame fourth CAN signals on the second path of CAN in a fourth preset period T4, and the controller stores the received third CAN signals and the received fourth CAN signals in an EEPROM;

(4.2) the upper machine closes the two paths of Power + output of the voltage stabilizing source, the controller is powered off, and the Power is re-powered on after a third preset time Ts;

(4.3) the controller reads the data stored in the EEPROM and converts the data into a CAN standard frame, a third CAN signal is sent on a second path of CAN, a fourth CAN signal is sent on a first path of CAN, the upper computer compares whether the ID, the data, the period and the frame number of the CAN signal sent back by the controller on the second path of CAN are consistent with the third CAN signal sent out by the upper computer, the ID, the data, the period and the frame number of the CAN signal sent back by the controller on the first path of CAN are consistent with the fourth CAN signal sent out by the upper computer, if the signals are compared and consistent, the upper computer judges that the EEPROM data storage and reading test is passed, and if not, the upper computer judges that the EEPROM data storage and reading test is not passed.

After the test is finished, the upper computer cuts off the output of the voltage stabilizing source, the controller cuts off the power, the operation interface of the upper computer displays the passing item and the failing item, and the test is finished.

Example two

As shown in fig. 1, the FCT testing system of a controller provided in this embodiment includes: the device comprises a controller, a CAN tool, an upper computer and a voltage stabilizing source;

In some optional embodiments, the controlling the voltage of the voltage regulator by the upper computer to obtain the current information of the voltage regulator, and performing the power-on and power-off test of the controller by using the current information of the voltage regulator includes:

starting no output of the voltage stabilizing source, enabling the controller to be in a Power-off state, and connecting two paths of Power + in the voltage stabilizing source to a Vbat pin and an IGN pin of the controller respectively, wherein the Power-is connected to a GND pin of the controller;

and repeating the steps, if the conditions that Imin is less than I1 and less than Imax, imin is less than I2 and less than Imax, imin is less than I3 and less than Imax and I4 and less than Isleep1 are met in each test, judging that the upper and lower electric tests pass through by the upper computer, otherwise, judging that the upper and lower electric tests do not pass through, wherein Imin is the minimum normal working current of the controller, imax is the maximum normal working current of the controller, and Isleep1 is the minimum resting current of the controller.

and repeating the steps, if the detected current Imin is less than I5 and less than Imax during each test, and the upper computer receives periodic signals sent on the two paths of CAN when the controller is in the power-on state on the two paths of CAN, isleep1 is less than I6 and less than Isleep2, and the upper computer cannot receive any periodic message of the CAN at the moment, judging that the sleep awakening test is passed by the upper computer, otherwise, judging that the sleep awakening test is not passed, wherein the Isleep2 is the maximum sleep current of the controller.

In some optional embodiments, the host computer sends the CAN signals to the controller periodically on the two paths of CANs through the CAN tool, and performs the controller CAN communication test according to the relationship between the CAN signals received from the two paths of CANs and the sent CAN signals, including:

the upper computer starts two paths of Power + of a voltage stabilizing source through a first USB, after a first preset time Tway, the upper computer sends a plurality of frames of first CAN signals on a first path of CAN in a first preset period T1 through a CAN tool, sends a plurality of frames of second CAN signals on a second path of CAN in a second preset period T2, after receiving the two paths of CAN signals, the controller sends the first CAN signals with the period of T1 to the second path of CAN, sends the second CAN signals with the period of T2 to the first path of CAN, compares whether the ID, data, period and frame number of the CAN signals with the period of T1 received from the second path of CAN are consistent with the first CAN signals, and compares whether the ID, data, period and frame number of the CAN signals with the period of T2 received from the first path of CAN are consistent with the second CAN signals;

In some optional embodiments, above-mentioned host computer passes through the CAN instrument and sends the CAN signal to the controller on two tunnel CAN periodically, and the controller is saved the CAN signal that receives, and after the controller outage was gone up again, the controller read the CAN signal of storage, sends the CAN signal of storage to the host computer through two tunnel CAN, carries out EEPROM storage test, includes:

the upper computer sends a plurality of frames of third CAN signals on the first path of CAN in a third preset period T3, sends a plurality of frames of fourth CAN signals on the second path of CAN in a fourth preset period T4, and the controller stores the received third CAN signals and the received fourth CAN signals in the EEPROM;

It should be noted that, according to the implementation requirement, each step/component described in the present application can be divided into more steps/components, and two or more steps/components or partial operations of the steps/components can be combined into new steps/components to achieve the purpose of the present invention.

It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims

1. A FCT test method of a controller is characterized in that the controller is connected with a CAN tool through two CAN channels, an upper computer is respectively communicated with a voltage stabilizing source and the CAN tool through a USB, and the voltage stabilizing source supplies power to the controller, and the FCT test method comprises the following steps:

the upper computer periodically sends CAN signals to the controller on the two CAN paths through the CAN tool, the controller stores the received CAN signals, the controller reads the stored CAN signals after the controller is powered off and is powered on again, and the stored CAN signals are sent to the upper computer through the two CAN paths to perform EEPROM storage test;

through host computer control steady voltage source voltage, obtain the current information of steady voltage source, the current information through the steady voltage source carries out the controller and tests from top to bottom, include:

the upper computer simultaneously powers off the output of the two paths of Power + of the voltage stabilizing source through the first USB, receives fourth current information I4 of the voltage stabilizing source at the moment through the first USB after a second preset time Tsleep, judges the size of the fourth current information I4 and stores a judgment result, and the upper computer cuts off the two paths of Power + of the voltage stabilizing source at the moment;

2. The method of claim 1, wherein the controller sleep wake-up test is performed based on the current information of the voltage regulator source obtained after the voltage regulator source is turned on or off by the upper computer and the CAN signal obtained from the CAN tool, and comprises:

3. The method according to claim 1 or 2, wherein the upper computer periodically sends CAN signals to the controller on two CAN paths through a CAN tool, and the CAN communication test of the controller is carried out according to the relation between the CAN signals received from the two CAN paths and the sent CAN signals, and the method comprises the following steps:

the upper computer starts two paths of Power + of a voltage stabilizing source through a first USB, after a first preset time Twake, the upper computer sends a plurality of frames of second CAN signals on a first path of CAN in a second preset period T2 through a CAN tool, sends a plurality of frames of first CAN signals on a second path of CAN in a first preset period T1, the controller receives the two paths of CAN signals, sends the first CAN signals with the period of T1 to the first path of CAN, sends the second CAN signals with the period of T2 to the second path of CAN, and compares whether the ID, data, period and frame number of the CAN signals with the period of T2 received from the second path of CAN are consistent with those of the second CAN signals, and compares whether the ID, data, period and frame number of the CAN signals with the period of T1 received from the first path of CAN are consistent with those of the first CAN signals;

4. The method of claim 3, wherein the upper computer periodically sends CAN signals to the controller through a CAN tool on two CAN channels, the controller stores the received CAN signals, the controller reads the stored CAN signals after the controller is powered off and powered on again, and the controller sends the stored CAN signals to the upper computer through the two CAN channels to perform EEPROM storage test, comprising:

5. An FCT test system for a controller, comprising: the controller is connected with the CAN tool through two paths of CAN, the upper computer is respectively communicated with the voltage stabilizing source and the CAN tool through a USB, and the voltage stabilizing source supplies power to the controller;

6. The system of claim 5, wherein the controller sleep wake-up test is performed based on the current information of the voltage regulator source obtained after the upper computer turns on or off the voltage regulator source and the CAN signal obtained from the CAN tool, and comprises:

7. The system of claim 5 or 6, wherein the upper computer periodically sends CAN signals to the controller on the two CAN channels through a CAN tool, and performs CAN communication test of the controller according to the relation between the CAN signals received from the two CAN channels and the sent CAN signals, and the CAN communication test comprises the following steps:

8. The system of claim 7, wherein the upper computer periodically sends CAN signals to the controller through a CAN tool on two CAN channels, the controller stores the received CAN signals, the controller reads the stored CAN signals after the controller is powered off and powered on again, the stored CAN signals are sent to the upper computer through the two CAN channels, and EEPROM storage test is performed, comprising:

the controller reads data stored in the EEPROM and converts the data into a CAN standard frame, a third CAN signal is sent on a second path of CAN, a fourth CAN signal is sent on a first path of CAN, the upper computer compares whether the ID, the data, the period and the frame number of the second path of CAN signal sent back by the controller are consistent with the third CAN signal sent by the upper computer, the ID, the data, the period and the frame number of the first path of CAN signal sent back by the controller are consistent with the fourth CAN signal sent by the upper computer, if the signals are consistent, the upper computer judges that the EEPROM data storage and reading test is passed, and if not, the upper computer judges that the EEPROM data storage and reading test is not passed.