CN113567752B - High-dynamic array type capacitance measuring circuit facing tactile perception and measuring method thereof - Google Patents
High-dynamic array type capacitance measuring circuit facing tactile perception and measuring method thereof Download PDFInfo
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Abstract
The invention discloses a high-dynamic array type capacitance measuring circuit and a measuring method thereof for tactile perception. The device comprises an analog switch circuit, an excitation source type capacitance sensing chip and an FPGA; the array capacitor is mainly formed by arranging a plurality of capacitors in a row-column array, the analog switch circuit comprises a plurality of selection switches, one end of each row of capacitors is connected together and then connected to a positive capacitance input channel of the excitation source type capacitance sensing chip through one selection switch, the other end of each column of capacitors is connected together and then connected to a negative capacitance input channel of the excitation source type capacitance sensing chip, and the excitation source type capacitance sensing chip is connected with the FPGA. The invention reduces the coupling of the capacitance units on the array capacitor, has the capability of reading a plurality of capacitors at the same time, realizes the parallel high-speed and low-coupling array capacitor value reading, data storage and display, and has array expansibility.
Description
Technical Field
The invention relates to a capacitance measuring circuit, in particular to a high-dynamic array capacitance measuring circuit facing to the touch perception of a robot and a measuring method thereof.
Background
Capacitive sensors have been widely used in many fields of industrial and agricultural production, such as in touch sensor systems, for pressure signals, due to their simple structure, high resolution, reliable operation, fast dynamic response, non-contact measurement, and ability to operate under severe conditions such as high temperature, high radiation, and intense vibration.
For the measurement of the micro-capacitance unit, researchers at home and abroad perform a lot of research and propose various methods for measuring capacitance, including a charge/discharge method, an AC bridge method, an AC phase-locked amplification method, a V/T conversion-based method, a chaos constant-current chaos method based on chaos theory, a charge amplification principle-based method and the like. These methods have difficulty measuring the micro-capacitive array.
The conventional micro-capacitance array reading circuit can only measure one capacitance unit at a time by frequently switching the analog switch, has weak response speed and anti-interference capability, and can not meet the use requirement of the array capacitance touch sensor. Shen Guowei et al describe a capacitive touch array sensor whose circuitry is difficult to address the capacitive element coupling problem on a capacitive array. Guo Xiaohui et al studied a fully flexible capacitive touch sensor array and signal extraction method, the circuit of which is difficult to meet the requirements of high-density array type capacitance measurement. Liu Jinyue et al developed flexible array capacitive touch sensor designs and experimental studies, and the circuits thereof did not have good scalability. Liu Libin et al propose a flexible capacitive touch sensor array whose circuitry has insufficient response to high dynamic capacitances. Yi Yi et al devised a capacitive touch sensor micro-capacitance detection circuit that did not have wide-amplitude capacitance detection capability.
Disclosure of Invention
In order to solve the problem that the output micro-capacitance change of a capacitive array touch sensor is difficult to directly measure in a dynamic environment, the invention provides a high-dynamic array capacitance measuring circuit and a measuring method thereof for touch perception.
In order to solve the technical problems, the invention adopts the following technical scheme:
1. High dynamic array type capacitance measuring circuit facing to touch perception:
The circuit comprises an analog switch circuit, an excitation source type capacitance sensing chip and an FPGA; the array capacitor is mainly formed by arranging a plurality of capacitors in a row-column array, the analog switch circuit comprises a plurality of selection switches, one end of each row of capacitors is connected together and then connected to a positive capacitance input channel of the excitation source type capacitance sensing chip through one selection switch, the other end of each column of capacitors is connected together and then connected to a negative capacitance input channel of the excitation source type capacitance sensing chip, and the excitation source type capacitance sensing chip is connected with the FPGA.
Thus, the array capacitor is connected to the channel of the excitation source type capacitance sensing chip after passing through the analog switch circuit, and is directly connected to the channel of the excitation source type capacitance sensing chip.
The selection switch is a multi-selection switch, the input end is provided with one port, the output end is provided with n ports, one end of a row of capacitors is connected with the input end of the selection switch after being connected together, the n ports of the output end of the selection switch are respectively connected with n positive capacitance input channels of the excitation source type capacitance sensing chip, and only one port of the output end is communicated with one port of the input end through the selection switch gating.
The other ends of the capacitors of each column are connected together and then connected to a negative capacitance input channel corresponding to each of the excitation source type capacitance sensing chips.
The system also comprises a clock chip, a memory card, a cache DDR, a USB3.0 chip and a display screen; the FPGA is respectively connected with the clock chip, the memory card, the cache DDR, the USB3.0 chip and the display screen.
2. A high dynamic array type capacitance measuring method facing to touch perception comprises the following steps:
The method comprises the following steps: for the array capacitors arranged in the n-by-n array, the FPGA is used for controlling the excitation source type capacitance sensing chip to gate according to a scanning mode, n capacitors are gated to be connected to a capacitance input channel of the excitation source type capacitance sensing chip along a diagonal rule parallel to the diagonal direction each time, each row and each column is selected to be connected with one capacitor each time, n times of measurement and acquisition are repeatedly carried out to obtain capacitance values of all n-by-n capacitors in the array capacitors, and n-by-n floating point arrays in the FPGA are stored.
And defining an n-by-n floating point array in the FPGA in advance, acquiring capacitance values of n capacitors each time, and assigning the capacitance values to elements in the floating point array corresponding to the capacitance positions.
N capacitors are connected to the capacitor input channels of the excitation source type capacitor sensor chip along the diagonal rule every time, and the method specifically comprises the following steps: dividing the array capacitors into a plurality of groups of capacitor oblique groups according to the direction parallel to the diagonal line, wherein each group of capacitor oblique groups consists of a plurality of capacitors on the oblique line parallel to the diagonal line; when each scanning gating is performed, two groups of capacitance oblique line groups which are not located on the diagonal line of the array type capacitance or only one group of capacitance oblique line groups located on the diagonal line of the array type capacitance are connected, wherein the two groups of capacitance oblique line groups which are in the complementary relationship refer to that the rows of the capacitances in the two groups of capacitance oblique line groups are not overlapped with each other and the total number of the rows is the same as the total number of the rows of the array type capacitance, and meanwhile, the columns of the capacitances in the two groups of capacitance oblique line groups are not overlapped with each other and the total number of the columns is the same as the total number of the columns of the array type capacitance;
And each capacitor on the capacitor diagonal group is connected to one capacitor input channel of the excitation source type capacitor sensing chip through a selection switch of the row, so that the capacitance value is measured.
For each capacitor on the capacitor oblique line group, one end of the capacitor in the column direction is directly connected to a corresponding negative capacitor input channel on the excitation source type capacitor sensor chip, and one end of the capacitor in the row direction is selected and connected to a positive capacitor input channel corresponding to the negative capacitor input channel on the excitation source type capacitor sensor chip connected with the capacitor through a selection switch arranged on the capacitor.
After the FPGA acquires n x n floating point arrays as all capacitance values of the array capacitor, storing the floating point arrays and time information into a memory card, driving a display screen, drawing all capacitance values contained in the floating point arrays into a gradient map for real-time display, and sending data to a computer end through a USB3.0 chip to realize data transmission under high bandwidth.
The invention has the following beneficial effects:
The invention realizes a capacitance measuring circuit of an array type capacitance sensor which can be used under high dynamic response, adopts an FPGA to simultaneously gate only one capacitance unit for each row and each column of a distributed capacitance array when being read, controls a plurality of analog switches to drive a plurality of capacitance reading chips, exerts the parallel processing characteristic of the FPGA to obtain a plurality of capacitance values at the same time, reduces the mutual coupling among the capacitance units, greatly improves the speed of capacitance reading, is provided with a display screen, is convenient to carry and debug on site, realizes high dynamic capacitance reading, and fully exerts the physical property of a front-end distributed capacitance sensing array.
Drawings
FIG. 1 is a block diagram of a high dynamic distributed capacitive sensing array detection system of the present invention;
FIG. 2 is a schematic diagram of a multi-channel analog switch and a capacitive input channel of a chip according to the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 1, the whole circuit comprises an analog switch circuit, an excitation source type capacitance sensing chip FDC2x1x and an FPGA; the array capacitor is mainly formed by arranging a plurality of capacitors in a row-column array, the analog switch circuit comprises a plurality of selection switches, the number of the selection switches in the analog switch circuit is the same as the number of rows of the array capacitor, one end of each row of capacitors is connected together and then connected to a positive capacitor input channel of the excitation source type capacitor sensor chip through one selection switch, the other end of each column of capacitors is connected together and then connected to a negative capacitor input channel of the excitation source type capacitor sensor chip, and the excitation source type capacitor sensor chip is connected with the FPGA.
The selection switch is a multi-selection switch, the input end is provided with one port, the output end is provided with n ports, one end of a capacitor of one row is connected with the input end of the selection switch after being connected together, the n ports of the output end of the selection switch are respectively connected with n positive capacitance input channels of the excitation source type capacitance sensing chip, and only one port of the output end is communicated with one port of the input end through the selection switch gating, so that the positive capacitance input channel of the excitation source type capacitance sensing chip, to which the capacitor is conducted, is controlled.
The other ends of the capacitors in each column are connected together and then connected to one negative-direction capacitor input channel corresponding to each of the excitation source type capacitor sensing chips, and the array type capacitors are provided with n columns, so that the excitation source type capacitor sensing chips are provided with n negative-direction capacitor input channels.
The excitation source type capacitance sensing chip is provided with n positive capacitance input channels and n negative capacitance input channels, one positive capacitance input channel and one negative capacitance input channel correspondingly form a pair of capacitance input channels, the pair of capacitance input channels collect two ends of the same capacitance, and n pairs of capacitance input channels can collect capacitance values of n capacitances at the same time.
The system also comprises a clock chip, a memory card, a cache DDR, a USB3.0 chip and a display screen; the FPGA is respectively connected with the clock chip, the memory card, the cache DDR, the USB3.0 chip and the display screen.
The FPGA is used for parallelly acquiring the output value of the excitation source type capacitance sensing chip and converting the output value into a capacitance value, an array type capacitance value gradient map is output on a display screen, meanwhile, the capacitance value is set out through the USB3.0 chip and is stored in a storage card, so that parallel high-speed and low-coupling array type capacitance value reading, data storage and display are realized, and the array type capacitance sensing chip has array expansibility and can be used for measuring the capacitance value of an array type capacitance touch sensor.
The clock chip is used for carrying out time synchronization on the FPGA, and the caching DDR is used for caching the capacitance value.
As shown in fig. 1 and 2, one end of the ith row of capacitors is connected with the input end of the ith selection switch Si, S1 to Sn are n selection switches, n ports of the output end of each selection switch are respectively from interface 1+ to interface n+, and from interface 1+ to interface n+ are respectively connected to n forward capacitance input channels of the excitation source type capacitance sensing chip as from interface 1+ to interface n+ of the same property ports.
One end of the ith column capacitor is connected in series and then used as an interface i-, and the interfaces 1-to n-corresponding to each column capacitor are respectively connected to n negative capacitance input channels of the interfaces 1-to n-of the excitation source type capacitance sensing chip as ports with the same properties.
The method comprises the following steps: for the array capacitors arranged in the n-by-n array, the FPGA is used for controlling the excitation source type capacitance sensing chip to gate according to a scanning mode, n capacitors are gated and connected to a capacitance input channel of the excitation source type capacitance sensing chip along a diagonal rule parallel to the diagonal direction each time, namely, each time of acquisition is performed to obtain capacitance values of n capacitors, each time of selection of one capacitance connection for each row and each column is met, n times of measurement acquisition is repeatedly performed to obtain capacitance values of all n-by-n capacitors in the array capacitors, and n-by-n floating point arrays stored in the FPGA are formed to form a n-by-n capacitance data matrix.
And defining an n-by-n floating point array in the FPGA in advance, acquiring capacitance values of n capacitors each time, and assigning the capacitance values to elements in the floating point array corresponding to the capacitance positions.
Every time n capacitors are connected to the capacitor input channels of the excitation source type capacitor sensor chip along the diagonal rule of the diagonal direction, the method specifically comprises the following steps:
Dividing the array capacitors into a plurality of groups of capacitor oblique groups according to the direction parallel to the diagonal line, wherein each group of capacitor oblique groups consists of a plurality of capacitors on the oblique line parallel to the diagonal line;
When each scanning gating is performed, two groups of capacitance oblique line groups which are not located on the diagonal line of the array type capacitance or only one group of capacitance oblique line groups located on the diagonal line of the array type capacitance are connected, wherein the two groups of capacitance oblique line groups which are in the complementary relationship refer to that the rows of the capacitances in the two groups of capacitance oblique line groups are not overlapped with each other and the total number of the rows is the same as the total number of the rows of the array type capacitance, and meanwhile, the columns of the capacitances in the two groups of capacitance oblique line groups are not overlapped with each other and the total number of the columns is the same as the total number of the columns of the array type capacitance;
And each capacitor on the capacitor diagonal group is connected to a corresponding capacitor input channel of the excitation source type capacitor sensor chip through a corresponding row selection switch, so that the capacitance value is measured.
For each capacitor on the capacitor oblique line group, one end of the capacitor in the column direction is directly connected to a corresponding negative capacitor input channel on the excitation source type capacitor sensor chip, and one end of the capacitor in the row direction is selected and connected to a positive capacitor input channel corresponding to the negative capacitor input channel on the excitation source type capacitor sensor chip connected with the capacitor through a selection switch arranged on the capacitor. For example, for the lower right corner of the capacitor bank C, the capacitor is located in the nth row and 3 rd column, and is connected to a negative capacitor input channel which is also an interface 3-on the excitation source type capacitor sensor chip through the interface 3-; meanwhile, the capacitor is gated to an interface 3+ at the output end of the selection switch through the selection switch of the nth row, so that the capacitor is communicated with a forward capacitor input channel which is the interface 3+ on the excitation source type capacitor sensor chip.
As shown in fig. 2, in the gating mode of the channel analog switch and the capacitance input channel, for an n×n distributed capacitance sensing array, each row and each column only gates one channel according to arrows a-F in the figure, and n capacitance readings can be realized each time, and the capacitance value of the whole array capacitance unit is obtained for n cycles of the whole capacitance sensing array. When the capacitor is read according to the arrow, any two capacitor units in the arrow direction are mutually independent, so that signal coupling among different capacitor units is effectively reduced, and meanwhile, the capacitor reading capacity of parallel multiple channels is achieved by adopting multiple chips.
As shown in fig. 2, the array capacitors embodied as 6*6 arrays, A, B, C, D, E, F are all 1-group capacitor diagonal groups to distinguish different combinations. The number of the capacitor oblique line groups A is two, and all the capacitors on the two capacitor oblique line groups A are simultaneously connected to the chip to collect the capacitance value.
Therefore, the measurement control method can be used for efficiently measuring the array capacitor, can reduce coupling and interference while rapidly measuring, and realizes accurate and efficient measurement.
After the FPGA acquires n x n floating point arrays as all capacitance values of the array capacitor, storing the floating point arrays and time information into a memory card, driving a display screen, drawing all capacitance values contained in the floating point arrays into a gradient map for real-time display, and sending data to a computer end through a USB3.0 chip to realize data transmission under high bandwidth.
The GND, PAD, ADDR, SD pins of the excitation source type capacitance sensing chip are grounded, the VDD pin is connected with 3.3V direct current voltage, the CLKIN of the excitation source type capacitance sensing chip provides an external clock through a 40MHz active crystal oscillator, and the two ends of INA and INB of each capacitance input channel in the excitation source type capacitance sensing chip are connected with an 18uH inductor and a capacitor in parallel.
In the current domestic and foreign tactile sensing field, aiming at the array type sensor with high-density capacitance units, a conventional micro-capacitance array reading circuit can only measure one capacitance unit at a time by frequently switching an analog switch, the response speed and the anti-interference capability of the micro-capacitance array reading circuit are weaker, and the use requirement of the array type capacitance tactile sensor cannot be met. The circuit can solve the problems in the prior art, and has good response speed and anti-interference capability.
Through implementation test, the invention has the capacity of detecting the wide-amplitude capacitance of 1 pF-250 nF, simultaneously reduces the coupling of adjacent capacitance units on the array capacitance through control of an analog channel gating mode, has the capacity of reading a group of capacitances at the same time, realizes the parallel high-speed and low-coupling array capacitance value reading, data storage and display, has array expansibility, can be used for measuring the capacitance value of the array capacitance touch sensor, can meet the requirements of a measurement and control circuit of the wide-amplitude, high-dynamic and high-density touch capacitance type sensing array, and further improves the response capacity of the capacitance detection circuit by combining the FPGA with the parallel data processing characteristic and the high-speed transmission interface of USB 3.0.
Claims (5)
1. A high dynamic array type capacitance measuring circuit facing to touch perception is characterized in that: the device comprises an analog switch circuit, an excitation source type capacitance sensing chip and an FPGA; the array capacitor is mainly formed by arranging a plurality of capacitors in a row-column array, the analog switch circuit comprises a plurality of selection switches, one end of each row of capacitors is connected together and then connected to a positive capacitor input channel of the excitation source type capacitor sensor chip through one selection switch, the other end of each column of capacitors is connected together and then connected to a negative capacitor input channel of the excitation source type capacitor sensor chip, and the excitation source type capacitor sensor chip is connected with the FPGA;
The selection switch is a multi-selection switch, the input end is provided with one port, the output end is provided with n ports, one end of a row of capacitors is connected with the input end of the selection switch after being connected together, the n ports of the output end of the selection switch are respectively connected with n positive capacitance input channels of the excitation source type capacitance sensing chip, and only one port of the output end is communicated with one port of the input end through the selection switch;
The other ends of the capacitors in each column are connected together and then connected to a negative capacitance input channel corresponding to each excitation source type capacitance sensing chip;
The method steps of the measuring circuit are as follows: for the array capacitors arranged in the n-by-n array, the FPGA is used for controlling the excitation source type capacitance sensing chip to gate according to a scanning mode, n capacitors are gated to be connected to a capacitance input channel of the excitation source type capacitance sensing chip along a diagonal rule in parallel to the diagonal direction each time, each row and each column is selected to be connected with one capacitor each time, n times of measurement and acquisition are repeatedly carried out to obtain capacitance values of all n-by-n capacitors in the array capacitors, and n-by-n floating point arrays in the FPGA are stored;
N capacitors are connected to the capacitor input channels of the excitation source type capacitor sensor chip along the diagonal rule every time, and the method specifically comprises the following steps: dividing the array capacitors into a plurality of groups of capacitor oblique groups according to the direction parallel to the diagonal line, wherein each group of capacitor oblique groups consists of a plurality of capacitors on the oblique line parallel to the diagonal line; when each scanning gating is performed, two groups of capacitance oblique line groups which are not located on the diagonal line of the array type capacitance or only one group of capacitance oblique line groups located on the diagonal line of the array type capacitance are connected, wherein the two groups of capacitance oblique line groups which are in the complementary relationship refer to that the rows of the capacitances in the two groups of capacitance oblique line groups are not overlapped with each other and the total number of the rows is the same as the total number of the rows of the array type capacitance, and meanwhile, the columns of the capacitances in the two groups of capacitance oblique line groups are not overlapped with each other and the total number of the columns is the same as the total number of the columns of the array type capacitance; and each capacitor on the capacitor diagonal group is connected to one capacitor input channel of the excitation source type capacitor sensing chip through a selection switch of the row, so that the capacitance value is measured.
2. A high dynamic array capacitance measurement circuit for tactile perception according to claim 1, wherein: the system also comprises a clock chip, a memory card, a cache DDR, a USB3.0 chip and a display screen; the FPGA is respectively connected with the clock chip, the memory card, the cache DDR, the USB3.0 chip and the display screen.
3. A high dynamic array capacitance measurement circuit for tactile perception according to claim 1, wherein: and defining an n-by-n floating point array in the FPGA in advance, acquiring capacitance values of n capacitors each time, and assigning the capacitance values to elements in the floating point array corresponding to the capacitance positions.
4. A high dynamic array capacitance measurement circuit for tactile perception according to claim 3, wherein: for each capacitor on the capacitor oblique line group, one end of the capacitor in the column direction is directly connected to a corresponding negative capacitor input channel on the excitation source type capacitor sensor chip, and one end of the capacitor in the row direction is selected and connected to a positive capacitor input channel corresponding to the negative capacitor input channel on the excitation source type capacitor sensor chip connected with the capacitor through a selection switch arranged on the capacitor.
5. A high dynamic array capacitance measurement circuit for tactile perception according to claim 1, wherein: after the FPGA acquires n x n floating point arrays as all capacitance values of the array capacitor, storing the floating point arrays and time information into a memory card, driving a display screen, drawing all capacitance values contained in the floating point arrays into a gradient map for real-time display, and sending data to a computer end through a USB3.0 chip to realize data transmission under high bandwidth.
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