CN113537202B

CN113537202B - Coordinate positioning method, system and chip of hardware-accelerated sift feature points

Info

Publication number: CN113537202B
Application number: CN202010293221.8A
Authority: CN
Inventors: 赵旺; 常子奇
Original assignee: Zhuhai Amicro Semiconductor Co Ltd
Current assignee: Zhuhai Amicro Semiconductor Co Ltd
Priority date: 2020-04-15
Filing date: 2020-04-15
Publication date: 2023-10-27
Anticipated expiration: 2040-04-15
Also published as: CN113537202A

Abstract

The invention discloses a coordinate positioning method, a system and a chip of a shift characteristic point accelerated by hardware, wherein the coordinate positioning method invokes various functional counting registers to shift and calculate the calibration coordinates of the currently cached pixel point to be processed in an expansion space on the basis of setting an expansion space capable of accommodating various shifting conditions of the pixel point to be processed, and selects a matched coordinate shifting value by utilizing a preset mapping relation to finish the coordinate positioning of the currently cached pixel point to be processed in the expansion space, so that the pixel point to be processed on each image layer and 26 neighborhood comparison positions thereof are placed in the same integral space for carrying out accurate processing in the process of extreme point accurate processing, the coordinate shifting condition normalization processing of single pixel points in the expansion space of multi-point pixels is realized, the processing efficiency of the pixel points is improved, and the area of corresponding processing hardware circuits is saved.

Description

Coordinate positioning method, system and chip of hardware-accelerated sift feature points

Technical Field

The invention relates to the technical field of pixel point coordinate processing in an image Gaussian pyramid, in particular to a coordinate positioning method of a sift characteristic point based on hardware acceleration, a coordinate positioning system of the sift characteristic point based on hardware acceleration and a chip.

Background

An image pyramid is a structure that interprets images at multiple resolutions, and generates N images of different resolutions by multi-scale pixel sampling of the original image. The image with the highest level of resolution is placed at the bottom, arranged in a pyramid shape, and a series of progressively smaller pixels (size) up to the top of the pyramid contains only one pixel, which constitutes an image pyramid in the conventional sense.

The SIFT algorithm firstly builds an image Gaussian pyramid, the building of the Gaussian pyramid is divided into two parts, gaussian blurring of different scales is carried out on the image, and point separation and downsampling are carried out on the image. Then, two adjacent Gaussian images are subjected to difference to form a Gaussian differential pyramid (DOG, difference of Gaussian), and then extremum detection is performed in the DOG space. In order to find the extreme point of the DOG function, each pixel unit is compared with all adjacent points, and if the pixel unit is the maximum value or the minimum value point, the pixel unit is initially determined to be a local extreme point.

In the SIFT algorithm key point detection process, after the extreme point is detected, the extreme point needs to be accurately processed, and because the extreme point is likely to deviate in the directions of an x coordinate axis, a y coordinate axis and a sigma coordinate axis (layer coordinate) in the DOG space, 27 new coordinate positions can exist after each extreme point is accurately processed. In the implementation process of the hardware circuit, in the prior art, in order to implement operation processing of 27 coordinate offset conditions for each pixel point to be processed, the complexity and the area of the hardware circuit are increased.

Therefore, how to overcome the problems to realize simple and efficient operation to process the extreme point coordinates in the Gaussian scale space, reduce the complexity of pixel point processing and the area of a hardware circuit, and become the technical difficulty of realizing pixel point coordinate operation of a SIFT algorithm by the hardware circuit.

Disclosure of Invention

Aiming at the technical problems, the invention provides a hardware implementation method for recalculating a new coordinate position in an extremum point accurate step in a pixel point detection space of a unified coordinate system by a plurality of detection points, which comprises the following specific technical scheme:

the coordinate positioning method of the sift characteristic points based on hardware acceleration comprises the following steps: step 1, a control register collects all pixel points on each image layer in a group of differential Gaussian scale space; in a group of differential Gaussian scale space, a group of pixel point sequences to be processed are respectively arranged on N adjacent image layers in the middle, each group of pixel point sequences to be processed is 4 pixel points to be processed which are arranged in the same direction of the image layer, and the pixel points to be processed on the image layers of different layers are aligned in columns; in the same group of differential Gaussian scale space, the outermost image layer and the pixel points at the outermost side of each image layer do not participate in extreme point precision processing; step 2, acquiring and refreshing coordinate information of the pixel points to be processed and the neighborhood comparison positions thereof cached in the register; the coordinate positioning method comprises the following steps: step 3, establishing a pixel detection expansion space according to a group of pixel point sequences to be processed on a layer of image layer which is currently cached and the coordinate information of neighborhood comparison positions of the pixel point sequences to be processed, wherein the neighborhood comparison positions of each pixel point to be processed in the group of pixel point sequences to be processed are in the pixel detection expansion space, so that the pixel detection expansion space occupies any adjacent 3 layers of the group of differential Gaussian scale space acquired in the step 1; step 4, driving a counting register to acquire the position relation of the currently cached pixel point to be processed relative to the origin of the coordinate system set in the current differential Gaussian scale space in a shift counting detection mode, and calculating the calibration coordinates of the currently cached pixel point to be processed in the current differential Gaussian scale space; and 5, triggering a data selector to select and output the corresponding mapping coordinate offset of the current buffered pixel to be processed in the current differential Gaussian scale space according to the coordinate offset information of the current buffered pixel to be processed, which is determined in the primary extreme point accuracy process of the SIFT algorithm, and then synchronously adding the mapping coordinate offset to the calibration coordinate obtained in the step 4 through an adder so as to realize the coordinate positioning of the current buffered pixel to be processed in the current differential Gaussian scale space.

Compared with the prior art, the technical scheme is characterized in that on the basis of setting an expansion space capable of accommodating various offset conditions of the pixel points to be processed, the counting registers with various functions are called to shift to calculate the calibration coordinates of the pixel points to be processed in the expansion space, and the matched coordinate offset values are selected by utilizing the preset mapping relation to finish the offset positioning of the calibration coordinates, so that the pixel points to be processed on each image layer and 26 neighborhood comparison positions thereof are placed in the same integral space to be accurately processed, the coordinate offset condition normalization processing of single pixel points in the expansion space of multi-point pixels is realized, the complexity of hardware flow is reduced, the processing efficiency of the pixel points is improved, and the area of a hardware circuit is saved.

Further, the implementation method of the step 4 specifically includes: starting a pixel point counting register to count the number of the pixel points to be processed input by the buffer; simultaneously triggering a first row offset counting register and a second row offset counting register to shift the count value of a pixel point counting register by 2 bits to the right so as to obtain the number of layers of an image layer which is crossed by the currently cached pixel point to be processed relative to the origin of a coordinate system set in the current group of differential Gaussian scale space; then triggering a first row of offset counting registers to move left by 4 bits on the basis of the count value of a right-shift pixel counting register, triggering a second row of offset counting registers to move left by 1 bit on the basis of the count value of the right-shift pixel counting register, and adding the value of the first row of offset counting registers after left-shift operation and the value of the second row of offset counting registers after left-shift operation to obtain the number of pixel points which are contained in the current cache and are spanned by the pixel points to be processed relative to the original point of the coordinate system set in the current differential Gaussian scale space, wherein the pixel points used for participating in calibration coordinate calculation on each image layer do not exceed the pixel point sequence to be processed on the image layer of the image layer, and expanding the established pixel detection space; triggering the first row offset counting register and the second row offset counting register, and simultaneously triggering the column offset counting register to perform a residual operation on the count value of the pixel point counting register so as to obtain the sequencing position of the current cached pixel points to be processed in a group of pixel point sequences to be processed of the image layer; then synchronously inputting the sum of a preset coordinate value of a first pixel to be processed of a buffer input pixel counting register relative to a coordinate system origin set in the current group of differential Gaussian scale space, a residual operation result of a column offset counting register, a numerical value of a first row offset counting register after left shift operation and a numerical value of a second row offset counting register after left shift operation into an adder for operation according to a certain time sequence so as to obtain a calibration coordinate of the current buffer pixel to be processed in the current group of differential Gaussian scale space; wherein, the counting register driven in the step 4 includes: the pixel array comprises a first row offset count register, a second row offset count register, a pixel count register, an image layer count register and a column offset count register.

Compared with the prior art, the technical scheme is characterized in that on the basis of setting an expansion space capable of reflecting the offset condition of the pixels in a group of pixel sequences to be processed, the relative positions of the pixels to be processed in the unified whole space, which are cached at present, are detected by transferring and counting the counting registers of various functions, and the calibration coordinates of the relative positions are calculated, so that the time sequence complexity of a hardware circuit is simplified, the parallel operation efficiency of the pixels is improved, and the circuit operation structure is simplified.

Further, the implementation method of the step 5 specifically includes: in the primary extreme point refinement process of the SIFT algorithm, when the currently buffered pixel point to be processed is determined to be an extreme point of a 3x3x3 pixel stereo space, acquiring coordinate offset information of the currently buffered pixel point to be processed deviating from an interpolation center of the 3x3x3 pixel stereo space by controlling Taylor expansion of the extreme point at the interpolation center position of the 3x3x3 pixel stereo space; the 3x3x3 pixel stereo space is used for representing 27 coordinate offset conditions of pixel points to be processed at a central position, and when only one pixel point to be processed in the group of pixel point sequences to be processed is included, the pixel detection expansion space is a 3x3x3 pixel stereo space; triggering the data selector to select and output the mapping coordinate offset corresponding to the current cached pixel point to be processed in the current group of differential Gaussian scale space according to the coordinate offset information of the current cached pixel point to be processed, which is obtained by the extreme point refinement, wherein the mapping coordinate offset is the coordinate offset of 27 kinds of coordinate offset information of the current cached pixel point to be processed, which is mapped one by one and corresponds to a predefined signed bit in the current group of differential Gaussian scale space; and synchronously adding the mapping coordinate offset output by the data selector and the calibration coordinates of the current cached pixel point to be processed in the current group of differential Gaussian scale space through the adder to offset the current cached pixel point to be processed to a new interpolation center position, so as to realize coordinate positioning of the current cached pixel point to be processed in the current group of differential Gaussian scale space.

In order to acquire the mapping coordinate offset, the technical scheme adopts a data selector generated by case statement of hardware description language verilog, and selects corresponding defined coordinate offset numerical value information with sign bits to output according to coordinate offset information (offset value and offset direction) of the pixel to be processed, which is obtained in real time in primary extreme point refinement, so that each offset condition of the pixel to be processed can be mapped into an offset value, and the introduction of parts which are unfavorable for hardware such as floating point operation, addition and multiplication operation is avoided, thereby accelerating the positioning speed of the calibration coordinates of the pixel to be processed, which are cached at present, and effectively reducing hardware resources.

Further, based on the fact that the effective offset of coordinates of pixel points to be processed in the same group of differential Gaussian scale space is limited to a pixel coordinate unit, the pixel detection expansion space is set to be a 6x3x3 cube area and comprises 3 layers of image layers, each layer of image layer is formed by arranging pixel points in 3 rows and 6 columns, only the middle layer of image layer is provided with the group of pixel point sequences to be processed, and therefore the current acquired group of differential Gaussian scale space is an 8x5x5 cube area and is used for supporting expansion space of accurate mapping of a second extreme point. According to the technical scheme, a 3-dimensional neighborhood comparison space is created for detecting the space local extremum points in the same group of differential Gaussian scale space, so that the operation of 12x27 offset position conditions to be processed of 12 pixel points is simplified to the operation of processing 6x3x3 offset position conditions, and the technical effect is that the coordinate space carrier is implemented, and the hardware circuit area is greatly reduced.

Based on the technical scheme of the method, the invention also discloses a coordinate positioning system of the sift characteristic points based on hardware acceleration, which comprises the following steps: the pixel acquisition module is used for controlling the register to acquire all pixel points on each image layer in the group of differential Gaussian scale space; a group of pixel point sequences to be processed are respectively arranged on each layer on the N adjacent image layers in the middle of a group of differential Gaussian scale space, each group of pixel point sequences to be processed is 4 pixel points to be processed which are arranged in the same direction of the image layer, and the pixel points to be processed on the image layers of different layers are aligned according to columns; in the same group of differential Gaussian scale space, the outermost image layer and the pixel points at the outermost side of each image layer do not participate in extreme point precision processing; n is a positive integer; the pixel refreshing module is used for acquiring and refreshing coordinate information of the pixel points to be processed and the neighborhood comparison positions thereof cached in the register of the pixel acquisition module; the detection space construction module is used for establishing a pixel detection expansion space according to a group of pixel point sequences to be processed and the coordinate information of neighborhood comparison positions thereof on a layer of image layer currently cached by the register acquired by the pixel refreshing module, wherein the neighborhood comparison positions of each pixel point to be processed in the group of pixel point sequences to be processed are positioned in the pixel detection expansion space, so that the pixel detection expansion space occupies a group of arbitrary adjacent 3 layers of the differential Gaussian scale space acquired in the step 1; the calibration coordinate calculation module is used for acquiring the position relation of the currently cached pixel point to be processed relative to the origin of the coordinate system set in the current differential Gaussian scale space by a shift count detection mode by a count register in the driving module, and calculating the calibration coordinate of the currently cached pixel point to be processed in the current differential Gaussian scale space; the coordinate positioning operation module is used for triggering an internal data selector to select and output the corresponding mapping coordinate offset of the current buffered pixel to be processed in the current differential Gaussian scale space according to the coordinate offset information of the current buffered pixel to be processed, which is determined in the primary extreme point accuracy process of the SIFT algorithm, and then the mapping coordinate offset is synchronously added with the calibration coordinate calculated in the step 4 through an adder so as to realize the coordinate positioning of the current buffered pixel to be processed in the current differential Gaussian scale space. According to the technical scheme, the pixel points to be processed on each image layer and 26 neighborhood comparison positions of the pixel points are normalized in the same integral space in the extreme point refinement process, the coordinate positioning system achieves coordinate offset condition normalization of single pixel points in the expansion space of multi-point pixels, hardware flow complexity is reduced, processing efficiency of the pixel points is improved, and hardware circuit area is saved.

Further, the calibration coordinate calculation comprises a pixel point counting sub-module, a first row offset counting register, a second row offset counting register, a pixel point counting register and a column offset counting register; the pixel counting and controlling submodule is used for starting a pixel counting register to count the number of the to-be-processed pixels input by the buffer; the first row offset counting register and the second row offset counting register are used for right shifting the count value of the pixel counting register by 2 bits every time the count value of the pixel counting register is received so as to obtain the number of layers of the image layer which is crossed by the currently cached pixel to be processed relative to the origin of the coordinate system set in the current group of differential Gaussian scale space; the first line offset counting register is used for triggering the first line offset counting register to execute the operation of shifting left by 4 bits when the count value of the pixel point counting register is shifted right by 2 bits; the second row offset counting register is used for triggering the first row offset counting register to execute the operation of shifting left by 1 bit when the count value of the pixel point counting register is shifted right by 2 bits; the column offset counting register is used for performing a shift operation on the count value of the pixel point counting register while the first row offset counting register and the second row offset counting register perform a residual operation on the count value of the pixel point counting register so as to obtain the ordering position of the currently cached pixel point to be processed in a group of pixel point sequences to be processed of the image layer; the pixel point counting control submodule is used for driving an execution left shift operation result output by the first row of offset counting registers, an execution left shift operation result output by the second row of offset counting registers according to a certain time sequence, buffering a preset coordinate value of a first pixel point to be processed input into the pixel point counting registers relative to a coordinate system origin set in the current differential Gaussian scale space, and a residual operation result of the column offset counting registers to be synchronously input into the adder so as to obtain a calibration coordinate of the current buffered pixel point to be processed in the current differential Gaussian scale space. According to the technical scheme, the relative positions of the currently cached pixel points to be processed in the unified whole space are detected through the shift counting of the counting registers with various functions, the calibration coordinates of the pixel points are calculated, the time sequence complexity of a hardware circuit is simplified, the parallel operation efficiency of the pixel points is improved, and the circuit operation structure is simplified.

Further, the coordinate positioning operation module comprises a coordinate offset position calculation module and the data selector; the coordinate offset position calculation sub-module is used for acquiring coordinate offset information of the currently buffered pixel point to be processed deviating from the interpolation center of the 3x3x3 pixel stereo space by controlling Taylor expansion of the extreme point at the interpolation center position of the 3x3x3 pixel stereo space when the currently buffered pixel point to be processed is determined to be the extreme point of the 3x3x3 pixel stereo space in the primary extreme point refinement process of the SIFT algorithm; the 3x3x3 pixel stereo space is used for representing 27 coordinate offset conditions of pixel points to be processed at a central position, and when only one pixel point to be processed in the group of pixel point sequences to be processed is included, the pixel detection expansion space is a 3x3x3 pixel stereo space; the data selector is configured to select and output, under the triggering action of the count beats of the pixel point count register, a mapping coordinate offset corresponding to a currently cached pixel point to be processed in the current set of differential gaussian scale space according to coordinate offset information output by the coordinate offset position calculation sub-module, where the mapping coordinate offset is a coordinate offset corresponding to a predefined signed bit in the current set of differential gaussian scale space in a one-to-one mapping manner by using 27 kinds of coordinate offset information existing in the currently cached pixel point to be processed; the coordinate positioning operation module is configured to synchronize the mapping coordinate offset output by the data selector, the left shift execution operation result output by the first row offset count register, the left shift execution operation result output by the second row offset count register, the preset coordinate value and the remainder operation result of the column offset count register to input the adder for addition, so as to offset the currently cached pixel to be processed to a new interpolation center position, so as to realize coordinate positioning of the currently cached pixel to be processed in the current group of differential gaussian scale space. According to the technical scheme, each offset condition of the pixel point to be processed can be mapped into an offset value through the data selector, and the introduction of parts which are unfavorable for hardware, such as floating point operation, addition operation and multiplication operation, is avoided, so that the coordinate positioning speed of the calibration coordinates of the pixel point to be processed, which is cached at present, is increased, and the hardware resources are effectively reduced.

A chip integrating the coordinate positioning system of the sift feature points.

Drawings

Fig. 1 is a flowchart of a method for providing coordinate positioning of sift feature points based on hardware acceleration according to an embodiment of the present invention.

Fig. 2 is a schematic distribution diagram of 27 kinds of offset positions existing in the pixel point to be processed after the extreme point is refined, and a 3x3x3 pixel stereoscopic space distribution diagram centering on a14 is formed.

Fig. 3 is a schematic diagram of the distribution of 12 pixels to be processed (black dots) and their neighborhood comparison positions (white dots) in a set of differential gaussian scale spaces.

Fig. 4 is a schematic distribution diagram of coordinate points in a pixel detection expansion space of 6x3x3 after 12 pixel points to be processed in fig. 3 are subjected to primary extreme point refinement.

FIG. 5 is a schematic diagram of a framework of a coordinate positioning system based on hardware accelerated sift feature points.

Detailed Description

The following describes the technical solution in the embodiment of the present invention in detail with reference to the drawings in the embodiment of the present invention. Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

The embodiment of the invention provides a coordinate positioning method of a sift characteristic point based on hardware acceleration, as shown in fig. 1, the coordinate positioning method comprises the following steps:

Step S1, a control register sequentially collects all pixel points on each image layer in a group of differential Gaussian scale space, the fact that the pixel points on all image layers in the current group of differential Gaussian scale space are serially input into a corresponding register is achieved, and then step S2 is carried out. A group of pixel point sequences to be processed are respectively arranged on each image layer on N adjacent image layers in the middle of a group of differential Gaussian scale space, each group of pixel point sequences to be processed is 4 pixel points to be processed which are arranged in the same direction of the image layer, 12 pixel points are processed in an accumulated mode, the pixel points to be processed on the image layers of different layers are aligned according to columns, and therefore an input image is converted into pixel matrix information; in the same group of differential Gaussian scale space, the outermost image layer and the pixel points at the outermost side of each image layer do not participate in extreme point precision processing. N is a positive integer.

In all image layers corresponding to the set of difference gaussian scale spaces acquired in step S1, in this embodiment, S is set as the number of gaussian difference image layers used for searching for a pixel to be processed in the current set of difference gaussian scale spaces, and the searching for the pixel to be processed is actually to search for a local minimum value in space, that is, when a certain layer searches for a local extremum point, the gaussian difference image of the previous layer and the gaussian difference image of the next layer need to be used, and further, since the subsequent extremum point accurate positioning can cause the pixel to be processed to shift to the position of a comparison point of a neighborhood, in the process of searching for the pixel to be processed of the S-layer gaussian difference image layer, the s+2 layer gaussian difference image layer needs to be used, then the second layer gaussian difference image of the s+1 layer gaussian difference image is searched for, but the pixel of the s+2 layer gaussian difference image layer of the current set of difference scale spaces acquired in step S1 does not participate in the point accurate processing, and since the pixel points of the first layer of the gaussian difference image layer of the current set of difference scale spaces do not participate in the point accurate processing, and the pixel points of the first layer of gaussian difference image layer do not participate in the point accurate processing, and therefore the pixel points of the first layer of the difference image layer exist in the neighborhood, and the adjacent layer of the pixel points of the first layer of the difference image is not located in the position of the local extremum point exists, and the adjacent layer exists at the position of the local extremum point exists.

And S2, acquiring and refreshing coordinate information of the pixel points to be processed and the neighborhood comparison positions thereof cached in the register, and then entering into step S3. Based on the fact that the effective offset of the coordinates of the pixel points to be processed in the same group of differential Gaussian scale space is limited to one pixel coordinate unit, a 3x3x3 pixel stereo space with the pixel points to be processed as the center is established, and the 3x3x3 pixel stereo space also represents 27 offset positions of the pixel points to be processed at the center position of the pixel points to be processed, wherein the 27 offset positions comprise the center position of the 3x3x3 pixel stereo space, 8 adjacent coordinate offset positions of the same scale image layer and 9 x 2 coordinate offset positions corresponding to the upper and lower adjacent scale image layers. And the method is just used for coordinate offset positioning in the process of the extreme point precision in the subsequent step.

Step S3, a pixel detection expansion space is established according to the coordinate information of a group of pixel point sequences to be processed and neighborhood comparison positions of the pixel point sequences to be processed on a layer of image layer which is currently cached, wherein the neighborhood comparison positions of each pixel point to be processed in the group of pixel point sequences to be processed are located in the pixel detection expansion space, so that the pixel detection expansion space occupies any adjacent 3 layers of the group of difference Gaussian scale spaces acquired in the step S1; and then proceeds to step S4. The coordinate offset conditions of the pixel points to be processed after the extreme point is refined are 27, which correspond to different image layers and offset directions, a set of sequences of pixels to be processed (4 pixels to be processed) on a layer of the currently cached image layer may be shifted to neighboring upper and lower layers or neighborhood positions of the same layer. When the coordinate offset of the pixel to be processed is 1 pixel unit, the coordinate effective offset is calculated, a group of pixel to be processed sequences (4 pixel to be processed) of the third layer image layer can be offset to the neighborhood comparison positions of the second layer, the third layer or the fourth layer, so that a 3x3x3 pixel three-dimensional space with one pixel to be processed as the center is expanded to form a 6x3x3 cube region according to the 4 pixel to be processed and the neighborhood comparison positions reached by the offset, and the sequence of pixel to be processed in the N layer image layer is further expanded to form an 8x5x (n+2) cube region, so that an N+2 Gaussian differential image layer is needed to form a group of differential Gaussian scale space surrounding 4N pixels to be processed in the three layer image layer.

As shown in fig. 3, N is set to 3, and this embodiment discloses a set of middle adjacent 3 image layers of the differential gaussian scale space, each image layer is provided with 4 pixel points to be processed aligned in columns, that is, dots of a black mark, and a pixel detection expansion space of 6x3x3 can be constructed for the 4 pixel points to be processed set on each image layer, so that a set of differential gaussian scale space can accommodate 3 pixel detection expansion spaces of 6x3x 3. Thus, the extreme point detection can be performed on the pixel points marked with the black dots in the second layer, the third layer, and the fourth layer. In this embodiment, the pixel points marked by the black dots in the second layer, the third layer and the fourth layer in fig. 3 are all to-be-processed pixel points requiring extreme point refinement, after the first extreme point refinement, the coordinate positions are expanded to the positions marked by b0 to b53 shown in fig. 4 by using the pixel information of the 3x3x3 cube region with the pixel points marked by the black dots as the center, that is, the pixel points marked by the 4 black dots in each image layer can be shifted (27 shift coordinate positions existing) in the 3x3x3 pixel three-dimensional space including the pixel points per se as the center position according to each to-be-processed pixel point by one 6x3x3 pixel detection expansion space. If the second extreme point refinement is to be performed, the pixel information of the 3x3x3 pixel stereoscopic space centered on the cached pixel to be processed needs to be re-acquired in the coordinate position space marked with b0 to b53 as shown in fig. 4, and the second refinement operation is in the extended coordinate system as shown in fig. 4, but step S4 is required to calculate coordinate values in a set of differential gaussian scale spaces where the pixel points marked with black dots of fig. 3 are mapped at the b0 to b53 mark positions as shown in fig. 4.

As shown in fig. 3, the coordinate values are scanned line by line layer by layer from the pixel point marked by the black dot on the left side of the second image layer to the right, and based on the 3x3x3 pixel stereoscopic space with the pixel point marked by the black dot currently buffered as the center, the coordinate positions of the pixel points marked by the 4 black dots of the second image layer in fig. 3 can be expanded and mapped into the coordinate space shown in fig. 4, wherein the mark positions of the pixel detection expansion space shown in fig. 4 include:

first row of second layer: b0, b1, b2, b3, b4, b5;

second row of second layer: b6, b7, b8, b9, b10, b11;

third row of second layer: b12, b13, b14, b15, b16, b17;

first row of third layer: b18, b19, b20, b21, b22, b23;

second row of third layer: b24, b25, b26, b27, b28, b29;

third row of third layer: b30, b31, b32, b33, b34, b35;

first row of fourth layer: b36, b37, b38, b39, b40, b41;

second row of fourth layer: b42, b43, b44, b45, b46, b47;

third row of fourth layer: b48, b49, b50, b51, b52, b53;

it should be noted that the pixel point does not have a coordinate shift phenomenon in the mapping process.

It should be noted that, the position of the accurate point needs to be obtained in the process of the accurate point of the extreme point is a concept of sub-pixel level, and the embodiment controls the effective offset of the coordinates of the pixel point to be processed within 1 pixel point. Therefore, the present embodiment eliminates the extreme points whose coordinate shift amounts exceed 1 pixel unit. When shifting by 1 pixel unit, the pixel point to be processed is shifted to an adjacent scale space, namely, a 3x3x3 pixel stereo space taking the pixel point to be processed as a center is formed, as shown in fig. 2, assuming that an extreme point exists at the position of the mark point a14, after the extreme point is refined, the pixel point at the position of the mark point a14 can be shifted to any one of the position of the mark point a1 to the position of the mark point a27, so that 27 possible coordinate positions exist at new coordinate positions after the pixel point at the position of the mark point a14 is refined. Preferably, when the first black dot marked pixel on the left of the third layer is the currently cached pixel to be processed, expanding the pixel offset manner of fig. 2 to the space coordinate system shown in fig. 3, if the coordinate offset reaches within 1 pixel unit, the pixel to be processed will be offset to the neighborhood comparison position of the second layer, the third layer or the fourth layer, including the position of the white dot mark and the positions of the black dot marks on the adjacent upper and lower layers aligned to the pixel to be processed, after the pixel to be processed will be offset to the neighborhood comparison position, storing the new pixel to be processed at the neighborhood comparison position, setting the original position of the pixel to be processed as the neighborhood comparison position of the new pixel to be processed, and when the pixel to be processed is cached into the neighborhood comparison position next time in the register, normalizing the coordinate offset condition determined by the two size comparisons to be a coordinate offset condition because the neighborhood comparison position is compared with the original pixel to be processed in the previous extremum point refinement process. Specifically, as shown in fig. 2, the existence of the pixel to be processed at the position of the mark point a14 means that the pixel value at the position of the mark point a14 needs to be compared with the pixel values at the neighborhood comparison positions a1 to a27, and when the pixel value at the position of the mark point a15 has participated in the comparison of the pixel value at the position of the mark point a14 to complete the determination operation of the extremum point, the pixel at the position of the mark point a15 is cached in the register, at this time, the pixel at the position of the mark point a15 is marked as the pixel to be processed, and the position of the mark point a14 becomes the neighborhood comparison position at the position of the mark point a15, although the pixel value at the position of the mark point a15 and the pixel value at the position of the neighborhood comparison position a15 need to be compared again, the coordinate shift determined by the two comparisons between the position of the mark point a14 and the pixel point at the position of the mark point a15 is normalized to be processed as a coordinate shift condition, so that the positioning system realizes the normalization processing of the coordinate shift condition of the single pixel in the coordinate shift condition of the pixel, and the corresponding processing area is saved. In the pixel points marked by 12 black dots in fig. 3 (n=3), the pixel points marked by 4 black dots in each layer are mapped into the pixel detection expansion space in the same group of differential gaussian scale space to perform extreme point precision processing, and as the outermost layer image in the same group of differential gaussian scale space and the outermost pixel points on each layer of image do not perform extreme point precision processing, the pixel points marked by 12 black dots in fig. 3 are mapped into the coordinate position spaces marked by b0 to b53 to participate in the size comparison of the pixel values to determine the extreme point positions, and compared with the size comparison processing on 27 coordinate positions for 12 pixel points to be processed, the processing of 324 coordinate offset conditions is performed in an accumulated manner, and the embodiment simplifies the processing of the coordinate positioning process of the 12 pixel points to be processed to 54 coordinate offset conditions, thereby saving a large amount of hardware resources of circuit implementation in hardware. And further, out of the 4N pixel points marked by the black dots, after the pixel points marked by the black dots of each layer are mapped into the pixel detection expansion space in the same group of difference Gaussian scale space to conduct extreme point precision processing, the identification positioning operation under 27 coordinate position offset conditions is completed relative to each pixel point to be processed, and the processing flow can be simplified by 6 times.

And S4, driving a counting register to acquire the position relation of the coordinate system origin of the currently cached pixel point to be processed relative to the coordinate system origin set in the current differential Gaussian scale space in a shift counting detection mode, calculating the calibration coordinates of the currently cached pixel point to be processed in the pixel detection expansion space, and then entering a step S5 to position the calibration coordinates in the step S4 according to the coordinate offset value calculated by the first extreme point accuracy. As shown in fig. 4, the present embodiment sets the origin of the coordinate system set in the current set of differential gaussian scale spaces at the b0 mark position of the second image layer, which also corresponds to the upper left-hand white dot mark position of the second image layer of fig. 3.

The specific implementation method comprises the following steps: the starting pixel counting register counts the number of the pixels to be processed input by the buffer memory in a mode of adding one to the count value, and the number can correspond to the number of the pixels marked by the black dots in fig. 3. Simultaneously triggering a first row offset counting register and a second row offset counting register to shift the count value of a pixel point counting register by 2 bits to the right, namely dividing the count value of the pixel point counting register by 4 to obtain the number of layers of the image layer where the currently cached pixel point to be processed is located (the result of shifting the count value by 2 bits to the right), and obtaining the number of layers of the image layer which is already crossed by the currently cached pixel point to be processed relative to the origin of the coordinate system set in the current differential Gaussian scale space, wherein the number of layers is related to scale information on the sigma coordinate axis of the coordinate system of FIG. 4, and the scale information of different image layers is different; then triggering the first row offset counting register to shift left by 4 bits based on the count value of the pixel counting register, triggering the second row offset counting register to shift left by 1 bit based on the count value of the pixel counting register, and adding the value of the first row offset counting register after the left shift operation and the value of the second row offset counting register after the left shift operation, which is equivalent to dividing the count value of the pixel counting register by the quotient of 4 multiplied by 16, dividing the count value of the pixel counting register by the quotient of 4 multiplied by 2, and adding the products of the two, which is equivalent to dividing the count value of the pixel counting register by the quotient of 4 multiplied by 18. As shown in fig. 4, 18 is the number of coordinate positions (6 x 3) included in each image layer of the pixel detection expansion space, because the coordinate positions of the pixel points on each image layer of the current set of differential gaussian scale spaces, which are used for participating in the extremum point refinement, do not exceed the pixel detection expansion space established by expanding a set of pixel point sequences to be processed on the image layer of the current set of differential gaussian scale spaces. In summary, in this embodiment, the shift values of the first line offset count register and the second line offset count register are added to obtain the number of coordinate positions included in the image layer that the coordinates of the pixel point to be processed that is currently cached cross with respect to the origin of the coordinate system set in the pixel detection expansion space.

And triggering the first row offset counting register and the second row offset counting register, and simultaneously triggering the column offset counting register to perform a residual operation on the count value of the pixel point counting register, wherein the residual operation has basic operators in a hardware description language verilog for calling to realize hardware. Therefore, the hardware circuit is simpler to realize, so that the current cached ordering coordinate position of the pixel points to be processed in a group of pixel point sequences to be processed of the image layer is obtained; when the first row offset count register and the second row offset count register shift right by 2 bits to obtain what layer of image layer the pixel point to be processed is located in the current group of difference Gaussian scale space, the column offset count register performs a residual operation on the count value of the pixel point count register to obtain the column address of the pixel point to be processed in the current buffer memory in the image layer, specifically the ordering coordinate position of a group of pixel point to be processed in the image layer relative to the first pixel point to be processed.

And then synchronously inputting the sum of a preset coordinate value of the first pixel point to be processed, which is cached and input into a pixel point counting register, relative to a coordinate system origin set in the current differential Gaussian scale space, a remainder operation result of a column offset counting register, a numerical value of the first row offset counting register after left shift operation and a numerical value of the second row offset counting register after left shift operation to the adder operation according to a certain time sequence, so as to obtain the calibration coordinate of the current cached pixel point to be processed in the current differential Gaussian scale space, namely, obtain the position relation of the coordinate of the current cached pixel point to be processed relative to the coordinate system origin set in the current differential Gaussian scale space. Specifically, as shown in fig. 4, in this embodiment, the b0 mark position of the second image layer in the current set of differential gaussian scale space is marked as the origin of the coordinate system, the first pixel point to be processed in the input pixel point count register is the pixel point of the b7 mark position of the second image layer, then the preset coordinate value of the first pixel point to be processed in the input pixel point count register, which is relative to the origin of the coordinate system set in the current set of differential gaussian scale space, is 7, the ordered coordinate position of the pixel point to be processed in the current buffer memory in the set of pixel point sequence of the image layer, which is relative to the first pixel point to be processed, is only the relative coordinate, and the number of pixel points to be processed in the current buffer memory, which are counted by adding the preset coordinate value 7, the first line offset count register and the second line offset count register, contained in the image layer with respect to the origin of the coordinate system set in the current set of differential gaussian scale space is calculated, and is the absolute coordinate value of the pixel point to be processed in the current set of differential gaussian scale space, which is relative to the origin of the coordinate point to be processed in the current set of coordinate system. The counting register driven in the step 4 includes: the pixel array comprises a first row offset count register, a second row offset count register, a pixel count register, an image layer count register and a column offset count register.

Compared with the prior art, step S4 of the embodiment calls the counting registers of various functions and the adder shift count to detect the relative position of the currently cached pixel to be processed in the whole space on the basis of setting an expansion space capable of reflecting the offset condition of the pixel points in a group of pixel point sequences to be processed, and calculates the calibration coordinates of the pixel points in parallel, so that the time sequence complexity of a hardware circuit is simplified, the parallel operation efficiency of the pixel points is improved, and the circuit operation structure is simplified.

And S5, triggering a data selector to select and output a mapping coordinate offset corresponding to the current buffered pixel point to be processed in the current group of differential Gaussian scale space according to the coordinate offset information of the current buffered pixel point to be processed, which is determined in the primary extreme point accuracy process of the SIFT algorithm and deviates from the interpolation center of the 3x3x3 pixel three-dimensional space, and adding the mapping coordinate offset to the calibration coordinate calculated in the step 4 by an adder to realize the coordinate positioning of the current buffered pixel point to be processed in the current group of differential Gaussian scale space. Step S5 of the present embodiment is performed after one extreme point refinement process.

When the pixel point to be processed is determined to be the extreme point, the extreme point offset is obtained through one-time extreme point accurate positioning, namely, curve fitting is performed on the DoG function by using Taylor (Taylor) expansion of the DoG function in the pixel detection expansion space, and finally, the accurate extreme point position is obtained. The extreme point offset comprises coordinate offsets on x, y and sigma coordinate axes of the differential Gaussian scale space, wherein for coordinates (x, y and sigma), x and y represent position information of pixel points, sigma represents scale information of the pixel points, and the position distribution characteristics of the pixel points in the differential Gaussian scale space are described from different coordinate dimensions. In the process of extreme point accuracy, when any one offset of the coordinate offsets on x, y and sigma coordinate axes is larger than 1.5, the extreme point is removed and the next pixel point to be processed is ready to be detected, wherein the coordinate offset is larger than 1 pixel unit; when the coordinate offset on the x, y and sigma coordinate axes is less than 0.5, the extreme point is not offset from the interpolation center; when the coordinate offset on any coordinate axis of x, y and sigma is greater than or equal to 0.5, the extreme point is deviated from the interpolation center, which can be regarded as that the interpolation center is deviated to the adjacent scale space, the interpolation center should be changed at this time, and the fitting is continued by using the taylor expansion until the extreme point offset is less than 0.5 (the x, y and sigma offsets are all less than 0.5), which is an iterative process. Every iterative calculation, the pixel information of the 3x3x3 pixel three-dimensional space with the new extreme point coordinate which is offset to after the last extreme point is refined as the center is used. The hardware algorithm disclosed in this embodiment sets the maximum iteration number to 2 in consideration of the algorithm performance and the hardware circuit area. Because the accurate point position obtained by accurate positioning of the key point is a concept of sub-pixel level, the data after the decimal point of the coordinate information is found more precisely, and the interpolation center position is required to be changed in limited times by the technical means of accurate positioning of the extreme point to calculate, so that the value of the offset of the extreme point is processed into an integer, and the pixel information is convenient for hardware resources to process.

The specific implementation method of the step S5 includes: in the primary extremum point refinement process of the SIFT algorithm, when it is determined that the currently buffered pixel point to be processed is an extremum point of a 3x3x3 pixel stereo space, by controlling taylor expansion of the extremum point at an interpolation center position of the 3x3x3 pixel stereo space, coordinate offset information of the currently buffered pixel point to be processed, which deviates from the interpolation center of the 3x3x3 pixel stereo space, is obtained according to the method disclosed in the above embodiment, including coordinate offsets on x, y and sigma coordinate axes of a differential gaussian scale space. The 3x3x3 pixel stereo space is used for representing 27 coordinate offset conditions of a to-be-processed pixel point at a central position, when only one to-be-processed pixel point in the group of to-be-processed pixel point sequences is used, the pixel detection expansion space is the 3x3x3 pixel stereo space, 4 3x3 pixel stereo spaces are respectively constructed by taking 4 to-be-processed pixel points on the group of to-be-processed pixel point sequences as centers, the pixel detection expansion spaces are overlapped with each other to form a 6x3x3 cube, and the repeated flow of the coordinate offset conditions of the extreme point accuracy process of the to-be-processed pixel points is normalized.

Triggering the data selector to select and output the mapping coordinate offset corresponding to the pixel to be processed in the current differential Gaussian scale space according to the coordinate offset information of the pixel to be processed in the current buffer, which is obtained by the extreme point refinement, wherein the mapping coordinate offset is the coordinate offset of 27 kinds of coordinate offset information of the pixel to be processed in the current buffer, which corresponds to the pre-defined signed bit in the current differential Gaussian scale space one by one, and the data selector can easily complete the selective output of the mapping coordinate offset under the corresponding counting beat condition by adopting a case statement of hardware description language verilog in the hardware implementation process. The present embodiment sets the range of values of the coordinate offsets of the predefined signed bits to-25 to 25, the values of these coordinate offset values being fixed. In order to acquire the mapping coordinate offset, the technical scheme adopts a data selector generated by a case statement of hardware description language verilog, and selects and outputs corresponding defined coordinate offset numerical value information with sign bits according to coordinate offset information (offset value and offset direction) of the pixel to be processed, which is obtained in real time in primary extreme point refinement, so that each offset condition of the pixel to be processed can be mapped into an offset value, and the introduction of parts which are unfavorable for hardware such as floating point operation, addition and multiplication operation and the like is avoided, thereby accelerating the coordinate positioning speed of the calibration coordinates of the pixel to be processed, which are cached at present, and effectively reducing hardware resources.

The following table is a coordinate offset value mapping table of 27 coordinate offset conditions corresponding to each pixel point to be processed in the set of differential gaussian scale space of fig. 3, and the following table lists offset values mapped in the same set of differential gaussian scale space under 27 coordinate offset positions, so that for each coordinate offset position shown in the table, the adder can input a corresponding offset value to position a new coordinate position.

As can be seen from fig. 2, since the position of the mark point a14 is located at the center position of the 3x3x3 pixel stereo space, the offset value of the mark point a14 mapped to the expansion space, that is, in the set of differential gaussian scale space, is set to 0, so that the position of the mark point a14 represents a coordinate offset position where no coordinate offset occurs, as shown in fig. 2, the position of the mark point a5 is offset by one image layer with respect to the center position a14 in a coordinate downward manner, because the pixel point on each image layer of the current set of differential gaussian scale space is not beyond the pixel detection expansion space established by expanding a set of pixel point sequences to be processed on the image layer, 18 coordinate points are involved in the coordinate offset calculation in one image layer in the expansion coordinate system shown in fig. 4, and the offset value of the position of the mark point a5 in the set of differential gaussian scale space is-18; as shown in fig. 2, the position of the mark point a17 is located in the next adjacent row of the image layer to which the coordinates of the central position a14 belong, and since 6 pixel point coordinates are set in each row of the image layer in the coordinate system of the current set of differential gaussian scale space as shown in fig. 4, the offset value obtained by mapping the position of the mark point a17 in the set of differential gaussian scale space is 6. And the other offset cases are analogized, and the mapping coordinate offset output by the data selector is mapped, which is not described herein.

And synchronously adding the mapping coordinate offset output by the data selector and the calibration coordinates of the currently cached pixel point to be processed in the current group of differential Gaussian scale space through the adder so as to offset the currently cached pixel point to be processed to a new interpolation center position, and positioning the coordinates of the currently cached pixel point to be processed in the current group of differential Gaussian scale space. The position of the new interpolation center may be the neighborhood comparison position of the currently cached pixel to be processed, and after the coordinate of the pixel to be detected is located, the coordinate information cached in the register corresponding to the pixel to be detected needs to be updated.

As an embodiment, it is further required to determine whether the coordinates of all the pixels to be processed in the current set of differential gaussian scale space are located, if yes, the step S1 is returned to collect all the pixels of the image hierarchy in the next set of differential gaussian scale space, otherwise, the pixels to be processed on the neighborhood of the pixels to be processed which have participated in the steps S1 to S5 in the same set of differential gaussian scale space are set as new pixels to be processed in the register, the original pixels to be processed are set as new neighborhood comparison positions of the pixels to be processed, the steps S2 to S5 are continuously executed until the coordinate location of all the pixels except the outermost pixels in the current set of differential gaussian scale space is completed, that is, the pixels on the first layer image layer and the nth layer image layer in the differential gaussian scale space of the set of 8x5x (n+2) cube region, and the pixels on the edge of each layer image are not located in coordinates, and the coordinate location method disclosed in the embodiment is implemented under the condition that the coordinates of 18 pairs of coordinates of the pixels are located in the 8x5x (n+2) cube region, and the coordinates of the next coordinate location is implemented.

Compared with the prior art, the coordinate positioning method based on hardware acceleration disclosed in the previous step is characterized in that on the basis of setting an expansion space capable of accommodating various offset conditions of the pixel points to be processed, the counting registers with various functions are called to shift and calculate the calibration coordinates of the pixel points to be processed in the unified whole space, and the matched coordinate offset values are selected by utilizing the preset mapping relation to finish positioning of the calibration coordinates, so that the pixel points to be processed and 26 neighborhood comparison positions are placed in the same whole space for accurate processing in the process of extreme point accurate processing, the coordinate offset condition normalization processing of single pixel points in the expansion space of multi-point pixels is realized, the complexity of hardware flow is reduced, the processing efficiency of the pixel points is improved, and the hardware circuit area is saved.

The method comprises the steps that a plurality of pixel points to be processed are arranged in a current group of differential Gaussian scale space with a unified coordinate system, extreme point accuracy is carried out, the calibrated coordinate position is recalculated, N is set to be 3, the current collected group of differential Gaussian scale space comprises 5 layers of image layers, each layer of image layer is formed by arranging 5 rows and 8 columns of pixel points, and an 8x5x5 cube area is formed in the whole space and used for supporting twice extreme point accuracy processing. In this way, 12 pixel points to be processed are required to be processed in a group of differential Gaussian scale space at one time, the group of pixel point sequences to be processed are firstly respectively arranged in the middle adjacent 3 layers of image layers in the currently acquired group of differential Gaussian scale space, each group of pixel point sequences to be processed is a set of 4 pixel points to be processed, then the effective offset of coordinates of the pixel points to be processed in the same group of differential Gaussian scale space is limited to be a pixel coordinate unit, the set of 4 pixel points to be processed constructs the pixel detection expansion space, namely, a 6x3x3 cube region constructed on the basis of the group of pixel point sequences to be processed of the image layers is expanded, the image layers of 3 layers are formed by arranging pixel points of 3 rows and 6 columns, only the middle image layer is provided with the group of pixel point sequences to be processed, and the group of differential Gaussian scale space acquired at present is an 8x5x5 cube region for supporting the expansion space of the accurate point mapping of a second time. Therefore, in this embodiment, the number of layers of the image layers in the set of differential gaussian scale spaces is 5, and the pixel points to be processed are distributed in 3 image layers adjacent to each other in the middle in the set of differential gaussian scale spaces, so that the pixel detection expansion space occupies any adjacent 3 layers in the set of differential gaussian scale spaces, but in the same set of differential gaussian scale spaces, the outermost image layer and the pixel points on the outermost side of each image layer do not participate in the extremum point precision processing. In this embodiment, a 3-dimensional neighborhood comparison space is created for detecting spatial local extrema in the same set of differential gaussian scale space, so that 12x27 offset positions of 12 pixels to be processed are simplified to be processed in the same set of differential gaussian scale space, and coordinate values of the 12 pixels to be processed after offset can be obtained, which greatly reduces hardware circuit area.

Based on the foregoing embodiment, the present invention also discloses a coordinate positioning system based on the hardware acceleration sift feature points, as shown in fig. 5, the coordinate positioning system includes: the pixel acquisition module is used for controlling the register to acquire all pixel points on each image layer in the group of differential Gaussian scale space; a group of pixel point sequences to be processed are respectively arranged on each layer on the N adjacent image layers in the middle of a group of differential Gaussian scale space, each group of pixel point sequences to be processed is 4 pixel points to be processed which are arranged in the same direction of the image layer, and the pixel points to be processed on the image layers of different layers are aligned according to columns; in the same group of differential Gaussian scale space, the outermost image layer and the pixel points at the outermost side of each image layer do not participate in extreme point precision processing; n is a positive integer; the pixel refreshing module is used for acquiring and refreshing coordinate information of the pixel points to be processed and the neighborhood comparison positions thereof cached in the register of the pixel acquisition module; the detection space construction module is used for establishing a pixel detection expansion space according to a group of pixel point sequences to be processed and the coordinate information of neighborhood comparison positions thereof on a layer of image layer currently cached by the register acquired by the pixel refreshing module, wherein the neighborhood comparison positions of each pixel point to be processed in the group of pixel point sequences to be processed are positioned in the pixel detection expansion space, so that the pixel detection expansion space occupies a group of arbitrary adjacent 3 layers of the differential Gaussian scale space acquired in the step 1; the calibration coordinate calculation module is used for acquiring the position relation of the currently cached pixel point to be processed relative to the origin of the coordinate system set in the current differential Gaussian scale space by a shift count detection mode by a count register in the driving module, and calculating the calibration coordinate of the currently cached pixel point to be processed in the current differential Gaussian scale space; the coordinate positioning operation module is used for triggering an internal data selector to select and output the corresponding mapping coordinate offset of the current buffered pixel to be processed in the current differential Gaussian scale space according to the coordinate offset information of the current buffered pixel to be processed, which is determined in the primary extreme point accuracy process of the SIFT algorithm, and then the mapping coordinate offset is synchronously added with the calibration coordinate calculated in the step 4 through an adder so as to realize the coordinate positioning of the current buffered pixel to be processed in the current differential Gaussian scale space. According to the technical scheme, the pixel points to be processed on each image layer and 26 neighborhood comparison positions of the pixel points are placed in the same integral space in the process of the extreme point accuracy, the accuracy processing is carried out, the coordinate offset condition normalization processing of the single pixel point in the expansion space of the multi-point pixels is realized through the hardware circuit system, the complexity of the hardware flow is reduced, the hardware processing speed of the pixel points is improved, and the area of the hardware circuit system is saved.

Specifically, the calibration coordinate calculation comprises a pixel point counting sub-module, a first row offset counting register, a second row offset counting register, a pixel point counting register and a column offset counting register; the pixel counting and controlling submodule is used for starting the pixel counting register to count the number of the pixels to be processed input by the buffer, outputting a counting beat signal and playing a role in operation and driving; the first row offset counting register and the second row offset counting register are used for right shifting the count value of the pixel counting register by 2 bits every time the count value of the pixel counting register is received so as to obtain the number of layers of the image layer which is crossed by the currently cached pixel to be processed relative to the origin of the coordinate system set in the current group of differential Gaussian scale space; the first line offset counting register is used for triggering the first line offset counting register to execute the operation of shifting left by 4 bits when the count value of the pixel point counting register is shifted right by 2 bits; the second row offset counting register is used for triggering the first row offset counting register to execute the operation of shifting left by 1 bit when the count value of the pixel point counting register is shifted right by 2 bits; the column offset counting register is used for performing a shift operation on the count value of the pixel point counting register while the first row offset counting register and the second row offset counting register perform a residual operation on the count value of the pixel point counting register so as to obtain the ordering position of the currently cached pixel point to be processed in a group of pixel point sequences to be processed of the image layer; the pixel point counting control submodule is used for driving an execution left shift operation result output by the first row of offset counting registers, an execution left shift operation result output by the second row of offset counting registers according to a certain time sequence, buffering a preset coordinate value of a first pixel point to be processed input into the pixel point counting registers relative to a coordinate system origin set in the current differential Gaussian scale space, and a residual operation result of the column offset counting registers to be synchronously input into the adder so as to obtain a calibration coordinate of the current buffered pixel point to be processed in the current differential Gaussian scale space. According to the technical scheme, the relative positions of the currently cached pixel points to be processed in the unified whole space are detected through the shift counting of the counting registers with various functions, the calibration coordinates of the pixel points are calculated, the time sequence complexity of the hardware circuit is simplified, the parallel operation efficiency of the pixel points is improved, and the hardware circuit acceleration operation structure is simplified.

Specifically, the coordinate positioning operation module comprises a coordinate offset position calculation module and the data selector; the coordinate offset position calculation sub-module is used for acquiring coordinate offset information of the currently buffered pixel point to be processed deviating from the interpolation center of the 3x3x3 pixel stereo space by controlling Taylor expansion of the extreme point at the interpolation center position of the 3x3x3 pixel stereo space when the currently buffered pixel point to be processed is determined to be the extreme point of the 3x3x3 pixel stereo space in the primary extreme point refinement process of the SIFT algorithm; the 3x3x3 pixel stereo space is used for representing 27 coordinate offset conditions of pixel points to be processed at a central position, and when only one pixel point to be processed in the group of pixel point sequences to be processed is included, the pixel detection expansion space is a 3x3x3 pixel stereo space; the data selector is configured to select and output, under the triggering action of the count beats of the pixel point count register, a mapping coordinate offset corresponding to a currently cached pixel point to be processed in the current set of differential gaussian scale space according to coordinate offset information output by the coordinate offset position calculation sub-module, where the mapping coordinate offset is a coordinate offset corresponding to a predefined signed bit in the current set of differential gaussian scale space in a one-to-one mapping manner by using 27 kinds of coordinate offset information existing in the currently cached pixel point to be processed; the coordinate positioning operation module is configured to synchronize and input the mapping coordinate offset output by the data selector, the left shift execution operation result output by the first row offset count register, the left shift execution operation result output by the second row offset count register, the preset coordinate value and the remainder operation result of the column offset count register to the adder, so as to add the current cached pixel point to be processed to a new interpolation center position, and realize coordinate positioning of the current cached pixel point to be processed in the current group of differential gaussian scale space. According to the technical scheme, each offset condition of the pixel point to be processed can be mapped into an offset value through the data selector, and the introduction of parts which are unfavorable for hardware, such as floating point operation, addition operation and multiplication operation, is avoided, so that the coordinate positioning speed of the calibration coordinates of the pixel point to be processed, which is cached at present, is increased, and the hardware resources are effectively reduced. The adder disclosed in the embodiment is the same adder in each module, supports synchronous input of multiple paths of counting operation signals, and realizes parallel addition operation of multiple paths of signals.

Preferably, N is set to 3, and the currently acquired set of differential gaussian scale space includes 5 image layers, each image layer is formed by arranging 5 rows and 8 columns of pixel points, and the whole space forms an 8x5x5 cube area for supporting two extreme point accurate processing.

The invention also discloses a chip, which integrates the coordinate positioning system of the Sift characteristic points, can be a special image processing chip, and can output the positioned coordinate information to acquire the 'stable' characteristic signals to be extracted by the software algorithm Sift. The complexity of the hardware chip circuit is greatly simplified, so that the algorithm efficiency is improved, and the area of the on-chip circuit is saved.

It should be noted that, each module and sub-module included in the coordinate positioning system are in one-to-one correspondence with the coordinate positioning method in the foregoing embodiment, and a person skilled in the art may hardware the corresponding coordinate positioning method step into a corresponding working circuit system according to the implementation step of the foregoing coordinate positioning method, so that a specific implementation manner in the system is not described herein, and reference may be made to the foregoing embodiment of the coordinate positioning method.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention and not for limiting the same; while the invention has been described in detail with reference to the preferred embodiments, those skilled in the art will appreciate that: modifications may be made to the specific embodiments of the present invention or equivalents may be substituted for part of the technical features thereof; without departing from the spirit of the invention, it is intended to cover the scope of the invention as claimed.

Claims

1. The coordinate positioning method of the sift characteristic points based on hardware acceleration is characterized by comprising the following steps:

step 1, a control register collects all pixel points on each image layer in a group of differential Gaussian scale space; a group of pixel point sequences to be processed are respectively arranged on each layer on the N adjacent image layers in the middle of a group of differential Gaussian scale space, each group of pixel point sequences to be processed is 4 pixel points to be processed which are arranged in the same direction of the image layer, and the pixel points to be processed on the image layers of different layers are aligned according to columns; in the same group of differential Gaussian scale space, the outermost image layer and the pixel points at the outermost side of each image layer do not participate in extreme point precision processing; n is a positive integer;

step 2, acquiring and refreshing coordinate information of the pixel points to be processed and the neighborhood comparison positions thereof cached in the register;

step 3, establishing a pixel detection expansion space according to a group of pixel point sequences to be processed on a layer of image layer currently cached by a register and coordinate information of neighborhood comparison positions of the pixel point sequences to be processed, wherein the neighborhood comparison positions of each pixel point to be processed in the group of pixel point sequences to be processed are in the pixel detection expansion space, so that the pixel detection expansion space occupies any adjacent 3 layers of the group of differential Gaussian scale space acquired in the step 1;

Step 4, driving a counting register to acquire the position relation of the currently cached pixel point to be processed relative to the origin of the coordinate system set in the current differential Gaussian scale space in a shift counting detection mode, and calculating the calibration coordinates of the currently cached pixel point to be processed in the current differential Gaussian scale space;

and 5, triggering a data selector to select and output a mapping coordinate offset corresponding to the current buffered pixel to be processed in the current differential Gaussian scale space according to the coordinate offset information of the current buffered pixel to be processed, which is determined in the primary extreme point refinement process of the SIFT algorithm, and synchronously adding the mapping coordinate offset and the calibrated coordinate calculated in the step 4 through an adder to realize the coordinate positioning of the current buffered pixel to be processed in the current differential Gaussian scale space.

2. The coordinate positioning method according to claim 1, wherein the implementation method of step 4 specifically comprises:

starting a pixel point counting register to count the number of the pixel points to be processed input by the buffer;

every time a count value of a pixel point counting register is received, triggering a first row offset counting register and a second row offset counting register to right shift the count value of the pixel point counting register by 2 bits at the same time so as to obtain the number of layers of an image layer which is already crossed by the currently cached pixel point to be processed relative to a coordinate system origin set in the current group of differential Gaussian scale space;

Triggering the first line offset count register to execute the operation of shifting left by 4 bits when the count value of the pixel point count register is shifted right by 2 bits by the first line offset count register; triggering the second row offset count register to execute the operation of shifting left by 1 bit when the count value of the pixel point count register is shifted right by 2 bits by the second row offset count register; adding the value of the first row offset count register after the left shift operation is executed and the value of the second row offset count register after the left shift operation is executed to obtain the number of coordinate positions which are contained in the current buffer memory and are common to the image layers which are crossed by the origin of the coordinate system set in the current group of differential Gaussian scale space, wherein the coordinate position on each image layer for participating in the extremum point refinement does not exceed the pixel detection expansion space which is established by expanding a group of pixel point sequences to be processed on the image layer;

when the first row offset counting register and the second row offset counting register execute shifting operation on the count value of the pixel point counting register, the column offset counting register is triggered to perform residual operation on the count value of the pixel point counting register so as to obtain the sequencing position of the current cached pixel point to be processed in a group of pixel point sequences to be processed of the image layer;

Then synchronously inputting the sum of the value of a first row of offset counting registers after left shifting operation and the value of a second row of offset counting registers after left shifting operation, a preset coordinate value of a first pixel to be processed of the buffer input pixel point counting registers relative to a coordinate system origin set in the current group of differential Gaussian scale space and a remainder operation result of a column offset counting register into the adder according to a certain time sequence so as to obtain the calibration coordinate of the current buffer input pixel point to be processed in the current group of differential Gaussian scale space;

wherein, the counting register driven in the step 4 includes: the first row offset count register, the second row offset count register, the pixel count register, and the column offset count register.

3. The coordinate positioning method according to claim 2, wherein the implementation method of step 5 specifically comprises:

in the primary extreme point refinement process of the SIFT algorithm, when the currently buffered pixel point to be processed is determined to be an extreme point of a 3x3x3 pixel stereo space, acquiring coordinate offset information of the currently buffered pixel point to be processed deviating from an interpolation center of the 3x3x3 pixel stereo space by controlling Taylor expansion of the extreme point at the interpolation center position of the 3x3x3 pixel stereo space; the 3x3x3 pixel stereo space is used for representing 27 coordinate offset conditions of pixel points to be processed at a central position, and when only one pixel point to be processed in the group of pixel point sequences to be processed is included, the pixel detection expansion space is a 3x3x3 pixel stereo space;

Triggering the data selector to select and output the mapping coordinate offset corresponding to the current cached pixel point to be processed in the current group of differential Gaussian scale space according to the coordinate offset information of the current cached pixel point to be processed, which is obtained by the extreme point refinement, wherein the mapping coordinate offset is the coordinate offset of 27 kinds of coordinate offset information of the current cached pixel point to be processed, which is mapped one by one and corresponds to a predefined signed bit in the current group of differential Gaussian scale space;

and synchronously adding the mapping coordinate offset output by the data selector and the calibration coordinates of the current cached pixel point to be processed in the current group of differential Gaussian scale space through the adder to offset the current cached pixel point to be processed to a new interpolation center position, so as to realize coordinate positioning of the current cached pixel point to be processed in the current group of differential Gaussian scale space.

4. A coordinate positioning method according to claim 3 wherein N is set to 3, the current set of differential gaussian scale space comprises 5 image layers, each image layer is formed by arranging 5 rows and 8 columns of pixels, and the whole space forms an 8x5x5 cube region for supporting two extreme point refinement processes.

5. The coordinate positioning system of sift characteristic point based on hardware acceleration is characterized in that the coordinate positioning system comprises:

the pixel acquisition module is used for controlling the register to acquire all pixel points on each image layer in the group of differential Gaussian scale space; a group of pixel point sequences to be processed are respectively arranged on each layer on the N adjacent image layers in the middle of a group of differential Gaussian scale space, each group of pixel point sequences to be processed is 4 pixel points to be processed which are arranged in the same direction of the image layer, and the pixel points to be processed on the image layers of different layers are aligned according to columns; in the same group of differential Gaussian scale space, the outermost image layer and the pixel points at the outermost side of each image layer do not participate in extreme point precision processing; n is a positive integer;

the pixel refreshing module is used for acquiring and refreshing coordinate information of the pixel points to be processed and the neighborhood comparison positions thereof cached in the register of the pixel acquisition module;

the detection space construction module is used for establishing a pixel detection expansion space according to a group of pixel point sequences to be processed and the coordinate information of neighborhood comparison positions thereof on a layer of image layer currently cached by the register acquired by the pixel refreshing module, wherein the neighborhood comparison positions of each pixel point to be processed in the group of pixel point sequences to be processed are positioned in the pixel detection expansion space, so that the pixel detection expansion space occupies a group of arbitrary adjacent 3 layers of the differential Gaussian scale space acquired in the step 1;

The calibration coordinate calculation module is used for acquiring the position relation of the currently cached pixel point to be processed relative to the origin of the coordinate system set in the current differential Gaussian scale space by a shift count detection mode by a count register in the driving module, and calculating the calibration coordinate of the currently cached pixel point to be processed in the current differential Gaussian scale space;

the coordinate positioning operation module is used for triggering an internal data selector to select and output the corresponding mapping coordinate offset of the current buffered pixel to be processed in the current differential Gaussian scale space according to the coordinate offset information of the current buffered pixel to be processed, which is determined in the primary extreme point accuracy process of the SIFT algorithm, and then the mapping coordinate offset is synchronously added with the calibration coordinate calculated in the step 4 through an adder so as to realize the coordinate positioning of the current buffered pixel to be processed in the current differential Gaussian scale space.

6. The coordinate positioning system according to claim 5 wherein the calibration coordinate calculation comprises a pixel count sub-module, a first row offset count register, a second row offset count register, a pixel count register, and a column offset count register;

The pixel counting and controlling submodule is used for starting a pixel counting register to count the number of the to-be-processed pixels input by the buffer;

the first row offset counting register and the second row offset counting register are used for right shifting the count value of the pixel counting register by 2 bits every time the count value of the pixel counting register is received so as to obtain the number of layers of the image layer which is crossed by the currently cached pixel to be processed relative to the origin of the coordinate system set in the current group of differential Gaussian scale space;

the first line offset counting register is used for triggering the first line offset counting register to execute the operation of shifting left by 4 bits when the count value of the pixel point counting register is shifted right by 2 bits; the second row offset counting register is used for triggering the first row offset counting register to execute the operation of shifting left by 1 bit when the count value of the pixel point counting register is shifted right by 2 bits;

the column offset counting register is used for performing a shift operation on the count value of the pixel point counting register while the first row offset counting register and the second row offset counting register perform a residual operation on the count value of the pixel point counting register so as to obtain the ordering position of the currently cached pixel point to be processed in a group of pixel point sequences to be processed of the image layer;

The pixel point counting control submodule is used for driving an execution left shift operation result output by the first row of offset counting registers, an execution left shift operation result output by the second row of offset counting registers according to a certain time sequence, buffering a preset coordinate value of a first pixel point to be processed input into the pixel point counting registers relative to a coordinate system origin set in the current differential Gaussian scale space, and a residual operation result of the column offset counting registers to be synchronously input into the adder so as to obtain a calibration coordinate of the current buffered pixel point to be processed in the current differential Gaussian scale space.

7. The coordinate positioning system according to claim 6 wherein the coordinate positioning operation module comprises a coordinate offset position calculation module and the data selector;

the coordinate offset position calculation sub-module is used for acquiring coordinate offset information of the currently buffered pixel point to be processed deviating from the interpolation center of the 3x3x3 pixel stereo space by controlling Taylor expansion of the extreme point at the interpolation center position of the 3x3x3 pixel stereo space when the currently buffered pixel point to be processed is determined to be the extreme point of the 3x3x3 pixel stereo space in the primary extreme point refinement process of the SIFT algorithm; the 3x3x3 pixel stereo space is used for representing 27 coordinate offset conditions of pixel points to be processed at a central position, and when only one pixel point to be processed in the group of pixel point sequences to be processed is included, the pixel detection expansion space is a 3x3x3 pixel stereo space;

The data selector is configured to select and output, under the triggering action of the count beats of the pixel point count register, a mapping coordinate offset corresponding to a currently cached pixel point to be processed in the current set of differential gaussian scale space according to coordinate offset information output by the coordinate offset position calculation sub-module, where the mapping coordinate offset is a coordinate offset corresponding to a predefined signed bit in the current set of differential gaussian scale space in a one-to-one mapping manner by using 27 kinds of coordinate offset information existing in the currently cached pixel point to be processed;

the coordinate positioning operation module is configured to synchronize and input the mapping coordinate offset output by the data selector, the left shift execution operation result output by the first row offset count register, the left shift execution operation result output by the second row offset count register, the preset coordinate value and the remainder operation result of the column offset count register to the adder, so as to add the current cached pixel point to be processed to a new interpolation center position, and realize coordinate positioning of the current cached pixel point to be processed in the current group of differential gaussian scale space.

8. The coordinate positioning system according to claim 5, wherein N is set to 3, the current set of differential gaussian scale space comprises 5 image layers, each image layer is formed by arranging 5 rows and 8 columns of pixel points, and the whole space forms an 8x5x5 cube region for supporting two extreme point refinement processes.

9. A chip, characterized in that it integrates the coordinate positioning system according to any one of claims 5 to 8.