CN113488576A - Light emitting diode structure and manufacturing method thereof - Google Patents
Light emitting diode structure and manufacturing method thereof Download PDFInfo
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- CN113488576A CN113488576A CN202110456652.6A CN202110456652A CN113488576A CN 113488576 A CN113488576 A CN 113488576A CN 202110456652 A CN202110456652 A CN 202110456652A CN 113488576 A CN113488576 A CN 113488576A
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- 238000004519 manufacturing process Methods 0.000 title claims description 19
- 239000000758 substrate Substances 0.000 claims abstract description 112
- 229910052751 metal Inorganic materials 0.000 claims abstract description 95
- 239000002184 metal Substances 0.000 claims abstract description 95
- 239000004065 semiconductor Substances 0.000 claims description 92
- 238000000034 method Methods 0.000 claims description 29
- 239000004642 Polyimide Substances 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 10
- 229920001721 polyimide Polymers 0.000 claims description 10
- 239000004205 dimethyl polysiloxane Substances 0.000 claims description 8
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims description 8
- 229920001486 SU-8 photoresist Polymers 0.000 claims description 6
- -1 Polydimethylsiloxane Polymers 0.000 claims description 4
- 238000003825 pressing Methods 0.000 claims 2
- 239000010410 layer Substances 0.000 description 241
- 239000000463 material Substances 0.000 description 31
- 238000002161 passivation Methods 0.000 description 14
- 239000010931 gold Substances 0.000 description 9
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 9
- 239000011521 glass Substances 0.000 description 8
- 229910052737 gold Inorganic materials 0.000 description 8
- 229910002601 GaN Inorganic materials 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 7
- 239000012811 non-conductive material Substances 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 6
- 239000012790 adhesive layer Substances 0.000 description 6
- 239000011651 chromium Substances 0.000 description 6
- 229910052697 platinum Inorganic materials 0.000 description 6
- 239000010936 titanium Substances 0.000 description 6
- 229910052804 chromium Inorganic materials 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- 229910052732 germanium Inorganic materials 0.000 description 5
- 229910052719 titanium Inorganic materials 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000005496 eutectics Effects 0.000 description 4
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 4
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 239000004033 plastic Substances 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- 229910010271 silicon carbide Inorganic materials 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 229910052593 corundum Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910000510 noble metal Inorganic materials 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- SBIBMFFZSBJNJF-UHFFFAOYSA-N selenium;zinc Chemical compound [Se]=[Zn] SBIBMFFZSBJNJF-UHFFFAOYSA-N 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 206010040844 Skin exfoliation Diseases 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- Power Engineering (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Devices (AREA)
Abstract
The application relates to an LED structure, which comprises a substrate, a plurality of LED units, a bonding layer and a metal contact. The substrate includes a driving circuit, and a plurality of LED units are formed on the substrate. A bonding layer is formed between the substrate and the plurality of LED units, and a metal contact is formed in the bonding layer under each of the LED units to electrically connect each of the LED units with a pad of the driving circuit. The first cross-sectional area of the metal contact is less than the second cross-sectional area of each LED unit.
Description
Cross Reference to Related Applications
The present application claims priority from U.S. provisional patent application No. 63/013,172 entitled "Method for integrating Micro-LEDs and display drivers" filed on 21/4/2020, and U.S. official patent application No. 17/228, 786 entitled "Light Emitting Diode Structure and Method for manufacturing The Same" filed on 13/4/2021, The disclosure of which is hereby incorporated by reference in its entirety.
Technical Field
The present invention relates to a Light Emitting Diode (LED) structure and a method of manufacturing the LED structure, and more particularly, to an LED structure having a plurality of separately operable LED units coupled to a driving circuit through a non-conductive bonding layer and a method of manufacturing the LED structure.
Background
In recent years, LEDs have become popular in lighting applications. As a light source, LEDs have many advantages, including higher luminous efficiency, lower power consumption, longer lifetime, smaller size, and faster switching speed.
Displays with micro-sized LEDs are called micro-LEDs (micro-LEDs). A micro LED display has an array of micro LEDs forming a single pixel element. The pixels may be tiny illuminated areas on the display screen and the image may be composed of many pixels. In other words, a pixel may be a small discrete element that together make up an image on a display. Pixels are typically arranged in a two-dimensional (2D) matrix and are represented using dots, squares, rectangles, or other shapes. A pixel may be a basic unit of a display or a digital image and has geometrical coordinates.
In manufacturing the micro LED, the LED unit is bonded to the driving circuit through a eutectic bonding process. The bonding materials used in the eutectic bonding process typically include thick noble metals such as gold, platinum or indium, and the cost of the eutectic bonding process remains high due to the use of noble metals.
In addition, the eutectic bonding process requires high temperature to bond the LED unit and the driving circuit, and the temperature may cause internal stress due to thermal mismatch between the semiconductor layer forming the LED unit and the driving circuit.
Embodiments of the present application address at least the above problems by providing an LED structure combining an LED unit and a driving circuit using a non-conductive bonding layer and a method of manufacturing the same.
Disclosure of Invention
Embodiments of LED structures and methods of forming the LED structures are disclosed herein.
In one example, an LED structure is disclosed. The LED structure comprises a substrate, a plurality of LED units, a bonding layer (bonding layer) and a metal contact (metal contact). The substrate includes a driving circuit, and a plurality of LED units are formed on the substrate. A bonding layer is formed between the substrate and the plurality of LED units, and a metal contact is formed in the bonding layer under each of the LED units to electrically connect each of the LED units with a pad of the driving circuit. The first cross-sectional area of the metal contact is less than the second cross-sectional area of each LED unit.
In another example, an LED structure is disclosed. The LED structure includes a substrate, a plurality of LED units, and a non-conductive adhesive layer (non-conductive adhesive layer). The substrate includes a driving circuit, and a plurality of LED units are formed on the substrate. The non-conductive bonding layer bonds the substrate and the plurality of LED units. The metal contacts are embedded in the non-conductive bonding layer, and the metal contacts and a portion of the non-conductive bonding layer are integrally formed under each LED unit.
In a further example, a method of fabricating an LED structure is disclosed. A driving circuit having a plurality of pads (contact pads) is formed in the first substrate. A plurality of metal contacts are formed on the first substrate, and each metal contact is located on one of the plurality of pads. A non-conductive bonding layer is formed on the first substrate to cover the plurality of pads and the plurality of metal contacts. A plurality of LED units are formed on the non-conductive adhesive layer. Each LED unit is electrically connected to one of the plurality of pads through one of the plurality of metal contacts.
Drawings
The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present application and, together with the description, further serve to explain the application and to enable a person skilled in the pertinent art to make and use the application.
Fig. 1A-1B show cross-sectional views of illustrative LED structures according to some embodiments of the present application.
Fig. 2A-2I show cross-sectional views of illustrative LED structures at different stages of the fabrication process, according to some embodiments of the present application.
Fig. 3A-3B show cross-sectional views of another illustrative LED structure at different stages of the fabrication process, according to some embodiments of the present application.
Fig. 4 is a flow chart of an illustrative method for fabricating an LED structure according to some embodiments of the present application.
Embodiments of the present application will be described with reference to the accompanying drawings.
Detailed Description
While specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. Accordingly, other configurations and arrangements may be used without departing from the scope of the present application. Moreover, the present application may also be employed in a variety of other applications. The functional and structural features described in this application can be combined, adapted and modified in various ways with each other and not specifically shown in the drawings, so that these combinations, adaptations and modifications are within the scope of the present application.
In general, terms may be understood based at least in part on contextual usage. For example, the term "one or more" as used herein may be used to describe any element, structure, or characteristic in the singular or may be used to describe a combination of elements, structures or characteristics in the plural, depending, at least in part, on the context. Similarly, terms such as "a," "an," or "the" may also be understood to convey a singular use or to convey a plural use, depending, at least in part, on the context. Additionally, the term "… -based" may be understood as not necessarily intended to convey an exclusive set of factors, but may instead allow for the presence of additional factors that are not necessarily explicitly described, depending at least in part on the context.
It should be readily understood that the meaning of "on …", "above …" and "above …" in this application should be interpreted in the broadest sense such that "on …" not only means "directly on something", but also means "on something" including the presence of an intermediate component or layer therebetween, and "on something" or "above something" not only means "on something" or "above something", but also means "on something" or "above something" without an intermediate component or layer therebetween (i.e., directly on something).
Also, spatially relative terms such as "below …," "below …," "lower," "above …," "upper," and the like may be used in this specification to describe one element or component's relationship to another element or component as illustrated in the figures for ease of description. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used in this specification interpreted accordingly as such.
The term "layer" as used in this specification refers to a portion of material that includes a region having a thickness. The layer may extend over the entire underlying or overlying structure, or may have a lesser extent than the extent of the underlying or overlying structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure having a thickness less than the thickness of the continuous structure. For example, a layer may be located between any pair of horizontal planes between the top and bottom surfaces of a continuous structure or therebetween. The layers may extend horizontally, vertically, and/or along a tapered surface. The substrate may be a layer, may include one or more layers therein, and/or may have one or more layers thereon, above, and/or below. One layer may comprise multiple layers. For example, the semiconductor layer may include one or more doped or undoped semiconductor layers, and may be of the same or different materials.
The term "substrate" as used in this specification refers to a material on which subsequent layers of material are added. The substrate itself may be patterned. The material added on top of the substrate may be patterned or may remain unpatterned. In addition, the substrate may include various semiconductor materials such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, and the like, without being limited thereto. Alternatively, the substrate may be made of a non-conductive material, such as glass, plastic, or sapphire wafer, and the like, without being limited thereto. Further alternatively, the substrate may have a semiconductor device or a circuit formed therein.
The term "micro" LED, "micro" p-n diode, or "micro" device as used in this specification refers to descriptive dimensions of certain devices or structures according to embodiments of the invention. The term "micro" device or structure as used in this specification is intended to mean a scale of 0.1 to 100 μm. However, it should be understood that embodiments of the present invention are not necessarily limited thereto, and that certain aspects of the embodiments may be applicable to larger and possibly smaller size scales.
Embodiments of the present invention describe LED structures or micro LED structures and a method for manufacturing the same. To manufacture a micro LED display, the epitaxial layers are bonded to a receiving substrate. The receiving substrate may be, for example, but not limited to, a display substrate including a CMOS backplane or a TFT glass substrate. The epitaxial layers then form a micro LED array on a receiving substrate. The CMOS backplane or TFT glass substrate forms a drive circuit to drive the micro LED structure, and the epitaxial layer includes LED cells or functional mesas to actively emit light. When forming the LED structure or the micro LED structure, the epitaxial layers are bonded on the receiving substrate using an adhesive material. The present application describes LED structures and methods for fabricating the same that use a non-conductive adhesive layer to bond the LED unit and the driver circuit.
Fig. 1A illustrates a cross-sectional view of an LED structure 100 according to some embodiments of the present application. The LED structure 100 includes a substrate 102 having a driver circuit including a plurality of pads 104. The LED structure 100 further includes a plurality of LED units 120 formed on the substrate 102. An adhesive layer 114 is formed between the substrate 102 and the LED unit 120. Metal contacts 110 are formed in the adhesive layer 114 under each LED unit 120 to electrically connect each LED unit 120 with the pad 104 of the driving circuit. The metal contacts 110, each LED unit 120, and the solder pads 104 have their own cross-sectional areas, denoted a1, a2, and A3, respectively. According to the present application, the cross-sectional area a1 ("first cross-sectional area") of the metal contact 110 is smaller than the cross-sectional area a2 ("second cross-sectional area") of each LED unit 120. As shown in fig. 1A, the cross-sectional area a1 of the metal contact 110 is also less than the cross-sectional area A3 of the pad 104 ("third cross-sectional area"). However, it is contemplated that in some alternative embodiments, the cross-sectional area a1 of the metal contact 110 may be equal to or greater than the cross-sectional area A3 of the pad 104. Since the LED unit 120 and the pad 104 are mainly bonded by the bonding layer 114, and the metal contact 110 occupies only a small portion between the LED unit 120 and the pad 104, the use of precious metals can be greatly reduced, and thus the manufacturing cost can be reduced.
In some embodiments, the first substrate 102 may include a semiconductor material, such as, but not limited to, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, and the like. In some embodiments, the first substrate 102 may be made of a non-conductive material, such as glass, plastic, or sapphire wafer, and the like, without being limited thereto. In some embodiments, the first substrate 102 may have a driving circuit formed therein. In some embodiments, the first substrate 102 may be a CMOS backplane or a TFT glass substrate. The driving circuit supplies an electric signal to the LED unit 120 to control the brightness. In some embodiments, the driver circuit may comprise an active matrix driver circuit, wherein each individual driver corresponds to an individual LED unit 120. In some embodiments, the driving circuit may include a passive matrix driving circuit, wherein the data line and the scan line driven by the driving circuit may be connected to the plurality of LED units 120 arranged in an array.
The plurality of LED units 120 are bonded to the first substrate 102 through the bonding layer 114. The bonding layer 114 is an adhesive material layer formed on the first substrate 102 to bond the first substrate 102 and the LED unit 120. In some embodiments, bonding layer 114 may include a non-conductive material, such as Polyimide (PI), Polydimethylsiloxane (PDMS), SU-8 photoresist, Polymethylglutarimide (PMGI), non-conductive film (NCF), or other suitable material. It should be understood that the description of the material of the bonding layer 114 is illustrative only and not limited to the enumerated examples, and that one skilled in the art will appreciate that other suitable materials may be used as desired, all within the scope of the present application.
As shown in fig. 1A, the bonding layer 114 under each LED cell 120 extends to the bonding layer 114 under the adjacent LED cell 120. Accordingly, the bonding strength between the substrate 102 and the plurality of LED units 120 may be enhanced, and the risk of peeling of the LED structure 100 may be reduced.
Fig. 1B illustrates a cross-sectional view of one LED unit 120 of the LED structure 100 according to some embodiments of the present application. The LED unit 120 includes an ohmic contact layer 112, a first doping type semiconductor layer 151, a Multiple Quantum Well (MQW) layer 152, and a second doping type semiconductor layer 153. An ohmic contact layer 112 is formed on the bonding layer 114 and the metal contact 110. In some embodiments, the ohmic contact layer 112 includes a conductive material. For example, the ohmic contact layer 112 may include Indium Tin Oxide (ITO), silver (Ag), Al, Au, or other suitable materials.
The first doping type semiconductor layer 151 is formed on the ohmic contact layer 112. In some embodiments, the first and second doped semiconductor layers 151 and 153 may include one or more layers based on II-VI materials, such as ZnSe or ZnO or III-V nitride materials, such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs, and alloys thereof, and the like, without being limited thereto.
In some embodiments, the first doping type semiconductor layer 151 may be a p-type semiconductor layer and form an anode of the LED unit 120. For example, the first doping type semiconductor layer 151 may be p-type GaN. As another example, the first doping type semiconductor layer 151 may be p-type InGaN. As yet another example, the first doping type semiconductor layer 151 may be a p-type AlInGaP.
In some embodiments, the second doped semiconductor layer 153 may be an n-type semiconductor layer and form a cathode of the LED unit 120. For example, the second doping type semiconductor layer 153 may be n-type GaN. As another example, the second doped semiconductor layer 153 may be n-type InGaN. As yet another example, the second doping type semiconductor layer 153 may be n-type AlInGaP.
The LED unit 120 further includes an MQW layer 152 formed between the first and second doped semiconductor layers 151 and 153. MQW layer 152 is the active region of LED unit 120. In some embodiments, including the first doped semiconductor layer 151, the MQW layer 152 and the second doped semiconductor layer 153 may have a thickness of between about 0.3 μm and about 5 μm. In some other embodiments, including the first doped semiconductor layer 151, the MQW layer 152 and the second doped semiconductor layer 153 may have a thickness of between about 0.4 μm and about 4 μm. In some alternative embodiments, including the first doped semiconductor layer 151, the MQW layer 152 and the second doped semiconductor layer 153 may have a thickness between about 0.5 μm and about 3 μm.
The LED unit 120 has an anode and a cathode connected to a driving circuit (not explicitly shown) formed in the substrate 102. For example, the anode of the LED unit 120 is connected to the source/drain electrode of the driving circuit through the metal contact 110 and the pad 104. The cathode of the LED unit 120 is also connected to a constant voltage source. In some embodiments, the cathodes of the plurality of LED units 120 may be connected to the same constant voltage source.
The LED unit 120 may further include a passivation layer and an electrode layer (not shown). A passivation layer is formed on the second doping type semiconductor layer 153 to protect and isolate the LED unit 120. In some embodiments, the passivation layer may include SiO2、Al2O3SiN, or other suitable material. In some embodiments, the passivation layer may comprise polyimide, SU-8 photoresist, or other photo-patternable polymer. The electrode layer is formed on a portion of the passivation layer and connected to the second doping type semiconductor layer 153 through an opening on the passivation layer. In some embodiments, the electrode layers of the plurality of LED units 120 may be electrically connectedTo the same constant voltage source and the plurality of LED units 120 share a common cathode. The second doping type semiconductor layers 153 of the plurality of LED units 120 may be electrically connected together by sharing a common cathode, and the operation of the plurality of LED units 120 may be controlled by the driving circuit by changing the voltage levels of the first doping type semiconductor layers 151 of the plurality of LED units 120, respectively. In some embodiments, the electrode layer may be a conductive material such as Indium Tin Oxide (ITO), Cr, Ti, Pt, Au, Al, copper (Cu), germanium (Ge), Ni, or other suitable materials.
Fig. 2A-2I illustrate cross-sectional views of an LED structure 100 at different stages of the fabrication process according to some embodiments of the present application. Fig. 4 is a flow chart of a method 400 for fabricating the LED structure 100 according to some embodiments of the present application. To better explain the present application, fig. 2A to 2I and the flowchart of fig. 4 will be described together.
In operation 402 of fig. 2A and 4, a driving circuit is formed in the first substrate 102 and includes the pad 104. For example, the driver circuit may include a CMOS device fabricated on a silicon wafer, and some wafer level package layers or fan-out structures are stacked on the CMOS to form the pads 104. For another example, the driving circuit may include TFTs fabricated on a glass substrate, and some wafer level packaging layers or fan-out structures are stacked on the TFTs to form the pads 104. The semiconductor layer 108 is formed on the second substrate 106, and the semiconductor layer 108 includes a first doped semiconductor layer 151, a second doped semiconductor layer 153, and an MQW layer 152.
In some embodiments, the first substrate 102 or the second substrate 130 may include a semiconductor material, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, or the like, without being limited thereto. In some embodiments, the first substrate 102 or the second substrate 130 may be made of a non-conductive material, such as glass, plastic, or sapphire wafer, and the like, without being limited thereto. In some embodiments, the first substrate 102 may have a driving circuit formed therein, and the first substrate 102 may include a CMOS backplane or a TFT glass substrate. In some embodiments, the first and second doping type semiconductor layers 151 and 153 may include one or more layers based on a II-VI material (such as ZnSe or ZnO) or a III-V nitride material (such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs, alloys thereof, and the like, without being limited thereto). In some embodiments, the first doped semiconductor layer 112 may include a p-type semiconductor layer, and the second doped semiconductor layer 116 may include an n-type semiconductor layer.
In operation 404 of fig. 2B and 4, a plurality of metal contacts 110 are formed on the first substrate 102 on each of the pads 104. Each metal contact 110 is electrically connected to one pad 104 of the driver circuit. In some embodiments, the metal contacts 110 may include Au, Pt, Cr, Al, Ni, Ti, or other suitable materials. In some embodiments, the cross-sectional area of the metal contact 110 is less than about 1 micron in diameter. In some other embodiments, the cross-sectional area of the metal contact 110 is between about 0.5 microns and about 1 micron in diameter. In some embodiments, the metal contact 110 has a thickness of less than about 1 micron.
To form the metal contacts 110, in some embodiments, a photoresist layer may be deposited on the first substrate 102 to cover the plurality of pads 104. Then, a photolithography process may be used to form a plurality of openings on each pad 104 and expose each pad 104. A metal material, such as Au, Pt, Cr, Al, Ni, Ti, or other suitable material, may be formed in the opening by Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), or other suitable process. The photoresist layer may then be removed by an etching or ashing process. After the photoresist layer is removed, a metal contact 110 is formed on each pad 104.
As shown in fig. 2B, the ohmic contact layer 112 is directly formed on the first doping type semiconductor layer 151. In some embodiments, the ohmic contact layer 112 includes a conductive material. In some embodiments, the ohmic contact layer 112 may include Indium Tin Oxide (ITO), Ag, Al, Au, or other suitable materials. The ohmic contact layer 112 provides an electrical connection having a linear current-voltage curve between two conductors (e.g., the metal contact 110 and the first doped semiconductor layer 151). The ohmic contact layer 112 has a low resistance to allow charges to easily flow in both directions between the metal contact 110 and the first doping type semiconductor layer 151. The ohmic contact layer 112 directly contacts the first doping type semiconductor layer 151, which is an anode of the LED unit 120, and provides an electrical connection between the first doping type semiconductor layer 151 and the metal contact 110. In other words, the ohmic contact layer 112 is formed on the first doping type semiconductor layer 151 without any layer therebetween. Accordingly, after the ohmic contact layer 112 is bonded to the metal contact 110, the ohmic contact layer 112 may provide a linear current-voltage curve between the metal contact 110 and the first doping type semiconductor layer 151.
Then, as shown in fig. 2C and in operation 406 of fig. 4, a bonding layer 114 is deposited on the first substrate 102, the plurality of pads 104, and the plurality of metal contacts 110. Bonding layer 114 includes a non-conductive adhesive material. In some embodiments, the bonding layer 114 may include Polyimide (PI), Polydimethylsiloxane (PDMS), SU-8 photoresist, Polymethylglutarimide (PMGI), a non-conductive film, or other suitable material. In some embodiments, the bonding layer 114 may be deposited on the first substrate 102, the plurality of pads 104, and the plurality of metal contacts 110 by a spin coating process, and the thickness of the bonding layer 114 on top of each metal contact 110 is thinner than the thickness of the bonding layer 114 on the first substrate 102 and the pads 104 due to the liquid physical properties of the bonding layer 114.
As shown in fig. 2D and operation 408 of fig. 4, the second substrate 106, the semiconductor layer 108 and the ohmic contact layer 112 are flipped over and placed on the bonding layer 114. The first substrate 102 and the second substrate 106 are pressed against each other to bond the semiconductor layer 108 and the ohmic contact layer 112 with the bonding layer 114. Due to the pressure exerted on the first substrate 102 and the second substrate 106, the bonding layer 114 deposited on top of each metal contact 110 may be squeezed or extruded such that the metal contact 110 may electrically contact the ohmic contact layer 112.
Fig. 3A-3B illustrate cross-sectional views of the LED structure 100 resulting from performing operation 408 using alternative operations according to some embodiments of the present application. The operations shown in fig. 3A to 3B may replace the operations shown in fig. 2C to 2D. As shown in fig. 3A, after performing operation 406 to deposit a bonding layer 114 on the first substrate 102, the plurality of pads 104, and the plurality of metal contacts 110, the bonding layer 114 is deposited on top of each of the metal contacts 110. A photolithography process and an etching process may then be used to remove the bonding layer 114 deposited on top of each metal contact 110 and expose the top of each metal contact 110, as shown in fig. 3A.
As shown in fig. 3B, the second substrate 106 (including the semiconductor layer 108 and the ohmic contact layer 112) is flipped and placed on the bonding layer 114. Since the top of each metal contact 110 is exposed, the metal contact 110 may electrically contact the ohmic contact layer 112.
As shown in fig. 2E, after bonding the second substrate 106, the semiconductor layer 108, and the ohmic contact layer 112 to the bonding layer 114 on the first substrate 102, the second substrate 106 may be removed from the semiconductor layer 108. Fig. 2E shows the bonding layer 114 between the first substrate 102 and the ohmic contact layer 112. However, in some embodiments, the bonding layer 114 may include one or more layers to bond the first substrate 102 and the ohmic contact layer 112. For example, bonding layer 114 may include a single non-conductive layer. For another example, the bonding layer 114 may include a plurality of non-conductive layers, or an adhesive material and a non-conductive layer.
After removing the second substrate 106, in some embodiments, a thinning operation may optionally be performed on the second doped semiconductor layer 153 to remove a portion of the second doped semiconductor layer 153. In some embodiments, the thinning operation may include a dry etching or wet etching operation. In some embodiments, the thinning operation may include a Chemical Mechanical Polishing (CMP) operation. In some embodiments, the thickness of the MQW layer 152 and the second doped semiconductor layer 153 including the first doped semiconductor layer 151 may be between about 0.3 μm and about 5 μm after the thinning operation. In some other embodiments, the thickness of the MQW layer 152 and the second doped semiconductor layer 153 may be between about 0.4 μm to about 4 μm, including the first doped semiconductor layer 151, after the thinning operation. In some alternative embodiments, the thickness of the MQW layer 152 and the second doped semiconductor layer 153 may be between about 0.5 μm to about 3 μm, including the first doped semiconductor layer 151, after the thinning operation.
Referring to fig. 2F, a first etching operation is performed to remove a portion of the semiconductor layer 108, including the first doped semiconductor layer 151, the MQW layer 152, and the second doped semiconductor layer 153, to form a plurality of LED mesas. In some embodiments, the first etching operation may include dry etching, wet etching, or other suitable processes. Referring to fig. 2G, a second etching operation is performed to remove a portion of the ohmic contact layer 112 to form a plurality of LED units 120. In some embodiments, the second etching operation may include dry etching, wet etching, or other suitable processes.
Referring to fig. 2H, a passivation layer 116 is formed on the semiconductor layer 108 to cover the first doping type semiconductor layer 151, the MQW layer 152, the second doping type semiconductor layer 153, the ohmic contact layer 112, and the bonding layer 114. In some embodiments, passivation layer 116 may include SiO2、Al2O3SiN, or other suitable material for isolation and protection. In some embodiments, passivation layer 116 may comprise polyimide, SU-8 photoresist, or other photo-patternable polymer. In fig. 2H, the passivation layers 116 of adjacent LED units 120 are connected together. However, it is to be understood that the passivation layers 116 of adjacent LED units 120 may alternatively be separated.
As shown in fig. 2I, after the passivation layer 116 is formed, a plurality of openings are formed on the passivation layer 116 to expose the second doping type semiconductor layer 153 of each LED unit 120. Then, an electrode layer 118 is formed on the passivation layer 116 to cover each opening on each LED unit 120. The electrode layer 118 electrically contacts the second doped semiconductor layer 153 of each LED unit 120 to form an electrical path to connect the LED unit with a driving circuit. In some embodiments, electrode layer 118 may include a conductive material such as Indium Tin Oxide (ITO), Cr, Ti, Pt, Au, Al, Cu, Ge, or Ni. The electrode layers 118 of the plurality of LED units 120 may be electrically connected to the same constant voltage source, and the plurality of LED units 120 share a common cathode.
The present application provides an LED structure and a method for manufacturing the same, wherein a bonding layer or adhesive material for bonding an epitaxial layer on a receiving substrate is a non-conductive material. The non-conductive bonding layer has metal contacts embedded therein to electrically connect the epitaxial layers (including the LED cells) with the driving circuitry in the receiving substrate. By using a non-conductive material to bond only with the small metal contacts embedded therein, the metal material used to bond the epitaxial layer to the receiving substrate can be greatly reduced, thus reducing manufacturing costs, as compared to conventional designs. In addition, by bonding the epitaxial layer on the receiving substrate using the non-conductive bonding layer, heat treatment for the conductive adhesive material is not required, and therefore, it is also possible to reduce internal stress caused by thermal mismatch between the epitaxial layer and the receiving substrate.
According to one aspect of the present application, an LED structure is disclosed. The LED structure comprises a substrate, a plurality of LED units, a bonding layer and metal contacts. The substrate includes a driving circuit, and a plurality of LED units are formed on the substrate. A bonding layer is formed between the substrate and the plurality of LED units, and a metal contact is formed in the bonding layer under each of the LED units to electrically connect each of the LED units with a pad of the driving circuit. The first cross-sectional area of the metal contact is less than the second cross-sectional area of each LED unit.
In some embodiments, each LED cell includes a first doped semiconductor layer formed on the bonding layer, a Multiple Quantum Well (MQW) layer formed on the first doped semiconductor layer, and a second doped semiconductor layer formed on the MQW layer. In some embodiments, each LED unit further includes an ohmic contact layer formed between the first doping type semiconductor layer and the bonding layer. The first cross-sectional area of the metal contact is less than the fourth cross-sectional area of the ohmic contact layer. In some embodiments, the anode of each LED unit directly contacts the ohmic contact layer.
In some embodiments, the metal contacts are all sized small enough. For example, the first cross-sectional area of the metal contact has a diameter of less than about 1 micron. As another example, the metal contact has a thickness of less than about 1 micron. In some embodiments, the plurality of LED units includes a first LED unit and a second LED unit adjacent to the first LED unit. The bonding layer of a first LED unit extends horizontally to the bonding layer of a second LED unit adjacent to the first LED unit. In some embodiments, the plurality of LED units share a common cathode.
In accordance with another aspect of the present application, an LED structure is disclosed. The LED structure includes a substrate, a plurality of LED units, and a non-conductive bonding layer. The substrate includes a driving circuit, and a plurality of LED units are formed on the substrate. The non-conductive bonding layer bonds the substrate and the plurality of LED units. The non-conductive bonding layer has metal contacts embedded therein, and the metal contacts and a portion of the non-conductive bonding layer are integrally formed under each LED unit.
In some embodiments, the non-conductive bonding layer is formed from Polyimide (PI), Polydimethylsiloxane (PDMS), SU-8 photoresist, or Polymethylglutarimide (PMGI). In some embodiments, a metal contact electrically connects each LED unit with a pad of the driving circuit.
In some embodiments, each LED unit includes an ohmic contact layer formed on the metal contact and a portion of the non-conductive bonding layer, and the metal contact electrically connects the ohmic contact layer with a pad of the driving circuit. In some embodiments, the anode of each LED unit directly contacts the ohmic contact layer.
According to a further aspect of the present application, a method of manufacturing an LED structure is disclosed. A driving circuit having a plurality of pads is formed in a first substrate. A plurality of metal contacts are formed on the first substrate, and each metal contact is located on one of the plurality of pads. A non-conductive bonding layer is formed on the first substrate to cover the plurality of pads and the plurality of metal contacts. A plurality of LED units are formed on the non-conductive bonding layer. Each LED unit is electrically connected to one of the plurality of pads through one of the plurality of metal contacts.
In some embodiments, a semiconductor layer is formed on a second substrate, the second substrate is flipped to place the semiconductor layer on the non-conductive bonding layer, the first substrate and the second substrate are pressed against each other to bond the semiconductor layer with the non-conductive bonding layer, and the second substrate is removed.
In some embodiments, a portion of the non-conductive bonding layer over the plurality of metal contacts is extruded to electrically connect the semiconductor layer with the plurality of metal contacts. In some embodiments, after forming the semiconductor layer on the second substrate, an ohmic contact layer is formed on the semiconductor layer.
In some embodiments, after removing the second substrate, a first etching operation is performed to remove a portion of the semiconductor layer to form a plurality of LED units. In some embodiments, a second etching operation is performed to remove a portion of the ohmic contact layer between each LED unit.
In some embodiments, after forming the non-conductive bonding layer on the first substrate covering the plurality of pads and the plurality of metal contacts, a portion of the non-conductive bonding layer over the plurality of metal contacts is removed to expose the plurality of metal contacts.
The foregoing description of the specific embodiments may be readily adapted and/or adapted for various applications. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented in this specification.
The breadth and scope of the present application should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.
Claims (20)
1. A Light Emitting Diode (LED) structure, the LED structure comprising:
a substrate including a driving circuit;
a plurality of LED units formed on the substrate;
a bonding layer formed between the substrate and the plurality of LED units; and
a metal contact formed in the bonding layer under each LED cell to electrically connect each LED cell with a pad of the driving circuit,
wherein the first cross-sectional area of the metal contact is less than the second cross-sectional area of each LED unit.
2. The LED structure of claim 1, wherein each LED unit comprises:
a first doped semiconductor layer formed on the bonding layer;
a Multiple Quantum Well (MQW) layer formed on the first doped semiconductor layer; and
a second doped semiconductor layer formed on the MQW layer.
3. The LED structure of claim 2, wherein each LED cell further comprises an ohmic contact layer formed between the first doped semiconductor layer and the bonding layer, wherein the first cross-sectional area of the metal contact is less than a cross-sectional area of ohmic contact layer.
4. The LED structure of claim 3, wherein the anode of each LED unit directly contacts the ohmic contact layer.
5. The LED structure of claim 1, wherein the first cross-sectional area of the metal contact is less than 1 micron in diameter.
6. The LED structure of claim 1, wherein the metal contact is less than 1 micron thick.
7. The LED structure of claim 1, wherein the plurality of LED units comprises a first LED unit and a second LED unit adjacent to the first LED unit, wherein the bonding layer of the first LED unit extends horizontally to the bonding layer of the second LED unit adjacent to the first LED unit.
8. The LED structure of claim 1, wherein said plurality of LED units share a common cathode.
9. A Light Emitting Diode (LED) structure, the LED structure comprising:
a substrate including a driving circuit;
a plurality of LED units formed on the substrate; and
a non-conductive bonding layer bonding the substrate and the plurality of LED units,
wherein a metal contact is embedded in the non-conductive bonding layer, and the metal contact and a portion of the non-conductive bonding layer are integrally formed under each LED unit.
10. The LED structure of claim 9, wherein the non-conductive bonding layer is formed of Polyimide (PI), Polydimethylsiloxane (PDMS), SU-8 photoresist, or Polymethylglutarimide (PMGI).
11. The LED structure of claim 9, wherein said metal contacts electrically connect each LED unit with a pad of said driver circuit.
12. The LED structure of claim 11, wherein each LED unit includes an ohmic contact layer formed on the metal contact and the portion of the non-conductive bonding layer, and the metal contact electrically connects the ohmic contact layer with the pad of the driving circuit.
13. The LED structure of claim 12, wherein the anode of each LED unit directly contacts the ohmic contact layer.
14. A method of fabricating a Light Emitting Diode (LED) structure, comprising:
forming a driving circuit having a plurality of pads in a first substrate;
forming a plurality of metal contacts on the first substrate, and each metal contact being located on one of the plurality of pads;
forming a non-conductive bonding layer on the first substrate to cover the plurality of pads and the plurality of metal contacts; and
forming a plurality of LED units on the non-conductive bonding layer,
wherein each LED unit is electrically connected to one of the plurality of pads through one of the plurality of metal contacts.
15. The method of claim 14, wherein forming the plurality of LED units on the non-conductive bonding layer comprises:
forming a semiconductor layer on the second substrate;
turning over the second substrate to place the semiconductor layer on the non-conductive bonding layer;
pressing the first substrate and the second substrate against each other to bond the semiconductor layer and the non-conductive bonding layer; and
and removing the second substrate.
16. The method of claim 15, wherein pressing the first and second substrates against each other to bond the semiconductor layer and the non-conductive bonding layer comprises:
extruding a portion of the non-conductive bonding layer over the plurality of metal contacts to electrically connect the semiconductor layer with the plurality of metal contacts.
17. The method of claim 15, further comprising:
forming an ohmic contact layer on the second semiconductor layer after forming the semiconductor layer on the second substrate.
18. The method of claim 17, further comprising:
after removing the second substrate, a first etching operation is performed to remove a portion of the semiconductor layer to form the plurality of LED units.
19. The method of claim 18, further comprising:
and performing a second etching operation to remove a portion of the ohmic contact layer between each LED unit.
20. The method of claim 14, further comprising:
after forming the non-conductive bonding layer on the first substrate to cover the plurality of pads and the plurality of metal contacts, removing a portion of the non-conductive bonding layer on the plurality of metal contacts to expose the plurality of metal contacts.
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| US17/228,786 US11817535B2 (en) | 2020-04-21 | 2021-04-13 | Light emitting diode structure and method for manufacturing the same |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114759130A (en) * | 2022-06-15 | 2022-07-15 | 镭昱光电科技(苏州)有限公司 | Micro-LED display chip and preparation method thereof |
| CN115064528A (en) * | 2022-04-29 | 2022-09-16 | 诺视科技(苏州)有限公司 | Pixel unit for semiconductor device, manufacturing method thereof and micro display screen |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030189215A1 (en) * | 2002-04-09 | 2003-10-09 | Jong-Lam Lee | Method of fabricating vertical structure leds |
| CN102231378A (en) * | 2011-05-25 | 2011-11-02 | 映瑞光电科技(上海)有限公司 | Light-emitting diode (LED) packaging structure and preparation method thereof |
| CN102479896A (en) * | 2010-11-26 | 2012-05-30 | 大连美明外延片科技有限公司 | Light emitting diode chip |
| CN109841715A (en) * | 2017-11-27 | 2019-06-04 | 株式会社流明斯 | LED chip and the LED module for using the LED chip |
| CN110634905A (en) * | 2018-06-22 | 2019-12-31 | 晶元光电股份有限公司 | Display with light emitting diode array and manufacturing method thereof |
| WO2020163436A1 (en) * | 2019-02-05 | 2020-08-13 | Facebook Technologies, Llc | Process flow for hybrid tft-based micro display projector |
| CN112531091A (en) * | 2020-06-12 | 2021-03-19 | 友达光电股份有限公司 | Light emitting device |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102060471B1 (en) * | 2017-02-01 | 2019-12-30 | 엘지전자 주식회사 | Display device using semiconductor light emitting device |
| WO2018169968A1 (en) * | 2017-03-16 | 2018-09-20 | Invensas Corporation | Direct-bonded led arrays and applications |
| CN109390437B (en) * | 2017-08-08 | 2021-06-15 | 英属开曼群岛商錼创科技股份有限公司 | Micro light-emitting diode device and manufacturing method thereof |
-
2021
- 2021-04-26 WO PCT/CN2021/089870 patent/WO2022217648A1/en active Application Filing
- 2021-04-26 CN CN202110456652.6A patent/CN113488576A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030189215A1 (en) * | 2002-04-09 | 2003-10-09 | Jong-Lam Lee | Method of fabricating vertical structure leds |
| CN102479896A (en) * | 2010-11-26 | 2012-05-30 | 大连美明外延片科技有限公司 | Light emitting diode chip |
| CN102231378A (en) * | 2011-05-25 | 2011-11-02 | 映瑞光电科技(上海)有限公司 | Light-emitting diode (LED) packaging structure and preparation method thereof |
| CN109841715A (en) * | 2017-11-27 | 2019-06-04 | 株式会社流明斯 | LED chip and the LED module for using the LED chip |
| CN110634905A (en) * | 2018-06-22 | 2019-12-31 | 晶元光电股份有限公司 | Display with light emitting diode array and manufacturing method thereof |
| WO2020163436A1 (en) * | 2019-02-05 | 2020-08-13 | Facebook Technologies, Llc | Process flow for hybrid tft-based micro display projector |
| CN112531091A (en) * | 2020-06-12 | 2021-03-19 | 友达光电股份有限公司 | Light emitting device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115064528A (en) * | 2022-04-29 | 2022-09-16 | 诺视科技(苏州)有限公司 | Pixel unit for semiconductor device, manufacturing method thereof and micro display screen |
| CN114759130A (en) * | 2022-06-15 | 2022-07-15 | 镭昱光电科技(苏州)有限公司 | Micro-LED display chip and preparation method thereof |
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| Publication number | Publication date |
|---|---|
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